xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice.h (revision 7aae80cef7ba4b5245d392e62de1ebf1fc035f49)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include <linux/ethtool.h>
26 #include <linux/timer.h>
27 #include <linux/delay.h>
28 #include <linux/bitmap.h>
29 #include <linux/log2.h>
30 #include <linux/ip.h>
31 #include <linux/sctp.h>
32 #include <linux/ipv6.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/if_bridge.h>
35 #include <linux/ctype.h>
36 #include <linux/bpf.h>
37 #include <linux/auxiliary_bus.h>
38 #include <linux/avf/virtchnl.h>
39 #include <linux/cpu_rmap.h>
40 #include <linux/dim.h>
41 #include <net/devlink.h>
42 #include <net/ipv6.h>
43 #include <net/xdp_sock.h>
44 #include <net/xdp_sock_drv.h>
45 #include <net/geneve.h>
46 #include <net/gre.h>
47 #include <net/udp_tunnel.h>
48 #include <net/vxlan.h>
49 #if IS_ENABLED(CONFIG_DCB)
50 #include <scsi/iscsi_proto.h>
51 #endif /* CONFIG_DCB */
52 #include "ice_devids.h"
53 #include "ice_type.h"
54 #include "ice_txrx.h"
55 #include "ice_dcb.h"
56 #include "ice_switch.h"
57 #include "ice_common.h"
58 #include "ice_sched.h"
59 #include "ice_idc_int.h"
60 #include "ice_virtchnl_pf.h"
61 #include "ice_sriov.h"
62 #include "ice_ptp.h"
63 #include "ice_fdir.h"
64 #include "ice_xsk.h"
65 #include "ice_arfs.h"
66 #include "ice_repr.h"
67 #include "ice_lag.h"
68 
69 #define ICE_BAR0		0
70 #define ICE_REQ_DESC_MULTIPLE	32
71 #define ICE_MIN_NUM_DESC	64
72 #define ICE_MAX_NUM_DESC	8160
73 #define ICE_DFLT_MIN_RX_DESC	512
74 #define ICE_DFLT_NUM_TX_DESC	256
75 #define ICE_DFLT_NUM_RX_DESC	2048
76 
77 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
78 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
79 #define ICE_AQ_LEN		192
80 #define ICE_MBXSQ_LEN		64
81 #define ICE_SBQ_LEN		64
82 #define ICE_MIN_LAN_TXRX_MSIX	1
83 #define ICE_MIN_LAN_OICR_MSIX	1
84 #define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
85 #define ICE_FDIR_MSIX		2
86 #define ICE_RDMA_NUM_AEQ_MSIX	4
87 #define ICE_MIN_RDMA_MSIX	2
88 #define ICE_ESWITCH_MSIX	1
89 #define ICE_NO_VSI		0xffff
90 #define ICE_VSI_MAP_CONTIG	0
91 #define ICE_VSI_MAP_SCATTER	1
92 #define ICE_MAX_SCATTER_TXQS	16
93 #define ICE_MAX_SCATTER_RXQS	16
94 #define ICE_Q_WAIT_RETRY_LIMIT	10
95 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
96 #define ICE_MAX_LG_RSS_QS	256
97 #define ICE_RES_VALID_BIT	0x8000
98 #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
99 #define ICE_RES_RDMA_VEC_ID	(ICE_RES_MISC_VEC_ID - 1)
100 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */
101 #define ICE_RES_VF_CTRL_VEC_ID	(ICE_RES_RDMA_VEC_ID - 1)
102 #define ICE_INVAL_Q_INDEX	0xffff
103 #define ICE_INVAL_VFID		256
104 
105 #define ICE_MAX_RXQS_PER_TC		256	/* Used when setting VSI context per TC Rx queues */
106 #define ICE_MAX_RESET_WAIT		20
107 
108 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
109 
110 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
111 
112 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
113 
114 #define ICE_UP_TABLE_TRANSLATE(val, i) \
115 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
116 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
117 
118 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
119 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
120 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
121 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
122 
123 /* Macro for each VSI in a PF */
124 #define ice_for_each_vsi(pf, i) \
125 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
126 
127 /* Macros for each Tx/Rx ring in a VSI */
128 #define ice_for_each_txq(vsi, i) \
129 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
130 
131 #define ice_for_each_rxq(vsi, i) \
132 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
133 
134 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
135 #define ice_for_each_alloc_txq(vsi, i) \
136 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
137 
138 #define ice_for_each_alloc_rxq(vsi, i) \
139 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
140 
141 #define ice_for_each_q_vector(vsi, i) \
142 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
143 
144 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
145 				ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
146 
147 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
148 				     ICE_PROMISC_MCAST_TX | \
149 				     ICE_PROMISC_UCAST_RX | \
150 				     ICE_PROMISC_MCAST_RX | \
151 				     ICE_PROMISC_VLAN_TX  | \
152 				     ICE_PROMISC_VLAN_RX)
153 
154 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
155 
156 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
157 				     ICE_PROMISC_MCAST_RX | \
158 				     ICE_PROMISC_VLAN_TX  | \
159 				     ICE_PROMISC_VLAN_RX)
160 
161 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
162 
163 enum ice_feature {
164 	ICE_F_DSCP,
165 	ICE_F_MAX
166 };
167 
168 struct ice_txq_meta {
169 	u32 q_teid;	/* Tx-scheduler element identifier */
170 	u16 q_id;	/* Entry in VSI's txq_map bitmap */
171 	u16 q_handle;	/* Relative index of Tx queue within TC */
172 	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
173 	u8 tc;		/* TC number that Tx queue belongs to */
174 };
175 
176 struct ice_tc_info {
177 	u16 qoffset;
178 	u16 qcount_tx;
179 	u16 qcount_rx;
180 	u8 netdev_tc;
181 };
182 
183 struct ice_tc_cfg {
184 	u8 numtc; /* Total number of enabled TCs */
185 	u8 ena_tc; /* Tx map */
186 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
187 };
188 
189 struct ice_res_tracker {
190 	u16 num_entries;
191 	u16 end;
192 	u16 list[];
193 };
194 
195 struct ice_qs_cfg {
196 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
197 	unsigned long *pf_map;
198 	unsigned long pf_map_size;
199 	unsigned int q_count;
200 	unsigned int scatter_count;
201 	u16 *vsi_map;
202 	u16 vsi_map_offset;
203 	u8 mapping_mode;
204 };
205 
206 struct ice_sw {
207 	struct ice_pf *pf;
208 	u16 sw_id;		/* switch ID for this switch */
209 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
210 	struct ice_vsi *dflt_vsi;	/* default VSI for this switch */
211 	u8 dflt_vsi_ena:1;	/* true if above dflt_vsi is enabled */
212 };
213 
214 enum ice_pf_state {
215 	ICE_TESTING,
216 	ICE_DOWN,
217 	ICE_NEEDS_RESTART,
218 	ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
219 	ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
220 	ICE_PFR_REQ,		/* set by driver */
221 	ICE_CORER_REQ,		/* set by driver */
222 	ICE_GLOBR_REQ,		/* set by driver */
223 	ICE_CORER_RECV,		/* set by OICR handler */
224 	ICE_GLOBR_RECV,		/* set by OICR handler */
225 	ICE_EMPR_RECV,		/* set by OICR handler */
226 	ICE_SUSPENDED,		/* set on module remove path */
227 	ICE_RESET_FAILED,		/* set by reset/rebuild */
228 	/* When checking for the PF to be in a nominal operating state, the
229 	 * bits that are grouped at the beginning of the list need to be
230 	 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
231 	 * be checked. If you need to add a bit into consideration for nominal
232 	 * operating state, it must be added before
233 	 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
234 	 * without appropriate consideration.
235 	 */
236 	ICE_STATE_NOMINAL_CHECK_BITS,
237 	ICE_ADMINQ_EVENT_PENDING,
238 	ICE_MAILBOXQ_EVENT_PENDING,
239 	ICE_SIDEBANDQ_EVENT_PENDING,
240 	ICE_MDD_EVENT_PENDING,
241 	ICE_VFLR_EVENT_PENDING,
242 	ICE_FLTR_OVERFLOW_PROMISC,
243 	ICE_VF_DIS,
244 	ICE_VF_DEINIT_IN_PROGRESS,
245 	ICE_CFG_BUSY,
246 	ICE_SERVICE_SCHED,
247 	ICE_SERVICE_DIS,
248 	ICE_FD_FLUSH_REQ,
249 	ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
250 	ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
251 	ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
252 	ICE_LINK_DEFAULT_OVERRIDE_PENDING,
253 	ICE_PHY_INIT_COMPLETE,
254 	ICE_FD_VF_FLUSH_CTX,		/* set at FD Rx IRQ or timeout */
255 	ICE_STATE_NBITS		/* must be last */
256 };
257 
258 enum ice_vsi_state {
259 	ICE_VSI_DOWN,
260 	ICE_VSI_NEEDS_RESTART,
261 	ICE_VSI_NETDEV_ALLOCD,
262 	ICE_VSI_NETDEV_REGISTERED,
263 	ICE_VSI_UMAC_FLTR_CHANGED,
264 	ICE_VSI_MMAC_FLTR_CHANGED,
265 	ICE_VSI_VLAN_FLTR_CHANGED,
266 	ICE_VSI_PROMISC_CHANGED,
267 	ICE_VSI_STATE_NBITS		/* must be last */
268 };
269 
270 /* struct that defines a VSI, associated with a dev */
271 struct ice_vsi {
272 	struct net_device *netdev;
273 	struct ice_sw *vsw;		 /* switch this VSI is on */
274 	struct ice_pf *back;		 /* back pointer to PF */
275 	struct ice_port_info *port_info; /* back pointer to port_info */
276 	struct ice_ring **rx_rings;	 /* Rx ring array */
277 	struct ice_ring **tx_rings;	 /* Tx ring array */
278 	struct ice_q_vector **q_vectors; /* q_vector array */
279 
280 	irqreturn_t (*irq_handler)(int irq, void *data);
281 
282 	u64 tx_linearize;
283 	DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
284 	unsigned int current_netdev_flags;
285 	u32 tx_restart;
286 	u32 tx_busy;
287 	u32 rx_buf_failed;
288 	u32 rx_page_failed;
289 	u16 num_q_vectors;
290 	u16 base_vector;		/* IRQ base for OS reserved vectors */
291 	enum ice_vsi_type type;
292 	u16 vsi_num;			/* HW (absolute) index of this VSI */
293 	u16 idx;			/* software index in pf->vsi[] */
294 
295 	s16 vf_id;			/* VF ID for SR-IOV VSIs */
296 
297 	u16 ethtype;			/* Ethernet protocol for pause frame */
298 	u16 num_gfltr;
299 	u16 num_bfltr;
300 
301 	/* RSS config */
302 	u16 rss_table_size;	/* HW RSS table size */
303 	u16 rss_size;		/* Allocated RSS queues */
304 	u8 *rss_hkey_user;	/* User configured hash keys */
305 	u8 *rss_lut_user;	/* User configured lookup table entries */
306 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
307 
308 	/* aRFS members only allocated for the PF VSI */
309 #define ICE_MAX_ARFS_LIST	1024
310 #define ICE_ARFS_LST_MASK	(ICE_MAX_ARFS_LIST - 1)
311 	struct hlist_head *arfs_fltr_list;
312 	struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
313 	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */
314 	atomic_t *arfs_last_fltr_id;
315 
316 	u16 max_frame;
317 	u16 rx_buf_len;
318 
319 	struct ice_aqc_vsi_props info;	 /* VSI properties */
320 
321 	/* VSI stats */
322 	struct rtnl_link_stats64 net_stats;
323 	struct ice_eth_stats eth_stats;
324 	struct ice_eth_stats eth_stats_prev;
325 
326 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
327 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
328 
329 	u8 irqs_ready:1;
330 	u8 current_isup:1;		 /* Sync 'link up' logging */
331 	u8 stat_offsets_loaded:1;
332 	u16 num_vlan;
333 
334 	/* queue information */
335 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
336 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
337 	u16 *txq_map;			 /* index in pf->avail_txqs */
338 	u16 *rxq_map;			 /* index in pf->avail_rxqs */
339 	u16 alloc_txq;			 /* Allocated Tx queues */
340 	u16 num_txq;			 /* Used Tx queues */
341 	u16 alloc_rxq;			 /* Allocated Rx queues */
342 	u16 num_rxq;			 /* Used Rx queues */
343 	u16 req_txq;			 /* User requested Tx queues */
344 	u16 req_rxq;			 /* User requested Rx queues */
345 	u16 num_rx_desc;
346 	u16 num_tx_desc;
347 	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
348 	struct ice_tc_cfg tc_cfg;
349 	struct bpf_prog *xdp_prog;
350 	struct ice_ring **xdp_rings;	 /* XDP ring array */
351 	unsigned long *af_xdp_zc_qps;	 /* tracks AF_XDP ZC enabled qps */
352 	u16 num_xdp_txq;		 /* Used XDP queues */
353 	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
354 
355 	struct net_device **target_netdevs;
356 
357 	/* setup back reference, to which aggregator node this VSI
358 	 * corresponds to
359 	 */
360 	struct ice_agg_node *agg_node;
361 } ____cacheline_internodealigned_in_smp;
362 
363 /* struct that defines an interrupt vector */
364 struct ice_q_vector {
365 	struct ice_vsi *vsi;
366 
367 	u16 v_idx;			/* index in the vsi->q_vector array. */
368 	u16 reg_idx;
369 	u8 num_ring_rx;			/* total number of Rx rings in vector */
370 	u8 num_ring_tx;			/* total number of Tx rings in vector */
371 	u8 wb_on_itr:1;			/* if true, WB on ITR is enabled */
372 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
373 	 * value to the device
374 	 */
375 	u8 intrl;
376 
377 	struct napi_struct napi;
378 
379 	struct ice_ring_container rx;
380 	struct ice_ring_container tx;
381 
382 	cpumask_t affinity_mask;
383 	struct irq_affinity_notify affinity_notify;
384 
385 	char name[ICE_INT_NAME_STR_LEN];
386 
387 	u16 total_events;	/* net_dim(): number of interrupts processed */
388 } ____cacheline_internodealigned_in_smp;
389 
390 enum ice_pf_flags {
391 	ICE_FLAG_FLTR_SYNC,
392 	ICE_FLAG_RDMA_ENA,
393 	ICE_FLAG_RSS_ENA,
394 	ICE_FLAG_SRIOV_ENA,
395 	ICE_FLAG_SRIOV_CAPABLE,
396 	ICE_FLAG_DCB_CAPABLE,
397 	ICE_FLAG_DCB_ENA,
398 	ICE_FLAG_FD_ENA,
399 	ICE_FLAG_PTP_SUPPORTED,		/* PTP is supported by NVM */
400 	ICE_FLAG_PTP,			/* PTP is enabled by software */
401 	ICE_FLAG_AUX_ENA,
402 	ICE_FLAG_ADV_FEATURES,
403 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
404 	ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
405 	ICE_FLAG_NO_MEDIA,
406 	ICE_FLAG_FW_LLDP_AGENT,
407 	ICE_FLAG_MOD_POWER_UNSUPPORTED,
408 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
409 	ICE_FLAG_LEGACY_RX,
410 	ICE_FLAG_VF_TRUE_PROMISC_ENA,
411 	ICE_FLAG_MDD_AUTO_RESET_VF,
412 	ICE_FLAG_LINK_LENIENT_MODE_ENA,
413 	ICE_PF_FLAGS_NBITS		/* must be last */
414 };
415 
416 struct ice_switchdev_info {
417 	struct ice_vsi *control_vsi;
418 	struct ice_vsi *uplink_vsi;
419 	bool is_running;
420 };
421 
422 struct ice_agg_node {
423 	u32 agg_id;
424 #define ICE_MAX_VSIS_IN_AGG_NODE	64
425 	u32 num_vsis;
426 	u8 valid;
427 };
428 
429 struct ice_pf {
430 	struct pci_dev *pdev;
431 
432 	struct devlink_region *nvm_region;
433 	struct devlink_region *devcaps_region;
434 
435 	/* devlink port data */
436 	struct devlink_port devlink_port;
437 
438 	/* OS reserved IRQ details */
439 	struct msix_entry *msix_entries;
440 	struct ice_res_tracker *irq_tracker;
441 	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
442 	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
443 	 * MSIX vectors allowed on this PF.
444 	 */
445 	u16 sriov_base_vector;
446 
447 	u16 ctrl_vsi_idx;		/* control VSI index in pf->vsi array */
448 
449 	struct ice_vsi **vsi;		/* VSIs created by the driver */
450 	struct ice_sw *first_sw;	/* first switch created by firmware */
451 	u16 eswitch_mode;		/* current mode of eswitch */
452 	/* Virtchnl/SR-IOV config info */
453 	struct ice_vf *vf;
454 	u16 num_alloc_vfs;		/* actual number of VFs allocated */
455 	u16 num_vfs_supported;		/* num VFs supported for this PF */
456 	u16 num_qps_per_vf;
457 	u16 num_msix_per_vf;
458 	/* used to ratelimit the MDD event logging */
459 	unsigned long last_printed_mdd_jiffies;
460 	DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT);
461 	DECLARE_BITMAP(features, ICE_F_MAX);
462 	DECLARE_BITMAP(state, ICE_STATE_NBITS);
463 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
464 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
465 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
466 	unsigned long serv_tmr_period;
467 	unsigned long serv_tmr_prev;
468 	struct timer_list serv_tmr;
469 	struct work_struct serv_task;
470 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
471 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
472 	struct mutex tc_mutex;		/* lock to protect TC changes */
473 	u32 msg_enable;
474 	struct ice_ptp ptp;
475 	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */
476 	u16 rdma_base_vector;
477 
478 	/* spinlock to protect the AdminQ wait list */
479 	spinlock_t aq_wait_lock;
480 	struct hlist_head aq_wait_list;
481 	wait_queue_head_t aq_wait_queue;
482 
483 	wait_queue_head_t reset_wait_queue;
484 
485 	u32 hw_csum_rx_error;
486 	u16 oicr_idx;		/* Other interrupt cause MSIX vector index */
487 	u16 num_avail_sw_msix;	/* remaining MSIX SW vectors left unclaimed */
488 	u16 max_pf_txqs;	/* Total Tx queues PF wide */
489 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
490 	u16 num_lan_msix;	/* Total MSIX vectors for base driver */
491 	u16 num_lan_tx;		/* num LAN Tx queues setup */
492 	u16 num_lan_rx;		/* num LAN Rx queues setup */
493 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
494 	u16 num_alloc_vsi;
495 	u16 corer_count;	/* Core reset count */
496 	u16 globr_count;	/* Global reset count */
497 	u16 empr_count;		/* EMP reset count */
498 	u16 pfr_count;		/* PF reset count */
499 
500 	u8 wol_ena : 1;		/* software state of WoL */
501 	u32 wakeup_reason;	/* last wakeup reason */
502 	struct ice_hw_port_stats stats;
503 	struct ice_hw_port_stats stats_prev;
504 	struct ice_hw hw;
505 	u8 stat_prev_loaded:1; /* has previous stats been loaded */
506 	u16 dcbx_cap;
507 	u32 tx_timeout_count;
508 	unsigned long tx_timeout_last_recovery;
509 	u32 tx_timeout_recovery_level;
510 	char int_name[ICE_INT_NAME_STR_LEN];
511 	struct auxiliary_device *adev;
512 	int aux_idx;
513 	u32 sw_int_count;
514 
515 	__le64 nvm_phy_type_lo; /* NVM PHY type low */
516 	__le64 nvm_phy_type_hi; /* NVM PHY type high */
517 	struct ice_link_default_override_tlv link_dflt_override;
518 	struct ice_lag *lag; /* Link Aggregation information */
519 
520 	struct ice_switchdev_info switchdev;
521 
522 #define ICE_INVALID_AGG_NODE_ID		0
523 #define ICE_PF_AGG_NODE_ID_START	1
524 #define ICE_MAX_PF_AGG_NODES		32
525 	struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
526 #define ICE_VF_AGG_NODE_ID_START	65
527 #define ICE_MAX_VF_AGG_NODES		32
528 	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
529 };
530 
531 struct ice_netdev_priv {
532 	struct ice_vsi *vsi;
533 	struct ice_repr *repr;
534 };
535 
536 /**
537  * ice_irq_dynamic_ena - Enable default interrupt generation settings
538  * @hw: pointer to HW struct
539  * @vsi: pointer to VSI struct, can be NULL
540  * @q_vector: pointer to q_vector, can be NULL
541  */
542 static inline void
543 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
544 		    struct ice_q_vector *q_vector)
545 {
546 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
547 				((struct ice_pf *)hw->back)->oicr_idx;
548 	int itr = ICE_ITR_NONE;
549 	u32 val;
550 
551 	/* clear the PBA here, as this function is meant to clean out all
552 	 * previous interrupts and enable the interrupt
553 	 */
554 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
555 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
556 	if (vsi)
557 		if (test_bit(ICE_VSI_DOWN, vsi->state))
558 			return;
559 	wr32(hw, GLINT_DYN_CTL(vector), val);
560 }
561 
562 /**
563  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
564  * @netdev: pointer to the netdev struct
565  */
566 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
567 {
568 	struct ice_netdev_priv *np = netdev_priv(netdev);
569 
570 	return np->vsi->back;
571 }
572 
573 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
574 {
575 	return !!vsi->xdp_prog;
576 }
577 
578 static inline void ice_set_ring_xdp(struct ice_ring *ring)
579 {
580 	ring->flags |= ICE_TX_FLAGS_RING_XDP;
581 }
582 
583 /**
584  * ice_xsk_pool - get XSK buffer pool bound to a ring
585  * @ring: ring to use
586  *
587  * Returns a pointer to xdp_umem structure if there is a buffer pool present,
588  * NULL otherwise.
589  */
590 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring)
591 {
592 	struct ice_vsi *vsi = ring->vsi;
593 	u16 qid = ring->q_index;
594 
595 	if (ice_ring_is_xdp(ring))
596 		qid -= vsi->num_xdp_txq;
597 
598 	if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
599 		return NULL;
600 
601 	return xsk_get_pool_from_qid(vsi->netdev, qid);
602 }
603 
604 /**
605  * ice_get_main_vsi - Get the PF VSI
606  * @pf: PF instance
607  *
608  * returns pf->vsi[0], which by definition is the PF VSI
609  */
610 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
611 {
612 	if (pf->vsi)
613 		return pf->vsi[0];
614 
615 	return NULL;
616 }
617 
618 /**
619  * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
620  * @np: private netdev structure
621  */
622 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
623 {
624 	/* In case of port representor return source port VSI. */
625 	if (np->repr)
626 		return np->repr->src_vsi;
627 	else
628 		return np->vsi;
629 }
630 
631 /**
632  * ice_get_ctrl_vsi - Get the control VSI
633  * @pf: PF instance
634  */
635 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
636 {
637 	/* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
638 	if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
639 		return NULL;
640 
641 	return pf->vsi[pf->ctrl_vsi_idx];
642 }
643 
644 /**
645  * ice_is_switchdev_running - check if switchdev is configured
646  * @pf: pointer to PF structure
647  *
648  * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
649  * and switchdev is configured, false otherwise.
650  */
651 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
652 {
653 	return pf->switchdev.is_running;
654 }
655 
656 /**
657  * ice_set_sriov_cap - enable SRIOV in PF flags
658  * @pf: PF struct
659  */
660 static inline void ice_set_sriov_cap(struct ice_pf *pf)
661 {
662 	if (pf->hw.func_caps.common_cap.sr_iov_1_1)
663 		set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
664 }
665 
666 /**
667  * ice_clear_sriov_cap - disable SRIOV in PF flags
668  * @pf: PF struct
669  */
670 static inline void ice_clear_sriov_cap(struct ice_pf *pf)
671 {
672 	clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
673 }
674 
675 #define ICE_FD_STAT_CTR_BLOCK_COUNT	256
676 #define ICE_FD_STAT_PF_IDX(base_idx) \
677 			((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
678 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
679 
680 bool netif_is_ice(struct net_device *dev);
681 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
682 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
683 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
684 int ice_vsi_open(struct ice_vsi *vsi);
685 void ice_set_ethtool_ops(struct net_device *netdev);
686 void ice_set_ethtool_repr_ops(struct net_device *netdev);
687 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
688 u16 ice_get_avail_txq_count(struct ice_pf *pf);
689 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
690 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
691 void ice_update_vsi_stats(struct ice_vsi *vsi);
692 void ice_update_pf_stats(struct ice_pf *pf);
693 int ice_up(struct ice_vsi *vsi);
694 int ice_down(struct ice_vsi *vsi);
695 int ice_vsi_cfg(struct ice_vsi *vsi);
696 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
697 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
698 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
699 int
700 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
701 	     u32 flags);
702 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
703 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
704 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
705 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
706 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
707 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
708 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
709 int ice_plug_aux_dev(struct ice_pf *pf);
710 void ice_unplug_aux_dev(struct ice_pf *pf);
711 int ice_init_rdma(struct ice_pf *pf);
712 const char *ice_stat_str(enum ice_status stat_err);
713 const char *ice_aq_str(enum ice_aq_err aq_err);
714 bool ice_is_wol_supported(struct ice_hw *hw);
715 int
716 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
717 		    bool is_tun);
718 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
719 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
720 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
721 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
722 int
723 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
724 		      u32 *rule_locs);
725 void ice_fdir_release_flows(struct ice_hw *hw);
726 void ice_fdir_replay_flows(struct ice_hw *hw);
727 void ice_fdir_replay_fltrs(struct ice_pf *pf);
728 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
729 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
730 			  struct ice_rq_event_info *event);
731 int ice_open(struct net_device *netdev);
732 int ice_open_internal(struct net_device *netdev);
733 int ice_stop(struct net_device *netdev);
734 void ice_service_task_schedule(struct ice_pf *pf);
735 
736 /**
737  * ice_set_rdma_cap - enable RDMA support
738  * @pf: PF struct
739  */
740 static inline void ice_set_rdma_cap(struct ice_pf *pf)
741 {
742 	if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
743 		set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
744 		set_bit(ICE_FLAG_AUX_ENA, pf->flags);
745 		ice_plug_aux_dev(pf);
746 	}
747 }
748 
749 /**
750  * ice_clear_rdma_cap - disable RDMA support
751  * @pf: PF struct
752  */
753 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
754 {
755 	ice_unplug_aux_dev(pf);
756 	clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
757 	clear_bit(ICE_FLAG_AUX_ENA, pf->flags);
758 }
759 #endif /* _ICE_H_ */
760