xref: /openbmc/linux/drivers/net/ethernet/intel/ice/ice.h (revision fcea6f3da546b93050f3534aadea7bd96c1d7349)
1837f08fdSAnirudh Venkataramanan /* SPDX-License-Identifier: GPL-2.0 */
2837f08fdSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */
3837f08fdSAnirudh Venkataramanan 
4837f08fdSAnirudh Venkataramanan #ifndef _ICE_H_
5837f08fdSAnirudh Venkataramanan #define _ICE_H_
6837f08fdSAnirudh Venkataramanan 
7837f08fdSAnirudh Venkataramanan #include <linux/types.h>
8837f08fdSAnirudh Venkataramanan #include <linux/errno.h>
9837f08fdSAnirudh Venkataramanan #include <linux/kernel.h>
10837f08fdSAnirudh Venkataramanan #include <linux/module.h>
11837f08fdSAnirudh Venkataramanan #include <linux/netdevice.h>
12837f08fdSAnirudh Venkataramanan #include <linux/compiler.h>
13dc49c772SAnirudh Venkataramanan #include <linux/etherdevice.h>
14cdedef59SAnirudh Venkataramanan #include <linux/skbuff.h>
153a858ba3SAnirudh Venkataramanan #include <linux/cpumask.h>
16*fcea6f3dSAnirudh Venkataramanan #include <linux/rtnetlink.h>
173a858ba3SAnirudh Venkataramanan #include <linux/if_vlan.h>
18cdedef59SAnirudh Venkataramanan #include <linux/dma-mapping.h>
19837f08fdSAnirudh Venkataramanan #include <linux/pci.h>
20940b61afSAnirudh Venkataramanan #include <linux/workqueue.h>
21837f08fdSAnirudh Venkataramanan #include <linux/aer.h>
22940b61afSAnirudh Venkataramanan #include <linux/interrupt.h>
23*fcea6f3dSAnirudh Venkataramanan #include <linux/ethtool.h>
24940b61afSAnirudh Venkataramanan #include <linux/timer.h>
257ec59eeaSAnirudh Venkataramanan #include <linux/delay.h>
26837f08fdSAnirudh Venkataramanan #include <linux/bitmap.h>
273a858ba3SAnirudh Venkataramanan #include <linux/log2.h>
28d76a60baSAnirudh Venkataramanan #include <linux/ip.h>
29d76a60baSAnirudh Venkataramanan #include <linux/ipv6.h>
30940b61afSAnirudh Venkataramanan #include <linux/if_bridge.h>
31d76a60baSAnirudh Venkataramanan #include <net/ipv6.h>
32837f08fdSAnirudh Venkataramanan #include "ice_devids.h"
33837f08fdSAnirudh Venkataramanan #include "ice_type.h"
34940b61afSAnirudh Venkataramanan #include "ice_txrx.h"
359c20346bSAnirudh Venkataramanan #include "ice_switch.h"
36f31e4b6fSAnirudh Venkataramanan #include "ice_common.h"
379c20346bSAnirudh Venkataramanan #include "ice_sched.h"
38837f08fdSAnirudh Venkataramanan 
39*fcea6f3dSAnirudh Venkataramanan extern const char ice_drv_ver[];
40837f08fdSAnirudh Venkataramanan #define ICE_BAR0		0
413a858ba3SAnirudh Venkataramanan #define ICE_DFLT_NUM_DESC	128
42*fcea6f3dSAnirudh Venkataramanan #define ICE_MIN_NUM_DESC	8
43*fcea6f3dSAnirudh Venkataramanan #define ICE_MAX_NUM_DESC	8160
443a858ba3SAnirudh Venkataramanan #define ICE_REQ_DESC_MULTIPLE	32
45940b61afSAnirudh Venkataramanan #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
46*fcea6f3dSAnirudh Venkataramanan #define ICE_ETHTOOL_FWVER_LEN	32
47f31e4b6fSAnirudh Venkataramanan #define ICE_AQ_LEN		64
48940b61afSAnirudh Venkataramanan #define ICE_MIN_MSIX		2
493a858ba3SAnirudh Venkataramanan #define ICE_NO_VSI		0xffff
50940b61afSAnirudh Venkataramanan #define ICE_MAX_VSI_ALLOC	130
51940b61afSAnirudh Venkataramanan #define ICE_MAX_TXQS		2048
52940b61afSAnirudh Venkataramanan #define ICE_MAX_RXQS		2048
533a858ba3SAnirudh Venkataramanan #define ICE_VSI_MAP_CONTIG	0
543a858ba3SAnirudh Venkataramanan #define ICE_VSI_MAP_SCATTER	1
553a858ba3SAnirudh Venkataramanan #define ICE_MAX_SCATTER_TXQS	16
563a858ba3SAnirudh Venkataramanan #define ICE_MAX_SCATTER_RXQS	16
57cdedef59SAnirudh Venkataramanan #define ICE_Q_WAIT_RETRY_LIMIT	10
58cdedef59SAnirudh Venkataramanan #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
59d76a60baSAnirudh Venkataramanan #define ICE_MAX_LG_RSS_QS	256
60d76a60baSAnirudh Venkataramanan #define ICE_MAX_SMALL_RSS_QS	8
61940b61afSAnirudh Venkataramanan #define ICE_RES_VALID_BIT	0x8000
62940b61afSAnirudh Venkataramanan #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
633a858ba3SAnirudh Venkataramanan #define ICE_INVAL_Q_INDEX	0xffff
64837f08fdSAnirudh Venkataramanan 
65*fcea6f3dSAnirudh Venkataramanan #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
66*fcea6f3dSAnirudh Venkataramanan 
67837f08fdSAnirudh Venkataramanan #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
68837f08fdSAnirudh Venkataramanan 
693a858ba3SAnirudh Venkataramanan #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \
703a858ba3SAnirudh Venkataramanan 			 ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)
713a858ba3SAnirudh Venkataramanan 
723a858ba3SAnirudh Venkataramanan #define ICE_UP_TABLE_TRANSLATE(val, i) \
733a858ba3SAnirudh Venkataramanan 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
743a858ba3SAnirudh Venkataramanan 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
753a858ba3SAnirudh Venkataramanan 
762b245cb2SAnirudh Venkataramanan #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
77cdedef59SAnirudh Venkataramanan #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
78d76a60baSAnirudh Venkataramanan #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
79cdedef59SAnirudh Venkataramanan 
80cdedef59SAnirudh Venkataramanan #define ice_for_each_txq(vsi, i) \
81cdedef59SAnirudh Venkataramanan 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
82cdedef59SAnirudh Venkataramanan 
83cdedef59SAnirudh Venkataramanan #define ice_for_each_rxq(vsi, i) \
84cdedef59SAnirudh Venkataramanan 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
85cdedef59SAnirudh Venkataramanan 
863a858ba3SAnirudh Venkataramanan struct ice_tc_info {
873a858ba3SAnirudh Venkataramanan 	u16 qoffset;
883a858ba3SAnirudh Venkataramanan 	u16 qcount;
893a858ba3SAnirudh Venkataramanan };
903a858ba3SAnirudh Venkataramanan 
913a858ba3SAnirudh Venkataramanan struct ice_tc_cfg {
923a858ba3SAnirudh Venkataramanan 	u8 numtc; /* Total number of enabled TCs */
933a858ba3SAnirudh Venkataramanan 	u8 ena_tc; /* TX map */
943a858ba3SAnirudh Venkataramanan 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
953a858ba3SAnirudh Venkataramanan };
963a858ba3SAnirudh Venkataramanan 
97940b61afSAnirudh Venkataramanan struct ice_res_tracker {
98940b61afSAnirudh Venkataramanan 	u16 num_entries;
99940b61afSAnirudh Venkataramanan 	u16 search_hint;
100940b61afSAnirudh Venkataramanan 	u16 list[1];
101940b61afSAnirudh Venkataramanan };
102940b61afSAnirudh Venkataramanan 
103940b61afSAnirudh Venkataramanan struct ice_sw {
104940b61afSAnirudh Venkataramanan 	struct ice_pf *pf;
105940b61afSAnirudh Venkataramanan 	u16 sw_id;		/* switch ID for this switch */
106940b61afSAnirudh Venkataramanan 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
107940b61afSAnirudh Venkataramanan };
108940b61afSAnirudh Venkataramanan 
109837f08fdSAnirudh Venkataramanan enum ice_state {
110837f08fdSAnirudh Venkataramanan 	__ICE_DOWN,
111940b61afSAnirudh Venkataramanan 	__ICE_PFR_REQ,			/* set by driver and peers */
112940b61afSAnirudh Venkataramanan 	__ICE_ADMINQ_EVENT_PENDING,
113*fcea6f3dSAnirudh Venkataramanan 	__ICE_CFG_BUSY,
114940b61afSAnirudh Venkataramanan 	__ICE_SERVICE_SCHED,
115837f08fdSAnirudh Venkataramanan 	__ICE_STATE_NBITS		/* must be last */
116837f08fdSAnirudh Venkataramanan };
117837f08fdSAnirudh Venkataramanan 
118940b61afSAnirudh Venkataramanan /* struct that defines a VSI, associated with a dev */
119940b61afSAnirudh Venkataramanan struct ice_vsi {
120940b61afSAnirudh Venkataramanan 	struct net_device *netdev;
1213a858ba3SAnirudh Venkataramanan 	struct ice_sw *vsw;		 /* switch this VSI is on */
1223a858ba3SAnirudh Venkataramanan 	struct ice_pf *back;		 /* back pointer to PF */
123940b61afSAnirudh Venkataramanan 	struct ice_port_info *port_info; /* back pointer to port_info */
1243a858ba3SAnirudh Venkataramanan 	struct ice_ring **rx_rings;	 /* rx ring array */
1253a858ba3SAnirudh Venkataramanan 	struct ice_ring **tx_rings;	 /* tx ring array */
1263a858ba3SAnirudh Venkataramanan 	struct ice_q_vector **q_vectors; /* q_vector array */
127cdedef59SAnirudh Venkataramanan 
128cdedef59SAnirudh Venkataramanan 	irqreturn_t (*irq_handler)(int irq, void *data);
129cdedef59SAnirudh Venkataramanan 
130*fcea6f3dSAnirudh Venkataramanan 	u64 tx_linearize;
1313a858ba3SAnirudh Venkataramanan 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
132d76a60baSAnirudh Venkataramanan 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
133*fcea6f3dSAnirudh Venkataramanan 	u32 tx_restart;
134*fcea6f3dSAnirudh Venkataramanan 	u32 tx_busy;
135*fcea6f3dSAnirudh Venkataramanan 	u32 rx_buf_failed;
136*fcea6f3dSAnirudh Venkataramanan 	u32 rx_page_failed;
1373a858ba3SAnirudh Venkataramanan 	int num_q_vectors;
1383a858ba3SAnirudh Venkataramanan 	int base_vector;
1393a858ba3SAnirudh Venkataramanan 	enum ice_vsi_type type;
140940b61afSAnirudh Venkataramanan 	u16 vsi_num;			 /* HW (absolute) index of this VSI */
1413a858ba3SAnirudh Venkataramanan 	u16 idx;			 /* software index in pf->vsi[] */
1423a858ba3SAnirudh Venkataramanan 
1433a858ba3SAnirudh Venkataramanan 	/* Interrupt thresholds */
1443a858ba3SAnirudh Venkataramanan 	u16 work_lmt;
1453a858ba3SAnirudh Venkataramanan 
146d76a60baSAnirudh Venkataramanan 	/* RSS config */
147d76a60baSAnirudh Venkataramanan 	u16 rss_table_size;	/* HW RSS table size */
148d76a60baSAnirudh Venkataramanan 	u16 rss_size;		/* Allocated RSS queues */
149d76a60baSAnirudh Venkataramanan 	u8 *rss_hkey_user;	/* User configured hash keys */
150d76a60baSAnirudh Venkataramanan 	u8 *rss_lut_user;	/* User configured lookup table entries */
151d76a60baSAnirudh Venkataramanan 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
152d76a60baSAnirudh Venkataramanan 
153cdedef59SAnirudh Venkataramanan 	u16 max_frame;
154cdedef59SAnirudh Venkataramanan 	u16 rx_buf_len;
155cdedef59SAnirudh Venkataramanan 
1563a858ba3SAnirudh Venkataramanan 	struct ice_aqc_vsi_props info;	 /* VSI properties */
1573a858ba3SAnirudh Venkataramanan 
158*fcea6f3dSAnirudh Venkataramanan 	/* VSI stats */
159*fcea6f3dSAnirudh Venkataramanan 	struct rtnl_link_stats64 net_stats;
160*fcea6f3dSAnirudh Venkataramanan 	struct ice_eth_stats eth_stats;
161*fcea6f3dSAnirudh Venkataramanan 	struct ice_eth_stats eth_stats_prev;
162*fcea6f3dSAnirudh Venkataramanan 
163cdedef59SAnirudh Venkataramanan 	bool irqs_ready;
164cdedef59SAnirudh Venkataramanan 	bool current_isup;		 /* Sync 'link up' logging */
165*fcea6f3dSAnirudh Venkataramanan 	bool stat_offsets_loaded;
166cdedef59SAnirudh Venkataramanan 
1673a858ba3SAnirudh Venkataramanan 	/* queue information */
1683a858ba3SAnirudh Venkataramanan 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
1693a858ba3SAnirudh Venkataramanan 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
1703a858ba3SAnirudh Venkataramanan 	u16 txq_map[ICE_MAX_TXQS];	 /* index in pf->avail_txqs */
1713a858ba3SAnirudh Venkataramanan 	u16 rxq_map[ICE_MAX_RXQS];	 /* index in pf->avail_rxqs */
1723a858ba3SAnirudh Venkataramanan 	u16 alloc_txq;			 /* Allocated Tx queues */
1733a858ba3SAnirudh Venkataramanan 	u16 num_txq;			 /* Used Tx queues */
1743a858ba3SAnirudh Venkataramanan 	u16 alloc_rxq;			 /* Allocated Rx queues */
1753a858ba3SAnirudh Venkataramanan 	u16 num_rxq;			 /* Used Rx queues */
1763a858ba3SAnirudh Venkataramanan 	u16 num_desc;
1773a858ba3SAnirudh Venkataramanan 	struct ice_tc_cfg tc_cfg;
1783a858ba3SAnirudh Venkataramanan } ____cacheline_internodealigned_in_smp;
1793a858ba3SAnirudh Venkataramanan 
1803a858ba3SAnirudh Venkataramanan /* struct that defines an interrupt vector */
1813a858ba3SAnirudh Venkataramanan struct ice_q_vector {
1823a858ba3SAnirudh Venkataramanan 	struct ice_vsi *vsi;
1833a858ba3SAnirudh Venkataramanan 	cpumask_t affinity_mask;
1843a858ba3SAnirudh Venkataramanan 	struct napi_struct napi;
1853a858ba3SAnirudh Venkataramanan 	struct ice_ring_container rx;
1863a858ba3SAnirudh Venkataramanan 	struct ice_ring_container tx;
187cdedef59SAnirudh Venkataramanan 	struct irq_affinity_notify affinity_notify;
1883a858ba3SAnirudh Venkataramanan 	u16 v_idx;			/* index in the vsi->q_vector array. */
1893a858ba3SAnirudh Venkataramanan 	u8 num_ring_tx;			/* total number of tx rings in vector */
1903a858ba3SAnirudh Venkataramanan 	u8 num_ring_rx;			/* total number of rx rings in vector */
191cdedef59SAnirudh Venkataramanan 	char name[ICE_INT_NAME_STR_LEN];
192940b61afSAnirudh Venkataramanan } ____cacheline_internodealigned_in_smp;
193940b61afSAnirudh Venkataramanan 
194940b61afSAnirudh Venkataramanan enum ice_pf_flags {
195940b61afSAnirudh Venkataramanan 	ICE_FLAG_MSIX_ENA,
196940b61afSAnirudh Venkataramanan 	ICE_FLAG_FLTR_SYNC,
197940b61afSAnirudh Venkataramanan 	ICE_FLAG_RSS_ENA,
198940b61afSAnirudh Venkataramanan 	ICE_PF_FLAGS_NBITS		/* must be last */
199940b61afSAnirudh Venkataramanan };
200940b61afSAnirudh Venkataramanan 
201837f08fdSAnirudh Venkataramanan struct ice_pf {
202837f08fdSAnirudh Venkataramanan 	struct pci_dev *pdev;
203940b61afSAnirudh Venkataramanan 	struct msix_entry *msix_entries;
204940b61afSAnirudh Venkataramanan 	struct ice_res_tracker *irq_tracker;
205940b61afSAnirudh Venkataramanan 	struct ice_vsi **vsi;		/* VSIs created by the driver */
206940b61afSAnirudh Venkataramanan 	struct ice_sw *first_sw;	/* first switch created by firmware */
207837f08fdSAnirudh Venkataramanan 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
208940b61afSAnirudh Venkataramanan 	DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS);
209940b61afSAnirudh Venkataramanan 	DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS);
210940b61afSAnirudh Venkataramanan 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
211940b61afSAnirudh Venkataramanan 	unsigned long serv_tmr_period;
212940b61afSAnirudh Venkataramanan 	unsigned long serv_tmr_prev;
213940b61afSAnirudh Venkataramanan 	struct timer_list serv_tmr;
214940b61afSAnirudh Venkataramanan 	struct work_struct serv_task;
215940b61afSAnirudh Venkataramanan 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
216940b61afSAnirudh Venkataramanan 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
217837f08fdSAnirudh Venkataramanan 	u32 msg_enable;
218d76a60baSAnirudh Venkataramanan 	u32 hw_csum_rx_error;
219940b61afSAnirudh Venkataramanan 	u32 oicr_idx;		/* Other interrupt cause vector index */
220940b61afSAnirudh Venkataramanan 	u32 num_lan_msix;	/* Total MSIX vectors for base driver */
221940b61afSAnirudh Venkataramanan 	u32 num_avail_msix;	/* remaining MSIX vectors left unclaimed */
222940b61afSAnirudh Venkataramanan 	u16 num_lan_tx;		/* num lan tx queues setup */
223940b61afSAnirudh Venkataramanan 	u16 num_lan_rx;		/* num lan rx queues setup */
224940b61afSAnirudh Venkataramanan 	u16 q_left_tx;		/* remaining num tx queues left unclaimed */
225940b61afSAnirudh Venkataramanan 	u16 q_left_rx;		/* remaining num rx queues left unclaimed */
226940b61afSAnirudh Venkataramanan 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
227940b61afSAnirudh Venkataramanan 	u16 num_alloc_vsi;
228*fcea6f3dSAnirudh Venkataramanan 	struct ice_hw_port_stats stats;
229*fcea6f3dSAnirudh Venkataramanan 	struct ice_hw_port_stats stats_prev;
230837f08fdSAnirudh Venkataramanan 	struct ice_hw hw;
231*fcea6f3dSAnirudh Venkataramanan 	bool stat_prev_loaded;	/* has previous stats been loaded */
232940b61afSAnirudh Venkataramanan 	char int_name[ICE_INT_NAME_STR_LEN];
233837f08fdSAnirudh Venkataramanan };
234940b61afSAnirudh Venkataramanan 
2353a858ba3SAnirudh Venkataramanan struct ice_netdev_priv {
2363a858ba3SAnirudh Venkataramanan 	struct ice_vsi *vsi;
2373a858ba3SAnirudh Venkataramanan };
2383a858ba3SAnirudh Venkataramanan 
239940b61afSAnirudh Venkataramanan /**
240940b61afSAnirudh Venkataramanan  * ice_irq_dynamic_ena - Enable default interrupt generation settings
241940b61afSAnirudh Venkataramanan  * @hw: pointer to hw struct
242cdedef59SAnirudh Venkataramanan  * @vsi: pointer to vsi struct, can be NULL
243cdedef59SAnirudh Venkataramanan  * @q_vector: pointer to q_vector, can be NULL
244940b61afSAnirudh Venkataramanan  */
245cdedef59SAnirudh Venkataramanan static inline void ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
246cdedef59SAnirudh Venkataramanan 				       struct ice_q_vector *q_vector)
247940b61afSAnirudh Venkataramanan {
248cdedef59SAnirudh Venkataramanan 	u32 vector = (vsi && q_vector) ? vsi->base_vector + q_vector->v_idx :
249cdedef59SAnirudh Venkataramanan 					((struct ice_pf *)hw->back)->oicr_idx;
250940b61afSAnirudh Venkataramanan 	int itr = ICE_ITR_NONE;
251940b61afSAnirudh Venkataramanan 	u32 val;
252940b61afSAnirudh Venkataramanan 
253940b61afSAnirudh Venkataramanan 	/* clear the PBA here, as this function is meant to clean out all
254940b61afSAnirudh Venkataramanan 	 * previous interrupts and enable the interrupt
255940b61afSAnirudh Venkataramanan 	 */
256940b61afSAnirudh Venkataramanan 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
257940b61afSAnirudh Venkataramanan 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
258cdedef59SAnirudh Venkataramanan 	if (vsi)
259cdedef59SAnirudh Venkataramanan 		if (test_bit(__ICE_DOWN, vsi->state))
260cdedef59SAnirudh Venkataramanan 			return;
261940b61afSAnirudh Venkataramanan 	wr32(hw, GLINT_DYN_CTL(vector), val);
262940b61afSAnirudh Venkataramanan }
263cdedef59SAnirudh Venkataramanan 
264*fcea6f3dSAnirudh Venkataramanan void ice_set_ethtool_ops(struct net_device *netdev);
265*fcea6f3dSAnirudh Venkataramanan int ice_up(struct ice_vsi *vsi);
266*fcea6f3dSAnirudh Venkataramanan int ice_down(struct ice_vsi *vsi);
267d76a60baSAnirudh Venkataramanan int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
268d76a60baSAnirudh Venkataramanan int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
269d76a60baSAnirudh Venkataramanan void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
270*fcea6f3dSAnirudh Venkataramanan void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
271d76a60baSAnirudh Venkataramanan 
272837f08fdSAnirudh Venkataramanan #endif /* _ICE_H_ */
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