1837f08fdSAnirudh Venkataramanan /* SPDX-License-Identifier: GPL-2.0 */ 2837f08fdSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */ 3837f08fdSAnirudh Venkataramanan 4837f08fdSAnirudh Venkataramanan #ifndef _ICE_H_ 5837f08fdSAnirudh Venkataramanan #define _ICE_H_ 6837f08fdSAnirudh Venkataramanan 7837f08fdSAnirudh Venkataramanan #include <linux/types.h> 8837f08fdSAnirudh Venkataramanan #include <linux/errno.h> 9837f08fdSAnirudh Venkataramanan #include <linux/kernel.h> 10837f08fdSAnirudh Venkataramanan #include <linux/module.h> 11837f08fdSAnirudh Venkataramanan #include <linux/netdevice.h> 12837f08fdSAnirudh Venkataramanan #include <linux/compiler.h> 13dc49c772SAnirudh Venkataramanan #include <linux/etherdevice.h> 14cdedef59SAnirudh Venkataramanan #include <linux/skbuff.h> 153a858ba3SAnirudh Venkataramanan #include <linux/cpumask.h> 16fcea6f3dSAnirudh Venkataramanan #include <linux/rtnetlink.h> 173a858ba3SAnirudh Venkataramanan #include <linux/if_vlan.h> 18cdedef59SAnirudh Venkataramanan #include <linux/dma-mapping.h> 19837f08fdSAnirudh Venkataramanan #include <linux/pci.h> 20940b61afSAnirudh Venkataramanan #include <linux/workqueue.h> 21837f08fdSAnirudh Venkataramanan #include <linux/aer.h> 22940b61afSAnirudh Venkataramanan #include <linux/interrupt.h> 23fcea6f3dSAnirudh Venkataramanan #include <linux/ethtool.h> 24940b61afSAnirudh Venkataramanan #include <linux/timer.h> 257ec59eeaSAnirudh Venkataramanan #include <linux/delay.h> 26837f08fdSAnirudh Venkataramanan #include <linux/bitmap.h> 273a858ba3SAnirudh Venkataramanan #include <linux/log2.h> 28d76a60baSAnirudh Venkataramanan #include <linux/ip.h> 29cf909e19SAnirudh Venkataramanan #include <linux/sctp.h> 30d76a60baSAnirudh Venkataramanan #include <linux/ipv6.h> 31940b61afSAnirudh Venkataramanan #include <linux/if_bridge.h> 32ddf30f7fSAnirudh Venkataramanan #include <linux/avf/virtchnl.h> 33d76a60baSAnirudh Venkataramanan #include <net/ipv6.h> 34837f08fdSAnirudh Venkataramanan #include "ice_devids.h" 35837f08fdSAnirudh Venkataramanan #include "ice_type.h" 36940b61afSAnirudh Venkataramanan #include "ice_txrx.h" 3737b6f646SAnirudh Venkataramanan #include "ice_dcb.h" 389c20346bSAnirudh Venkataramanan #include "ice_switch.h" 39f31e4b6fSAnirudh Venkataramanan #include "ice_common.h" 409c20346bSAnirudh Venkataramanan #include "ice_sched.h" 41ddf30f7fSAnirudh Venkataramanan #include "ice_virtchnl_pf.h" 42007676b4SAnirudh Venkataramanan #include "ice_sriov.h" 43837f08fdSAnirudh Venkataramanan 44fcea6f3dSAnirudh Venkataramanan extern const char ice_drv_ver[]; 45837f08fdSAnirudh Venkataramanan #define ICE_BAR0 0 463a858ba3SAnirudh Venkataramanan #define ICE_REQ_DESC_MULTIPLE 32 478be92a76SPreethi Banala #define ICE_MIN_NUM_DESC 64 483b6bf296SBruce Allan #define ICE_MAX_NUM_DESC 8160 491aec6e1bSBrett Creeley #define ICE_DFLT_MIN_RX_DESC 512 501aec6e1bSBrett Creeley /* if the default number of Rx descriptors between ICE_MAX_NUM_DESC and the 511aec6e1bSBrett Creeley * number of descriptors to fill up an entire page is greater than or equal to 521aec6e1bSBrett Creeley * ICE_DFLT_MIN_RX_DESC set it based on page size, otherwise set it to 531aec6e1bSBrett Creeley * ICE_DFLT_MIN_RX_DESC 54ad71b256SBrett Creeley */ 551aec6e1bSBrett Creeley #define ICE_DFLT_NUM_RX_DESC \ 561aec6e1bSBrett Creeley min_t(u16, ICE_MAX_NUM_DESC, \ 571aec6e1bSBrett Creeley max_t(u16, ALIGN(PAGE_SIZE / sizeof(union ice_32byte_rx_desc), \ 581aec6e1bSBrett Creeley ICE_REQ_DESC_MULTIPLE), \ 591aec6e1bSBrett Creeley ICE_DFLT_MIN_RX_DESC)) 601aec6e1bSBrett Creeley /* set default number of Tx descriptors to the minimum between ICE_MAX_NUM_DESC 611aec6e1bSBrett Creeley * and the number of descriptors to fill up an entire page 621aec6e1bSBrett Creeley */ 63ad71b256SBrett Creeley #define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \ 64ad71b256SBrett Creeley ALIGN(PAGE_SIZE / \ 65ad71b256SBrett Creeley sizeof(struct ice_tx_desc), \ 66ad71b256SBrett Creeley ICE_REQ_DESC_MULTIPLE)) 67ad71b256SBrett Creeley 685513b920SAnirudh Venkataramanan #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 69940b61afSAnirudh Venkataramanan #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 70fcea6f3dSAnirudh Venkataramanan #define ICE_ETHTOOL_FWVER_LEN 32 71f31e4b6fSAnirudh Venkataramanan #define ICE_AQ_LEN 64 7211836214SBrett Creeley #define ICE_MBXSQ_LEN 64 7311836214SBrett Creeley #define ICE_MBXRQ_LEN 512 74940b61afSAnirudh Venkataramanan #define ICE_MIN_MSIX 2 753a858ba3SAnirudh Venkataramanan #define ICE_NO_VSI 0xffff 76940b61afSAnirudh Venkataramanan #define ICE_MAX_TXQS 2048 77940b61afSAnirudh Venkataramanan #define ICE_MAX_RXQS 2048 783a858ba3SAnirudh Venkataramanan #define ICE_VSI_MAP_CONTIG 0 793a858ba3SAnirudh Venkataramanan #define ICE_VSI_MAP_SCATTER 1 803a858ba3SAnirudh Venkataramanan #define ICE_MAX_SCATTER_TXQS 16 813a858ba3SAnirudh Venkataramanan #define ICE_MAX_SCATTER_RXQS 16 82cdedef59SAnirudh Venkataramanan #define ICE_Q_WAIT_RETRY_LIMIT 10 83cdedef59SAnirudh Venkataramanan #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 84d76a60baSAnirudh Venkataramanan #define ICE_MAX_LG_RSS_QS 256 85d76a60baSAnirudh Venkataramanan #define ICE_MAX_SMALL_RSS_QS 8 86940b61afSAnirudh Venkataramanan #define ICE_RES_VALID_BIT 0x8000 87940b61afSAnirudh Venkataramanan #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1) 883a858ba3SAnirudh Venkataramanan #define ICE_INVAL_Q_INDEX 0xffff 890f9d5027SAnirudh Venkataramanan #define ICE_INVAL_VFID 256 90837f08fdSAnirudh Venkataramanan 91afd9d4abSAnirudh Venkataramanan #define ICE_MAX_RESET_WAIT 20 92afd9d4abSAnirudh Venkataramanan 93fcea6f3dSAnirudh Venkataramanan #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 94fcea6f3dSAnirudh Venkataramanan 95837f08fdSAnirudh Venkataramanan #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 96837f08fdSAnirudh Venkataramanan 973a858ba3SAnirudh Venkataramanan #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - \ 985ed5d316SMaciej Fijalkowski (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2))) 993a858ba3SAnirudh Venkataramanan 1003a858ba3SAnirudh Venkataramanan #define ICE_UP_TABLE_TRANSLATE(val, i) \ 1013a858ba3SAnirudh Venkataramanan (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 1023a858ba3SAnirudh Venkataramanan ICE_AQ_VSI_UP_TABLE_UP##i##_M) 1033a858ba3SAnirudh Venkataramanan 1042b245cb2SAnirudh Venkataramanan #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 105cdedef59SAnirudh Venkataramanan #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 106d76a60baSAnirudh Venkataramanan #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 107cdedef59SAnirudh Venkataramanan 1080b28b702SAnirudh Venkataramanan /* Macro for each VSI in a PF */ 1090b28b702SAnirudh Venkataramanan #define ice_for_each_vsi(pf, i) \ 1100b28b702SAnirudh Venkataramanan for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 1110b28b702SAnirudh Venkataramanan 112d337f2afSAnirudh Venkataramanan /* Macros for each Tx/Rx ring in a VSI */ 113cdedef59SAnirudh Venkataramanan #define ice_for_each_txq(vsi, i) \ 114cdedef59SAnirudh Venkataramanan for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 115cdedef59SAnirudh Venkataramanan 116cdedef59SAnirudh Venkataramanan #define ice_for_each_rxq(vsi, i) \ 117cdedef59SAnirudh Venkataramanan for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 118cdedef59SAnirudh Venkataramanan 119d337f2afSAnirudh Venkataramanan /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 120f8ba7db8SJacob Keller #define ice_for_each_alloc_txq(vsi, i) \ 121f8ba7db8SJacob Keller for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 122f8ba7db8SJacob Keller 123f8ba7db8SJacob Keller #define ice_for_each_alloc_rxq(vsi, i) \ 124f8ba7db8SJacob Keller for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 125f8ba7db8SJacob Keller 12667fe64d7SBrett Creeley #define ice_for_each_q_vector(vsi, i) \ 12767fe64d7SBrett Creeley for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 12867fe64d7SBrett Creeley 1295eda8afdSAkeem G Abodunrin #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \ 1305eda8afdSAkeem G Abodunrin ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX) 1315eda8afdSAkeem G Abodunrin 1325eda8afdSAkeem G Abodunrin #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \ 1335eda8afdSAkeem G Abodunrin ICE_PROMISC_MCAST_TX | \ 1345eda8afdSAkeem G Abodunrin ICE_PROMISC_UCAST_RX | \ 1355eda8afdSAkeem G Abodunrin ICE_PROMISC_MCAST_RX | \ 1365eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_TX | \ 1375eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_RX) 1385eda8afdSAkeem G Abodunrin 1395eda8afdSAkeem G Abodunrin #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 1405eda8afdSAkeem G Abodunrin 1415eda8afdSAkeem G Abodunrin #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 1425eda8afdSAkeem G Abodunrin ICE_PROMISC_MCAST_RX | \ 1435eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_TX | \ 1445eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_RX) 1455eda8afdSAkeem G Abodunrin 1463a858ba3SAnirudh Venkataramanan struct ice_tc_info { 1473a858ba3SAnirudh Venkataramanan u16 qoffset; 148c5a2a4a3SUsha Ketineni u16 qcount_tx; 149c5a2a4a3SUsha Ketineni u16 qcount_rx; 150c5a2a4a3SUsha Ketineni u8 netdev_tc; 1513a858ba3SAnirudh Venkataramanan }; 1523a858ba3SAnirudh Venkataramanan 1533a858ba3SAnirudh Venkataramanan struct ice_tc_cfg { 1543a858ba3SAnirudh Venkataramanan u8 numtc; /* Total number of enabled TCs */ 155f9867df6SAnirudh Venkataramanan u8 ena_tc; /* Tx map */ 1563a858ba3SAnirudh Venkataramanan struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 1573a858ba3SAnirudh Venkataramanan }; 1583a858ba3SAnirudh Venkataramanan 159940b61afSAnirudh Venkataramanan struct ice_res_tracker { 160940b61afSAnirudh Venkataramanan u16 num_entries; 161cbe66bfeSBrett Creeley u16 end; 162940b61afSAnirudh Venkataramanan u16 list[1]; 163940b61afSAnirudh Venkataramanan }; 164940b61afSAnirudh Venkataramanan 16503f7a986SAnirudh Venkataramanan struct ice_qs_cfg { 16694c4441bSAnirudh Venkataramanan struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 16703f7a986SAnirudh Venkataramanan unsigned long *pf_map; 16803f7a986SAnirudh Venkataramanan unsigned long pf_map_size; 16903f7a986SAnirudh Venkataramanan unsigned int q_count; 17003f7a986SAnirudh Venkataramanan unsigned int scatter_count; 17103f7a986SAnirudh Venkataramanan u16 *vsi_map; 17203f7a986SAnirudh Venkataramanan u16 vsi_map_offset; 17303f7a986SAnirudh Venkataramanan u8 mapping_mode; 17403f7a986SAnirudh Venkataramanan }; 17503f7a986SAnirudh Venkataramanan 176940b61afSAnirudh Venkataramanan struct ice_sw { 177940b61afSAnirudh Venkataramanan struct ice_pf *pf; 178940b61afSAnirudh Venkataramanan u16 sw_id; /* switch ID for this switch */ 179940b61afSAnirudh Venkataramanan u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 180940b61afSAnirudh Venkataramanan }; 181940b61afSAnirudh Venkataramanan 182837f08fdSAnirudh Venkataramanan enum ice_state { 1830e674aebSAnirudh Venkataramanan __ICE_TESTING, 184837f08fdSAnirudh Venkataramanan __ICE_DOWN, 1850b28b702SAnirudh Venkataramanan __ICE_NEEDS_RESTART, 1860f9d5027SAnirudh Venkataramanan __ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 1875df7e45dSDave Ertman __ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 188940b61afSAnirudh Venkataramanan __ICE_PFR_REQ, /* set by driver and peers */ 1890b28b702SAnirudh Venkataramanan __ICE_CORER_REQ, /* set by driver and peers */ 1900b28b702SAnirudh Venkataramanan __ICE_GLOBR_REQ, /* set by driver and peers */ 1910b28b702SAnirudh Venkataramanan __ICE_CORER_RECV, /* set by OICR handler */ 1920b28b702SAnirudh Venkataramanan __ICE_GLOBR_RECV, /* set by OICR handler */ 1930b28b702SAnirudh Venkataramanan __ICE_EMPR_RECV, /* set by OICR handler */ 1940b28b702SAnirudh Venkataramanan __ICE_SUSPENDED, /* set on module remove path */ 1950b28b702SAnirudh Venkataramanan __ICE_RESET_FAILED, /* set by reset/rebuild */ 196ddf30f7fSAnirudh Venkataramanan /* When checking for the PF to be in a nominal operating state, the 197ddf30f7fSAnirudh Venkataramanan * bits that are grouped at the beginning of the list need to be 198ddf30f7fSAnirudh Venkataramanan * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will 199ddf30f7fSAnirudh Venkataramanan * be checked. If you need to add a bit into consideration for nominal 200ddf30f7fSAnirudh Venkataramanan * operating state, it must be added before 201ddf30f7fSAnirudh Venkataramanan * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 202ddf30f7fSAnirudh Venkataramanan * without appropriate consideration. 203ddf30f7fSAnirudh Venkataramanan */ 204ddf30f7fSAnirudh Venkataramanan __ICE_STATE_NOMINAL_CHECK_BITS, 205940b61afSAnirudh Venkataramanan __ICE_ADMINQ_EVENT_PENDING, 20675d2b253SAnirudh Venkataramanan __ICE_MAILBOXQ_EVENT_PENDING, 207b3969fd7SSudheer Mogilappagari __ICE_MDD_EVENT_PENDING, 208007676b4SAnirudh Venkataramanan __ICE_VFLR_EVENT_PENDING, 209e94d4478SAnirudh Venkataramanan __ICE_FLTR_OVERFLOW_PROMISC, 210ddf30f7fSAnirudh Venkataramanan __ICE_VF_DIS, 211fcea6f3dSAnirudh Venkataramanan __ICE_CFG_BUSY, 212940b61afSAnirudh Venkataramanan __ICE_SERVICE_SCHED, 2138d81fa55SAkeem G Abodunrin __ICE_SERVICE_DIS, 214d82dd83dSAkeem G Abodunrin __ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 215837f08fdSAnirudh Venkataramanan __ICE_STATE_NBITS /* must be last */ 216837f08fdSAnirudh Venkataramanan }; 217837f08fdSAnirudh Venkataramanan 218e94d4478SAnirudh Venkataramanan enum ice_vsi_flags { 219e94d4478SAnirudh Venkataramanan ICE_VSI_FLAG_UMAC_FLTR_CHANGED, 220e94d4478SAnirudh Venkataramanan ICE_VSI_FLAG_MMAC_FLTR_CHANGED, 221e94d4478SAnirudh Venkataramanan ICE_VSI_FLAG_VLAN_FLTR_CHANGED, 222e94d4478SAnirudh Venkataramanan ICE_VSI_FLAG_PROMISC_CHANGED, 223e94d4478SAnirudh Venkataramanan ICE_VSI_FLAG_NBITS /* must be last */ 224e94d4478SAnirudh Venkataramanan }; 225e94d4478SAnirudh Venkataramanan 226940b61afSAnirudh Venkataramanan /* struct that defines a VSI, associated with a dev */ 227940b61afSAnirudh Venkataramanan struct ice_vsi { 228940b61afSAnirudh Venkataramanan struct net_device *netdev; 2293a858ba3SAnirudh Venkataramanan struct ice_sw *vsw; /* switch this VSI is on */ 2303a858ba3SAnirudh Venkataramanan struct ice_pf *back; /* back pointer to PF */ 231940b61afSAnirudh Venkataramanan struct ice_port_info *port_info; /* back pointer to port_info */ 232d337f2afSAnirudh Venkataramanan struct ice_ring **rx_rings; /* Rx ring array */ 233d337f2afSAnirudh Venkataramanan struct ice_ring **tx_rings; /* Tx ring array */ 2343a858ba3SAnirudh Venkataramanan struct ice_q_vector **q_vectors; /* q_vector array */ 235cdedef59SAnirudh Venkataramanan 236cdedef59SAnirudh Venkataramanan irqreturn_t (*irq_handler)(int irq, void *data); 237cdedef59SAnirudh Venkataramanan 238fcea6f3dSAnirudh Venkataramanan u64 tx_linearize; 2393a858ba3SAnirudh Venkataramanan DECLARE_BITMAP(state, __ICE_STATE_NBITS); 240e94d4478SAnirudh Venkataramanan DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS); 241e94d4478SAnirudh Venkataramanan unsigned int current_netdev_flags; 242fcea6f3dSAnirudh Venkataramanan u32 tx_restart; 243fcea6f3dSAnirudh Venkataramanan u32 tx_busy; 244fcea6f3dSAnirudh Venkataramanan u32 rx_buf_failed; 245fcea6f3dSAnirudh Venkataramanan u32 rx_page_failed; 2463a858ba3SAnirudh Venkataramanan int num_q_vectors; 247cbe66bfeSBrett Creeley int base_vector; /* IRQ base for OS reserved vectors */ 2483a858ba3SAnirudh Venkataramanan enum ice_vsi_type type; 249940b61afSAnirudh Venkataramanan u16 vsi_num; /* HW (absolute) index of this VSI */ 2503a858ba3SAnirudh Venkataramanan u16 idx; /* software index in pf->vsi[] */ 2513a858ba3SAnirudh Venkataramanan 2523a858ba3SAnirudh Venkataramanan /* Interrupt thresholds */ 2533a858ba3SAnirudh Venkataramanan u16 work_lmt; 2543a858ba3SAnirudh Venkataramanan 2558ede0178SAnirudh Venkataramanan s16 vf_id; /* VF ID for SR-IOV VSIs */ 2568ede0178SAnirudh Venkataramanan 257d95276ceSAkeem G Abodunrin u16 ethtype; /* Ethernet protocol for pause frame */ 258d95276ceSAkeem G Abodunrin 259d76a60baSAnirudh Venkataramanan /* RSS config */ 260d76a60baSAnirudh Venkataramanan u16 rss_table_size; /* HW RSS table size */ 261d76a60baSAnirudh Venkataramanan u16 rss_size; /* Allocated RSS queues */ 262d76a60baSAnirudh Venkataramanan u8 *rss_hkey_user; /* User configured hash keys */ 263d76a60baSAnirudh Venkataramanan u8 *rss_lut_user; /* User configured lookup table entries */ 264d76a60baSAnirudh Venkataramanan u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 265d76a60baSAnirudh Venkataramanan 266cdedef59SAnirudh Venkataramanan u16 max_frame; 267cdedef59SAnirudh Venkataramanan u16 rx_buf_len; 268cdedef59SAnirudh Venkataramanan 2693a858ba3SAnirudh Venkataramanan struct ice_aqc_vsi_props info; /* VSI properties */ 2703a858ba3SAnirudh Venkataramanan 271fcea6f3dSAnirudh Venkataramanan /* VSI stats */ 272fcea6f3dSAnirudh Venkataramanan struct rtnl_link_stats64 net_stats; 273fcea6f3dSAnirudh Venkataramanan struct ice_eth_stats eth_stats; 274fcea6f3dSAnirudh Venkataramanan struct ice_eth_stats eth_stats_prev; 275fcea6f3dSAnirudh Venkataramanan 276e94d4478SAnirudh Venkataramanan struct list_head tmp_sync_list; /* MAC filters to be synced */ 277e94d4478SAnirudh Venkataramanan struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 278e94d4478SAnirudh Venkataramanan 2790ab54c5fSJesse Brandeburg u8 irqs_ready:1; 2800ab54c5fSJesse Brandeburg u8 current_isup:1; /* Sync 'link up' logging */ 2810ab54c5fSJesse Brandeburg u8 stat_offsets_loaded:1; 2820ab54c5fSJesse Brandeburg u8 vlan_ena:1; 283cdedef59SAnirudh Venkataramanan 2843a858ba3SAnirudh Venkataramanan /* queue information */ 2853a858ba3SAnirudh Venkataramanan u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 2863a858ba3SAnirudh Venkataramanan u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 2873a858ba3SAnirudh Venkataramanan u16 txq_map[ICE_MAX_TXQS]; /* index in pf->avail_txqs */ 2883a858ba3SAnirudh Venkataramanan u16 rxq_map[ICE_MAX_RXQS]; /* index in pf->avail_rxqs */ 2893a858ba3SAnirudh Venkataramanan u16 alloc_txq; /* Allocated Tx queues */ 2903a858ba3SAnirudh Venkataramanan u16 num_txq; /* Used Tx queues */ 2913a858ba3SAnirudh Venkataramanan u16 alloc_rxq; /* Allocated Rx queues */ 2923a858ba3SAnirudh Venkataramanan u16 num_rxq; /* Used Rx queues */ 293ad71b256SBrett Creeley u16 num_rx_desc; 294ad71b256SBrett Creeley u16 num_tx_desc; 2953a858ba3SAnirudh Venkataramanan struct ice_tc_cfg tc_cfg; 2963a858ba3SAnirudh Venkataramanan } ____cacheline_internodealigned_in_smp; 2973a858ba3SAnirudh Venkataramanan 2983a858ba3SAnirudh Venkataramanan /* struct that defines an interrupt vector */ 2993a858ba3SAnirudh Venkataramanan struct ice_q_vector { 3003a858ba3SAnirudh Venkataramanan struct ice_vsi *vsi; 3018244dd2dSBrett Creeley 3023a858ba3SAnirudh Venkataramanan u16 v_idx; /* index in the vsi->q_vector array. */ 303b07833a0SBrett Creeley u16 reg_idx; 304d337f2afSAnirudh Venkataramanan u8 num_ring_rx; /* total number of Rx rings in vector */ 3058244dd2dSBrett Creeley u8 num_ring_tx; /* total number of Tx rings in vector */ 3068244dd2dSBrett Creeley u8 itr_countdown; /* when 0 should adjust adaptive ITR */ 3079e4ab4c2SBrett Creeley /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 3089e4ab4c2SBrett Creeley * value to the device 3099e4ab4c2SBrett Creeley */ 3109e4ab4c2SBrett Creeley u8 intrl; 3118244dd2dSBrett Creeley 3128244dd2dSBrett Creeley struct napi_struct napi; 3138244dd2dSBrett Creeley 3148244dd2dSBrett Creeley struct ice_ring_container rx; 3158244dd2dSBrett Creeley struct ice_ring_container tx; 3168244dd2dSBrett Creeley 3178244dd2dSBrett Creeley cpumask_t affinity_mask; 3188244dd2dSBrett Creeley struct irq_affinity_notify affinity_notify; 3198244dd2dSBrett Creeley 3208244dd2dSBrett Creeley char name[ICE_INT_NAME_STR_LEN]; 321940b61afSAnirudh Venkataramanan } ____cacheline_internodealigned_in_smp; 322940b61afSAnirudh Venkataramanan 323940b61afSAnirudh Venkataramanan enum ice_pf_flags { 324940b61afSAnirudh Venkataramanan ICE_FLAG_FLTR_SYNC, 325940b61afSAnirudh Venkataramanan ICE_FLAG_RSS_ENA, 326ddf30f7fSAnirudh Venkataramanan ICE_FLAG_SRIOV_ENA, 32775d2b253SAnirudh Venkataramanan ICE_FLAG_SRIOV_CAPABLE, 32837b6f646SAnirudh Venkataramanan ICE_FLAG_DCB_CAPABLE, 32937b6f646SAnirudh Venkataramanan ICE_FLAG_DCB_ENA, 330ab4ab73fSBruce Allan ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 3316d599946STony Nguyen ICE_FLAG_NO_MEDIA, 33284a118abSDave Ertman ICE_FLAG_FW_LLDP_AGENT, 3333a257a14SAnirudh Venkataramanan ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 334940b61afSAnirudh Venkataramanan ICE_PF_FLAGS_NBITS /* must be last */ 335940b61afSAnirudh Venkataramanan }; 336940b61afSAnirudh Venkataramanan 337837f08fdSAnirudh Venkataramanan struct ice_pf { 338837f08fdSAnirudh Venkataramanan struct pci_dev *pdev; 339eb0208ecSPreethi Banala 340eb0208ecSPreethi Banala /* OS reserved IRQ details */ 341940b61afSAnirudh Venkataramanan struct msix_entry *msix_entries; 342cbe66bfeSBrett Creeley struct ice_res_tracker *irq_tracker; 343cbe66bfeSBrett Creeley /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the 344cbe66bfeSBrett Creeley * number of MSIX vectors needed for all SR-IOV VFs from the number of 345cbe66bfeSBrett Creeley * MSIX vectors allowed on this PF. 346cbe66bfeSBrett Creeley */ 347cbe66bfeSBrett Creeley u16 sriov_base_vector; 348eb0208ecSPreethi Banala 349940b61afSAnirudh Venkataramanan struct ice_vsi **vsi; /* VSIs created by the driver */ 350940b61afSAnirudh Venkataramanan struct ice_sw *first_sw; /* first switch created by firmware */ 351ddf30f7fSAnirudh Venkataramanan /* Virtchnl/SR-IOV config info */ 352ddf30f7fSAnirudh Venkataramanan struct ice_vf *vf; 353ddf30f7fSAnirudh Venkataramanan int num_alloc_vfs; /* actual number of VFs allocated */ 35475d2b253SAnirudh Venkataramanan u16 num_vfs_supported; /* num VFs supported for this PF */ 355ddf30f7fSAnirudh Venkataramanan u16 num_vf_qps; /* num queue pairs per VF */ 356ddf30f7fSAnirudh Venkataramanan u16 num_vf_msix; /* num vectors per VF */ 357837f08fdSAnirudh Venkataramanan DECLARE_BITMAP(state, __ICE_STATE_NBITS); 358940b61afSAnirudh Venkataramanan DECLARE_BITMAP(avail_txqs, ICE_MAX_TXQS); 359940b61afSAnirudh Venkataramanan DECLARE_BITMAP(avail_rxqs, ICE_MAX_RXQS); 360940b61afSAnirudh Venkataramanan DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 361940b61afSAnirudh Venkataramanan unsigned long serv_tmr_period; 362940b61afSAnirudh Venkataramanan unsigned long serv_tmr_prev; 363940b61afSAnirudh Venkataramanan struct timer_list serv_tmr; 364940b61afSAnirudh Venkataramanan struct work_struct serv_task; 365940b61afSAnirudh Venkataramanan struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 366940b61afSAnirudh Venkataramanan struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 367837f08fdSAnirudh Venkataramanan u32 msg_enable; 368d76a60baSAnirudh Venkataramanan u32 hw_csum_rx_error; 369cbe66bfeSBrett Creeley u32 oicr_idx; /* Other interrupt cause MSIX vector index */ 370eb0208ecSPreethi Banala u32 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */ 371940b61afSAnirudh Venkataramanan u32 num_lan_msix; /* Total MSIX vectors for base driver */ 372f9867df6SAnirudh Venkataramanan u16 num_lan_tx; /* num LAN Tx queues setup */ 373f9867df6SAnirudh Venkataramanan u16 num_lan_rx; /* num LAN Rx queues setup */ 374d337f2afSAnirudh Venkataramanan u16 q_left_tx; /* remaining num Tx queues left unclaimed */ 375d337f2afSAnirudh Venkataramanan u16 q_left_rx; /* remaining num Rx queues left unclaimed */ 376940b61afSAnirudh Venkataramanan u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 377940b61afSAnirudh Venkataramanan u16 num_alloc_vsi; 3780b28b702SAnirudh Venkataramanan u16 corer_count; /* Core reset count */ 3790b28b702SAnirudh Venkataramanan u16 globr_count; /* Global reset count */ 3800b28b702SAnirudh Venkataramanan u16 empr_count; /* EMP reset count */ 3810b28b702SAnirudh Venkataramanan u16 pfr_count; /* PF reset count */ 3820b28b702SAnirudh Venkataramanan 383fcea6f3dSAnirudh Venkataramanan struct ice_hw_port_stats stats; 384fcea6f3dSAnirudh Venkataramanan struct ice_hw_port_stats stats_prev; 385837f08fdSAnirudh Venkataramanan struct ice_hw hw; 3860ab54c5fSJesse Brandeburg u8 stat_prev_loaded:1; /* has previous stats been loaded */ 3877b9ffc76SAnirudh Venkataramanan #ifdef CONFIG_DCB 3887b9ffc76SAnirudh Venkataramanan u16 dcbx_cap; 3897b9ffc76SAnirudh Venkataramanan #endif /* CONFIG_DCB */ 390b3969fd7SSudheer Mogilappagari u32 tx_timeout_count; 391b3969fd7SSudheer Mogilappagari unsigned long tx_timeout_last_recovery; 392b3969fd7SSudheer Mogilappagari u32 tx_timeout_recovery_level; 393940b61afSAnirudh Venkataramanan char int_name[ICE_INT_NAME_STR_LEN]; 3940e674aebSAnirudh Venkataramanan u32 sw_int_count; 395837f08fdSAnirudh Venkataramanan }; 396940b61afSAnirudh Venkataramanan 3973a858ba3SAnirudh Venkataramanan struct ice_netdev_priv { 3983a858ba3SAnirudh Venkataramanan struct ice_vsi *vsi; 3993a858ba3SAnirudh Venkataramanan }; 4003a858ba3SAnirudh Venkataramanan 401940b61afSAnirudh Venkataramanan /** 402940b61afSAnirudh Venkataramanan * ice_irq_dynamic_ena - Enable default interrupt generation settings 403f9867df6SAnirudh Venkataramanan * @hw: pointer to HW struct 404f9867df6SAnirudh Venkataramanan * @vsi: pointer to VSI struct, can be NULL 405cdedef59SAnirudh Venkataramanan * @q_vector: pointer to q_vector, can be NULL 406940b61afSAnirudh Venkataramanan */ 407c8b7abddSBruce Allan static inline void 408c8b7abddSBruce Allan ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 409cdedef59SAnirudh Venkataramanan struct ice_q_vector *q_vector) 410940b61afSAnirudh Venkataramanan { 411b07833a0SBrett Creeley u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 412cbe66bfeSBrett Creeley ((struct ice_pf *)hw->back)->oicr_idx; 413940b61afSAnirudh Venkataramanan int itr = ICE_ITR_NONE; 414940b61afSAnirudh Venkataramanan u32 val; 415940b61afSAnirudh Venkataramanan 416940b61afSAnirudh Venkataramanan /* clear the PBA here, as this function is meant to clean out all 417940b61afSAnirudh Venkataramanan * previous interrupts and enable the interrupt 418940b61afSAnirudh Venkataramanan */ 419940b61afSAnirudh Venkataramanan val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 420940b61afSAnirudh Venkataramanan (itr << GLINT_DYN_CTL_ITR_INDX_S); 421cdedef59SAnirudh Venkataramanan if (vsi) 422cdedef59SAnirudh Venkataramanan if (test_bit(__ICE_DOWN, vsi->state)) 423cdedef59SAnirudh Venkataramanan return; 424940b61afSAnirudh Venkataramanan wr32(hw, GLINT_DYN_CTL(vector), val); 425940b61afSAnirudh Venkataramanan } 426cdedef59SAnirudh Venkataramanan 427c2a23e00SBrett Creeley /** 428c2a23e00SBrett Creeley * ice_find_vsi_by_type - Find and return VSI of a given type 429c2a23e00SBrett Creeley * @pf: PF to search for VSI 430c2a23e00SBrett Creeley * @type: Value indicating type of VSI we are looking for 431c2a23e00SBrett Creeley */ 432c2a23e00SBrett Creeley static inline struct ice_vsi * 433c2a23e00SBrett Creeley ice_find_vsi_by_type(struct ice_pf *pf, enum ice_vsi_type type) 434c2a23e00SBrett Creeley { 435c2a23e00SBrett Creeley int i; 436c2a23e00SBrett Creeley 437c2a23e00SBrett Creeley for (i = 0; i < pf->num_alloc_vsi; i++) { 438c2a23e00SBrett Creeley struct ice_vsi *vsi = pf->vsi[i]; 439c2a23e00SBrett Creeley 440c2a23e00SBrett Creeley if (vsi && vsi->type == type) 441c2a23e00SBrett Creeley return vsi; 442c2a23e00SBrett Creeley } 443c2a23e00SBrett Creeley 444c2a23e00SBrett Creeley return NULL; 445c2a23e00SBrett Creeley } 446c2a23e00SBrett Creeley 4470e674aebSAnirudh Venkataramanan int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 4480e674aebSAnirudh Venkataramanan int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 449fcea6f3dSAnirudh Venkataramanan void ice_set_ethtool_ops(struct net_device *netdev); 450*5a4a8673SBruce Allan void ice_update_vsi_stats(struct ice_vsi *vsi); 451*5a4a8673SBruce Allan void ice_update_pf_stats(struct ice_pf *pf); 452fcea6f3dSAnirudh Venkataramanan int ice_up(struct ice_vsi *vsi); 453fcea6f3dSAnirudh Venkataramanan int ice_down(struct ice_vsi *vsi); 4540e674aebSAnirudh Venkataramanan int ice_vsi_cfg(struct ice_vsi *vsi); 4550e674aebSAnirudh Venkataramanan struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 456d76a60baSAnirudh Venkataramanan int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 457d76a60baSAnirudh Venkataramanan int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 458d76a60baSAnirudh Venkataramanan void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 459fcea6f3dSAnirudh Venkataramanan void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 4607b9ffc76SAnirudh Venkataramanan #ifdef CONFIG_DCB 4617b9ffc76SAnirudh Venkataramanan int ice_pf_ena_all_vsi(struct ice_pf *pf, bool locked); 4627b9ffc76SAnirudh Venkataramanan void ice_pf_dis_all_vsi(struct ice_pf *pf, bool locked); 4637b9ffc76SAnirudh Venkataramanan #endif /* CONFIG_DCB */ 4640e674aebSAnirudh Venkataramanan int ice_open(struct net_device *netdev); 4650e674aebSAnirudh Venkataramanan int ice_stop(struct net_device *netdev); 466d76a60baSAnirudh Venkataramanan 467837f08fdSAnirudh Venkataramanan #endif /* _ICE_H_ */ 468