xref: /openbmc/linux/drivers/net/ethernet/intel/e1000e/e1000.h (revision c5083cf6d286e4d3485eaf7904e5d60a2d9df6f5)
1dee1ad47SJeff Kirsher /*******************************************************************************
2dee1ad47SJeff Kirsher 
3dee1ad47SJeff Kirsher   Intel PRO/1000 Linux driver
4dee1ad47SJeff Kirsher   Copyright(c) 1999 - 2011 Intel Corporation.
5dee1ad47SJeff Kirsher 
6dee1ad47SJeff Kirsher   This program is free software; you can redistribute it and/or modify it
7dee1ad47SJeff Kirsher   under the terms and conditions of the GNU General Public License,
8dee1ad47SJeff Kirsher   version 2, as published by the Free Software Foundation.
9dee1ad47SJeff Kirsher 
10dee1ad47SJeff Kirsher   This program is distributed in the hope it will be useful, but WITHOUT
11dee1ad47SJeff Kirsher   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12dee1ad47SJeff Kirsher   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13dee1ad47SJeff Kirsher   more details.
14dee1ad47SJeff Kirsher 
15dee1ad47SJeff Kirsher   You should have received a copy of the GNU General Public License along with
16dee1ad47SJeff Kirsher   this program; if not, write to the Free Software Foundation, Inc.,
17dee1ad47SJeff Kirsher   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18dee1ad47SJeff Kirsher 
19dee1ad47SJeff Kirsher   The full GNU General Public License is included in this distribution in
20dee1ad47SJeff Kirsher   the file called "COPYING".
21dee1ad47SJeff Kirsher 
22dee1ad47SJeff Kirsher   Contact Information:
23dee1ad47SJeff Kirsher   Linux NICS <linux.nics@intel.com>
24dee1ad47SJeff Kirsher   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25dee1ad47SJeff Kirsher   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26dee1ad47SJeff Kirsher 
27dee1ad47SJeff Kirsher *******************************************************************************/
28dee1ad47SJeff Kirsher 
29dee1ad47SJeff Kirsher /* Linux PRO/1000 Ethernet Driver main header file */
30dee1ad47SJeff Kirsher 
31dee1ad47SJeff Kirsher #ifndef _E1000_H_
32dee1ad47SJeff Kirsher #define _E1000_H_
33dee1ad47SJeff Kirsher 
34dee1ad47SJeff Kirsher #include <linux/bitops.h>
35dee1ad47SJeff Kirsher #include <linux/types.h>
36dee1ad47SJeff Kirsher #include <linux/timer.h>
37dee1ad47SJeff Kirsher #include <linux/workqueue.h>
38dee1ad47SJeff Kirsher #include <linux/io.h>
39dee1ad47SJeff Kirsher #include <linux/netdevice.h>
40dee1ad47SJeff Kirsher #include <linux/pci.h>
41dee1ad47SJeff Kirsher #include <linux/pci-aspm.h>
42dee1ad47SJeff Kirsher #include <linux/crc32.h>
43dee1ad47SJeff Kirsher #include <linux/if_vlan.h>
44dee1ad47SJeff Kirsher 
45dee1ad47SJeff Kirsher #include "hw.h"
46dee1ad47SJeff Kirsher 
47dee1ad47SJeff Kirsher struct e1000_info;
48dee1ad47SJeff Kirsher 
49dee1ad47SJeff Kirsher #define e_dbg(format, arg...) \
50dee1ad47SJeff Kirsher 	netdev_dbg(hw->adapter->netdev, format, ## arg)
51dee1ad47SJeff Kirsher #define e_err(format, arg...) \
52dee1ad47SJeff Kirsher 	netdev_err(adapter->netdev, format, ## arg)
53dee1ad47SJeff Kirsher #define e_info(format, arg...) \
54dee1ad47SJeff Kirsher 	netdev_info(adapter->netdev, format, ## arg)
55dee1ad47SJeff Kirsher #define e_warn(format, arg...) \
56dee1ad47SJeff Kirsher 	netdev_warn(adapter->netdev, format, ## arg)
57dee1ad47SJeff Kirsher #define e_notice(format, arg...) \
58dee1ad47SJeff Kirsher 	netdev_notice(adapter->netdev, format, ## arg)
59dee1ad47SJeff Kirsher 
60dee1ad47SJeff Kirsher 
61dee1ad47SJeff Kirsher /* Interrupt modes, as used by the IntMode parameter */
62dee1ad47SJeff Kirsher #define E1000E_INT_MODE_LEGACY		0
63dee1ad47SJeff Kirsher #define E1000E_INT_MODE_MSI		1
64dee1ad47SJeff Kirsher #define E1000E_INT_MODE_MSIX		2
65dee1ad47SJeff Kirsher 
66dee1ad47SJeff Kirsher /* Tx/Rx descriptor defines */
67dee1ad47SJeff Kirsher #define E1000_DEFAULT_TXD		256
68dee1ad47SJeff Kirsher #define E1000_MAX_TXD			4096
69dee1ad47SJeff Kirsher #define E1000_MIN_TXD			64
70dee1ad47SJeff Kirsher 
71dee1ad47SJeff Kirsher #define E1000_DEFAULT_RXD		256
72dee1ad47SJeff Kirsher #define E1000_MAX_RXD			4096
73dee1ad47SJeff Kirsher #define E1000_MIN_RXD			64
74dee1ad47SJeff Kirsher 
75dee1ad47SJeff Kirsher #define E1000_MIN_ITR_USECS		10 /* 100000 irq/sec */
76dee1ad47SJeff Kirsher #define E1000_MAX_ITR_USECS		10000 /* 100    irq/sec */
77dee1ad47SJeff Kirsher 
78dee1ad47SJeff Kirsher /* Early Receive defines */
79dee1ad47SJeff Kirsher #define E1000_ERT_2048			0x100
80dee1ad47SJeff Kirsher 
81dee1ad47SJeff Kirsher #define E1000_FC_PAUSE_TIME		0x0680 /* 858 usec */
82dee1ad47SJeff Kirsher 
83dee1ad47SJeff Kirsher /* How many Tx Descriptors do we need to call netif_wake_queue ? */
84dee1ad47SJeff Kirsher /* How many Rx Buffers do we bundle into one write to the hardware ? */
85dee1ad47SJeff Kirsher #define E1000_RX_BUFFER_WRITE		16 /* Must be power of 2 */
86dee1ad47SJeff Kirsher 
87dee1ad47SJeff Kirsher #define AUTO_ALL_MODES			0
88dee1ad47SJeff Kirsher #define E1000_EEPROM_APME		0x0400
89dee1ad47SJeff Kirsher 
90dee1ad47SJeff Kirsher #define E1000_MNG_VLAN_NONE		(-1)
91dee1ad47SJeff Kirsher 
92dee1ad47SJeff Kirsher /* Number of packet split data buffers (not including the header buffer) */
93dee1ad47SJeff Kirsher #define PS_PAGE_BUFFERS			(MAX_PS_BUFFERS - 1)
94dee1ad47SJeff Kirsher 
95dee1ad47SJeff Kirsher #define DEFAULT_JUMBO			9234
96dee1ad47SJeff Kirsher 
97dee1ad47SJeff Kirsher /* BM/HV Specific Registers */
98dee1ad47SJeff Kirsher #define BM_PORT_CTRL_PAGE                 769
99dee1ad47SJeff Kirsher 
100dee1ad47SJeff Kirsher #define PHY_UPPER_SHIFT                   21
101dee1ad47SJeff Kirsher #define BM_PHY_REG(page, reg) \
102dee1ad47SJeff Kirsher 	(((reg) & MAX_PHY_REG_ADDRESS) |\
103dee1ad47SJeff Kirsher 	 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
104dee1ad47SJeff Kirsher 	 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
105dee1ad47SJeff Kirsher 
106dee1ad47SJeff Kirsher /* PHY Wakeup Registers and defines */
107dee1ad47SJeff Kirsher #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
108dee1ad47SJeff Kirsher #define BM_RCTL         PHY_REG(BM_WUC_PAGE, 0)
109dee1ad47SJeff Kirsher #define BM_WUC          PHY_REG(BM_WUC_PAGE, 1)
110dee1ad47SJeff Kirsher #define BM_WUFC         PHY_REG(BM_WUC_PAGE, 2)
111dee1ad47SJeff Kirsher #define BM_WUS          PHY_REG(BM_WUC_PAGE, 3)
112dee1ad47SJeff Kirsher #define BM_RAR_L(_i)    (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
113dee1ad47SJeff Kirsher #define BM_RAR_M(_i)    (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
114dee1ad47SJeff Kirsher #define BM_RAR_H(_i)    (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
115dee1ad47SJeff Kirsher #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
116dee1ad47SJeff Kirsher #define BM_MTA(_i)      (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
117dee1ad47SJeff Kirsher 
118dee1ad47SJeff Kirsher #define BM_RCTL_UPE           0x0001          /* Unicast Promiscuous Mode */
119dee1ad47SJeff Kirsher #define BM_RCTL_MPE           0x0002          /* Multicast Promiscuous Mode */
120dee1ad47SJeff Kirsher #define BM_RCTL_MO_SHIFT      3               /* Multicast Offset Shift */
121dee1ad47SJeff Kirsher #define BM_RCTL_MO_MASK       (3 << 3)        /* Multicast Offset Mask */
122dee1ad47SJeff Kirsher #define BM_RCTL_BAM           0x0020          /* Broadcast Accept Mode */
123dee1ad47SJeff Kirsher #define BM_RCTL_PMCF          0x0040          /* Pass MAC Control Frames */
124dee1ad47SJeff Kirsher #define BM_RCTL_RFCE          0x0080          /* Rx Flow Control Enable */
125dee1ad47SJeff Kirsher 
126dee1ad47SJeff Kirsher #define HV_STATS_PAGE	778
127dee1ad47SJeff Kirsher #define HV_SCC_UPPER	PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */
128dee1ad47SJeff Kirsher #define HV_SCC_LOWER	PHY_REG(HV_STATS_PAGE, 17)
129dee1ad47SJeff Kirsher #define HV_ECOL_UPPER	PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */
130dee1ad47SJeff Kirsher #define HV_ECOL_LOWER	PHY_REG(HV_STATS_PAGE, 19)
131dee1ad47SJeff Kirsher #define HV_MCC_UPPER	PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */
132dee1ad47SJeff Kirsher #define HV_MCC_LOWER	PHY_REG(HV_STATS_PAGE, 21)
133dee1ad47SJeff Kirsher #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */
134dee1ad47SJeff Kirsher #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
135dee1ad47SJeff Kirsher #define HV_COLC_UPPER	PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */
136dee1ad47SJeff Kirsher #define HV_COLC_LOWER	PHY_REG(HV_STATS_PAGE, 26)
137dee1ad47SJeff Kirsher #define HV_DC_UPPER	PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
138dee1ad47SJeff Kirsher #define HV_DC_LOWER	PHY_REG(HV_STATS_PAGE, 28)
139dee1ad47SJeff Kirsher #define HV_TNCRS_UPPER	PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */
140dee1ad47SJeff Kirsher #define HV_TNCRS_LOWER	PHY_REG(HV_STATS_PAGE, 30)
141dee1ad47SJeff Kirsher 
142dee1ad47SJeff Kirsher #define E1000_FCRTV_PCH     0x05F40 /* PCH Flow Control Refresh Timer Value */
143dee1ad47SJeff Kirsher 
144dee1ad47SJeff Kirsher /* BM PHY Copper Specific Status */
145dee1ad47SJeff Kirsher #define BM_CS_STATUS                      17
146dee1ad47SJeff Kirsher #define BM_CS_STATUS_LINK_UP              0x0400
147dee1ad47SJeff Kirsher #define BM_CS_STATUS_RESOLVED             0x0800
148dee1ad47SJeff Kirsher #define BM_CS_STATUS_SPEED_MASK           0xC000
149dee1ad47SJeff Kirsher #define BM_CS_STATUS_SPEED_1000           0x8000
150dee1ad47SJeff Kirsher 
151dee1ad47SJeff Kirsher /* 82577 Mobile Phy Status Register */
152dee1ad47SJeff Kirsher #define HV_M_STATUS                       26
153dee1ad47SJeff Kirsher #define HV_M_STATUS_AUTONEG_COMPLETE      0x1000
154dee1ad47SJeff Kirsher #define HV_M_STATUS_SPEED_MASK            0x0300
155dee1ad47SJeff Kirsher #define HV_M_STATUS_SPEED_1000            0x0200
156dee1ad47SJeff Kirsher #define HV_M_STATUS_LINK_UP               0x0040
157dee1ad47SJeff Kirsher 
158823dcd25SDavid S. Miller #define E1000_ICH_FWSM_PCIM2PCI		0x01000000 /* ME PCIm-to-PCI active */
159823dcd25SDavid S. Miller #define E1000_ICH_FWSM_PCIM2PCI_COUNT	2000
160823dcd25SDavid S. Miller 
161dee1ad47SJeff Kirsher /* Time to wait before putting the device into D3 if there's no link (in ms). */
162dee1ad47SJeff Kirsher #define LINK_TIMEOUT		100
163dee1ad47SJeff Kirsher 
164dee1ad47SJeff Kirsher #define DEFAULT_RDTR			0
165dee1ad47SJeff Kirsher #define DEFAULT_RADV			8
166dee1ad47SJeff Kirsher #define BURST_RDTR			0x20
167dee1ad47SJeff Kirsher #define BURST_RADV			0x20
168dee1ad47SJeff Kirsher 
169dee1ad47SJeff Kirsher /*
170dee1ad47SJeff Kirsher  * in the case of WTHRESH, it appears at least the 82571/2 hardware
171dee1ad47SJeff Kirsher  * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
172dee1ad47SJeff Kirsher  * WTHRESH=4, and since we want 64 bytes at a time written back, set
173dee1ad47SJeff Kirsher  * it to 5
174dee1ad47SJeff Kirsher  */
175dee1ad47SJeff Kirsher #define E1000_TXDCTL_DMA_BURST_ENABLE                          \
176dee1ad47SJeff Kirsher 	(E1000_TXDCTL_GRAN | /* set descriptor granularity */  \
177dee1ad47SJeff Kirsher 	 E1000_TXDCTL_COUNT_DESC |                             \
178dee1ad47SJeff Kirsher 	 (5 << 16) | /* wthresh must be +1 more than desired */\
179dee1ad47SJeff Kirsher 	 (1 << 8)  | /* hthresh */                             \
180dee1ad47SJeff Kirsher 	 0x1f)       /* pthresh */
181dee1ad47SJeff Kirsher 
182dee1ad47SJeff Kirsher #define E1000_RXDCTL_DMA_BURST_ENABLE                          \
183dee1ad47SJeff Kirsher 	(0x01000000 | /* set descriptor granularity */         \
184dee1ad47SJeff Kirsher 	 (4 << 16)  | /* set writeback threshold    */         \
185dee1ad47SJeff Kirsher 	 (4 << 8)   | /* set prefetch threshold     */         \
186dee1ad47SJeff Kirsher 	 0x20)        /* set hthresh                */
187dee1ad47SJeff Kirsher 
188dee1ad47SJeff Kirsher #define E1000_TIDV_FPD (1 << 31)
189dee1ad47SJeff Kirsher #define E1000_RDTR_FPD (1 << 31)
190dee1ad47SJeff Kirsher 
191dee1ad47SJeff Kirsher enum e1000_boards {
192dee1ad47SJeff Kirsher 	board_82571,
193dee1ad47SJeff Kirsher 	board_82572,
194dee1ad47SJeff Kirsher 	board_82573,
195dee1ad47SJeff Kirsher 	board_82574,
196dee1ad47SJeff Kirsher 	board_82583,
197dee1ad47SJeff Kirsher 	board_80003es2lan,
198dee1ad47SJeff Kirsher 	board_ich8lan,
199dee1ad47SJeff Kirsher 	board_ich9lan,
200dee1ad47SJeff Kirsher 	board_ich10lan,
201dee1ad47SJeff Kirsher 	board_pchlan,
202dee1ad47SJeff Kirsher 	board_pch2lan,
203dee1ad47SJeff Kirsher };
204dee1ad47SJeff Kirsher 
205dee1ad47SJeff Kirsher struct e1000_ps_page {
206dee1ad47SJeff Kirsher 	struct page *page;
207dee1ad47SJeff Kirsher 	u64 dma; /* must be u64 - written to hw */
208dee1ad47SJeff Kirsher };
209dee1ad47SJeff Kirsher 
210dee1ad47SJeff Kirsher /*
211dee1ad47SJeff Kirsher  * wrappers around a pointer to a socket buffer,
212dee1ad47SJeff Kirsher  * so a DMA handle can be stored along with the buffer
213dee1ad47SJeff Kirsher  */
214dee1ad47SJeff Kirsher struct e1000_buffer {
215dee1ad47SJeff Kirsher 	dma_addr_t dma;
216dee1ad47SJeff Kirsher 	struct sk_buff *skb;
217dee1ad47SJeff Kirsher 	union {
218dee1ad47SJeff Kirsher 		/* Tx */
219dee1ad47SJeff Kirsher 		struct {
220dee1ad47SJeff Kirsher 			unsigned long time_stamp;
221dee1ad47SJeff Kirsher 			u16 length;
222dee1ad47SJeff Kirsher 			u16 next_to_watch;
223dee1ad47SJeff Kirsher 			unsigned int segs;
224dee1ad47SJeff Kirsher 			unsigned int bytecount;
225dee1ad47SJeff Kirsher 			u16 mapped_as_page;
226dee1ad47SJeff Kirsher 		};
227dee1ad47SJeff Kirsher 		/* Rx */
228dee1ad47SJeff Kirsher 		struct {
229dee1ad47SJeff Kirsher 			/* arrays of page information for packet split */
230dee1ad47SJeff Kirsher 			struct e1000_ps_page *ps_pages;
231dee1ad47SJeff Kirsher 			struct page *page;
232dee1ad47SJeff Kirsher 		};
233dee1ad47SJeff Kirsher 	};
234dee1ad47SJeff Kirsher };
235dee1ad47SJeff Kirsher 
236dee1ad47SJeff Kirsher struct e1000_ring {
237dee1ad47SJeff Kirsher 	void *desc;			/* pointer to ring memory  */
238dee1ad47SJeff Kirsher 	dma_addr_t dma;			/* phys address of ring    */
239dee1ad47SJeff Kirsher 	unsigned int size;		/* length of ring in bytes */
240dee1ad47SJeff Kirsher 	unsigned int count;		/* number of desc. in ring */
241dee1ad47SJeff Kirsher 
242dee1ad47SJeff Kirsher 	u16 next_to_use;
243dee1ad47SJeff Kirsher 	u16 next_to_clean;
244dee1ad47SJeff Kirsher 
245*c5083cf6SBruce Allan 	void __iomem *head;
246*c5083cf6SBruce Allan 	void __iomem *tail;
247dee1ad47SJeff Kirsher 
248dee1ad47SJeff Kirsher 	/* array of buffer information structs */
249dee1ad47SJeff Kirsher 	struct e1000_buffer *buffer_info;
250dee1ad47SJeff Kirsher 
251dee1ad47SJeff Kirsher 	char name[IFNAMSIZ + 5];
252dee1ad47SJeff Kirsher 	u32 ims_val;
253dee1ad47SJeff Kirsher 	u32 itr_val;
254*c5083cf6SBruce Allan 	void __iomem *itr_register;
255dee1ad47SJeff Kirsher 	int set_itr;
256dee1ad47SJeff Kirsher 
257dee1ad47SJeff Kirsher 	struct sk_buff *rx_skb_top;
258dee1ad47SJeff Kirsher };
259dee1ad47SJeff Kirsher 
260dee1ad47SJeff Kirsher /* PHY register snapshot values */
261dee1ad47SJeff Kirsher struct e1000_phy_regs {
262dee1ad47SJeff Kirsher 	u16 bmcr;		/* basic mode control register    */
263dee1ad47SJeff Kirsher 	u16 bmsr;		/* basic mode status register     */
264dee1ad47SJeff Kirsher 	u16 advertise;		/* auto-negotiation advertisement */
265dee1ad47SJeff Kirsher 	u16 lpa;		/* link partner ability register  */
266dee1ad47SJeff Kirsher 	u16 expansion;		/* auto-negotiation expansion reg */
267dee1ad47SJeff Kirsher 	u16 ctrl1000;		/* 1000BASE-T control register    */
268dee1ad47SJeff Kirsher 	u16 stat1000;		/* 1000BASE-T status register     */
269dee1ad47SJeff Kirsher 	u16 estatus;		/* extended status register       */
270dee1ad47SJeff Kirsher };
271dee1ad47SJeff Kirsher 
272dee1ad47SJeff Kirsher /* board specific private data structure */
273dee1ad47SJeff Kirsher struct e1000_adapter {
274dee1ad47SJeff Kirsher 	struct timer_list watchdog_timer;
275dee1ad47SJeff Kirsher 	struct timer_list phy_info_timer;
276dee1ad47SJeff Kirsher 	struct timer_list blink_timer;
277dee1ad47SJeff Kirsher 
278dee1ad47SJeff Kirsher 	struct work_struct reset_task;
279dee1ad47SJeff Kirsher 	struct work_struct watchdog_task;
280dee1ad47SJeff Kirsher 
281dee1ad47SJeff Kirsher 	const struct e1000_info *ei;
282dee1ad47SJeff Kirsher 
283dee1ad47SJeff Kirsher 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
284dee1ad47SJeff Kirsher 	u32 bd_number;
285dee1ad47SJeff Kirsher 	u32 rx_buffer_len;
286dee1ad47SJeff Kirsher 	u16 mng_vlan_id;
287dee1ad47SJeff Kirsher 	u16 link_speed;
288dee1ad47SJeff Kirsher 	u16 link_duplex;
289dee1ad47SJeff Kirsher 	u16 eeprom_vers;
290dee1ad47SJeff Kirsher 
291dee1ad47SJeff Kirsher 	/* track device up/down/testing state */
292dee1ad47SJeff Kirsher 	unsigned long state;
293dee1ad47SJeff Kirsher 
294dee1ad47SJeff Kirsher 	/* Interrupt Throttle Rate */
295dee1ad47SJeff Kirsher 	u32 itr;
296dee1ad47SJeff Kirsher 	u32 itr_setting;
297dee1ad47SJeff Kirsher 	u16 tx_itr;
298dee1ad47SJeff Kirsher 	u16 rx_itr;
299dee1ad47SJeff Kirsher 
300dee1ad47SJeff Kirsher 	/*
301dee1ad47SJeff Kirsher 	 * Tx
302dee1ad47SJeff Kirsher 	 */
303dee1ad47SJeff Kirsher 	struct e1000_ring *tx_ring /* One per active queue */
304dee1ad47SJeff Kirsher 						____cacheline_aligned_in_smp;
305dee1ad47SJeff Kirsher 
306dee1ad47SJeff Kirsher 	struct napi_struct napi;
307dee1ad47SJeff Kirsher 
308dee1ad47SJeff Kirsher 	unsigned int restart_queue;
309dee1ad47SJeff Kirsher 	u32 txd_cmd;
310dee1ad47SJeff Kirsher 
311dee1ad47SJeff Kirsher 	bool detect_tx_hung;
31209357b00SJeff Kirsher 	bool tx_hang_recheck;
313dee1ad47SJeff Kirsher 	u8 tx_timeout_factor;
314dee1ad47SJeff Kirsher 
315dee1ad47SJeff Kirsher 	u32 tx_int_delay;
316dee1ad47SJeff Kirsher 	u32 tx_abs_int_delay;
317dee1ad47SJeff Kirsher 
318dee1ad47SJeff Kirsher 	unsigned int total_tx_bytes;
319dee1ad47SJeff Kirsher 	unsigned int total_tx_packets;
320dee1ad47SJeff Kirsher 	unsigned int total_rx_bytes;
321dee1ad47SJeff Kirsher 	unsigned int total_rx_packets;
322dee1ad47SJeff Kirsher 
323dee1ad47SJeff Kirsher 	/* Tx stats */
324dee1ad47SJeff Kirsher 	u64 tpt_old;
325dee1ad47SJeff Kirsher 	u64 colc_old;
326dee1ad47SJeff Kirsher 	u32 gotc;
327dee1ad47SJeff Kirsher 	u64 gotc_old;
328dee1ad47SJeff Kirsher 	u32 tx_timeout_count;
329dee1ad47SJeff Kirsher 	u32 tx_fifo_head;
330dee1ad47SJeff Kirsher 	u32 tx_head_addr;
331dee1ad47SJeff Kirsher 	u32 tx_fifo_size;
332dee1ad47SJeff Kirsher 	u32 tx_dma_failed;
333dee1ad47SJeff Kirsher 
334dee1ad47SJeff Kirsher 	/*
335dee1ad47SJeff Kirsher 	 * Rx
336dee1ad47SJeff Kirsher 	 */
337dee1ad47SJeff Kirsher 	bool (*clean_rx) (struct e1000_adapter *adapter,
338dee1ad47SJeff Kirsher 			  int *work_done, int work_to_do)
339dee1ad47SJeff Kirsher 						____cacheline_aligned_in_smp;
340dee1ad47SJeff Kirsher 	void (*alloc_rx_buf) (struct e1000_adapter *adapter,
341dee1ad47SJeff Kirsher 			      int cleaned_count, gfp_t gfp);
342dee1ad47SJeff Kirsher 	struct e1000_ring *rx_ring;
343dee1ad47SJeff Kirsher 
344dee1ad47SJeff Kirsher 	u32 rx_int_delay;
345dee1ad47SJeff Kirsher 	u32 rx_abs_int_delay;
346dee1ad47SJeff Kirsher 
347dee1ad47SJeff Kirsher 	/* Rx stats */
348dee1ad47SJeff Kirsher 	u64 hw_csum_err;
349dee1ad47SJeff Kirsher 	u64 hw_csum_good;
350dee1ad47SJeff Kirsher 	u64 rx_hdr_split;
351dee1ad47SJeff Kirsher 	u32 gorc;
352dee1ad47SJeff Kirsher 	u64 gorc_old;
353dee1ad47SJeff Kirsher 	u32 alloc_rx_buff_failed;
354dee1ad47SJeff Kirsher 	u32 rx_dma_failed;
355dee1ad47SJeff Kirsher 
356dee1ad47SJeff Kirsher 	unsigned int rx_ps_pages;
357dee1ad47SJeff Kirsher 	u16 rx_ps_bsize0;
358dee1ad47SJeff Kirsher 	u32 max_frame_size;
359dee1ad47SJeff Kirsher 	u32 min_frame_size;
360dee1ad47SJeff Kirsher 
361dee1ad47SJeff Kirsher 	/* OS defined structs */
362dee1ad47SJeff Kirsher 	struct net_device *netdev;
363dee1ad47SJeff Kirsher 	struct pci_dev *pdev;
364dee1ad47SJeff Kirsher 
365dee1ad47SJeff Kirsher 	/* structs defined in e1000_hw.h */
366dee1ad47SJeff Kirsher 	struct e1000_hw hw;
367dee1ad47SJeff Kirsher 
368dee1ad47SJeff Kirsher 	spinlock_t stats64_lock;
369dee1ad47SJeff Kirsher 	struct e1000_hw_stats stats;
370dee1ad47SJeff Kirsher 	struct e1000_phy_info phy_info;
371dee1ad47SJeff Kirsher 	struct e1000_phy_stats phy_stats;
372dee1ad47SJeff Kirsher 
373dee1ad47SJeff Kirsher 	/* Snapshot of PHY registers */
374dee1ad47SJeff Kirsher 	struct e1000_phy_regs phy_regs;
375dee1ad47SJeff Kirsher 
376dee1ad47SJeff Kirsher 	struct e1000_ring test_tx_ring;
377dee1ad47SJeff Kirsher 	struct e1000_ring test_rx_ring;
378dee1ad47SJeff Kirsher 	u32 test_icr;
379dee1ad47SJeff Kirsher 
380dee1ad47SJeff Kirsher 	u32 msg_enable;
381dee1ad47SJeff Kirsher 	unsigned int num_vectors;
382dee1ad47SJeff Kirsher 	struct msix_entry *msix_entries;
383dee1ad47SJeff Kirsher 	int int_mode;
384dee1ad47SJeff Kirsher 	u32 eiac_mask;
385dee1ad47SJeff Kirsher 
386dee1ad47SJeff Kirsher 	u32 eeprom_wol;
387dee1ad47SJeff Kirsher 	u32 wol;
388dee1ad47SJeff Kirsher 	u32 pba;
389dee1ad47SJeff Kirsher 	u32 max_hw_frame_size;
390dee1ad47SJeff Kirsher 
391dee1ad47SJeff Kirsher 	bool fc_autoneg;
392dee1ad47SJeff Kirsher 
393dee1ad47SJeff Kirsher 	unsigned int flags;
394dee1ad47SJeff Kirsher 	unsigned int flags2;
395dee1ad47SJeff Kirsher 	struct work_struct downshift_task;
396dee1ad47SJeff Kirsher 	struct work_struct update_phy_task;
397dee1ad47SJeff Kirsher 	struct work_struct print_hang_task;
398dee1ad47SJeff Kirsher 
399dee1ad47SJeff Kirsher 	bool idle_check;
400dee1ad47SJeff Kirsher 	int phy_hang_count;
401dee1ad47SJeff Kirsher };
402dee1ad47SJeff Kirsher 
403dee1ad47SJeff Kirsher struct e1000_info {
404dee1ad47SJeff Kirsher 	enum e1000_mac_type	mac;
405dee1ad47SJeff Kirsher 	unsigned int		flags;
406dee1ad47SJeff Kirsher 	unsigned int		flags2;
407dee1ad47SJeff Kirsher 	u32			pba;
408dee1ad47SJeff Kirsher 	u32			max_hw_frame_size;
409dee1ad47SJeff Kirsher 	s32			(*get_variants)(struct e1000_adapter *);
4108ce9d6c7SJeff Kirsher 	const struct e1000_mac_operations *mac_ops;
4118ce9d6c7SJeff Kirsher 	const struct e1000_phy_operations *phy_ops;
4128ce9d6c7SJeff Kirsher 	const struct e1000_nvm_operations *nvm_ops;
413dee1ad47SJeff Kirsher };
414dee1ad47SJeff Kirsher 
415dee1ad47SJeff Kirsher /* hardware capability, feature, and workaround flags */
416dee1ad47SJeff Kirsher #define FLAG_HAS_AMT                      (1 << 0)
417dee1ad47SJeff Kirsher #define FLAG_HAS_FLASH                    (1 << 1)
418dee1ad47SJeff Kirsher #define FLAG_HAS_HW_VLAN_FILTER           (1 << 2)
419dee1ad47SJeff Kirsher #define FLAG_HAS_WOL                      (1 << 3)
420dee1ad47SJeff Kirsher #define FLAG_HAS_ERT                      (1 << 4)
421dee1ad47SJeff Kirsher #define FLAG_HAS_CTRLEXT_ON_LOAD          (1 << 5)
422dee1ad47SJeff Kirsher #define FLAG_HAS_SWSM_ON_LOAD             (1 << 6)
423dee1ad47SJeff Kirsher #define FLAG_HAS_JUMBO_FRAMES             (1 << 7)
424dee1ad47SJeff Kirsher #define FLAG_READ_ONLY_NVM                (1 << 8)
425dee1ad47SJeff Kirsher #define FLAG_IS_ICH                       (1 << 9)
426dee1ad47SJeff Kirsher #define FLAG_HAS_MSIX                     (1 << 10)
427dee1ad47SJeff Kirsher #define FLAG_HAS_SMART_POWER_DOWN         (1 << 11)
428dee1ad47SJeff Kirsher #define FLAG_IS_QUAD_PORT_A               (1 << 12)
429dee1ad47SJeff Kirsher #define FLAG_IS_QUAD_PORT                 (1 << 13)
430dee1ad47SJeff Kirsher #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN   (1 << 14)
431dee1ad47SJeff Kirsher #define FLAG_APME_IN_WUC                  (1 << 15)
432dee1ad47SJeff Kirsher #define FLAG_APME_IN_CTRL3                (1 << 16)
433dee1ad47SJeff Kirsher #define FLAG_APME_CHECK_PORT_B            (1 << 17)
434dee1ad47SJeff Kirsher #define FLAG_DISABLE_FC_PAUSE_TIME        (1 << 18)
435dee1ad47SJeff Kirsher #define FLAG_NO_WAKE_UCAST                (1 << 19)
436dee1ad47SJeff Kirsher #define FLAG_MNG_PT_ENABLED               (1 << 20)
437dee1ad47SJeff Kirsher #define FLAG_RESET_OVERWRITES_LAA         (1 << 21)
438dee1ad47SJeff Kirsher #define FLAG_TARC_SPEED_MODE_BIT          (1 << 22)
439dee1ad47SJeff Kirsher #define FLAG_TARC_SET_BIT_ZERO            (1 << 23)
440dee1ad47SJeff Kirsher #define FLAG_RX_NEEDS_RESTART             (1 << 24)
441dee1ad47SJeff Kirsher #define FLAG_LSC_GIG_SPEED_DROP           (1 << 25)
442dee1ad47SJeff Kirsher #define FLAG_SMART_POWER_DOWN             (1 << 26)
443dee1ad47SJeff Kirsher #define FLAG_MSI_ENABLED                  (1 << 27)
444dc221294SBruce Allan /* reserved (1 << 28) */
445dee1ad47SJeff Kirsher #define FLAG_TSO_FORCE                    (1 << 29)
446dee1ad47SJeff Kirsher #define FLAG_RX_RESTART_NOW               (1 << 30)
447dee1ad47SJeff Kirsher #define FLAG_MSI_TEST_FAILED              (1 << 31)
448dee1ad47SJeff Kirsher 
449dee1ad47SJeff Kirsher #define FLAG2_CRC_STRIPPING               (1 << 0)
450dee1ad47SJeff Kirsher #define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
451dee1ad47SJeff Kirsher #define FLAG2_IS_DISCARDING               (1 << 2)
452dee1ad47SJeff Kirsher #define FLAG2_DISABLE_ASPM_L1             (1 << 3)
453dee1ad47SJeff Kirsher #define FLAG2_HAS_PHY_STATS               (1 << 4)
454dee1ad47SJeff Kirsher #define FLAG2_HAS_EEE                     (1 << 5)
455dee1ad47SJeff Kirsher #define FLAG2_DMA_BURST                   (1 << 6)
456dee1ad47SJeff Kirsher #define FLAG2_DISABLE_ASPM_L0S            (1 << 7)
457dee1ad47SJeff Kirsher #define FLAG2_DISABLE_AIM                 (1 << 8)
458dee1ad47SJeff Kirsher #define FLAG2_CHECK_PHY_HANG              (1 << 9)
459823dcd25SDavid S. Miller #define FLAG2_NO_DISABLE_RX               (1 << 10)
460823dcd25SDavid S. Miller #define FLAG2_PCIM2PCI_ARBITER_WA         (1 << 11)
461dee1ad47SJeff Kirsher 
462dee1ad47SJeff Kirsher #define E1000_RX_DESC_PS(R, i)	    \
463dee1ad47SJeff Kirsher 	(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
4645f450212SBruce Allan #define E1000_RX_DESC_EXT(R, i)	    \
4655f450212SBruce Allan 	(&(((union e1000_rx_desc_extended *)((R).desc))[i]))
466dee1ad47SJeff Kirsher #define E1000_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
467dee1ad47SJeff Kirsher #define E1000_TX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_tx_desc)
468dee1ad47SJeff Kirsher #define E1000_CONTEXT_DESC(R, i)	E1000_GET_DESC(R, i, e1000_context_desc)
469dee1ad47SJeff Kirsher 
470dee1ad47SJeff Kirsher enum e1000_state_t {
471dee1ad47SJeff Kirsher 	__E1000_TESTING,
472dee1ad47SJeff Kirsher 	__E1000_RESETTING,
473a90b412cSBruce Allan 	__E1000_ACCESS_SHARED_RESOURCE,
474dee1ad47SJeff Kirsher 	__E1000_DOWN
475dee1ad47SJeff Kirsher };
476dee1ad47SJeff Kirsher 
477dee1ad47SJeff Kirsher enum latency_range {
478dee1ad47SJeff Kirsher 	lowest_latency = 0,
479dee1ad47SJeff Kirsher 	low_latency = 1,
480dee1ad47SJeff Kirsher 	bulk_latency = 2,
481dee1ad47SJeff Kirsher 	latency_invalid = 255
482dee1ad47SJeff Kirsher };
483dee1ad47SJeff Kirsher 
484dee1ad47SJeff Kirsher extern char e1000e_driver_name[];
485dee1ad47SJeff Kirsher extern const char e1000e_driver_version[];
486dee1ad47SJeff Kirsher 
487dee1ad47SJeff Kirsher extern void e1000e_check_options(struct e1000_adapter *adapter);
488dee1ad47SJeff Kirsher extern void e1000e_set_ethtool_ops(struct net_device *netdev);
489dee1ad47SJeff Kirsher 
490dee1ad47SJeff Kirsher extern int e1000e_up(struct e1000_adapter *adapter);
491dee1ad47SJeff Kirsher extern void e1000e_down(struct e1000_adapter *adapter);
492dee1ad47SJeff Kirsher extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
493dee1ad47SJeff Kirsher extern void e1000e_reset(struct e1000_adapter *adapter);
494dee1ad47SJeff Kirsher extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
495dee1ad47SJeff Kirsher extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
496dee1ad47SJeff Kirsher extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
497dee1ad47SJeff Kirsher extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
498dee1ad47SJeff Kirsher extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
499dee1ad47SJeff Kirsher extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
500dee1ad47SJeff Kirsher                                                     struct rtnl_link_stats64
501dee1ad47SJeff Kirsher                                                     *stats);
502dee1ad47SJeff Kirsher extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
503dee1ad47SJeff Kirsher extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
504dee1ad47SJeff Kirsher extern void e1000e_get_hw_control(struct e1000_adapter *adapter);
505dee1ad47SJeff Kirsher extern void e1000e_release_hw_control(struct e1000_adapter *adapter);
506dee1ad47SJeff Kirsher 
507dee1ad47SJeff Kirsher extern unsigned int copybreak;
508dee1ad47SJeff Kirsher 
509dee1ad47SJeff Kirsher extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
510dee1ad47SJeff Kirsher 
5118ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_82571_info;
5128ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_82572_info;
5138ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_82573_info;
5148ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_82574_info;
5158ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_82583_info;
5168ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_ich8_info;
5178ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_ich9_info;
5188ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_ich10_info;
5198ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_pch_info;
5208ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_pch2_info;
5218ce9d6c7SJeff Kirsher extern const struct e1000_info e1000_es2_info;
522dee1ad47SJeff Kirsher 
523dee1ad47SJeff Kirsher extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
524dee1ad47SJeff Kirsher 					 u32 pba_num_size);
525dee1ad47SJeff Kirsher 
526dee1ad47SJeff Kirsher extern s32  e1000e_commit_phy(struct e1000_hw *hw);
527dee1ad47SJeff Kirsher 
528dee1ad47SJeff Kirsher extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
529dee1ad47SJeff Kirsher 
530dee1ad47SJeff Kirsher extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
531dee1ad47SJeff Kirsher extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
532dee1ad47SJeff Kirsher 
533dee1ad47SJeff Kirsher extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
534dee1ad47SJeff Kirsher extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
535dee1ad47SJeff Kirsher 						 bool state);
536dee1ad47SJeff Kirsher extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
537dee1ad47SJeff Kirsher extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
538dee1ad47SJeff Kirsher extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw);
539dee1ad47SJeff Kirsher extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw);
540dee1ad47SJeff Kirsher extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
541dee1ad47SJeff Kirsher extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
542dee1ad47SJeff Kirsher extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
543dee1ad47SJeff Kirsher 
544dee1ad47SJeff Kirsher extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
545dee1ad47SJeff Kirsher extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
546dee1ad47SJeff Kirsher extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
547dee1ad47SJeff Kirsher extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
548dee1ad47SJeff Kirsher extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
549dee1ad47SJeff Kirsher extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
550dee1ad47SJeff Kirsher extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
551dee1ad47SJeff Kirsher extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
552dee1ad47SJeff Kirsher extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
553dee1ad47SJeff Kirsher extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
554dee1ad47SJeff Kirsher extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
555dee1ad47SJeff Kirsher extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
556dee1ad47SJeff Kirsher extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
557dee1ad47SJeff Kirsher extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
558dee1ad47SJeff Kirsher extern s32 e1000e_id_led_init(struct e1000_hw *hw);
559dee1ad47SJeff Kirsher extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
560dee1ad47SJeff Kirsher extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
561dee1ad47SJeff Kirsher extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
562dee1ad47SJeff Kirsher extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
563dee1ad47SJeff Kirsher extern s32 e1000e_setup_link(struct e1000_hw *hw);
564dee1ad47SJeff Kirsher extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
565dee1ad47SJeff Kirsher extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
566dee1ad47SJeff Kirsher extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
567dee1ad47SJeff Kirsher 					       u8 *mc_addr_list,
568dee1ad47SJeff Kirsher 					       u32 mc_addr_count);
569dee1ad47SJeff Kirsher extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
570dee1ad47SJeff Kirsher extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
571dee1ad47SJeff Kirsher extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
572dee1ad47SJeff Kirsher extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
573dee1ad47SJeff Kirsher extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
574dee1ad47SJeff Kirsher extern void e1000e_config_collision_dist(struct e1000_hw *hw);
575dee1ad47SJeff Kirsher extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
576dee1ad47SJeff Kirsher extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
577dee1ad47SJeff Kirsher extern s32 e1000e_blink_led_generic(struct e1000_hw *hw);
578dee1ad47SJeff Kirsher extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
579dee1ad47SJeff Kirsher extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
580dee1ad47SJeff Kirsher extern void e1000e_reset_adaptive(struct e1000_hw *hw);
581dee1ad47SJeff Kirsher extern void e1000e_update_adaptive(struct e1000_hw *hw);
582dee1ad47SJeff Kirsher 
583dee1ad47SJeff Kirsher extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
584dee1ad47SJeff Kirsher extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
585dee1ad47SJeff Kirsher extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
586dee1ad47SJeff Kirsher extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
587dee1ad47SJeff Kirsher extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
588dee1ad47SJeff Kirsher extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
589dee1ad47SJeff Kirsher extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
590dee1ad47SJeff Kirsher extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);
591dee1ad47SJeff Kirsher extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
592dee1ad47SJeff Kirsher extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
593dee1ad47SJeff Kirsher                                           u16 *data);
594dee1ad47SJeff Kirsher extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
595dee1ad47SJeff Kirsher extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
596dee1ad47SJeff Kirsher extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
597dee1ad47SJeff Kirsher extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
598dee1ad47SJeff Kirsher                                            u16 data);
599dee1ad47SJeff Kirsher extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
600dee1ad47SJeff Kirsher extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
601dee1ad47SJeff Kirsher extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
602dee1ad47SJeff Kirsher extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
603dee1ad47SJeff Kirsher extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
604dee1ad47SJeff Kirsher extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
605dee1ad47SJeff Kirsher extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
606dee1ad47SJeff Kirsher extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
607dee1ad47SJeff Kirsher extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
608dee1ad47SJeff Kirsher extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
609dee1ad47SJeff Kirsher extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
610dee1ad47SJeff Kirsher extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
611dee1ad47SJeff Kirsher extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
612dee1ad47SJeff Kirsher 						 u16 *phy_reg);
613dee1ad47SJeff Kirsher extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
614dee1ad47SJeff Kirsher 						  u16 *phy_reg);
615dee1ad47SJeff Kirsher extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
616dee1ad47SJeff Kirsher extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
617dee1ad47SJeff Kirsher extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
618dee1ad47SJeff Kirsher extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
619dee1ad47SJeff Kirsher extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
620dee1ad47SJeff Kirsher                                         u16 data);
621dee1ad47SJeff Kirsher extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
622dee1ad47SJeff Kirsher extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
623dee1ad47SJeff Kirsher                                        u16 *data);
624dee1ad47SJeff Kirsher extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
625dee1ad47SJeff Kirsher 			       u32 usec_interval, bool *success);
626dee1ad47SJeff Kirsher extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
627dee1ad47SJeff Kirsher extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
628dee1ad47SJeff Kirsher extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
629dee1ad47SJeff Kirsher extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
630dee1ad47SJeff Kirsher extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
631dee1ad47SJeff Kirsher extern s32 e1000e_check_downshift(struct e1000_hw *hw);
632dee1ad47SJeff Kirsher extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
633dee1ad47SJeff Kirsher extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
634dee1ad47SJeff Kirsher                                         u16 *data);
635dee1ad47SJeff Kirsher extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
636dee1ad47SJeff Kirsher 				      u16 *data);
637dee1ad47SJeff Kirsher extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
638dee1ad47SJeff Kirsher extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
639dee1ad47SJeff Kirsher                                          u16 data);
640dee1ad47SJeff Kirsher extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
641dee1ad47SJeff Kirsher 				       u16 data);
642dee1ad47SJeff Kirsher extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
643dee1ad47SJeff Kirsher extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
644dee1ad47SJeff Kirsher extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
645dee1ad47SJeff Kirsher extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
646dee1ad47SJeff Kirsher extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
647dee1ad47SJeff Kirsher extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
648dee1ad47SJeff Kirsher 
649dee1ad47SJeff Kirsher extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
650dee1ad47SJeff Kirsher extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
651dee1ad47SJeff Kirsher extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
652dee1ad47SJeff Kirsher extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
653dee1ad47SJeff Kirsher extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
654dee1ad47SJeff Kirsher extern bool e1000_check_phy_82574(struct e1000_hw *hw);
655dee1ad47SJeff Kirsher 
656dee1ad47SJeff Kirsher static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
657dee1ad47SJeff Kirsher {
658dee1ad47SJeff Kirsher 	return hw->phy.ops.reset(hw);
659dee1ad47SJeff Kirsher }
660dee1ad47SJeff Kirsher 
661dee1ad47SJeff Kirsher static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
662dee1ad47SJeff Kirsher {
663dee1ad47SJeff Kirsher 	return hw->phy.ops.check_reset_block(hw);
664dee1ad47SJeff Kirsher }
665dee1ad47SJeff Kirsher 
666dee1ad47SJeff Kirsher static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
667dee1ad47SJeff Kirsher {
668dee1ad47SJeff Kirsher 	return hw->phy.ops.read_reg(hw, offset, data);
669dee1ad47SJeff Kirsher }
670dee1ad47SJeff Kirsher 
671dee1ad47SJeff Kirsher static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
672dee1ad47SJeff Kirsher {
673dee1ad47SJeff Kirsher 	return hw->phy.ops.write_reg(hw, offset, data);
674dee1ad47SJeff Kirsher }
675dee1ad47SJeff Kirsher 
676dee1ad47SJeff Kirsher static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
677dee1ad47SJeff Kirsher {
678dee1ad47SJeff Kirsher 	return hw->phy.ops.get_cable_length(hw);
679dee1ad47SJeff Kirsher }
680dee1ad47SJeff Kirsher 
681dee1ad47SJeff Kirsher extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
682dee1ad47SJeff Kirsher extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
683dee1ad47SJeff Kirsher extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
684dee1ad47SJeff Kirsher extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
685dee1ad47SJeff Kirsher extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
686dee1ad47SJeff Kirsher extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
687dee1ad47SJeff Kirsher extern void e1000e_release_nvm(struct e1000_hw *hw);
688dee1ad47SJeff Kirsher extern void e1000e_reload_nvm(struct e1000_hw *hw);
689dee1ad47SJeff Kirsher extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
690dee1ad47SJeff Kirsher 
691dee1ad47SJeff Kirsher static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
692dee1ad47SJeff Kirsher {
693dee1ad47SJeff Kirsher 	if (hw->mac.ops.read_mac_addr)
694dee1ad47SJeff Kirsher 		return hw->mac.ops.read_mac_addr(hw);
695dee1ad47SJeff Kirsher 
696dee1ad47SJeff Kirsher 	return e1000_read_mac_addr_generic(hw);
697dee1ad47SJeff Kirsher }
698dee1ad47SJeff Kirsher 
699dee1ad47SJeff Kirsher static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
700dee1ad47SJeff Kirsher {
701dee1ad47SJeff Kirsher 	return hw->nvm.ops.validate(hw);
702dee1ad47SJeff Kirsher }
703dee1ad47SJeff Kirsher 
704dee1ad47SJeff Kirsher static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
705dee1ad47SJeff Kirsher {
706dee1ad47SJeff Kirsher 	return hw->nvm.ops.update(hw);
707dee1ad47SJeff Kirsher }
708dee1ad47SJeff Kirsher 
709dee1ad47SJeff Kirsher static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
710dee1ad47SJeff Kirsher {
711dee1ad47SJeff Kirsher 	return hw->nvm.ops.read(hw, offset, words, data);
712dee1ad47SJeff Kirsher }
713dee1ad47SJeff Kirsher 
714dee1ad47SJeff Kirsher static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
715dee1ad47SJeff Kirsher {
716dee1ad47SJeff Kirsher 	return hw->nvm.ops.write(hw, offset, words, data);
717dee1ad47SJeff Kirsher }
718dee1ad47SJeff Kirsher 
719dee1ad47SJeff Kirsher static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
720dee1ad47SJeff Kirsher {
721dee1ad47SJeff Kirsher 	return hw->phy.ops.get_info(hw);
722dee1ad47SJeff Kirsher }
723dee1ad47SJeff Kirsher 
724dee1ad47SJeff Kirsher static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
725dee1ad47SJeff Kirsher {
726dee1ad47SJeff Kirsher 	return hw->mac.ops.check_mng_mode(hw);
727dee1ad47SJeff Kirsher }
728dee1ad47SJeff Kirsher 
729dee1ad47SJeff Kirsher extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
730dee1ad47SJeff Kirsher extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
731dee1ad47SJeff Kirsher extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
732dee1ad47SJeff Kirsher 
733dee1ad47SJeff Kirsher static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
734dee1ad47SJeff Kirsher {
735dee1ad47SJeff Kirsher 	return readl(hw->hw_addr + reg);
736dee1ad47SJeff Kirsher }
737dee1ad47SJeff Kirsher 
738dee1ad47SJeff Kirsher static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
739dee1ad47SJeff Kirsher {
740dee1ad47SJeff Kirsher 	writel(val, hw->hw_addr + reg);
741dee1ad47SJeff Kirsher }
742dee1ad47SJeff Kirsher 
743dee1ad47SJeff Kirsher #endif /* _E1000_H_ */
744