15e126e7cSLuo bin /* SPDX-License-Identifier: GPL-2.0-only */ 25e126e7cSLuo bin /* Huawei HiNIC PCI Express Linux driver 35e126e7cSLuo bin * Copyright(c) 2017 Huawei Technologies Co., Ltd 45e126e7cSLuo bin */ 55e126e7cSLuo bin 65e126e7cSLuo bin #ifndef __HINIC_DEVLINK_H__ 75e126e7cSLuo bin #define __HINIC_DEVLINK_H__ 85e126e7cSLuo bin 95e126e7cSLuo bin #include <net/devlink.h> 10c15850c7SLuo bin #include "hinic_dev.h" 115e126e7cSLuo bin 125e126e7cSLuo bin #define MAX_FW_TYPE_NUM 30 135e126e7cSLuo bin #define HINIC_MAGIC_NUM 0x18221100 145e126e7cSLuo bin #define UPDATEFW_IMAGE_HEAD_SIZE 1024 155e126e7cSLuo bin #define FW_UPDATE_COLD 0 165e126e7cSLuo bin #define FW_UPDATE_HOT 1 175e126e7cSLuo bin 185e126e7cSLuo bin #define UP_TYPE_A 0x0 195e126e7cSLuo bin #define UP_TYPE_B 0x1 205e126e7cSLuo bin 215e126e7cSLuo bin #define MAX_FW_FRAGMENT_LEN 1536 225e126e7cSLuo bin #define HINIC_FW_DISMATCH_ERROR 10 235e126e7cSLuo bin 245e126e7cSLuo bin enum hinic_fw_type { 255e126e7cSLuo bin UP_FW_UPDATE_UP_TEXT_A = 0x0, 265e126e7cSLuo bin UP_FW_UPDATE_UP_DATA_A, 275e126e7cSLuo bin UP_FW_UPDATE_UP_TEXT_B, 285e126e7cSLuo bin UP_FW_UPDATE_UP_DATA_B, 295e126e7cSLuo bin UP_FW_UPDATE_UP_DICT, 305e126e7cSLuo bin 315e126e7cSLuo bin UP_FW_UPDATE_HLINK_ONE = 0x5, 325e126e7cSLuo bin UP_FW_UPDATE_HLINK_TWO, 335e126e7cSLuo bin UP_FW_UPDATE_HLINK_THR, 345e126e7cSLuo bin UP_FW_UPDATE_PHY, 355e126e7cSLuo bin UP_FW_UPDATE_TILE_TEXT, 365e126e7cSLuo bin 375e126e7cSLuo bin UP_FW_UPDATE_TILE_DATA = 0xa, 385e126e7cSLuo bin UP_FW_UPDATE_TILE_DICT, 395e126e7cSLuo bin UP_FW_UPDATE_PPE_STATE, 405e126e7cSLuo bin UP_FW_UPDATE_PPE_BRANCH, 415e126e7cSLuo bin UP_FW_UPDATE_PPE_EXTACT, 425e126e7cSLuo bin 435e126e7cSLuo bin UP_FW_UPDATE_CLP_LEGACY = 0xf, 445e126e7cSLuo bin UP_FW_UPDATE_PXE_LEGACY, 455e126e7cSLuo bin UP_FW_UPDATE_ISCSI_LEGACY, 465e126e7cSLuo bin UP_FW_UPDATE_CLP_EFI, 475e126e7cSLuo bin UP_FW_UPDATE_PXE_EFI, 485e126e7cSLuo bin 495e126e7cSLuo bin UP_FW_UPDATE_ISCSI_EFI = 0x14, 505e126e7cSLuo bin UP_FW_UPDATE_CFG, 515e126e7cSLuo bin UP_FW_UPDATE_BOOT, 525e126e7cSLuo bin UP_FW_UPDATE_VPD, 535e126e7cSLuo bin FILE_TYPE_TOTAL_NUM 545e126e7cSLuo bin }; 555e126e7cSLuo bin 565e126e7cSLuo bin #define _IMAGE_UP_ALL_IN ((1 << UP_FW_UPDATE_UP_TEXT_A) | \ 575e126e7cSLuo bin (1 << UP_FW_UPDATE_UP_DATA_A) | \ 585e126e7cSLuo bin (1 << UP_FW_UPDATE_UP_TEXT_B) | \ 595e126e7cSLuo bin (1 << UP_FW_UPDATE_UP_DATA_B) | \ 605e126e7cSLuo bin (1 << UP_FW_UPDATE_UP_DICT) | \ 615e126e7cSLuo bin (1 << UP_FW_UPDATE_BOOT) | \ 625e126e7cSLuo bin (1 << UP_FW_UPDATE_HLINK_ONE) | \ 635e126e7cSLuo bin (1 << UP_FW_UPDATE_HLINK_TWO) | \ 645e126e7cSLuo bin (1 << UP_FW_UPDATE_HLINK_THR)) 655e126e7cSLuo bin 665e126e7cSLuo bin #define _IMAGE_UCODE_ALL_IN ((1 << UP_FW_UPDATE_TILE_TEXT) | \ 675e126e7cSLuo bin (1 << UP_FW_UPDATE_TILE_DICT) | \ 685e126e7cSLuo bin (1 << UP_FW_UPDATE_PPE_STATE) | \ 695e126e7cSLuo bin (1 << UP_FW_UPDATE_PPE_BRANCH) | \ 705e126e7cSLuo bin (1 << UP_FW_UPDATE_PPE_EXTACT)) 715e126e7cSLuo bin 725e126e7cSLuo bin #define _IMAGE_COLD_SUB_MODULES_MUST_IN (_IMAGE_UP_ALL_IN | _IMAGE_UCODE_ALL_IN) 735e126e7cSLuo bin #define _IMAGE_HOT_SUB_MODULES_MUST_IN (_IMAGE_UP_ALL_IN | _IMAGE_UCODE_ALL_IN) 745e126e7cSLuo bin #define _IMAGE_CFG_SUB_MODULES_MUST_IN BIT(UP_FW_UPDATE_CFG) 755e126e7cSLuo bin #define UP_FW_UPDATE_UP_TEXT 0x0 765e126e7cSLuo bin #define UP_FW_UPDATE_UP_DATA 0x1 775e126e7cSLuo bin #define UP_FW_UPDATE_VPD_B 0x15 785e126e7cSLuo bin 795e126e7cSLuo bin struct fw_section_info_st { 805e126e7cSLuo bin u32 fw_section_len; 815e126e7cSLuo bin u32 fw_section_offset; 825e126e7cSLuo bin u32 fw_section_version; 835e126e7cSLuo bin u32 fw_section_type; 845e126e7cSLuo bin u32 fw_section_crc; 855e126e7cSLuo bin }; 865e126e7cSLuo bin 875e126e7cSLuo bin struct fw_image_st { 885e126e7cSLuo bin u32 fw_version; 895e126e7cSLuo bin u32 fw_len; 905e126e7cSLuo bin u32 fw_magic; 915e126e7cSLuo bin struct { 925e126e7cSLuo bin u32 fw_section_cnt:16; 935e126e7cSLuo bin u32 resd:16; 945e126e7cSLuo bin } fw_info; 955e126e7cSLuo bin struct fw_section_info_st fw_section_info[MAX_FW_TYPE_NUM]; 965e126e7cSLuo bin u32 device_id; 975e126e7cSLuo bin u32 res[101]; 985e126e7cSLuo bin void *bin_data; 995e126e7cSLuo bin }; 1005e126e7cSLuo bin 1015e126e7cSLuo bin struct host_image_st { 1025e126e7cSLuo bin struct fw_section_info_st image_section_info[MAX_FW_TYPE_NUM]; 1035e126e7cSLuo bin struct { 1045e126e7cSLuo bin u32 up_total_len; 1055e126e7cSLuo bin u32 fw_version; 1065e126e7cSLuo bin } image_info; 1075e126e7cSLuo bin u32 section_type_num; 1085e126e7cSLuo bin u32 device_id; 1095e126e7cSLuo bin }; 1105e126e7cSLuo bin 111919d13a7SLeon Romanovsky struct devlink *hinic_devlink_alloc(struct device *dev); 1125e126e7cSLuo bin void hinic_devlink_free(struct devlink *devlink); 113*db4278c5SLeon Romanovsky void hinic_devlink_register(struct hinic_devlink_priv *priv); 114c15850c7SLuo bin void hinic_devlink_unregister(struct hinic_devlink_priv *priv); 115c15850c7SLuo bin 116c15850c7SLuo bin int hinic_health_reporters_create(struct hinic_devlink_priv *priv); 117c15850c7SLuo bin void hinic_health_reporters_destroy(struct hinic_devlink_priv *priv); 1185e126e7cSLuo bin 1195e126e7cSLuo bin #endif /* __HINIC_DEVLINK_H__ */ 120