xref: /openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1b11a0bb2SSalil Mehta /* SPDX-License-Identifier: GPL-2.0+ */
2b11a0bb2SSalil Mehta /* Copyright (c) 2016-2017 Hisilicon Limited. */
3b11a0bb2SSalil Mehta 
4b11a0bb2SSalil Mehta #ifndef __HCLGE_MBX_H
5b11a0bb2SSalil Mehta #define __HCLGE_MBX_H
6b11a0bb2SSalil Mehta #include <linux/init.h>
7b11a0bb2SSalil Mehta #include <linux/mutex.h>
8b11a0bb2SSalil Mehta #include <linux/types.h>
9b11a0bb2SSalil Mehta 
10b11a0bb2SSalil Mehta enum HCLGE_MBX_OPCODE {
11b11a0bb2SSalil Mehta 	HCLGE_MBX_RESET = 0x01,		/* (VF -> PF) assert reset */
12a15fa7d4SSalil Mehta 	HCLGE_MBX_ASSERTING_RESET,	/* (PF -> VF) PF is asserting reset */
13b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_UNICAST,		/* (VF -> PF) set UC addr */
14b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_MULTICAST,	/* (VF -> PF) set MC addr */
15b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_VLAN,		/* (VF -> PF) set VLAN */
16b11a0bb2SSalil Mehta 	HCLGE_MBX_MAP_RING_TO_VECTOR,	/* (VF -> PF) map ring-to-vector */
17b11a0bb2SSalil Mehta 	HCLGE_MBX_UNMAP_RING_TO_VECTOR,	/* (VF -> PF) unamp ring-to-vector */
18b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_PROMISC_MODE,	/* (VF -> PF) set promiscuous mode */
19b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_MACVLAN,		/* (VF -> PF) set unicast filter */
20b11a0bb2SSalil Mehta 	HCLGE_MBX_API_NEGOTIATE,	/* (VF -> PF) negotiate API version */
21b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_QINFO,		/* (VF -> PF) get queue config */
22c0425944SPeng Li 	HCLGE_MBX_GET_QDEPTH,		/* (VF -> PF) get queue depth */
2332e6d104SJian Shen 	HCLGE_MBX_GET_BASIC_INFO,	/* (VF -> PF) get basic info */
24b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_RETA,		/* (VF -> PF) get RETA */
25b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_RSS_KEY,		/* (VF -> PF) get RSS key */
26b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_MAC_ADDR,		/* (VF -> PF) get MAC addr */
2796b8e878SHuazhong Tan 	HCLGE_MBX_PF_VF_RESP,		/* (PF -> VF) generate response to VF */
28b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_BDNUM,		/* (VF -> PF) get BD num */
29b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_BUFSIZE,		/* (VF -> PF) get buffer size */
30b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_STREAMID,		/* (VF -> PF) get stream id */
31b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_AESTART,		/* (VF -> PF) start ae */
32b11a0bb2SSalil Mehta 	HCLGE_MBX_SET_TSOSTATS,		/* (VF -> PF) get tso stats */
33b11a0bb2SSalil Mehta 	HCLGE_MBX_LINK_STAT_CHANGE,	/* (PF -> VF) link status has changed */
34b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_BASE_CONFIG,	/* (VF -> PF) get config */
35b11a0bb2SSalil Mehta 	HCLGE_MBX_BIND_FUNC_QUEUE,	/* (VF -> PF) bind function and queue */
36b11a0bb2SSalil Mehta 	HCLGE_MBX_GET_LINK_STATUS,	/* (VF -> PF) get link status */
37b11a0bb2SSalil Mehta 	HCLGE_MBX_QUEUE_RESET,		/* (VF -> PF) reset queue */
38a6d818e3SYunsheng Lin 	HCLGE_MBX_KEEP_ALIVE,		/* (VF -> PF) send keep alive cmd */
39a6d818e3SYunsheng Lin 	HCLGE_MBX_SET_ALIVE,		/* (VF -> PF) set alive state */
40818f1675SYunsheng Lin 	HCLGE_MBX_SET_MTU,		/* (VF -> PF) set mtu */
410c29d191Sliuzhongzhu 	HCLGE_MBX_GET_QID_IN_PF,	/* (VF -> PF) get queue id in pf */
429194d18bSliuzhongzhu 	HCLGE_MBX_LINK_STAT_MODE,	/* (PF -> VF) link mode has changed */
439194d18bSliuzhongzhu 	HCLGE_MBX_GET_LINK_MODE,	/* (VF -> PF) get the link mode of pf */
444803d010SChristophe JAILLET 	HCLGE_MBX_PUSH_VLAN_INFO,	/* (PF -> VF) push port base vlan */
459c3e7130Sliuzhongzhu 	HCLGE_MBX_GET_MEDIA_TYPE,       /* (VF -> PF) get media type */
46e196ec75SJian Shen 	HCLGE_MBX_PUSH_PROMISC_INFO,	/* (PF -> VF) push vf promisc info */
4723b4201dSJian Shen 	HCLGE_MBX_VF_UNINIT,            /* (VF -> PF) vf is unintializing */
48039ba863SJian Shen 	HCLGE_MBX_HANDLE_VF_TBL,	/* (VF -> PF) store/clear hw table */
49a1aed456SGuangbin Huang 	HCLGE_MBX_GET_RING_VECTOR_MAP,	/* (VF -> PF) get ring-to-vector map */
506dd86902Sliuzhongzhu 
519e690456SGuangbin Huang 	HCLGE_MBX_GET_VF_FLR_STATUS = 200, /* (M7 -> PF) get vf flr status */
52ed8fb4b2SJian Shen 	HCLGE_MBX_PUSH_LINK_STATUS,	/* (M7 -> PF) get port link status */
53b18bf305SHuazhong Tan 	HCLGE_MBX_NCSI_ERROR,		/* (M7 -> PF) receive a NCSI error */
54b11a0bb2SSalil Mehta };
55b11a0bb2SSalil Mehta 
56b11a0bb2SSalil Mehta /* below are per-VF mac-vlan subcodes */
57b11a0bb2SSalil Mehta enum hclge_mbx_mac_vlan_subcode {
58b11a0bb2SSalil Mehta 	HCLGE_MBX_MAC_VLAN_UC_MODIFY = 0,	/* modify UC mac addr */
59b11a0bb2SSalil Mehta 	HCLGE_MBX_MAC_VLAN_UC_ADD,		/* add a new UC mac addr */
60b11a0bb2SSalil Mehta 	HCLGE_MBX_MAC_VLAN_UC_REMOVE,		/* remove a new UC mac addr */
61b11a0bb2SSalil Mehta 	HCLGE_MBX_MAC_VLAN_MC_MODIFY,		/* modify MC mac addr */
62b11a0bb2SSalil Mehta 	HCLGE_MBX_MAC_VLAN_MC_ADD,		/* add new MC mac addr */
63b11a0bb2SSalil Mehta 	HCLGE_MBX_MAC_VLAN_MC_REMOVE,		/* remove MC mac addr */
64b11a0bb2SSalil Mehta };
65b11a0bb2SSalil Mehta 
66b11a0bb2SSalil Mehta /* below are per-VF vlan cfg subcodes */
67b11a0bb2SSalil Mehta enum hclge_mbx_vlan_cfg_subcode {
68b11a0bb2SSalil Mehta 	HCLGE_MBX_VLAN_FILTER = 0,	/* set vlan filter */
69b11a0bb2SSalil Mehta 	HCLGE_MBX_VLAN_TX_OFF_CFG,	/* set tx side vlan offload */
70b11a0bb2SSalil Mehta 	HCLGE_MBX_VLAN_RX_OFF_CFG,	/* set rx side vlan offload */
7192f11ea1SJian Shen 	HCLGE_MBX_PORT_BASE_VLAN_CFG,	/* set port based vlan configuration */
7292f11ea1SJian Shen 	HCLGE_MBX_GET_PORT_BASE_VLAN_STATE,	/* get port based vlan state */
73fa6a262aSJian Shen 	HCLGE_MBX_ENABLE_VLAN_FILTER,
74b11a0bb2SSalil Mehta };
75b11a0bb2SSalil Mehta 
76039ba863SJian Shen enum hclge_mbx_tbl_cfg_subcode {
77039ba863SJian Shen 	HCLGE_MBX_VPORT_LIST_CLEAR,
78039ba863SJian Shen };
79039ba863SJian Shen 
80d3410018SYufeng Mo #define HCLGE_MBX_MAX_MSG_SIZE	14
81adcf738bSGuojia Liao #define HCLGE_MBX_MAX_RESP_DATA_SIZE	8U
82d3410018SYufeng Mo #define HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM	4
83d3410018SYufeng Mo 
84d9069dabSYufeng Mo #define HCLGE_RESET_SCHED_TIMEOUT	(3 * HZ)
85d9069dabSYufeng Mo #define HCLGE_MBX_SCHED_TIMEOUT	(HZ / 2)
86d9069dabSYufeng Mo 
87d3410018SYufeng Mo struct hclge_ring_chain_param {
88d3410018SYufeng Mo 	u8 ring_type;
89d3410018SYufeng Mo 	u8 tqp_index;
90d3410018SYufeng Mo 	u8 int_gl_index;
91d3410018SYufeng Mo };
92b11a0bb2SSalil Mehta 
9332e6d104SJian Shen struct hclge_basic_info {
9432e6d104SJian Shen 	u8 hw_tc_map;
9532e6d104SJian Shen 	u8 rsv;
96416eedb6SJie Wang 	__le16 mbx_api_version;
97416eedb6SJie Wang 	__le32 pf_caps;
9832e6d104SJian Shen };
9932e6d104SJian Shen 
100b11a0bb2SSalil Mehta struct hclgevf_mbx_resp_status {
101b11a0bb2SSalil Mehta 	struct mutex mbx_mutex; /* protects against contending sync cmd resp */
102b11a0bb2SSalil Mehta 	u32 origin_mbx_msg;
103b11a0bb2SSalil Mehta 	bool received_resp;
104b11a0bb2SSalil Mehta 	int resp_status;
1054671042fSPeng Li 	u16 match_id;
106b11a0bb2SSalil Mehta 	u8 additional_info[HCLGE_MBX_MAX_RESP_DATA_SIZE];
107b11a0bb2SSalil Mehta };
108b11a0bb2SSalil Mehta 
109bb5790b7SHuazhong Tan struct hclge_respond_to_vf_msg {
110bb5790b7SHuazhong Tan 	int status;
111bb5790b7SHuazhong Tan 	u8 data[HCLGE_MBX_MAX_RESP_DATA_SIZE];
112bb5790b7SHuazhong Tan 	u16 len;
113bb5790b7SHuazhong Tan };
114bb5790b7SHuazhong Tan 
115d3410018SYufeng Mo struct hclge_vf_to_pf_msg {
116d3410018SYufeng Mo 	u8 code;
117d3410018SYufeng Mo 	union {
118d3410018SYufeng Mo 		struct {
119d3410018SYufeng Mo 			u8 subcode;
120d3410018SYufeng Mo 			u8 data[HCLGE_MBX_MAX_MSG_SIZE];
121d3410018SYufeng Mo 		};
122d3410018SYufeng Mo 		struct {
123d3410018SYufeng Mo 			u8 en_bc;
124d3410018SYufeng Mo 			u8 en_uc;
125d3410018SYufeng Mo 			u8 en_mc;
1265e7414cdSJian Shen 			u8 en_limit_promisc;
127d3410018SYufeng Mo 		};
128d3410018SYufeng Mo 		struct {
129d3410018SYufeng Mo 			u8 vector_id;
130d3410018SYufeng Mo 			u8 ring_num;
131d3410018SYufeng Mo 			struct hclge_ring_chain_param
132d3410018SYufeng Mo 				param[HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM];
133d3410018SYufeng Mo 		};
134d3410018SYufeng Mo 	};
135d3410018SYufeng Mo };
136d3410018SYufeng Mo 
137d3410018SYufeng Mo struct hclge_pf_to_vf_msg {
138767975e5SJie Wang 	__le16 code;
1396fde96dfSJian Shen 	union {
1406fde96dfSJian Shen 		/* used for mbx response */
1416fde96dfSJian Shen 		struct {
142767975e5SJie Wang 			__le16 vf_mbx_msg_code;
143767975e5SJie Wang 			__le16 vf_mbx_msg_subcode;
144767975e5SJie Wang 			__le16 resp_status;
145d3410018SYufeng Mo 			u8 resp_data[HCLGE_MBX_MAX_RESP_DATA_SIZE];
146d3410018SYufeng Mo 		};
1476fde96dfSJian Shen 		/* used for general mbx */
1486fde96dfSJian Shen 		struct {
1496fde96dfSJian Shen 			u8 msg_data[HCLGE_MBX_MAX_MSG_SIZE];
1506fde96dfSJian Shen 		};
1516fde96dfSJian Shen 	};
1526fde96dfSJian Shen };
153d3410018SYufeng Mo 
154b11a0bb2SSalil Mehta struct hclge_mbx_vf_to_pf_cmd {
155b11a0bb2SSalil Mehta 	u8 rsv;
156b11a0bb2SSalil Mehta 	u8 mbx_src_vfid; /* Auto filled by IMP */
157b7048d32SHuazhong Tan 	u8 mbx_need_resp;
158b7048d32SHuazhong Tan 	u8 rsv1[1];
159b11a0bb2SSalil Mehta 	u8 msg_len;
1601b713d14SChengwen Feng 	u8 rsv2;
161767975e5SJie Wang 	__le16 match_id;
162d3410018SYufeng Mo 	struct hclge_vf_to_pf_msg msg;
163b11a0bb2SSalil Mehta };
164b11a0bb2SSalil Mehta 
165bb5790b7SHuazhong Tan #define HCLGE_MBX_NEED_RESP_B		0
166b7048d32SHuazhong Tan 
167b11a0bb2SSalil Mehta struct hclge_mbx_pf_to_vf_cmd {
168b11a0bb2SSalil Mehta 	u8 dest_vfid;
169b11a0bb2SSalil Mehta 	u8 rsv[3];
170b11a0bb2SSalil Mehta 	u8 msg_len;
1711b713d14SChengwen Feng 	u8 rsv1;
172767975e5SJie Wang 	__le16 match_id;
173d3410018SYufeng Mo 	struct hclge_pf_to_vf_msg msg;
174b11a0bb2SSalil Mehta };
175b11a0bb2SSalil Mehta 
176aa5c4f17SHuazhong Tan struct hclge_vf_rst_cmd {
177aa5c4f17SHuazhong Tan 	u8 dest_vfid;
178aa5c4f17SHuazhong Tan 	u8 vf_rst;
179aa5c4f17SHuazhong Tan 	u8 rsv[22];
180aa5c4f17SHuazhong Tan };
181aa5c4f17SHuazhong Tan 
182767975e5SJie Wang #pragma pack(1)
183767975e5SJie Wang struct hclge_mbx_link_status {
184767975e5SJie Wang 	__le16 link_status;
185767975e5SJie Wang 	__le32 speed;
186767975e5SJie Wang 	__le16 duplex;
187767975e5SJie Wang 	u8 flag;
188767975e5SJie Wang };
189767975e5SJie Wang 
190767975e5SJie Wang struct hclge_mbx_link_mode {
191767975e5SJie Wang 	__le16 idx;
192767975e5SJie Wang 	__le64 link_mode;
193767975e5SJie Wang };
194767975e5SJie Wang 
195767975e5SJie Wang struct hclge_mbx_port_base_vlan {
196767975e5SJie Wang 	__le16 state;
197767975e5SJie Wang 	__le16 vlan_proto;
198767975e5SJie Wang 	__le16 qos;
199767975e5SJie Wang 	__le16 vlan_tag;
200767975e5SJie Wang };
201767975e5SJie Wang 
202416eedb6SJie Wang struct hclge_mbx_vf_queue_info {
203416eedb6SJie Wang 	__le16 num_tqps;
204416eedb6SJie Wang 	__le16 rss_size;
205416eedb6SJie Wang 	__le16 rx_buf_len;
206416eedb6SJie Wang };
207416eedb6SJie Wang 
208416eedb6SJie Wang struct hclge_mbx_vf_queue_depth {
209416eedb6SJie Wang 	__le16 num_tx_desc;
210416eedb6SJie Wang 	__le16 num_rx_desc;
211416eedb6SJie Wang };
212416eedb6SJie Wang 
213416eedb6SJie Wang struct hclge_mbx_vlan_filter {
214416eedb6SJie Wang 	u8 is_kill;
215416eedb6SJie Wang 	__le16 vlan_id;
216416eedb6SJie Wang 	__le16 proto;
217416eedb6SJie Wang };
218416eedb6SJie Wang 
219416eedb6SJie Wang struct hclge_mbx_mtu_info {
220416eedb6SJie Wang 	__le32 mtu;
221416eedb6SJie Wang };
222416eedb6SJie Wang 
223767975e5SJie Wang #pragma pack()
224767975e5SJie Wang 
22507a0556aSSalil Mehta /* used by VF to store the received Async responses from PF */
22607a0556aSSalil Mehta struct hclgevf_mbx_arq_ring {
22707a0556aSSalil Mehta #define HCLGE_MBX_MAX_ARQ_MSG_SIZE	8
22807a0556aSSalil Mehta #define HCLGE_MBX_MAX_ARQ_MSG_NUM	1024
22907a0556aSSalil Mehta 	struct hclgevf_dev *hdev;
23007a0556aSSalil Mehta 	u32 head;
23107a0556aSSalil Mehta 	u32 tail;
23230780a8bSHuazhong Tan 	atomic_t count;
233767975e5SJie Wang 	__le16 msg_q[HCLGE_MBX_MAX_ARQ_MSG_NUM][HCLGE_MBX_MAX_ARQ_MSG_SIZE];
23407a0556aSSalil Mehta };
23507a0556aSSalil Mehta 
236*09431ed8SHao Lan struct hclge_dev;
237*09431ed8SHao Lan 
238*09431ed8SHao Lan #define HCLGE_MBX_OPCODE_MAX 256
239*09431ed8SHao Lan struct hclge_mbx_ops_param {
240*09431ed8SHao Lan 	struct hclge_vport *vport;
241*09431ed8SHao Lan 	struct hclge_mbx_vf_to_pf_cmd *req;
242*09431ed8SHao Lan 	struct hclge_respond_to_vf_msg *resp_msg;
243*09431ed8SHao Lan };
244*09431ed8SHao Lan 
245*09431ed8SHao Lan typedef int (*hclge_mbx_ops_fn)(struct hclge_mbx_ops_param *param);
246*09431ed8SHao Lan 
247b11a0bb2SSalil Mehta #define hclge_mbx_ring_ptr_move_crq(crq) \
248b11a0bb2SSalil Mehta 	(crq->next_to_use = (crq->next_to_use + 1) % crq->desc_num)
24907a0556aSSalil Mehta #define hclge_mbx_tail_ptr_move_arq(arq) \
25065e61e3cSYufeng Mo 		(arq.tail = (arq.tail + 1) % HCLGE_MBX_MAX_ARQ_MSG_NUM)
25107a0556aSSalil Mehta #define hclge_mbx_head_ptr_move_arq(arq) \
25265e61e3cSYufeng Mo 		(arq.head = (arq.head + 1) % HCLGE_MBX_MAX_ARQ_MSG_NUM)
25318b6e31fSGuangbin Huang 
25418b6e31fSGuangbin Huang /* PF immediately push link status to VFs when link status changed */
25518b6e31fSGuangbin Huang #define HCLGE_MBX_PUSH_LINK_STATUS_EN			BIT(0)
256b11a0bb2SSalil Mehta #endif
257