12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2511e6bc0Shuangdaode /*
3511e6bc0Shuangdaode * Copyright (c) 2014-2015 Hisilicon Limited.
4511e6bc0Shuangdaode */
5511e6bc0Shuangdaode
6511e6bc0Shuangdaode #include <linux/cdev.h>
7511e6bc0Shuangdaode #include <linux/module.h>
8511e6bc0Shuangdaode #include <linux/kernel.h>
9511e6bc0Shuangdaode #include <linux/init.h>
10511e6bc0Shuangdaode #include <linux/netdevice.h>
11511e6bc0Shuangdaode #include <linux/etherdevice.h>
12511e6bc0Shuangdaode #include <asm/cacheflush.h>
13511e6bc0Shuangdaode #include <linux/platform_device.h>
14511e6bc0Shuangdaode #include <linux/spinlock.h>
15511e6bc0Shuangdaode
16511e6bc0Shuangdaode #include "hns_dsaf_main.h"
17511e6bc0Shuangdaode #include "hns_dsaf_ppe.h"
18511e6bc0Shuangdaode #include "hns_dsaf_rcb.h"
19511e6bc0Shuangdaode
20511e6bc0Shuangdaode #define RCB_COMMON_REG_OFFSET 0x80000
21511e6bc0Shuangdaode #define TX_RING 0
22511e6bc0Shuangdaode #define RX_RING 1
23511e6bc0Shuangdaode
24511e6bc0Shuangdaode #define RCB_RESET_WAIT_TIMES 30
25511e6bc0Shuangdaode #define RCB_RESET_TRY_TIMES 10
26511e6bc0Shuangdaode
27b29bd412Slipeng /* Because default mtu is 1500, rcb buffer size is set to 2048 enough */
28b29bd412Slipeng #define RCB_DEFAULT_BUFFER_SIZE 2048
29b29bd412Slipeng
30511e6bc0Shuangdaode /**
31511e6bc0Shuangdaode *hns_rcb_wait_fbd_clean - clean fbd
32511e6bc0Shuangdaode *@qs: ring struct pointer array
33d0ea5cbdSJesse Brandeburg *@q_num: num of array
34511e6bc0Shuangdaode *@flag: tx or rx flag
35511e6bc0Shuangdaode */
hns_rcb_wait_fbd_clean(struct hnae_queue ** qs,int q_num,u32 flag)36511e6bc0Shuangdaode void hns_rcb_wait_fbd_clean(struct hnae_queue **qs, int q_num, u32 flag)
37511e6bc0Shuangdaode {
38511e6bc0Shuangdaode int i, wait_cnt;
39511e6bc0Shuangdaode u32 fbd_num;
40511e6bc0Shuangdaode
41511e6bc0Shuangdaode for (wait_cnt = i = 0; i < q_num; wait_cnt++) {
42511e6bc0Shuangdaode usleep_range(200, 300);
43511e6bc0Shuangdaode fbd_num = 0;
44511e6bc0Shuangdaode if (flag & RCB_INT_FLAG_TX)
45511e6bc0Shuangdaode fbd_num += dsaf_read_dev(qs[i],
46511e6bc0Shuangdaode RCB_RING_TX_RING_FBDNUM_REG);
47511e6bc0Shuangdaode if (flag & RCB_INT_FLAG_RX)
48511e6bc0Shuangdaode fbd_num += dsaf_read_dev(qs[i],
49511e6bc0Shuangdaode RCB_RING_RX_RING_FBDNUM_REG);
50511e6bc0Shuangdaode if (!fbd_num)
51511e6bc0Shuangdaode i++;
52511e6bc0Shuangdaode if (wait_cnt >= 10000)
53511e6bc0Shuangdaode break;
54511e6bc0Shuangdaode }
55511e6bc0Shuangdaode
56511e6bc0Shuangdaode if (i < q_num)
57511e6bc0Shuangdaode dev_err(qs[i]->handle->owner_dev,
58511e6bc0Shuangdaode "queue(%d) wait fbd(%d) clean fail!!\n", i, fbd_num);
59511e6bc0Shuangdaode }
60511e6bc0Shuangdaode
hns_rcb_wait_tx_ring_clean(struct hnae_queue * qs)6131fabbeeSPeng Li int hns_rcb_wait_tx_ring_clean(struct hnae_queue *qs)
6231fabbeeSPeng Li {
6331fabbeeSPeng Li u32 head, tail;
6431fabbeeSPeng Li int wait_cnt;
6531fabbeeSPeng Li
6631fabbeeSPeng Li tail = dsaf_read_dev(&qs->tx_ring, RCB_REG_TAIL);
6731fabbeeSPeng Li wait_cnt = 0;
6831fabbeeSPeng Li while (wait_cnt++ < HNS_MAX_WAIT_CNT) {
6931fabbeeSPeng Li head = dsaf_read_dev(&qs->tx_ring, RCB_REG_HEAD);
7031fabbeeSPeng Li if (tail == head)
7131fabbeeSPeng Li break;
7231fabbeeSPeng Li
7331fabbeeSPeng Li usleep_range(100, 200);
7431fabbeeSPeng Li }
7531fabbeeSPeng Li
7631fabbeeSPeng Li if (wait_cnt >= HNS_MAX_WAIT_CNT) {
7731fabbeeSPeng Li dev_err(qs->dev->dev, "rcb wait timeout, head not equal to tail.\n");
7831fabbeeSPeng Li return -EBUSY;
7931fabbeeSPeng Li }
8031fabbeeSPeng Li
8131fabbeeSPeng Li return 0;
8231fabbeeSPeng Li }
8331fabbeeSPeng Li
84511e6bc0Shuangdaode /**
85511e6bc0Shuangdaode *hns_rcb_reset_ring_hw - ring reset
86511e6bc0Shuangdaode *@q: ring struct pointer
87511e6bc0Shuangdaode */
hns_rcb_reset_ring_hw(struct hnae_queue * q)88511e6bc0Shuangdaode void hns_rcb_reset_ring_hw(struct hnae_queue *q)
89511e6bc0Shuangdaode {
90511e6bc0Shuangdaode u32 wait_cnt;
91511e6bc0Shuangdaode u32 try_cnt = 0;
92511e6bc0Shuangdaode u32 could_ret;
93511e6bc0Shuangdaode
94511e6bc0Shuangdaode u32 tx_fbd_num;
95511e6bc0Shuangdaode
96511e6bc0Shuangdaode while (try_cnt++ < RCB_RESET_TRY_TIMES) {
97511e6bc0Shuangdaode usleep_range(100, 200);
98511e6bc0Shuangdaode tx_fbd_num = dsaf_read_dev(q, RCB_RING_TX_RING_FBDNUM_REG);
99511e6bc0Shuangdaode if (tx_fbd_num)
100511e6bc0Shuangdaode continue;
101511e6bc0Shuangdaode
102511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_PREFETCH_EN_REG, 0);
103511e6bc0Shuangdaode
104511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_T0_BE_RST, 1);
105511e6bc0Shuangdaode
106511e6bc0Shuangdaode msleep(20);
107511e6bc0Shuangdaode could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST);
108511e6bc0Shuangdaode
109511e6bc0Shuangdaode wait_cnt = 0;
110511e6bc0Shuangdaode while (!could_ret && (wait_cnt < RCB_RESET_WAIT_TIMES)) {
111511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_T0_BE_RST, 0);
112511e6bc0Shuangdaode
113511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_T0_BE_RST, 1);
114511e6bc0Shuangdaode
115511e6bc0Shuangdaode msleep(20);
116511e6bc0Shuangdaode could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST);
117511e6bc0Shuangdaode
118511e6bc0Shuangdaode wait_cnt++;
119511e6bc0Shuangdaode }
120511e6bc0Shuangdaode
121511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_T0_BE_RST, 0);
122511e6bc0Shuangdaode
123511e6bc0Shuangdaode if (could_ret)
124511e6bc0Shuangdaode break;
125511e6bc0Shuangdaode }
126511e6bc0Shuangdaode
127511e6bc0Shuangdaode if (try_cnt >= RCB_RESET_TRY_TIMES)
128511e6bc0Shuangdaode dev_err(q->dev->dev, "port%d reset ring fail\n",
129511e6bc0Shuangdaode hns_ae_get_vf_cb(q->handle)->port_index);
130511e6bc0Shuangdaode }
131511e6bc0Shuangdaode
132511e6bc0Shuangdaode /**
133511e6bc0Shuangdaode *hns_rcb_int_ctrl_hw - rcb irq enable control
134511e6bc0Shuangdaode *@q: hnae queue struct pointer
135511e6bc0Shuangdaode *@flag:ring flag tx or rx
136511e6bc0Shuangdaode *@mask:mask
137511e6bc0Shuangdaode */
hns_rcb_int_ctrl_hw(struct hnae_queue * q,u32 flag,u32 mask)138511e6bc0Shuangdaode void hns_rcb_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask)
139511e6bc0Shuangdaode {
140511e6bc0Shuangdaode u32 int_mask_en = !!mask;
141511e6bc0Shuangdaode
142511e6bc0Shuangdaode if (flag & RCB_INT_FLAG_TX) {
143511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG, int_mask_en);
144511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_INTMSK_TX_OVERTIME_REG,
145511e6bc0Shuangdaode int_mask_en);
146511e6bc0Shuangdaode }
147511e6bc0Shuangdaode
148511e6bc0Shuangdaode if (flag & RCB_INT_FLAG_RX) {
149511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_INTMSK_RXWL_REG, int_mask_en);
150511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_INTMSK_RX_OVERTIME_REG,
151511e6bc0Shuangdaode int_mask_en);
152511e6bc0Shuangdaode }
153511e6bc0Shuangdaode }
154511e6bc0Shuangdaode
hns_rcb_int_clr_hw(struct hnae_queue * q,u32 flag)155511e6bc0Shuangdaode void hns_rcb_int_clr_hw(struct hnae_queue *q, u32 flag)
156511e6bc0Shuangdaode {
157511e6bc0Shuangdaode if (flag & RCB_INT_FLAG_TX) {
15813ac695eSSalil dsaf_write_dev(q, RCB_RING_INTSTS_TX_RING_REG, 1);
15913ac695eSSalil dsaf_write_dev(q, RCB_RING_INTSTS_TX_OVERTIME_REG, 1);
160511e6bc0Shuangdaode }
161511e6bc0Shuangdaode
162511e6bc0Shuangdaode if (flag & RCB_INT_FLAG_RX) {
16313ac695eSSalil dsaf_write_dev(q, RCB_RING_INTSTS_RX_RING_REG, 1);
16413ac695eSSalil dsaf_write_dev(q, RCB_RING_INTSTS_RX_OVERTIME_REG, 1);
165511e6bc0Shuangdaode }
166511e6bc0Shuangdaode }
167511e6bc0Shuangdaode
hns_rcbv2_int_ctrl_hw(struct hnae_queue * q,u32 flag,u32 mask)16813ac695eSSalil void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask)
16913ac695eSSalil {
17013ac695eSSalil u32 int_mask_en = !!mask;
17113ac695eSSalil
17213ac695eSSalil if (flag & RCB_INT_FLAG_TX)
17313ac695eSSalil dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG, int_mask_en);
17413ac695eSSalil
17513ac695eSSalil if (flag & RCB_INT_FLAG_RX)
17613ac695eSSalil dsaf_write_dev(q, RCB_RING_INTMSK_RXWL_REG, int_mask_en);
17713ac695eSSalil }
17813ac695eSSalil
hns_rcbv2_int_clr_hw(struct hnae_queue * q,u32 flag)17913ac695eSSalil void hns_rcbv2_int_clr_hw(struct hnae_queue *q, u32 flag)
18013ac695eSSalil {
18113ac695eSSalil if (flag & RCB_INT_FLAG_TX)
18213ac695eSSalil dsaf_write_dev(q, RCBV2_TX_RING_INT_STS_REG, 1);
18313ac695eSSalil
18413ac695eSSalil if (flag & RCB_INT_FLAG_RX)
18513ac695eSSalil dsaf_write_dev(q, RCBV2_RX_RING_INT_STS_REG, 1);
18613ac695eSSalil }
18713ac695eSSalil
188511e6bc0Shuangdaode /**
189511e6bc0Shuangdaode *hns_rcb_ring_enable_hw - enable ring
190d0ea5cbdSJesse Brandeburg *@q: rcb ring
191d0ea5cbdSJesse Brandeburg *@val: value to write
192511e6bc0Shuangdaode */
hns_rcb_ring_enable_hw(struct hnae_queue * q,u32 val)193511e6bc0Shuangdaode void hns_rcb_ring_enable_hw(struct hnae_queue *q, u32 val)
194511e6bc0Shuangdaode {
195511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_PREFETCH_EN_REG, !!val);
196511e6bc0Shuangdaode }
197511e6bc0Shuangdaode
hns_rcb_start(struct hnae_queue * q,u32 val)198511e6bc0Shuangdaode void hns_rcb_start(struct hnae_queue *q, u32 val)
199511e6bc0Shuangdaode {
200511e6bc0Shuangdaode hns_rcb_ring_enable_hw(q, val);
201511e6bc0Shuangdaode }
202511e6bc0Shuangdaode
203511e6bc0Shuangdaode /**
204511e6bc0Shuangdaode *hns_rcb_common_init_commit_hw - make rcb common init completed
205511e6bc0Shuangdaode *@rcb_common: rcb common device
206511e6bc0Shuangdaode */
hns_rcb_common_init_commit_hw(struct rcb_common_cb * rcb_common)207511e6bc0Shuangdaode void hns_rcb_common_init_commit_hw(struct rcb_common_cb *rcb_common)
208511e6bc0Shuangdaode {
209511e6bc0Shuangdaode wmb(); /* Sync point before breakpoint */
210511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_CFG_SYS_FSH_REG, 1);
211511e6bc0Shuangdaode wmb(); /* Sync point after breakpoint */
212511e6bc0Shuangdaode }
213511e6bc0Shuangdaode
214b29bd412Slipeng /* hns_rcb_set_tx_ring_bs - init rcb ring buf size regester
215b29bd412Slipeng *@q: hnae_queue
216b29bd412Slipeng *@buf_size: buffer size set to hw
217b29bd412Slipeng */
hns_rcb_set_tx_ring_bs(struct hnae_queue * q,u32 buf_size)218b29bd412Slipeng void hns_rcb_set_tx_ring_bs(struct hnae_queue *q, u32 buf_size)
219b29bd412Slipeng {
220b29bd412Slipeng u32 bd_size_type = hns_rcb_buf_size2type(buf_size);
221b29bd412Slipeng
222b29bd412Slipeng dsaf_write_dev(q, RCB_RING_TX_RING_BD_LEN_REG,
223b29bd412Slipeng bd_size_type);
224b29bd412Slipeng }
225b29bd412Slipeng
226b29bd412Slipeng /* hns_rcb_set_rx_ring_bs - init rcb ring buf size regester
227b29bd412Slipeng *@q: hnae_queue
228b29bd412Slipeng *@buf_size: buffer size set to hw
229b29bd412Slipeng */
hns_rcb_set_rx_ring_bs(struct hnae_queue * q,u32 buf_size)230b29bd412Slipeng void hns_rcb_set_rx_ring_bs(struct hnae_queue *q, u32 buf_size)
231b29bd412Slipeng {
232b29bd412Slipeng u32 bd_size_type = hns_rcb_buf_size2type(buf_size);
233b29bd412Slipeng
234b29bd412Slipeng dsaf_write_dev(q, RCB_RING_RX_RING_BD_LEN_REG,
235b29bd412Slipeng bd_size_type);
236b29bd412Slipeng }
237b29bd412Slipeng
238511e6bc0Shuangdaode /**
239511e6bc0Shuangdaode *hns_rcb_ring_init - init rcb ring
240511e6bc0Shuangdaode *@ring_pair: ring pair control block
241511e6bc0Shuangdaode *@ring_type: ring type, RX_RING or TX_RING
242511e6bc0Shuangdaode */
hns_rcb_ring_init(struct ring_pair_cb * ring_pair,int ring_type)243511e6bc0Shuangdaode static void hns_rcb_ring_init(struct ring_pair_cb *ring_pair, int ring_type)
244511e6bc0Shuangdaode {
245511e6bc0Shuangdaode struct hnae_queue *q = &ring_pair->q;
246511e6bc0Shuangdaode struct hnae_ring *ring =
247511e6bc0Shuangdaode (ring_type == RX_RING) ? &q->rx_ring : &q->tx_ring;
248511e6bc0Shuangdaode dma_addr_t dma = ring->desc_dma_addr;
249511e6bc0Shuangdaode
250511e6bc0Shuangdaode if (ring_type == RX_RING) {
251511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_L_REG,
252511e6bc0Shuangdaode (u32)dma);
253511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_RX_RING_BASEADDR_H_REG,
254e4600d69Shuangdaode (u32)((dma >> 31) >> 1));
25513ac695eSSalil
256b29bd412Slipeng hns_rcb_set_rx_ring_bs(q, ring->buf_size);
257b29bd412Slipeng
258511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_RX_RING_BD_NUM_REG,
25943adc067SLisheng ring_pair->port_id_in_comm);
260511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_RX_RING_PKTLINE_REG,
26143adc067SLisheng ring_pair->port_id_in_comm);
262511e6bc0Shuangdaode } else {
263511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_TX_RING_BASEADDR_L_REG,
264511e6bc0Shuangdaode (u32)dma);
265511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_TX_RING_BASEADDR_H_REG,
266e4600d69Shuangdaode (u32)((dma >> 31) >> 1));
26713ac695eSSalil
268b29bd412Slipeng hns_rcb_set_tx_ring_bs(q, ring->buf_size);
269b29bd412Slipeng
270511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_TX_RING_BD_NUM_REG,
27143adc067SLisheng ring_pair->port_id_in_comm);
272511e6bc0Shuangdaode dsaf_write_dev(q, RCB_RING_TX_RING_PKTLINE_REG,
273820c90cbSlipeng ring_pair->port_id_in_comm + HNS_RCB_TX_PKTLINE_OFFSET);
274511e6bc0Shuangdaode }
275511e6bc0Shuangdaode }
276511e6bc0Shuangdaode
277511e6bc0Shuangdaode /**
278511e6bc0Shuangdaode *hns_rcb_init_hw - init rcb hardware
279511e6bc0Shuangdaode *@ring: rcb ring
280511e6bc0Shuangdaode */
hns_rcb_init_hw(struct ring_pair_cb * ring)281511e6bc0Shuangdaode void hns_rcb_init_hw(struct ring_pair_cb *ring)
282511e6bc0Shuangdaode {
283511e6bc0Shuangdaode hns_rcb_ring_init(ring, RX_RING);
284511e6bc0Shuangdaode hns_rcb_ring_init(ring, TX_RING);
285511e6bc0Shuangdaode }
286511e6bc0Shuangdaode
287511e6bc0Shuangdaode /**
288511e6bc0Shuangdaode *hns_rcb_set_port_desc_cnt - set rcb port description num
289511e6bc0Shuangdaode *@rcb_common: rcb_common device
290511e6bc0Shuangdaode *@port_idx:port index
291511e6bc0Shuangdaode *@desc_cnt:BD num
292511e6bc0Shuangdaode */
hns_rcb_set_port_desc_cnt(struct rcb_common_cb * rcb_common,u32 port_idx,u32 desc_cnt)293511e6bc0Shuangdaode static void hns_rcb_set_port_desc_cnt(struct rcb_common_cb *rcb_common,
294511e6bc0Shuangdaode u32 port_idx, u32 desc_cnt)
295511e6bc0Shuangdaode {
296511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_CFG_BD_NUM_REG + port_idx * 4,
297511e6bc0Shuangdaode desc_cnt);
298511e6bc0Shuangdaode }
299511e6bc0Shuangdaode
hns_rcb_set_port_timeout(struct rcb_common_cb * rcb_common,u32 port_idx,u32 timeout)30043adc067SLisheng static void hns_rcb_set_port_timeout(
30143adc067SLisheng struct rcb_common_cb *rcb_common, u32 port_idx, u32 timeout)
302511e6bc0Shuangdaode {
303820c90cbSlipeng if (AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver)) {
30443adc067SLisheng dsaf_write_dev(rcb_common, RCB_CFG_OVERTIME_REG,
30543adc067SLisheng timeout * HNS_RCB_CLK_FREQ_MHZ);
306820c90cbSlipeng } else if (!HNS_DSAF_IS_DEBUG(rcb_common->dsaf_dev)) {
307820c90cbSlipeng if (timeout > HNS_RCB_DEF_GAP_TIME_USECS)
308820c90cbSlipeng dsaf_write_dev(rcb_common,
309820c90cbSlipeng RCB_PORT_INT_GAPTIME_REG + port_idx * 4,
310820c90cbSlipeng HNS_RCB_DEF_GAP_TIME_USECS);
31143adc067SLisheng else
31243adc067SLisheng dsaf_write_dev(rcb_common,
313820c90cbSlipeng RCB_PORT_INT_GAPTIME_REG + port_idx * 4,
314820c90cbSlipeng timeout);
315820c90cbSlipeng
316820c90cbSlipeng dsaf_write_dev(rcb_common,
31743adc067SLisheng RCB_PORT_CFG_OVERTIME_REG + port_idx * 4,
31843adc067SLisheng timeout);
319820c90cbSlipeng } else {
320820c90cbSlipeng dsaf_write_dev(rcb_common,
321820c90cbSlipeng RCB_PORT_CFG_OVERTIME_REG + port_idx * 4,
322820c90cbSlipeng timeout);
323820c90cbSlipeng }
324511e6bc0Shuangdaode }
325511e6bc0Shuangdaode
hns_rcb_common_get_port_num(struct rcb_common_cb * rcb_common)326511e6bc0Shuangdaode static int hns_rcb_common_get_port_num(struct rcb_common_cb *rcb_common)
327511e6bc0Shuangdaode {
32889a44093SYisen.Zhuang\(Zhuangyuzeng\) if (!HNS_DSAF_IS_DEBUG(rcb_common->dsaf_dev))
329511e6bc0Shuangdaode return HNS_RCB_SERVICE_NW_ENGINE_NUM;
330511e6bc0Shuangdaode else
331511e6bc0Shuangdaode return HNS_RCB_DEBUG_NW_ENGINE_NUM;
332511e6bc0Shuangdaode }
333511e6bc0Shuangdaode
334511e6bc0Shuangdaode /*clr rcb comm exception irq**/
hns_rcb_comm_exc_irq_en(struct rcb_common_cb * rcb_common,int en)335511e6bc0Shuangdaode static void hns_rcb_comm_exc_irq_en(
336511e6bc0Shuangdaode struct rcb_common_cb *rcb_common, int en)
337511e6bc0Shuangdaode {
338511e6bc0Shuangdaode u32 clr_vlue = 0xfffffffful;
339511e6bc0Shuangdaode u32 msk_vlue = en ? 0 : 0xfffffffful;
340511e6bc0Shuangdaode
341511e6bc0Shuangdaode /* clr int*/
342511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_INTSTS_ECC_ERR_REG, clr_vlue);
343511e6bc0Shuangdaode
344511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_SF_CFG_RING_STS, clr_vlue);
345511e6bc0Shuangdaode
346511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_SF_CFG_BD_RINT_STS, clr_vlue);
347511e6bc0Shuangdaode
348511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_RINT_TX_PKT_REG, clr_vlue);
349511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_AXI_ERR_STS, clr_vlue);
350511e6bc0Shuangdaode
351511e6bc0Shuangdaode /*en msk*/
352511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_INTMASK_ECC_ERR_REG, msk_vlue);
353511e6bc0Shuangdaode
354511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_SF_CFG_INTMASK_RING, msk_vlue);
355511e6bc0Shuangdaode
356511e6bc0Shuangdaode /*for tx bd neednot cacheline, so msk sf_txring_fbd_intmask (bit 1)**/
357511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_SF_CFG_INTMASK_BD, msk_vlue | 2);
358511e6bc0Shuangdaode
359511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_INTMSK_TX_PKT_REG, msk_vlue);
360511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_AXI_WR_ERR_INTMASK, msk_vlue);
361511e6bc0Shuangdaode }
362511e6bc0Shuangdaode
363511e6bc0Shuangdaode /**
364511e6bc0Shuangdaode *hns_rcb_common_init_hw - init rcb common hardware
365511e6bc0Shuangdaode *@rcb_common: rcb_common device
366511e6bc0Shuangdaode *retuen 0 - success , negative --fail
367511e6bc0Shuangdaode */
hns_rcb_common_init_hw(struct rcb_common_cb * rcb_common)368511e6bc0Shuangdaode int hns_rcb_common_init_hw(struct rcb_common_cb *rcb_common)
369511e6bc0Shuangdaode {
370511e6bc0Shuangdaode u32 reg_val;
371511e6bc0Shuangdaode int i;
372511e6bc0Shuangdaode int port_num = hns_rcb_common_get_port_num(rcb_common);
373511e6bc0Shuangdaode
374511e6bc0Shuangdaode hns_rcb_comm_exc_irq_en(rcb_common, 0);
375511e6bc0Shuangdaode
376511e6bc0Shuangdaode reg_val = dsaf_read_dev(rcb_common, RCB_COM_CFG_INIT_FLAG_REG);
377511e6bc0Shuangdaode if (0x1 != (reg_val & 0x1)) {
378511e6bc0Shuangdaode dev_err(rcb_common->dsaf_dev->dev,
379511e6bc0Shuangdaode "RCB_COM_CFG_INIT_FLAG_REG reg = 0x%x\n", reg_val);
380511e6bc0Shuangdaode return -EBUSY;
381511e6bc0Shuangdaode }
382511e6bc0Shuangdaode
383511e6bc0Shuangdaode for (i = 0; i < port_num; i++) {
384511e6bc0Shuangdaode hns_rcb_set_port_desc_cnt(rcb_common, i, rcb_common->desc_num);
385820c90cbSlipeng hns_rcb_set_rx_coalesced_frames(
386820c90cbSlipeng rcb_common, i, HNS_RCB_DEF_RX_COALESCED_FRAMES);
387820c90cbSlipeng if (!AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver) &&
388820c90cbSlipeng !HNS_DSAF_IS_DEBUG(rcb_common->dsaf_dev))
389820c90cbSlipeng hns_rcb_set_tx_coalesced_frames(
390820c90cbSlipeng rcb_common, i, HNS_RCB_DEF_TX_COALESCED_FRAMES);
39143adc067SLisheng hns_rcb_set_port_timeout(
39243adc067SLisheng rcb_common, i, HNS_RCB_DEF_COALESCED_USECS);
393511e6bc0Shuangdaode }
394511e6bc0Shuangdaode
395511e6bc0Shuangdaode dsaf_write_dev(rcb_common, RCB_COM_CFG_ENDIAN_REG,
396511e6bc0Shuangdaode HNS_RCB_COMMON_ENDIAN);
397511e6bc0Shuangdaode
398918f618fShuangdaode if (AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver)) {
39913ac695eSSalil dsaf_write_dev(rcb_common, RCB_COM_CFG_FNA_REG, 0x0);
40013ac695eSSalil dsaf_write_dev(rcb_common, RCB_COM_CFG_FA_REG, 0x1);
401918f618fShuangdaode } else {
402918f618fShuangdaode dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_USER_REG,
403918f618fShuangdaode RCB_COM_CFG_FNA_B, false);
404918f618fShuangdaode dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_USER_REG,
405918f618fShuangdaode RCB_COM_CFG_FA_B, true);
406918f618fShuangdaode dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_TSO_MODE_REG,
407918f618fShuangdaode RCB_COM_TSO_MODE_B, HNS_TSO_MODE_8BD_32K);
408918f618fShuangdaode }
40913ac695eSSalil
410511e6bc0Shuangdaode return 0;
411511e6bc0Shuangdaode }
412511e6bc0Shuangdaode
hns_rcb_buf_size2type(u32 buf_size)413511e6bc0Shuangdaode int hns_rcb_buf_size2type(u32 buf_size)
414511e6bc0Shuangdaode {
415511e6bc0Shuangdaode int bd_size_type;
416511e6bc0Shuangdaode
417511e6bc0Shuangdaode switch (buf_size) {
418511e6bc0Shuangdaode case 512:
419511e6bc0Shuangdaode bd_size_type = HNS_BD_SIZE_512_TYPE;
420511e6bc0Shuangdaode break;
421511e6bc0Shuangdaode case 1024:
422511e6bc0Shuangdaode bd_size_type = HNS_BD_SIZE_1024_TYPE;
423511e6bc0Shuangdaode break;
424511e6bc0Shuangdaode case 2048:
425511e6bc0Shuangdaode bd_size_type = HNS_BD_SIZE_2048_TYPE;
426511e6bc0Shuangdaode break;
427511e6bc0Shuangdaode case 4096:
428511e6bc0Shuangdaode bd_size_type = HNS_BD_SIZE_4096_TYPE;
429511e6bc0Shuangdaode break;
430511e6bc0Shuangdaode default:
431511e6bc0Shuangdaode bd_size_type = -EINVAL;
432511e6bc0Shuangdaode }
433511e6bc0Shuangdaode
434511e6bc0Shuangdaode return bd_size_type;
435511e6bc0Shuangdaode }
436511e6bc0Shuangdaode
hns_rcb_ring_get_cfg(struct hnae_queue * q,int ring_type)437511e6bc0Shuangdaode static void hns_rcb_ring_get_cfg(struct hnae_queue *q, int ring_type)
438511e6bc0Shuangdaode {
439511e6bc0Shuangdaode struct hnae_ring *ring;
440511e6bc0Shuangdaode struct rcb_common_cb *rcb_common;
441511e6bc0Shuangdaode struct ring_pair_cb *ring_pair_cb;
44213ac695eSSalil u16 desc_num, mdnum_ppkt;
44313ac695eSSalil bool irq_idx, is_ver1;
444511e6bc0Shuangdaode
445511e6bc0Shuangdaode ring_pair_cb = container_of(q, struct ring_pair_cb, q);
44613ac695eSSalil is_ver1 = AE_IS_VER1(ring_pair_cb->rcb_common->dsaf_dev->dsaf_ver);
447511e6bc0Shuangdaode if (ring_type == RX_RING) {
448511e6bc0Shuangdaode ring = &q->rx_ring;
449511e6bc0Shuangdaode ring->io_base = ring_pair_cb->q.io_base;
450511e6bc0Shuangdaode irq_idx = HNS_RCB_IRQ_IDX_RX;
45113ac695eSSalil mdnum_ppkt = HNS_RCB_RING_MAX_BD_PER_PKT;
452511e6bc0Shuangdaode } else {
453511e6bc0Shuangdaode ring = &q->tx_ring;
45415400663SYonglong Liu ring->io_base = ring_pair_cb->q.io_base +
455511e6bc0Shuangdaode HNS_RCB_TX_REG_OFFSET;
456511e6bc0Shuangdaode irq_idx = HNS_RCB_IRQ_IDX_TX;
45713ac695eSSalil mdnum_ppkt = is_ver1 ? HNS_RCB_RING_MAX_TXBD_PER_PKT :
45813ac695eSSalil HNS_RCBV2_RING_MAX_TXBD_PER_PKT;
459511e6bc0Shuangdaode }
460511e6bc0Shuangdaode
461511e6bc0Shuangdaode rcb_common = ring_pair_cb->rcb_common;
462511e6bc0Shuangdaode desc_num = rcb_common->dsaf_dev->desc_num;
463511e6bc0Shuangdaode
464511e6bc0Shuangdaode ring->desc = NULL;
465511e6bc0Shuangdaode ring->desc_cb = NULL;
466511e6bc0Shuangdaode
467511e6bc0Shuangdaode ring->irq = ring_pair_cb->virq[irq_idx];
468511e6bc0Shuangdaode ring->desc_dma_addr = 0;
469511e6bc0Shuangdaode
470b29bd412Slipeng ring->buf_size = RCB_DEFAULT_BUFFER_SIZE;
471511e6bc0Shuangdaode ring->desc_num = desc_num;
47213ac695eSSalil ring->max_desc_num_per_pkt = mdnum_ppkt;
473511e6bc0Shuangdaode ring->max_raw_data_sz_per_desc = HNS_RCB_MAX_PKT_SIZE;
474511e6bc0Shuangdaode ring->max_pkt_size = HNS_RCB_MAX_PKT_SIZE;
475511e6bc0Shuangdaode ring->next_to_use = 0;
476511e6bc0Shuangdaode ring->next_to_clean = 0;
477511e6bc0Shuangdaode }
478511e6bc0Shuangdaode
hns_rcb_ring_pair_get_cfg(struct ring_pair_cb * ring_pair_cb)479511e6bc0Shuangdaode static void hns_rcb_ring_pair_get_cfg(struct ring_pair_cb *ring_pair_cb)
480511e6bc0Shuangdaode {
481511e6bc0Shuangdaode ring_pair_cb->q.handle = NULL;
482511e6bc0Shuangdaode
483511e6bc0Shuangdaode hns_rcb_ring_get_cfg(&ring_pair_cb->q, RX_RING);
484511e6bc0Shuangdaode hns_rcb_ring_get_cfg(&ring_pair_cb->q, TX_RING);
485511e6bc0Shuangdaode }
486511e6bc0Shuangdaode
hns_rcb_get_port_in_comm(struct rcb_common_cb * rcb_common,int ring_idx)48743adc067SLisheng static int hns_rcb_get_port_in_comm(
48843adc067SLisheng struct rcb_common_cb *rcb_common, int ring_idx)
489511e6bc0Shuangdaode {
490831d828bSYisen.Zhuang\(Zhuangyuzeng\) return ring_idx / (rcb_common->max_q_per_vf * rcb_common->max_vfn);
491511e6bc0Shuangdaode }
492511e6bc0Shuangdaode
49313ac695eSSalil #define SERVICE_RING_IRQ_IDX(v1) \
49413ac695eSSalil ((v1) ? HNS_SERVICE_RING_IRQ_IDX : HNSV2_SERVICE_RING_IRQ_IDX)
hns_rcb_get_base_irq_idx(struct rcb_common_cb * rcb_common)495511e6bc0Shuangdaode static int hns_rcb_get_base_irq_idx(struct rcb_common_cb *rcb_common)
496511e6bc0Shuangdaode {
49713ac695eSSalil bool is_ver1 = AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver);
498511e6bc0Shuangdaode
49989a44093SYisen.Zhuang\(Zhuangyuzeng\) if (!HNS_DSAF_IS_DEBUG(rcb_common->dsaf_dev))
50013ac695eSSalil return SERVICE_RING_IRQ_IDX(is_ver1);
501511e6bc0Shuangdaode else
502a542458cSDaode Huang return HNS_DEBUG_RING_IRQ_IDX;
503511e6bc0Shuangdaode }
504511e6bc0Shuangdaode
505511e6bc0Shuangdaode #define RCB_COMM_BASE_TO_RING_BASE(base, ringid)\
506511e6bc0Shuangdaode ((base) + 0x10000 + HNS_RCB_REG_OFFSET * (ringid))
507511e6bc0Shuangdaode /**
508511e6bc0Shuangdaode *hns_rcb_get_cfg - get rcb config
509511e6bc0Shuangdaode *@rcb_common: rcb common device
510511e6bc0Shuangdaode */
hns_rcb_get_cfg(struct rcb_common_cb * rcb_common)5112fdd6bafSlipeng int hns_rcb_get_cfg(struct rcb_common_cb *rcb_common)
512511e6bc0Shuangdaode {
513511e6bc0Shuangdaode struct ring_pair_cb *ring_pair_cb;
514511e6bc0Shuangdaode u32 i;
515511e6bc0Shuangdaode u32 ring_num = rcb_common->ring_num;
516511e6bc0Shuangdaode int base_irq_idx = hns_rcb_get_base_irq_idx(rcb_common);
51713ac695eSSalil struct platform_device *pdev =
518da0bcb4eSGeliang Tang to_platform_device(rcb_common->dsaf_dev->dev);
51913ac695eSSalil bool is_ver1 = AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver);
520511e6bc0Shuangdaode
521511e6bc0Shuangdaode for (i = 0; i < ring_num; i++) {
522511e6bc0Shuangdaode ring_pair_cb = &rcb_common->ring_pair_cb[i];
523511e6bc0Shuangdaode ring_pair_cb->rcb_common = rcb_common;
524511e6bc0Shuangdaode ring_pair_cb->dev = rcb_common->dsaf_dev->dev;
525511e6bc0Shuangdaode ring_pair_cb->index = i;
526511e6bc0Shuangdaode ring_pair_cb->q.io_base =
527511e6bc0Shuangdaode RCB_COMM_BASE_TO_RING_BASE(rcb_common->io_base, i);
52843adc067SLisheng ring_pair_cb->port_id_in_comm =
52943adc067SLisheng hns_rcb_get_port_in_comm(rcb_common, i);
53013ac695eSSalil ring_pair_cb->virq[HNS_RCB_IRQ_IDX_TX] =
53172fdddceSKejian Yan is_ver1 ? platform_get_irq(pdev, base_irq_idx + i * 2) :
53213ac695eSSalil platform_get_irq(pdev, base_irq_idx + i * 3 + 1);
53313ac695eSSalil ring_pair_cb->virq[HNS_RCB_IRQ_IDX_RX] =
53472fdddceSKejian Yan is_ver1 ? platform_get_irq(pdev, base_irq_idx + i * 2 + 1) :
53513ac695eSSalil platform_get_irq(pdev, base_irq_idx + i * 3);
5362fdd6bafSlipeng if ((ring_pair_cb->virq[HNS_RCB_IRQ_IDX_TX] == -EPROBE_DEFER) ||
5372fdd6bafSlipeng (ring_pair_cb->virq[HNS_RCB_IRQ_IDX_RX] == -EPROBE_DEFER))
5382fdd6bafSlipeng return -EPROBE_DEFER;
5392fdd6bafSlipeng
540511e6bc0Shuangdaode ring_pair_cb->q.phy_base =
541511e6bc0Shuangdaode RCB_COMM_BASE_TO_RING_BASE(rcb_common->phy_base, i);
542511e6bc0Shuangdaode hns_rcb_ring_pair_get_cfg(ring_pair_cb);
543511e6bc0Shuangdaode }
5442fdd6bafSlipeng
5452fdd6bafSlipeng return 0;
546511e6bc0Shuangdaode }
547511e6bc0Shuangdaode
548511e6bc0Shuangdaode /**
549820c90cbSlipeng *hns_rcb_get_rx_coalesced_frames - get rcb port rx coalesced frames
550511e6bc0Shuangdaode *@rcb_common: rcb_common device
55143adc067SLisheng *@port_idx:port id in comm
55243adc067SLisheng *
55343adc067SLisheng *Returns: coalesced_frames
554511e6bc0Shuangdaode */
hns_rcb_get_rx_coalesced_frames(struct rcb_common_cb * rcb_common,u32 port_idx)555820c90cbSlipeng u32 hns_rcb_get_rx_coalesced_frames(
55643adc067SLisheng struct rcb_common_cb *rcb_common, u32 port_idx)
557511e6bc0Shuangdaode {
55843adc067SLisheng return dsaf_read_dev(rcb_common, RCB_CFG_PKTLINE_REG + port_idx * 4);
559511e6bc0Shuangdaode }
560511e6bc0Shuangdaode
561511e6bc0Shuangdaode /**
562820c90cbSlipeng *hns_rcb_get_tx_coalesced_frames - get rcb port tx coalesced frames
563820c90cbSlipeng *@rcb_common: rcb_common device
564820c90cbSlipeng *@port_idx:port id in comm
565820c90cbSlipeng *
566820c90cbSlipeng *Returns: coalesced_frames
567820c90cbSlipeng */
hns_rcb_get_tx_coalesced_frames(struct rcb_common_cb * rcb_common,u32 port_idx)568820c90cbSlipeng u32 hns_rcb_get_tx_coalesced_frames(
569820c90cbSlipeng struct rcb_common_cb *rcb_common, u32 port_idx)
570820c90cbSlipeng {
571820c90cbSlipeng u64 reg;
572820c90cbSlipeng
573820c90cbSlipeng reg = RCB_CFG_PKTLINE_REG + (port_idx + HNS_RCB_TX_PKTLINE_OFFSET) * 4;
574820c90cbSlipeng return dsaf_read_dev(rcb_common, reg);
575820c90cbSlipeng }
576820c90cbSlipeng
577820c90cbSlipeng /**
578511e6bc0Shuangdaode *hns_rcb_get_coalesce_usecs - get rcb port coalesced time_out
579511e6bc0Shuangdaode *@rcb_common: rcb_common device
58043adc067SLisheng *@port_idx:port id in comm
58143adc067SLisheng *
58243adc067SLisheng *Returns: time_out
583511e6bc0Shuangdaode */
hns_rcb_get_coalesce_usecs(struct rcb_common_cb * rcb_common,u32 port_idx)58443adc067SLisheng u32 hns_rcb_get_coalesce_usecs(
58543adc067SLisheng struct rcb_common_cb *rcb_common, u32 port_idx)
586511e6bc0Shuangdaode {
58743adc067SLisheng if (AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver))
58843adc067SLisheng return dsaf_read_dev(rcb_common, RCB_CFG_OVERTIME_REG) /
58943adc067SLisheng HNS_RCB_CLK_FREQ_MHZ;
59043adc067SLisheng else
59143adc067SLisheng return dsaf_read_dev(rcb_common,
59243adc067SLisheng RCB_PORT_CFG_OVERTIME_REG + port_idx * 4);
593511e6bc0Shuangdaode }
594511e6bc0Shuangdaode
595511e6bc0Shuangdaode /**
596511e6bc0Shuangdaode *hns_rcb_set_coalesce_usecs - set rcb port coalesced time_out
597511e6bc0Shuangdaode *@rcb_common: rcb_common device
59843adc067SLisheng *@port_idx:port id in comm
59943adc067SLisheng *@timeout:tx/rx time for coalesced time_out
60043adc067SLisheng *
60143adc067SLisheng * Returns:
60243adc067SLisheng * Zero for success, or an error code in case of failure
603511e6bc0Shuangdaode */
hns_rcb_set_coalesce_usecs(struct rcb_common_cb * rcb_common,u32 port_idx,u32 timeout)60443adc067SLisheng int hns_rcb_set_coalesce_usecs(
60543adc067SLisheng struct rcb_common_cb *rcb_common, u32 port_idx, u32 timeout)
606511e6bc0Shuangdaode {
60743adc067SLisheng u32 old_timeout = hns_rcb_get_coalesce_usecs(rcb_common, port_idx);
608511e6bc0Shuangdaode
60943adc067SLisheng if (timeout == old_timeout)
61043adc067SLisheng return 0;
611511e6bc0Shuangdaode
61243adc067SLisheng if (AE_IS_VER1(rcb_common->dsaf_dev->dsaf_ver)) {
61389a44093SYisen.Zhuang\(Zhuangyuzeng\) if (!HNS_DSAF_IS_DEBUG(rcb_common->dsaf_dev)) {
61443adc067SLisheng dev_err(rcb_common->dsaf_dev->dev,
615511e6bc0Shuangdaode "error: not support coalesce_usecs setting!\n");
61643adc067SLisheng return -EINVAL;
617511e6bc0Shuangdaode }
61843adc067SLisheng }
619820c90cbSlipeng if (timeout > HNS_RCB_MAX_COALESCED_USECS || timeout == 0) {
62043adc067SLisheng dev_err(rcb_common->dsaf_dev->dev,
621820c90cbSlipeng "error: coalesce_usecs setting supports 1~1023us\n");
62243adc067SLisheng return -EINVAL;
62343adc067SLisheng }
62443adc067SLisheng hns_rcb_set_port_timeout(rcb_common, port_idx, timeout);
62543adc067SLisheng return 0;
626511e6bc0Shuangdaode }
627511e6bc0Shuangdaode
628511e6bc0Shuangdaode /**
629820c90cbSlipeng *hns_rcb_set_tx_coalesced_frames - set rcb coalesced frames
630511e6bc0Shuangdaode *@rcb_common: rcb_common device
63143adc067SLisheng *@port_idx:port id in comm
63243adc067SLisheng *@coalesced_frames:tx/rx BD num for coalesced frames
63343adc067SLisheng *
63443adc067SLisheng * Returns:
63543adc067SLisheng * Zero for success, or an error code in case of failure
636511e6bc0Shuangdaode */
hns_rcb_set_tx_coalesced_frames(struct rcb_common_cb * rcb_common,u32 port_idx,u32 coalesced_frames)637820c90cbSlipeng int hns_rcb_set_tx_coalesced_frames(
63843adc067SLisheng struct rcb_common_cb *rcb_common, u32 port_idx, u32 coalesced_frames)
639511e6bc0Shuangdaode {
640820c90cbSlipeng u32 old_waterline =
641820c90cbSlipeng hns_rcb_get_tx_coalesced_frames(rcb_common, port_idx);
642820c90cbSlipeng u64 reg;
643820c90cbSlipeng
644820c90cbSlipeng if (coalesced_frames == old_waterline)
645820c90cbSlipeng return 0;
646820c90cbSlipeng
647820c90cbSlipeng if (coalesced_frames != 1) {
648820c90cbSlipeng dev_err(rcb_common->dsaf_dev->dev,
649820c90cbSlipeng "error: not support tx coalesce_frames setting!\n");
650820c90cbSlipeng return -EINVAL;
651820c90cbSlipeng }
652820c90cbSlipeng
653820c90cbSlipeng reg = RCB_CFG_PKTLINE_REG + (port_idx + HNS_RCB_TX_PKTLINE_OFFSET) * 4;
654820c90cbSlipeng dsaf_write_dev(rcb_common, reg, coalesced_frames);
655820c90cbSlipeng return 0;
656820c90cbSlipeng }
657820c90cbSlipeng
658820c90cbSlipeng /**
659820c90cbSlipeng *hns_rcb_set_rx_coalesced_frames - set rcb rx coalesced frames
660820c90cbSlipeng *@rcb_common: rcb_common device
661820c90cbSlipeng *@port_idx:port id in comm
662820c90cbSlipeng *@coalesced_frames:tx/rx BD num for coalesced frames
663820c90cbSlipeng *
664820c90cbSlipeng * Returns:
665820c90cbSlipeng * Zero for success, or an error code in case of failure
666820c90cbSlipeng */
hns_rcb_set_rx_coalesced_frames(struct rcb_common_cb * rcb_common,u32 port_idx,u32 coalesced_frames)667820c90cbSlipeng int hns_rcb_set_rx_coalesced_frames(
668820c90cbSlipeng struct rcb_common_cb *rcb_common, u32 port_idx, u32 coalesced_frames)
669820c90cbSlipeng {
670820c90cbSlipeng u32 old_waterline =
671820c90cbSlipeng hns_rcb_get_rx_coalesced_frames(rcb_common, port_idx);
672511e6bc0Shuangdaode
67343adc067SLisheng if (coalesced_frames == old_waterline)
674511e6bc0Shuangdaode return 0;
675511e6bc0Shuangdaode
67643adc067SLisheng if (coalesced_frames >= rcb_common->desc_num ||
67743adc067SLisheng coalesced_frames > HNS_RCB_MAX_COALESCED_FRAMES ||
67843adc067SLisheng coalesced_frames < HNS_RCB_MIN_COALESCED_FRAMES) {
67943adc067SLisheng dev_err(rcb_common->dsaf_dev->dev,
68043adc067SLisheng "error: not support coalesce_frames setting!\n");
681511e6bc0Shuangdaode return -EINVAL;
682511e6bc0Shuangdaode }
68343adc067SLisheng
68443adc067SLisheng dsaf_write_dev(rcb_common, RCB_CFG_PKTLINE_REG + port_idx * 4,
68543adc067SLisheng coalesced_frames);
68643adc067SLisheng return 0;
687511e6bc0Shuangdaode }
688511e6bc0Shuangdaode
689511e6bc0Shuangdaode /**
690511e6bc0Shuangdaode *hns_rcb_get_queue_mode - get max VM number and max ring number per VM
691511e6bc0Shuangdaode * accordding to dsaf mode
692511e6bc0Shuangdaode *@dsaf_mode: dsaf mode
693511e6bc0Shuangdaode *@max_vfn : max vfn number
694511e6bc0Shuangdaode *@max_q_per_vf:max ring number per vm
695511e6bc0Shuangdaode */
hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode,u16 * max_vfn,u16 * max_q_per_vf)69689a44093SYisen.Zhuang\(Zhuangyuzeng\) void hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode, u16 *max_vfn,
69789a44093SYisen.Zhuang\(Zhuangyuzeng\) u16 *max_q_per_vf)
698511e6bc0Shuangdaode {
699511e6bc0Shuangdaode switch (dsaf_mode) {
700511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_0VM:
701511e6bc0Shuangdaode *max_vfn = 1;
702511e6bc0Shuangdaode *max_q_per_vf = 16;
703511e6bc0Shuangdaode break;
704511e6bc0Shuangdaode case DSAF_MODE_DISABLE_FIX:
70589a44093SYisen.Zhuang\(Zhuangyuzeng\) case DSAF_MODE_DISABLE_SP:
706511e6bc0Shuangdaode *max_vfn = 1;
707511e6bc0Shuangdaode *max_q_per_vf = 1;
708511e6bc0Shuangdaode break;
709511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_64VM:
710511e6bc0Shuangdaode *max_vfn = 64;
711511e6bc0Shuangdaode *max_q_per_vf = 1;
712511e6bc0Shuangdaode break;
713511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_16VM:
714511e6bc0Shuangdaode *max_vfn = 16;
715511e6bc0Shuangdaode *max_q_per_vf = 1;
716511e6bc0Shuangdaode break;
717511e6bc0Shuangdaode default:
718511e6bc0Shuangdaode *max_vfn = 1;
719511e6bc0Shuangdaode *max_q_per_vf = 16;
720511e6bc0Shuangdaode break;
721511e6bc0Shuangdaode }
722511e6bc0Shuangdaode }
723511e6bc0Shuangdaode
hns_rcb_get_ring_num(struct dsaf_device * dsaf_dev)724336a443bSYueHaibing static int hns_rcb_get_ring_num(struct dsaf_device *dsaf_dev)
725511e6bc0Shuangdaode {
726511e6bc0Shuangdaode switch (dsaf_dev->dsaf_mode) {
727511e6bc0Shuangdaode case DSAF_MODE_ENABLE_FIX:
72889a44093SYisen.Zhuang\(Zhuangyuzeng\) case DSAF_MODE_DISABLE_SP:
729511e6bc0Shuangdaode return 1;
730511e6bc0Shuangdaode
731511e6bc0Shuangdaode case DSAF_MODE_DISABLE_FIX:
732511e6bc0Shuangdaode return 6;
733511e6bc0Shuangdaode
734511e6bc0Shuangdaode case DSAF_MODE_ENABLE_0VM:
735511e6bc0Shuangdaode return 32;
736511e6bc0Shuangdaode
737511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_0VM:
738511e6bc0Shuangdaode case DSAF_MODE_ENABLE_16VM:
739511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_2VM:
740511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_16VM:
741511e6bc0Shuangdaode case DSAF_MODE_DISABLE_6PORT_4VM:
742511e6bc0Shuangdaode case DSAF_MODE_ENABLE_8VM:
743511e6bc0Shuangdaode return 96;
744511e6bc0Shuangdaode
745511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_16VM:
746511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_8VM:
747511e6bc0Shuangdaode case DSAF_MODE_ENABLE_32VM:
748511e6bc0Shuangdaode case DSAF_MODE_DISABLE_2PORT_64VM:
749511e6bc0Shuangdaode case DSAF_MODE_ENABLE_128VM:
750511e6bc0Shuangdaode return 128;
751511e6bc0Shuangdaode
752511e6bc0Shuangdaode default:
753511e6bc0Shuangdaode dev_warn(dsaf_dev->dev,
754511e6bc0Shuangdaode "get ring num fail,use default!dsaf_mode=%d\n",
755511e6bc0Shuangdaode dsaf_dev->dsaf_mode);
756511e6bc0Shuangdaode return 128;
757511e6bc0Shuangdaode }
758511e6bc0Shuangdaode }
759511e6bc0Shuangdaode
hns_rcb_common_get_vaddr(struct rcb_common_cb * rcb_common)76015400663SYonglong Liu static u8 __iomem *hns_rcb_common_get_vaddr(struct rcb_common_cb *rcb_common)
761511e6bc0Shuangdaode {
762831d828bSYisen.Zhuang\(Zhuangyuzeng\) struct dsaf_device *dsaf_dev = rcb_common->dsaf_dev;
763511e6bc0Shuangdaode
764831d828bSYisen.Zhuang\(Zhuangyuzeng\) return dsaf_dev->ppe_base + RCB_COMMON_REG_OFFSET;
765511e6bc0Shuangdaode }
766511e6bc0Shuangdaode
hns_rcb_common_get_paddr(struct rcb_common_cb * rcb_common)767831d828bSYisen.Zhuang\(Zhuangyuzeng\) static phys_addr_t hns_rcb_common_get_paddr(struct rcb_common_cb *rcb_common)
768511e6bc0Shuangdaode {
769831d828bSYisen.Zhuang\(Zhuangyuzeng\) struct dsaf_device *dsaf_dev = rcb_common->dsaf_dev;
770511e6bc0Shuangdaode
771831d828bSYisen.Zhuang\(Zhuangyuzeng\) return dsaf_dev->ppe_paddr + RCB_COMMON_REG_OFFSET;
772511e6bc0Shuangdaode }
773511e6bc0Shuangdaode
hns_rcb_common_get_cfg(struct dsaf_device * dsaf_dev,int comm_index)774511e6bc0Shuangdaode int hns_rcb_common_get_cfg(struct dsaf_device *dsaf_dev,
775511e6bc0Shuangdaode int comm_index)
776511e6bc0Shuangdaode {
777511e6bc0Shuangdaode struct rcb_common_cb *rcb_common;
778511e6bc0Shuangdaode enum dsaf_mode dsaf_mode = dsaf_dev->dsaf_mode;
779511e6bc0Shuangdaode u16 max_vfn;
780511e6bc0Shuangdaode u16 max_q_per_vf;
78189a44093SYisen.Zhuang\(Zhuangyuzeng\) int ring_num = hns_rcb_get_ring_num(dsaf_dev);
782511e6bc0Shuangdaode
783511e6bc0Shuangdaode rcb_common =
7844559dd24SGustavo A. R. Silva devm_kzalloc(dsaf_dev->dev,
7854559dd24SGustavo A. R. Silva struct_size(rcb_common, ring_pair_cb, ring_num),
7864559dd24SGustavo A. R. Silva GFP_KERNEL);
787511e6bc0Shuangdaode if (!rcb_common) {
788511e6bc0Shuangdaode dev_err(dsaf_dev->dev, "rcb common devm_kzalloc fail!\n");
789511e6bc0Shuangdaode return -ENOMEM;
790511e6bc0Shuangdaode }
791511e6bc0Shuangdaode rcb_common->comm_index = comm_index;
792511e6bc0Shuangdaode rcb_common->ring_num = ring_num;
793511e6bc0Shuangdaode rcb_common->dsaf_dev = dsaf_dev;
794511e6bc0Shuangdaode
795511e6bc0Shuangdaode rcb_common->desc_num = dsaf_dev->desc_num;
796511e6bc0Shuangdaode
79789a44093SYisen.Zhuang\(Zhuangyuzeng\) hns_rcb_get_queue_mode(dsaf_mode, &max_vfn, &max_q_per_vf);
798511e6bc0Shuangdaode rcb_common->max_vfn = max_vfn;
799511e6bc0Shuangdaode rcb_common->max_q_per_vf = max_q_per_vf;
800511e6bc0Shuangdaode
801831d828bSYisen.Zhuang\(Zhuangyuzeng\) rcb_common->io_base = hns_rcb_common_get_vaddr(rcb_common);
802831d828bSYisen.Zhuang\(Zhuangyuzeng\) rcb_common->phy_base = hns_rcb_common_get_paddr(rcb_common);
803511e6bc0Shuangdaode
804511e6bc0Shuangdaode dsaf_dev->rcb_common[comm_index] = rcb_common;
805511e6bc0Shuangdaode return 0;
806511e6bc0Shuangdaode }
807511e6bc0Shuangdaode
hns_rcb_common_free_cfg(struct dsaf_device * dsaf_dev,u32 comm_index)808511e6bc0Shuangdaode void hns_rcb_common_free_cfg(struct dsaf_device *dsaf_dev,
809511e6bc0Shuangdaode u32 comm_index)
810511e6bc0Shuangdaode {
811511e6bc0Shuangdaode dsaf_dev->rcb_common[comm_index] = NULL;
812511e6bc0Shuangdaode }
813511e6bc0Shuangdaode
hns_rcb_update_stats(struct hnae_queue * queue)814511e6bc0Shuangdaode void hns_rcb_update_stats(struct hnae_queue *queue)
815511e6bc0Shuangdaode {
816511e6bc0Shuangdaode struct ring_pair_cb *ring =
817511e6bc0Shuangdaode container_of(queue, struct ring_pair_cb, q);
818511e6bc0Shuangdaode struct dsaf_device *dsaf_dev = ring->rcb_common->dsaf_dev;
819511e6bc0Shuangdaode struct ppe_common_cb *ppe_common
820511e6bc0Shuangdaode = dsaf_dev->ppe_common[ring->rcb_common->comm_index];
821511e6bc0Shuangdaode struct hns_ring_hw_stats *hw_stats = &ring->hw_stats;
822511e6bc0Shuangdaode
823511e6bc0Shuangdaode hw_stats->rx_pkts += dsaf_read_dev(queue,
824511e6bc0Shuangdaode RCB_RING_RX_RING_PKTNUM_RECORD_REG);
825511e6bc0Shuangdaode dsaf_write_dev(queue, RCB_RING_RX_RING_PKTNUM_RECORD_REG, 0x1);
826511e6bc0Shuangdaode
827511e6bc0Shuangdaode hw_stats->ppe_rx_ok_pkts += dsaf_read_dev(ppe_common,
828511e6bc0Shuangdaode PPE_COM_HIS_RX_PKT_QID_OK_CNT_REG + 4 * ring->index);
829511e6bc0Shuangdaode hw_stats->ppe_rx_drop_pkts += dsaf_read_dev(ppe_common,
830511e6bc0Shuangdaode PPE_COM_HIS_RX_PKT_QID_DROP_CNT_REG + 4 * ring->index);
831511e6bc0Shuangdaode
832511e6bc0Shuangdaode hw_stats->tx_pkts += dsaf_read_dev(queue,
833511e6bc0Shuangdaode RCB_RING_TX_RING_PKTNUM_RECORD_REG);
834511e6bc0Shuangdaode dsaf_write_dev(queue, RCB_RING_TX_RING_PKTNUM_RECORD_REG, 0x1);
835511e6bc0Shuangdaode
836511e6bc0Shuangdaode hw_stats->ppe_tx_ok_pkts += dsaf_read_dev(ppe_common,
837511e6bc0Shuangdaode PPE_COM_HIS_TX_PKT_QID_OK_CNT_REG + 4 * ring->index);
838511e6bc0Shuangdaode hw_stats->ppe_tx_drop_pkts += dsaf_read_dev(ppe_common,
839511e6bc0Shuangdaode PPE_COM_HIS_TX_PKT_QID_ERR_CNT_REG + 4 * ring->index);
840511e6bc0Shuangdaode }
841511e6bc0Shuangdaode
842511e6bc0Shuangdaode /**
843511e6bc0Shuangdaode *hns_rcb_get_stats - get rcb statistic
844d0ea5cbdSJesse Brandeburg *@queue: rcb ring
845511e6bc0Shuangdaode *@data:statistic value
846511e6bc0Shuangdaode */
hns_rcb_get_stats(struct hnae_queue * queue,u64 * data)847511e6bc0Shuangdaode void hns_rcb_get_stats(struct hnae_queue *queue, u64 *data)
848511e6bc0Shuangdaode {
849511e6bc0Shuangdaode u64 *regs_buff = data;
850511e6bc0Shuangdaode struct ring_pair_cb *ring =
851511e6bc0Shuangdaode container_of(queue, struct ring_pair_cb, q);
852511e6bc0Shuangdaode struct hns_ring_hw_stats *hw_stats = &ring->hw_stats;
853511e6bc0Shuangdaode
854511e6bc0Shuangdaode regs_buff[0] = hw_stats->tx_pkts;
855511e6bc0Shuangdaode regs_buff[1] = hw_stats->ppe_tx_ok_pkts;
856511e6bc0Shuangdaode regs_buff[2] = hw_stats->ppe_tx_drop_pkts;
857511e6bc0Shuangdaode regs_buff[3] =
858511e6bc0Shuangdaode dsaf_read_dev(queue, RCB_RING_TX_RING_FBDNUM_REG);
859511e6bc0Shuangdaode
860511e6bc0Shuangdaode regs_buff[4] = queue->tx_ring.stats.tx_pkts;
861511e6bc0Shuangdaode regs_buff[5] = queue->tx_ring.stats.tx_bytes;
862511e6bc0Shuangdaode regs_buff[6] = queue->tx_ring.stats.tx_err_cnt;
863511e6bc0Shuangdaode regs_buff[7] = queue->tx_ring.stats.io_err_cnt;
864511e6bc0Shuangdaode regs_buff[8] = queue->tx_ring.stats.sw_err_cnt;
865511e6bc0Shuangdaode regs_buff[9] = queue->tx_ring.stats.seg_pkt_cnt;
866511e6bc0Shuangdaode regs_buff[10] = queue->tx_ring.stats.restart_queue;
867511e6bc0Shuangdaode regs_buff[11] = queue->tx_ring.stats.tx_busy;
868511e6bc0Shuangdaode
869511e6bc0Shuangdaode regs_buff[12] = hw_stats->rx_pkts;
870511e6bc0Shuangdaode regs_buff[13] = hw_stats->ppe_rx_ok_pkts;
871511e6bc0Shuangdaode regs_buff[14] = hw_stats->ppe_rx_drop_pkts;
872511e6bc0Shuangdaode regs_buff[15] =
873511e6bc0Shuangdaode dsaf_read_dev(queue, RCB_RING_RX_RING_FBDNUM_REG);
874511e6bc0Shuangdaode
875511e6bc0Shuangdaode regs_buff[16] = queue->rx_ring.stats.rx_pkts;
876511e6bc0Shuangdaode regs_buff[17] = queue->rx_ring.stats.rx_bytes;
877511e6bc0Shuangdaode regs_buff[18] = queue->rx_ring.stats.rx_err_cnt;
878511e6bc0Shuangdaode regs_buff[19] = queue->rx_ring.stats.io_err_cnt;
879511e6bc0Shuangdaode regs_buff[20] = queue->rx_ring.stats.sw_err_cnt;
880511e6bc0Shuangdaode regs_buff[21] = queue->rx_ring.stats.seg_pkt_cnt;
881511e6bc0Shuangdaode regs_buff[22] = queue->rx_ring.stats.reuse_pg_cnt;
882511e6bc0Shuangdaode regs_buff[23] = queue->rx_ring.stats.err_pkt_len;
883511e6bc0Shuangdaode regs_buff[24] = queue->rx_ring.stats.non_vld_descs;
884511e6bc0Shuangdaode regs_buff[25] = queue->rx_ring.stats.err_bd_num;
885511e6bc0Shuangdaode regs_buff[26] = queue->rx_ring.stats.l2_err;
886511e6bc0Shuangdaode regs_buff[27] = queue->rx_ring.stats.l3l4_csum_err;
887511e6bc0Shuangdaode }
888511e6bc0Shuangdaode
889511e6bc0Shuangdaode /**
890511e6bc0Shuangdaode *hns_rcb_get_ring_sset_count - rcb string set count
891511e6bc0Shuangdaode *@stringset:ethtool cmd
892511e6bc0Shuangdaode *return rcb ring string set count
893511e6bc0Shuangdaode */
hns_rcb_get_ring_sset_count(int stringset)894511e6bc0Shuangdaode int hns_rcb_get_ring_sset_count(int stringset)
895511e6bc0Shuangdaode {
896d61d263cSMatthias Brugger if (stringset == ETH_SS_STATS)
897511e6bc0Shuangdaode return HNS_RING_STATIC_REG_NUM;
898511e6bc0Shuangdaode
899511e6bc0Shuangdaode return 0;
900511e6bc0Shuangdaode }
901511e6bc0Shuangdaode
902511e6bc0Shuangdaode /**
903511e6bc0Shuangdaode *hns_rcb_get_common_regs_count - rcb common regs count
904511e6bc0Shuangdaode *return regs count
905511e6bc0Shuangdaode */
hns_rcb_get_common_regs_count(void)906511e6bc0Shuangdaode int hns_rcb_get_common_regs_count(void)
907511e6bc0Shuangdaode {
908511e6bc0Shuangdaode return HNS_RCB_COMMON_DUMP_REG_NUM;
909511e6bc0Shuangdaode }
910511e6bc0Shuangdaode
911511e6bc0Shuangdaode /**
912*5a9594cfSYang Shen *hns_rcb_get_ring_regs_count - rcb ring regs count
913511e6bc0Shuangdaode *return regs count
914511e6bc0Shuangdaode */
hns_rcb_get_ring_regs_count(void)915511e6bc0Shuangdaode int hns_rcb_get_ring_regs_count(void)
916511e6bc0Shuangdaode {
917511e6bc0Shuangdaode return HNS_RCB_RING_DUMP_REG_NUM;
918511e6bc0Shuangdaode }
919511e6bc0Shuangdaode
920511e6bc0Shuangdaode /**
921511e6bc0Shuangdaode *hns_rcb_get_strings - get rcb string set
922511e6bc0Shuangdaode *@stringset:string set index
923511e6bc0Shuangdaode *@data:strings name value
924511e6bc0Shuangdaode *@index:queue index
925511e6bc0Shuangdaode */
hns_rcb_get_strings(int stringset,u8 * data,int index)926511e6bc0Shuangdaode void hns_rcb_get_strings(int stringset, u8 *data, int index)
927511e6bc0Shuangdaode {
92883cd2397SAlexander Duyck u8 *buff = data;
929511e6bc0Shuangdaode
930511e6bc0Shuangdaode if (stringset != ETH_SS_STATS)
931511e6bc0Shuangdaode return;
932511e6bc0Shuangdaode
93383cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_rcb_pkt_num", index);
93483cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_ppe_tx_pkt_num", index);
93583cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_ppe_drop_pkt_num", index);
93683cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_fbd_num", index);
937511e6bc0Shuangdaode
93883cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_pkt_num", index);
93983cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_bytes", index);
94083cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_err_cnt", index);
94183cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_io_err", index);
94283cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_sw_err", index);
94383cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_seg_pkt", index);
94483cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_restart_queue", index);
94583cd2397SAlexander Duyck ethtool_sprintf(&buff, "tx_ring%d_tx_busy", index);
946511e6bc0Shuangdaode
94783cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_rcb_pkt_num", index);
94883cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_ppe_pkt_num", index);
94983cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_ppe_drop_pkt_num", index);
95083cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_fbd_num", index);
951511e6bc0Shuangdaode
95283cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_pkt_num", index);
95383cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_bytes", index);
95483cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_err_cnt", index);
95583cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_io_err", index);
95683cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_sw_err", index);
95783cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_seg_pkt", index);
95883cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_reuse_pg", index);
95983cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_len_err", index);
96083cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_non_vld_desc_err", index);
96183cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_bd_num_err", index);
96283cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_l2_err", index);
96383cd2397SAlexander Duyck ethtool_sprintf(&buff, "rx_ring%d_l3l4csum_err", index);
964511e6bc0Shuangdaode }
965511e6bc0Shuangdaode
hns_rcb_get_common_regs(struct rcb_common_cb * rcb_com,void * data)966511e6bc0Shuangdaode void hns_rcb_get_common_regs(struct rcb_common_cb *rcb_com, void *data)
967511e6bc0Shuangdaode {
968511e6bc0Shuangdaode u32 *regs = data;
96943adc067SLisheng bool is_ver1 = AE_IS_VER1(rcb_com->dsaf_dev->dsaf_ver);
97089a44093SYisen.Zhuang\(Zhuangyuzeng\) bool is_dbg = HNS_DSAF_IS_DEBUG(rcb_com->dsaf_dev);
97143adc067SLisheng u32 reg_tmp;
97243adc067SLisheng u32 reg_num_tmp;
9737f8bcd91SYonglong Liu u32 i;
974511e6bc0Shuangdaode
975511e6bc0Shuangdaode /*rcb common registers */
976511e6bc0Shuangdaode regs[0] = dsaf_read_dev(rcb_com, RCB_COM_CFG_ENDIAN_REG);
977511e6bc0Shuangdaode regs[1] = dsaf_read_dev(rcb_com, RCB_COM_CFG_SYS_FSH_REG);
978511e6bc0Shuangdaode regs[2] = dsaf_read_dev(rcb_com, RCB_COM_CFG_INIT_FLAG_REG);
979511e6bc0Shuangdaode
980511e6bc0Shuangdaode regs[3] = dsaf_read_dev(rcb_com, RCB_COM_CFG_PKT_REG);
981511e6bc0Shuangdaode regs[4] = dsaf_read_dev(rcb_com, RCB_COM_CFG_RINVLD_REG);
982511e6bc0Shuangdaode regs[5] = dsaf_read_dev(rcb_com, RCB_COM_CFG_FNA_REG);
983511e6bc0Shuangdaode regs[6] = dsaf_read_dev(rcb_com, RCB_COM_CFG_FA_REG);
984511e6bc0Shuangdaode regs[7] = dsaf_read_dev(rcb_com, RCB_COM_CFG_PKT_TC_BP_REG);
985511e6bc0Shuangdaode regs[8] = dsaf_read_dev(rcb_com, RCB_COM_CFG_PPE_TNL_CLKEN_REG);
986511e6bc0Shuangdaode
987511e6bc0Shuangdaode regs[9] = dsaf_read_dev(rcb_com, RCB_COM_INTMSK_TX_PKT_REG);
988511e6bc0Shuangdaode regs[10] = dsaf_read_dev(rcb_com, RCB_COM_RINT_TX_PKT_REG);
989511e6bc0Shuangdaode regs[11] = dsaf_read_dev(rcb_com, RCB_COM_INTMASK_ECC_ERR_REG);
990511e6bc0Shuangdaode regs[12] = dsaf_read_dev(rcb_com, RCB_COM_INTSTS_ECC_ERR_REG);
991511e6bc0Shuangdaode regs[13] = dsaf_read_dev(rcb_com, RCB_COM_EBD_SRAM_ERR_REG);
992511e6bc0Shuangdaode regs[14] = dsaf_read_dev(rcb_com, RCB_COM_RXRING_ERR_REG);
993511e6bc0Shuangdaode regs[15] = dsaf_read_dev(rcb_com, RCB_COM_TXRING_ERR_REG);
994511e6bc0Shuangdaode regs[16] = dsaf_read_dev(rcb_com, RCB_COM_TX_FBD_ERR_REG);
995511e6bc0Shuangdaode regs[17] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK_EN_REG);
996511e6bc0Shuangdaode regs[18] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK0_REG);
997511e6bc0Shuangdaode regs[19] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK1_REG);
998511e6bc0Shuangdaode regs[20] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK2_REG);
999511e6bc0Shuangdaode regs[21] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK3_REG);
1000511e6bc0Shuangdaode regs[22] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK4_REG);
1001511e6bc0Shuangdaode regs[23] = dsaf_read_dev(rcb_com, RCB_SRAM_ECC_CHK5_REG);
1002511e6bc0Shuangdaode regs[24] = dsaf_read_dev(rcb_com, RCB_ECC_ERR_ADDR0_REG);
1003511e6bc0Shuangdaode regs[25] = dsaf_read_dev(rcb_com, RCB_ECC_ERR_ADDR3_REG);
1004511e6bc0Shuangdaode regs[26] = dsaf_read_dev(rcb_com, RCB_ECC_ERR_ADDR4_REG);
1005511e6bc0Shuangdaode regs[27] = dsaf_read_dev(rcb_com, RCB_ECC_ERR_ADDR5_REG);
1006511e6bc0Shuangdaode
1007511e6bc0Shuangdaode regs[28] = dsaf_read_dev(rcb_com, RCB_COM_SF_CFG_INTMASK_RING);
1008511e6bc0Shuangdaode regs[29] = dsaf_read_dev(rcb_com, RCB_COM_SF_CFG_RING_STS);
1009511e6bc0Shuangdaode regs[30] = dsaf_read_dev(rcb_com, RCB_COM_SF_CFG_RING);
1010511e6bc0Shuangdaode regs[31] = dsaf_read_dev(rcb_com, RCB_COM_SF_CFG_INTMASK_BD);
1011511e6bc0Shuangdaode regs[32] = dsaf_read_dev(rcb_com, RCB_COM_SF_CFG_BD_RINT_STS);
1012511e6bc0Shuangdaode regs[33] = dsaf_read_dev(rcb_com, RCB_COM_RCB_RD_BD_BUSY);
1013511e6bc0Shuangdaode regs[34] = dsaf_read_dev(rcb_com, RCB_COM_RCB_FBD_CRT_EN);
1014511e6bc0Shuangdaode regs[35] = dsaf_read_dev(rcb_com, RCB_COM_AXI_WR_ERR_INTMASK);
1015511e6bc0Shuangdaode regs[36] = dsaf_read_dev(rcb_com, RCB_COM_AXI_ERR_STS);
1016511e6bc0Shuangdaode regs[37] = dsaf_read_dev(rcb_com, RCB_COM_CHK_TX_FBD_NUM_REG);
1017511e6bc0Shuangdaode
1018511e6bc0Shuangdaode /* rcb common entry registers */
1019511e6bc0Shuangdaode for (i = 0; i < 16; i++) { /* total 16 model registers */
1020511e6bc0Shuangdaode regs[38 + i]
1021511e6bc0Shuangdaode = dsaf_read_dev(rcb_com, RCB_CFG_BD_NUM_REG + 4 * i);
1022511e6bc0Shuangdaode regs[54 + i]
1023511e6bc0Shuangdaode = dsaf_read_dev(rcb_com, RCB_CFG_PKTLINE_REG + 4 * i);
1024511e6bc0Shuangdaode }
1025511e6bc0Shuangdaode
102643adc067SLisheng reg_tmp = is_ver1 ? RCB_CFG_OVERTIME_REG : RCB_PORT_CFG_OVERTIME_REG;
102743adc067SLisheng reg_num_tmp = (is_ver1 || is_dbg) ? 1 : 6;
102843adc067SLisheng for (i = 0; i < reg_num_tmp; i++)
102943adc067SLisheng regs[70 + i] = dsaf_read_dev(rcb_com, reg_tmp);
103043adc067SLisheng
103143adc067SLisheng regs[76] = dsaf_read_dev(rcb_com, RCB_CFG_PKTLINE_INT_NUM_REG);
103243adc067SLisheng regs[77] = dsaf_read_dev(rcb_com, RCB_CFG_OVERTIME_INT_NUM_REG);
1033511e6bc0Shuangdaode
1034511e6bc0Shuangdaode /* mark end of rcb common regs */
103543adc067SLisheng for (i = 78; i < 80; i++)
1036511e6bc0Shuangdaode regs[i] = 0xcccccccc;
1037511e6bc0Shuangdaode }
1038511e6bc0Shuangdaode
hns_rcb_get_ring_regs(struct hnae_queue * queue,void * data)1039511e6bc0Shuangdaode void hns_rcb_get_ring_regs(struct hnae_queue *queue, void *data)
1040511e6bc0Shuangdaode {
1041511e6bc0Shuangdaode u32 *regs = data;
1042511e6bc0Shuangdaode struct ring_pair_cb *ring_pair
1043511e6bc0Shuangdaode = container_of(queue, struct ring_pair_cb, q);
10447f8bcd91SYonglong Liu u32 i;
1045511e6bc0Shuangdaode
1046511e6bc0Shuangdaode /*rcb ring registers */
1047511e6bc0Shuangdaode regs[0] = dsaf_read_dev(queue, RCB_RING_RX_RING_BASEADDR_L_REG);
1048511e6bc0Shuangdaode regs[1] = dsaf_read_dev(queue, RCB_RING_RX_RING_BASEADDR_H_REG);
1049511e6bc0Shuangdaode regs[2] = dsaf_read_dev(queue, RCB_RING_RX_RING_BD_NUM_REG);
1050511e6bc0Shuangdaode regs[3] = dsaf_read_dev(queue, RCB_RING_RX_RING_BD_LEN_REG);
1051511e6bc0Shuangdaode regs[4] = dsaf_read_dev(queue, RCB_RING_RX_RING_PKTLINE_REG);
1052511e6bc0Shuangdaode regs[5] = dsaf_read_dev(queue, RCB_RING_RX_RING_TAIL_REG);
1053511e6bc0Shuangdaode regs[6] = dsaf_read_dev(queue, RCB_RING_RX_RING_HEAD_REG);
1054511e6bc0Shuangdaode regs[7] = dsaf_read_dev(queue, RCB_RING_RX_RING_FBDNUM_REG);
1055511e6bc0Shuangdaode regs[8] = dsaf_read_dev(queue, RCB_RING_RX_RING_PKTNUM_RECORD_REG);
1056511e6bc0Shuangdaode
1057511e6bc0Shuangdaode regs[9] = dsaf_read_dev(queue, RCB_RING_TX_RING_BASEADDR_L_REG);
1058511e6bc0Shuangdaode regs[10] = dsaf_read_dev(queue, RCB_RING_TX_RING_BASEADDR_H_REG);
1059511e6bc0Shuangdaode regs[11] = dsaf_read_dev(queue, RCB_RING_TX_RING_BD_NUM_REG);
1060511e6bc0Shuangdaode regs[12] = dsaf_read_dev(queue, RCB_RING_TX_RING_BD_LEN_REG);
1061511e6bc0Shuangdaode regs[13] = dsaf_read_dev(queue, RCB_RING_TX_RING_PKTLINE_REG);
1062511e6bc0Shuangdaode regs[15] = dsaf_read_dev(queue, RCB_RING_TX_RING_TAIL_REG);
1063511e6bc0Shuangdaode regs[16] = dsaf_read_dev(queue, RCB_RING_TX_RING_HEAD_REG);
1064511e6bc0Shuangdaode regs[17] = dsaf_read_dev(queue, RCB_RING_TX_RING_FBDNUM_REG);
1065511e6bc0Shuangdaode regs[18] = dsaf_read_dev(queue, RCB_RING_TX_RING_OFFSET_REG);
1066511e6bc0Shuangdaode regs[19] = dsaf_read_dev(queue, RCB_RING_TX_RING_PKTNUM_RECORD_REG);
1067511e6bc0Shuangdaode
1068511e6bc0Shuangdaode regs[20] = dsaf_read_dev(queue, RCB_RING_PREFETCH_EN_REG);
1069511e6bc0Shuangdaode regs[21] = dsaf_read_dev(queue, RCB_RING_CFG_VF_NUM_REG);
1070511e6bc0Shuangdaode regs[22] = dsaf_read_dev(queue, RCB_RING_ASID_REG);
1071511e6bc0Shuangdaode regs[23] = dsaf_read_dev(queue, RCB_RING_RX_VM_REG);
1072511e6bc0Shuangdaode regs[24] = dsaf_read_dev(queue, RCB_RING_T0_BE_RST);
1073511e6bc0Shuangdaode regs[25] = dsaf_read_dev(queue, RCB_RING_COULD_BE_RST);
1074511e6bc0Shuangdaode regs[26] = dsaf_read_dev(queue, RCB_RING_WRR_WEIGHT_REG);
1075511e6bc0Shuangdaode
1076511e6bc0Shuangdaode regs[27] = dsaf_read_dev(queue, RCB_RING_INTMSK_RXWL_REG);
1077511e6bc0Shuangdaode regs[28] = dsaf_read_dev(queue, RCB_RING_INTSTS_RX_RING_REG);
1078511e6bc0Shuangdaode regs[29] = dsaf_read_dev(queue, RCB_RING_INTMSK_TXWL_REG);
1079511e6bc0Shuangdaode regs[30] = dsaf_read_dev(queue, RCB_RING_INTSTS_TX_RING_REG);
1080511e6bc0Shuangdaode regs[31] = dsaf_read_dev(queue, RCB_RING_INTMSK_RX_OVERTIME_REG);
1081511e6bc0Shuangdaode regs[32] = dsaf_read_dev(queue, RCB_RING_INTSTS_RX_OVERTIME_REG);
1082511e6bc0Shuangdaode regs[33] = dsaf_read_dev(queue, RCB_RING_INTMSK_TX_OVERTIME_REG);
1083511e6bc0Shuangdaode regs[34] = dsaf_read_dev(queue, RCB_RING_INTSTS_TX_OVERTIME_REG);
1084511e6bc0Shuangdaode
1085511e6bc0Shuangdaode /* mark end of ring regs */
1086511e6bc0Shuangdaode for (i = 35; i < 40; i++)
1087511e6bc0Shuangdaode regs[i] = 0xcccccc00 + ring_pair->index;
1088511e6bc0Shuangdaode }
1089