1*f7917c00SJeff Kirsher /* 2*f7917c00SJeff Kirsher * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved. 3*f7917c00SJeff Kirsher * 4*f7917c00SJeff Kirsher * This software is available to you under a choice of one of two 5*f7917c00SJeff Kirsher * licenses. You may choose to be licensed under the terms of the GNU 6*f7917c00SJeff Kirsher * General Public License (GPL) Version 2, available from the file 7*f7917c00SJeff Kirsher * COPYING in the main directory of this source tree, or the 8*f7917c00SJeff Kirsher * OpenIB.org BSD license below: 9*f7917c00SJeff Kirsher * 10*f7917c00SJeff Kirsher * Redistribution and use in source and binary forms, with or 11*f7917c00SJeff Kirsher * without modification, are permitted provided that the following 12*f7917c00SJeff Kirsher * conditions are met: 13*f7917c00SJeff Kirsher * 14*f7917c00SJeff Kirsher * - Redistributions of source code must retain the above 15*f7917c00SJeff Kirsher * copyright notice, this list of conditions and the following 16*f7917c00SJeff Kirsher * disclaimer. 17*f7917c00SJeff Kirsher * 18*f7917c00SJeff Kirsher * - Redistributions in binary form must reproduce the above 19*f7917c00SJeff Kirsher * copyright notice, this list of conditions and the following 20*f7917c00SJeff Kirsher * disclaimer in the documentation and/or other materials 21*f7917c00SJeff Kirsher * provided with the distribution. 22*f7917c00SJeff Kirsher * 23*f7917c00SJeff Kirsher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24*f7917c00SJeff Kirsher * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25*f7917c00SJeff Kirsher * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26*f7917c00SJeff Kirsher * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27*f7917c00SJeff Kirsher * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28*f7917c00SJeff Kirsher * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29*f7917c00SJeff Kirsher * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30*f7917c00SJeff Kirsher * SOFTWARE. 31*f7917c00SJeff Kirsher */ 32*f7917c00SJeff Kirsher #ifndef _CXGB3_OFFLOAD_CTL_DEFS_H 33*f7917c00SJeff Kirsher #define _CXGB3_OFFLOAD_CTL_DEFS_H 34*f7917c00SJeff Kirsher 35*f7917c00SJeff Kirsher enum { 36*f7917c00SJeff Kirsher GET_MAX_OUTSTANDING_WR = 0, 37*f7917c00SJeff Kirsher GET_TX_MAX_CHUNK = 1, 38*f7917c00SJeff Kirsher GET_TID_RANGE = 2, 39*f7917c00SJeff Kirsher GET_STID_RANGE = 3, 40*f7917c00SJeff Kirsher GET_RTBL_RANGE = 4, 41*f7917c00SJeff Kirsher GET_L2T_CAPACITY = 5, 42*f7917c00SJeff Kirsher GET_MTUS = 6, 43*f7917c00SJeff Kirsher GET_WR_LEN = 7, 44*f7917c00SJeff Kirsher GET_IFF_FROM_MAC = 8, 45*f7917c00SJeff Kirsher GET_DDP_PARAMS = 9, 46*f7917c00SJeff Kirsher GET_PORTS = 10, 47*f7917c00SJeff Kirsher 48*f7917c00SJeff Kirsher ULP_ISCSI_GET_PARAMS = 11, 49*f7917c00SJeff Kirsher ULP_ISCSI_SET_PARAMS = 12, 50*f7917c00SJeff Kirsher 51*f7917c00SJeff Kirsher RDMA_GET_PARAMS = 13, 52*f7917c00SJeff Kirsher RDMA_CQ_OP = 14, 53*f7917c00SJeff Kirsher RDMA_CQ_SETUP = 15, 54*f7917c00SJeff Kirsher RDMA_CQ_DISABLE = 16, 55*f7917c00SJeff Kirsher RDMA_CTRL_QP_SETUP = 17, 56*f7917c00SJeff Kirsher RDMA_GET_MEM = 18, 57*f7917c00SJeff Kirsher RDMA_GET_MIB = 19, 58*f7917c00SJeff Kirsher 59*f7917c00SJeff Kirsher GET_RX_PAGE_INFO = 50, 60*f7917c00SJeff Kirsher GET_ISCSI_IPV4ADDR = 51, 61*f7917c00SJeff Kirsher 62*f7917c00SJeff Kirsher GET_EMBEDDED_INFO = 70, 63*f7917c00SJeff Kirsher }; 64*f7917c00SJeff Kirsher 65*f7917c00SJeff Kirsher /* 66*f7917c00SJeff Kirsher * Structure used to describe a TID range. Valid TIDs are [base, base+num). 67*f7917c00SJeff Kirsher */ 68*f7917c00SJeff Kirsher struct tid_range { 69*f7917c00SJeff Kirsher unsigned int base; /* first TID */ 70*f7917c00SJeff Kirsher unsigned int num; /* number of TIDs in range */ 71*f7917c00SJeff Kirsher }; 72*f7917c00SJeff Kirsher 73*f7917c00SJeff Kirsher /* 74*f7917c00SJeff Kirsher * Structure used to request the size and contents of the MTU table. 75*f7917c00SJeff Kirsher */ 76*f7917c00SJeff Kirsher struct mtutab { 77*f7917c00SJeff Kirsher unsigned int size; /* # of entries in the MTU table */ 78*f7917c00SJeff Kirsher const unsigned short *mtus; /* the MTU table values */ 79*f7917c00SJeff Kirsher }; 80*f7917c00SJeff Kirsher 81*f7917c00SJeff Kirsher struct net_device; 82*f7917c00SJeff Kirsher 83*f7917c00SJeff Kirsher /* 84*f7917c00SJeff Kirsher * Structure used to request the adapter net_device owning a given MAC address. 85*f7917c00SJeff Kirsher */ 86*f7917c00SJeff Kirsher struct iff_mac { 87*f7917c00SJeff Kirsher struct net_device *dev; /* the net_device */ 88*f7917c00SJeff Kirsher const unsigned char *mac_addr; /* MAC address to lookup */ 89*f7917c00SJeff Kirsher u16 vlan_tag; 90*f7917c00SJeff Kirsher }; 91*f7917c00SJeff Kirsher 92*f7917c00SJeff Kirsher /* Structure used to request a port's iSCSI IPv4 address */ 93*f7917c00SJeff Kirsher struct iscsi_ipv4addr { 94*f7917c00SJeff Kirsher struct net_device *dev; /* the net_device */ 95*f7917c00SJeff Kirsher __be32 ipv4addr; /* the return iSCSI IPv4 address */ 96*f7917c00SJeff Kirsher }; 97*f7917c00SJeff Kirsher 98*f7917c00SJeff Kirsher struct pci_dev; 99*f7917c00SJeff Kirsher 100*f7917c00SJeff Kirsher /* 101*f7917c00SJeff Kirsher * Structure used to request the TCP DDP parameters. 102*f7917c00SJeff Kirsher */ 103*f7917c00SJeff Kirsher struct ddp_params { 104*f7917c00SJeff Kirsher unsigned int llimit; /* TDDP region start address */ 105*f7917c00SJeff Kirsher unsigned int ulimit; /* TDDP region end address */ 106*f7917c00SJeff Kirsher unsigned int tag_mask; /* TDDP tag mask */ 107*f7917c00SJeff Kirsher struct pci_dev *pdev; 108*f7917c00SJeff Kirsher }; 109*f7917c00SJeff Kirsher 110*f7917c00SJeff Kirsher struct adap_ports { 111*f7917c00SJeff Kirsher unsigned int nports; /* number of ports on this adapter */ 112*f7917c00SJeff Kirsher struct net_device *lldevs[2]; 113*f7917c00SJeff Kirsher }; 114*f7917c00SJeff Kirsher 115*f7917c00SJeff Kirsher /* 116*f7917c00SJeff Kirsher * Structure used to return information to the iscsi layer. 117*f7917c00SJeff Kirsher */ 118*f7917c00SJeff Kirsher struct ulp_iscsi_info { 119*f7917c00SJeff Kirsher unsigned int offset; 120*f7917c00SJeff Kirsher unsigned int llimit; 121*f7917c00SJeff Kirsher unsigned int ulimit; 122*f7917c00SJeff Kirsher unsigned int tagmask; 123*f7917c00SJeff Kirsher u8 pgsz_factor[4]; 124*f7917c00SJeff Kirsher unsigned int max_rxsz; 125*f7917c00SJeff Kirsher unsigned int max_txsz; 126*f7917c00SJeff Kirsher struct pci_dev *pdev; 127*f7917c00SJeff Kirsher }; 128*f7917c00SJeff Kirsher 129*f7917c00SJeff Kirsher /* 130*f7917c00SJeff Kirsher * Structure used to return information to the RDMA layer. 131*f7917c00SJeff Kirsher */ 132*f7917c00SJeff Kirsher struct rdma_info { 133*f7917c00SJeff Kirsher unsigned int tpt_base; /* TPT base address */ 134*f7917c00SJeff Kirsher unsigned int tpt_top; /* TPT last entry address */ 135*f7917c00SJeff Kirsher unsigned int pbl_base; /* PBL base address */ 136*f7917c00SJeff Kirsher unsigned int pbl_top; /* PBL last entry address */ 137*f7917c00SJeff Kirsher unsigned int rqt_base; /* RQT base address */ 138*f7917c00SJeff Kirsher unsigned int rqt_top; /* RQT last entry address */ 139*f7917c00SJeff Kirsher unsigned int udbell_len; /* user doorbell region length */ 140*f7917c00SJeff Kirsher unsigned long udbell_physbase; /* user doorbell physical start addr */ 141*f7917c00SJeff Kirsher void __iomem *kdb_addr; /* kernel doorbell register address */ 142*f7917c00SJeff Kirsher struct pci_dev *pdev; /* associated PCI device */ 143*f7917c00SJeff Kirsher }; 144*f7917c00SJeff Kirsher 145*f7917c00SJeff Kirsher /* 146*f7917c00SJeff Kirsher * Structure used to request an operation on an RDMA completion queue. 147*f7917c00SJeff Kirsher */ 148*f7917c00SJeff Kirsher struct rdma_cq_op { 149*f7917c00SJeff Kirsher unsigned int id; 150*f7917c00SJeff Kirsher unsigned int op; 151*f7917c00SJeff Kirsher unsigned int credits; 152*f7917c00SJeff Kirsher }; 153*f7917c00SJeff Kirsher 154*f7917c00SJeff Kirsher /* 155*f7917c00SJeff Kirsher * Structure used to setup RDMA completion queues. 156*f7917c00SJeff Kirsher */ 157*f7917c00SJeff Kirsher struct rdma_cq_setup { 158*f7917c00SJeff Kirsher unsigned int id; 159*f7917c00SJeff Kirsher unsigned long long base_addr; 160*f7917c00SJeff Kirsher unsigned int size; 161*f7917c00SJeff Kirsher unsigned int credits; 162*f7917c00SJeff Kirsher unsigned int credit_thres; 163*f7917c00SJeff Kirsher unsigned int ovfl_mode; 164*f7917c00SJeff Kirsher }; 165*f7917c00SJeff Kirsher 166*f7917c00SJeff Kirsher /* 167*f7917c00SJeff Kirsher * Structure used to setup the RDMA control egress context. 168*f7917c00SJeff Kirsher */ 169*f7917c00SJeff Kirsher struct rdma_ctrlqp_setup { 170*f7917c00SJeff Kirsher unsigned long long base_addr; 171*f7917c00SJeff Kirsher unsigned int size; 172*f7917c00SJeff Kirsher }; 173*f7917c00SJeff Kirsher 174*f7917c00SJeff Kirsher /* 175*f7917c00SJeff Kirsher * Offload TX/RX page information. 176*f7917c00SJeff Kirsher */ 177*f7917c00SJeff Kirsher struct ofld_page_info { 178*f7917c00SJeff Kirsher unsigned int page_size; /* Page size, should be a power of 2 */ 179*f7917c00SJeff Kirsher unsigned int num; /* Number of pages */ 180*f7917c00SJeff Kirsher }; 181*f7917c00SJeff Kirsher 182*f7917c00SJeff Kirsher /* 183*f7917c00SJeff Kirsher * Structure used to get firmware and protocol engine versions. 184*f7917c00SJeff Kirsher */ 185*f7917c00SJeff Kirsher struct ch_embedded_info { 186*f7917c00SJeff Kirsher u32 fw_vers; 187*f7917c00SJeff Kirsher u32 tp_vers; 188*f7917c00SJeff Kirsher }; 189*f7917c00SJeff Kirsher #endif /* _CXGB3_OFFLOAD_CTL_DEFS_H */ 190