1f844a0eaSJeff Kirsher /* 2f844a0eaSJeff Kirsher * Linux network driver for Brocade Converged Network Adapter. 3f844a0eaSJeff Kirsher * 4f844a0eaSJeff Kirsher * This program is free software; you can redistribute it and/or modify it 5f844a0eaSJeff Kirsher * under the terms of the GNU General Public License (GPL) Version 2 as 6f844a0eaSJeff Kirsher * published by the Free Software Foundation 7f844a0eaSJeff Kirsher * 8f844a0eaSJeff Kirsher * This program is distributed in the hope that it will be useful, but 9f844a0eaSJeff Kirsher * WITHOUT ANY WARRANTY; without even the implied warranty of 10f844a0eaSJeff Kirsher * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 11f844a0eaSJeff Kirsher * General Public License for more details. 12f844a0eaSJeff Kirsher */ 13f844a0eaSJeff Kirsher /* 14f844a0eaSJeff Kirsher * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 15f844a0eaSJeff Kirsher * All rights reserved 16f844a0eaSJeff Kirsher * www.brocade.com 17f844a0eaSJeff Kirsher */ 18f844a0eaSJeff Kirsher #ifndef __BFI_H__ 19f844a0eaSJeff Kirsher #define __BFI_H__ 20f844a0eaSJeff Kirsher 21f844a0eaSJeff Kirsher #include "bfa_defs.h" 22f844a0eaSJeff Kirsher 23f844a0eaSJeff Kirsher #pragma pack(1) 24f844a0eaSJeff Kirsher 25f844a0eaSJeff Kirsher /** 26f844a0eaSJeff Kirsher * BFI FW image type 27f844a0eaSJeff Kirsher */ 28f844a0eaSJeff Kirsher #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */ 29f844a0eaSJeff Kirsher #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) 30f844a0eaSJeff Kirsher 31f844a0eaSJeff Kirsher /** 32f844a0eaSJeff Kirsher * Msg header common to all msgs 33f844a0eaSJeff Kirsher */ 34f844a0eaSJeff Kirsher struct bfi_mhdr { 35f844a0eaSJeff Kirsher u8 msg_class; /*!< @ref enum bfi_mclass */ 36f844a0eaSJeff Kirsher u8 msg_id; /*!< msg opcode with in the class */ 37f844a0eaSJeff Kirsher union { 38f844a0eaSJeff Kirsher struct { 39078086f3SRasesh Mody u8 qid; 40078086f3SRasesh Mody u8 fn_lpu; /*!< msg destination */ 41f844a0eaSJeff Kirsher } h2i; 42f844a0eaSJeff Kirsher u16 i2htok; /*!< token in msgs to host */ 43f844a0eaSJeff Kirsher } mtag; 44f844a0eaSJeff Kirsher }; 45f844a0eaSJeff Kirsher 46078086f3SRasesh Mody #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu)) 47078086f3SRasesh Mody #define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1) 48078086f3SRasesh Mody #define bfi_mhdr_2_qid(_mh) ((_mh)->mtag.h2i.qid) 49078086f3SRasesh Mody 50078086f3SRasesh Mody #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \ 51f844a0eaSJeff Kirsher (_mh).msg_class = (_mc); \ 52f844a0eaSJeff Kirsher (_mh).msg_id = (_op); \ 53078086f3SRasesh Mody (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \ 54f844a0eaSJeff Kirsher } while (0) 55f844a0eaSJeff Kirsher 56f844a0eaSJeff Kirsher #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \ 57f844a0eaSJeff Kirsher (_mh).msg_class = (_mc); \ 58f844a0eaSJeff Kirsher (_mh).msg_id = (_op); \ 59f844a0eaSJeff Kirsher (_mh).mtag.i2htok = (_i2htok); \ 60f844a0eaSJeff Kirsher } while (0) 61f844a0eaSJeff Kirsher 62f844a0eaSJeff Kirsher /* 63f844a0eaSJeff Kirsher * Message opcodes: 0-127 to firmware, 128-255 to host 64f844a0eaSJeff Kirsher */ 65f844a0eaSJeff Kirsher #define BFI_I2H_OPCODE_BASE 128 66f844a0eaSJeff Kirsher #define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE) 67f844a0eaSJeff Kirsher 68f844a0eaSJeff Kirsher /** 69f844a0eaSJeff Kirsher **************************************************************************** 70f844a0eaSJeff Kirsher * 71f844a0eaSJeff Kirsher * Scatter Gather Element and Page definition 72f844a0eaSJeff Kirsher * 73f844a0eaSJeff Kirsher **************************************************************************** 74f844a0eaSJeff Kirsher */ 75f844a0eaSJeff Kirsher 76f844a0eaSJeff Kirsher /** 77f844a0eaSJeff Kirsher * DMA addresses 78f844a0eaSJeff Kirsher */ 79f844a0eaSJeff Kirsher union bfi_addr_u { 80f844a0eaSJeff Kirsher struct { 81f844a0eaSJeff Kirsher u32 addr_lo; 82f844a0eaSJeff Kirsher u32 addr_hi; 83f844a0eaSJeff Kirsher } a32; 84f844a0eaSJeff Kirsher }; 85f844a0eaSJeff Kirsher 86*72a9730bSKrishna Gudipati /** 87*72a9730bSKrishna Gudipati * Generic DMA addr-len pair. 88*72a9730bSKrishna Gudipati */ 89*72a9730bSKrishna Gudipati struct bfi_alen { 90*72a9730bSKrishna Gudipati union bfi_addr_u al_addr; /* DMA addr of buffer */ 91*72a9730bSKrishna Gudipati u32 al_len; /* length of buffer */ 92*72a9730bSKrishna Gudipati }; 93*72a9730bSKrishna Gudipati 94f844a0eaSJeff Kirsher /* 95f844a0eaSJeff Kirsher * Large Message structure - 128 Bytes size Msgs 96f844a0eaSJeff Kirsher */ 97f844a0eaSJeff Kirsher #define BFI_LMSG_SZ 128 98f844a0eaSJeff Kirsher #define BFI_LMSG_PL_WSZ \ 99f844a0eaSJeff Kirsher ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr)) / 4) 100f844a0eaSJeff Kirsher 101f844a0eaSJeff Kirsher /** 102f844a0eaSJeff Kirsher * Mailbox message structure 103f844a0eaSJeff Kirsher */ 104f844a0eaSJeff Kirsher #define BFI_MBMSG_SZ 7 105f844a0eaSJeff Kirsher struct bfi_mbmsg { 106f844a0eaSJeff Kirsher struct bfi_mhdr mh; 107f844a0eaSJeff Kirsher u32 pl[BFI_MBMSG_SZ]; 108f844a0eaSJeff Kirsher }; 109f844a0eaSJeff Kirsher 110f844a0eaSJeff Kirsher /** 111078086f3SRasesh Mody * Supported PCI function class codes (personality) 112078086f3SRasesh Mody */ 113078086f3SRasesh Mody enum bfi_pcifn_class { 114078086f3SRasesh Mody BFI_PCIFN_CLASS_FC = 0x0c04, 115078086f3SRasesh Mody BFI_PCIFN_CLASS_ETH = 0x0200, 116078086f3SRasesh Mody }; 117078086f3SRasesh Mody 118078086f3SRasesh Mody /** 119f844a0eaSJeff Kirsher * Message Classes 120f844a0eaSJeff Kirsher */ 121f844a0eaSJeff Kirsher enum bfi_mclass { 122f844a0eaSJeff Kirsher BFI_MC_IOC = 1, /*!< IO Controller (IOC) */ 123f844a0eaSJeff Kirsher BFI_MC_DIAG = 2, /*!< Diagnostic Msgs */ 124f844a0eaSJeff Kirsher BFI_MC_FLASH = 3, /*!< Flash message class */ 125f844a0eaSJeff Kirsher BFI_MC_CEE = 4, /*!< CEE */ 126f844a0eaSJeff Kirsher BFI_MC_FCPORT = 5, /*!< FC port */ 127f844a0eaSJeff Kirsher BFI_MC_IOCFC = 6, /*!< FC - IO Controller (IOC) */ 128f844a0eaSJeff Kirsher BFI_MC_LL = 7, /*!< Link Layer */ 129f844a0eaSJeff Kirsher BFI_MC_UF = 8, /*!< Unsolicited frame receive */ 130f844a0eaSJeff Kirsher BFI_MC_FCXP = 9, /*!< FC Transport */ 131f844a0eaSJeff Kirsher BFI_MC_LPS = 10, /*!< lport fc login services */ 132f844a0eaSJeff Kirsher BFI_MC_RPORT = 11, /*!< Remote port */ 133f844a0eaSJeff Kirsher BFI_MC_ITNIM = 12, /*!< I-T nexus (Initiator mode) */ 134f844a0eaSJeff Kirsher BFI_MC_IOIM_READ = 13, /*!< read IO (Initiator mode) */ 135f844a0eaSJeff Kirsher BFI_MC_IOIM_WRITE = 14, /*!< write IO (Initiator mode) */ 136f844a0eaSJeff Kirsher BFI_MC_IOIM_IO = 15, /*!< IO (Initiator mode) */ 137f844a0eaSJeff Kirsher BFI_MC_IOIM = 16, /*!< IO (Initiator mode) */ 138f844a0eaSJeff Kirsher BFI_MC_IOIM_IOCOM = 17, /*!< good IO completion */ 139f844a0eaSJeff Kirsher BFI_MC_TSKIM = 18, /*!< Initiator Task management */ 140f844a0eaSJeff Kirsher BFI_MC_SBOOT = 19, /*!< SAN boot services */ 141f844a0eaSJeff Kirsher BFI_MC_IPFC = 20, /*!< IP over FC Msgs */ 142f844a0eaSJeff Kirsher BFI_MC_PORT = 21, /*!< Physical port */ 143f844a0eaSJeff Kirsher BFI_MC_SFP = 22, /*!< SFP module */ 144f844a0eaSJeff Kirsher BFI_MC_MSGQ = 23, /*!< MSGQ */ 145f844a0eaSJeff Kirsher BFI_MC_ENET = 24, /*!< ENET commands/responses */ 146aafd5c2cSRasesh Mody BFI_MC_PHY = 25, /*!< External PHY message class */ 147aafd5c2cSRasesh Mody BFI_MC_NBOOT = 26, /*!< Network Boot */ 148aafd5c2cSRasesh Mody BFI_MC_TIO_READ = 27, /*!< read IO (Target mode) */ 149aafd5c2cSRasesh Mody BFI_MC_TIO_WRITE = 28, /*!< write IO (Target mode) */ 150aafd5c2cSRasesh Mody BFI_MC_TIO_DATA_XFERED = 29, /*!< ds transferred (target mode) */ 151aafd5c2cSRasesh Mody BFI_MC_TIO_IO = 30, /*!< IO (Target mode) */ 152aafd5c2cSRasesh Mody BFI_MC_TIO = 31, /*!< IO (target mode) */ 153aafd5c2cSRasesh Mody BFI_MC_MFG = 32, /*!< MFG/ASIC block commands */ 154aafd5c2cSRasesh Mody BFI_MC_EDMA = 33, /*!< EDMA copy commands */ 155aafd5c2cSRasesh Mody BFI_MC_MAX = 34 156f844a0eaSJeff Kirsher }; 157f844a0eaSJeff Kirsher 158f844a0eaSJeff Kirsher #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */ 159f844a0eaSJeff Kirsher 160af027a34SRasesh Mody #define BFI_FWBOOT_ENV_OS 0 161af027a34SRasesh Mody 162f844a0eaSJeff Kirsher /** 163f844a0eaSJeff Kirsher *---------------------------------------------------------------------- 164f844a0eaSJeff Kirsher * IOC 165f844a0eaSJeff Kirsher *---------------------------------------------------------------------- 166f844a0eaSJeff Kirsher */ 167f844a0eaSJeff Kirsher 168078086f3SRasesh Mody /** 169078086f3SRasesh Mody * Different asic generations 170078086f3SRasesh Mody */ 171078086f3SRasesh Mody enum bfi_asic_gen { 172078086f3SRasesh Mody BFI_ASIC_GEN_CB = 1, 173078086f3SRasesh Mody BFI_ASIC_GEN_CT = 2, 1741bf9fd70SRasesh Mody BFI_ASIC_GEN_CT2 = 3, 175078086f3SRasesh Mody }; 176078086f3SRasesh Mody 177078086f3SRasesh Mody enum bfi_asic_mode { 178078086f3SRasesh Mody BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */ 179078086f3SRasesh Mody BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */ 180078086f3SRasesh Mody BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */ 181078086f3SRasesh Mody BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */ 182078086f3SRasesh Mody }; 183078086f3SRasesh Mody 184f844a0eaSJeff Kirsher enum bfi_ioc_h2i_msgs { 185f844a0eaSJeff Kirsher BFI_IOC_H2I_ENABLE_REQ = 1, 186f844a0eaSJeff Kirsher BFI_IOC_H2I_DISABLE_REQ = 2, 187f844a0eaSJeff Kirsher BFI_IOC_H2I_GETATTR_REQ = 3, 188f844a0eaSJeff Kirsher BFI_IOC_H2I_DBG_SYNC = 4, 189f844a0eaSJeff Kirsher BFI_IOC_H2I_DBG_DUMP = 5, 190f844a0eaSJeff Kirsher }; 191f844a0eaSJeff Kirsher 192f844a0eaSJeff Kirsher enum bfi_ioc_i2h_msgs { 193f844a0eaSJeff Kirsher BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1), 194f844a0eaSJeff Kirsher BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2), 195f844a0eaSJeff Kirsher BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3), 196078086f3SRasesh Mody BFI_IOC_I2H_HBEAT = BFA_I2HM(4), 197f844a0eaSJeff Kirsher }; 198f844a0eaSJeff Kirsher 199f844a0eaSJeff Kirsher /** 200f844a0eaSJeff Kirsher * BFI_IOC_H2I_GETATTR_REQ message 201f844a0eaSJeff Kirsher */ 202f844a0eaSJeff Kirsher struct bfi_ioc_getattr_req { 203f844a0eaSJeff Kirsher struct bfi_mhdr mh; 204f844a0eaSJeff Kirsher union bfi_addr_u attr_addr; 205f844a0eaSJeff Kirsher }; 206f844a0eaSJeff Kirsher 207f844a0eaSJeff Kirsher struct bfi_ioc_attr { 208f844a0eaSJeff Kirsher u64 mfg_pwwn; /*!< Mfg port wwn */ 209f844a0eaSJeff Kirsher u64 mfg_nwwn; /*!< Mfg node wwn */ 210f844a0eaSJeff Kirsher mac_t mfg_mac; /*!< Mfg mac */ 211078086f3SRasesh Mody u8 port_mode; /* enum bfi_port_mode */ 212078086f3SRasesh Mody u8 rsvd_a; 213f844a0eaSJeff Kirsher u64 pwwn; 214f844a0eaSJeff Kirsher u64 nwwn; 215f844a0eaSJeff Kirsher mac_t mac; /*!< PBC or Mfg mac */ 216f844a0eaSJeff Kirsher u16 rsvd_b; 217f844a0eaSJeff Kirsher mac_t fcoe_mac; 218f844a0eaSJeff Kirsher u16 rsvd_c; 219f844a0eaSJeff Kirsher char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; 220f844a0eaSJeff Kirsher u8 pcie_gen; 221f844a0eaSJeff Kirsher u8 pcie_lanes_orig; 222f844a0eaSJeff Kirsher u8 pcie_lanes; 223f844a0eaSJeff Kirsher u8 rx_bbcredit; /*!< receive buffer credits */ 224f844a0eaSJeff Kirsher u32 adapter_prop; /*!< adapter properties */ 225f844a0eaSJeff Kirsher u16 maxfrsize; /*!< max receive frame size */ 226f844a0eaSJeff Kirsher char asic_rev; 227f844a0eaSJeff Kirsher u8 rsvd_d; 228f844a0eaSJeff Kirsher char fw_version[BFA_VERSION_LEN]; 229f844a0eaSJeff Kirsher char optrom_version[BFA_VERSION_LEN]; 230f844a0eaSJeff Kirsher struct bfa_mfg_vpd vpd; 231f844a0eaSJeff Kirsher u32 card_type; /*!< card type */ 232f844a0eaSJeff Kirsher }; 233f844a0eaSJeff Kirsher 234f844a0eaSJeff Kirsher /** 235f844a0eaSJeff Kirsher * BFI_IOC_I2H_GETATTR_REPLY message 236f844a0eaSJeff Kirsher */ 237f844a0eaSJeff Kirsher struct bfi_ioc_getattr_reply { 238f844a0eaSJeff Kirsher struct bfi_mhdr mh; /*!< Common msg header */ 239f844a0eaSJeff Kirsher u8 status; /*!< cfg reply status */ 240f844a0eaSJeff Kirsher u8 rsvd[3]; 241f844a0eaSJeff Kirsher }; 242f844a0eaSJeff Kirsher 243f844a0eaSJeff Kirsher /** 244f844a0eaSJeff Kirsher * Firmware memory page offsets 245f844a0eaSJeff Kirsher */ 246f844a0eaSJeff Kirsher #define BFI_IOC_SMEM_PG0_CB (0x40) 247f844a0eaSJeff Kirsher #define BFI_IOC_SMEM_PG0_CT (0x180) 248f844a0eaSJeff Kirsher 249f844a0eaSJeff Kirsher /** 250f844a0eaSJeff Kirsher * Firmware statistic offset 251f844a0eaSJeff Kirsher */ 252f844a0eaSJeff Kirsher #define BFI_IOC_FWSTATS_OFF (0x6B40) 253f844a0eaSJeff Kirsher #define BFI_IOC_FWSTATS_SZ (4096) 254f844a0eaSJeff Kirsher 255f844a0eaSJeff Kirsher /** 256f844a0eaSJeff Kirsher * Firmware trace offset 257f844a0eaSJeff Kirsher */ 258f844a0eaSJeff Kirsher #define BFI_IOC_TRC_OFF (0x4b00) 259f844a0eaSJeff Kirsher #define BFI_IOC_TRC_ENTS 256 260f844a0eaSJeff Kirsher 261f844a0eaSJeff Kirsher #define BFI_IOC_FW_SIGNATURE (0xbfadbfad) 262f844a0eaSJeff Kirsher #define BFI_IOC_MD5SUM_SZ 4 263f844a0eaSJeff Kirsher struct bfi_ioc_image_hdr { 264f844a0eaSJeff Kirsher u32 signature; /*!< constant signature */ 265078086f3SRasesh Mody u8 asic_gen; /*!< asic generation */ 266078086f3SRasesh Mody u8 asic_mode; 267078086f3SRasesh Mody u8 port0_mode; /*!< device mode for port 0 */ 268078086f3SRasesh Mody u8 port1_mode; /*!< device mode for port 1 */ 269f844a0eaSJeff Kirsher u32 exec; /*!< exec vector */ 270078086f3SRasesh Mody u32 bootenv; /*!< firmware boot env */ 271f844a0eaSJeff Kirsher u32 rsvd_b[4]; 272f844a0eaSJeff Kirsher u32 md5sum[BFI_IOC_MD5SUM_SZ]; 273f844a0eaSJeff Kirsher }; 274f844a0eaSJeff Kirsher 275078086f3SRasesh Mody #define BFI_FWBOOT_DEVMODE_OFF 4 276078086f3SRasesh Mody #define BFI_FWBOOT_TYPE_OFF 8 277078086f3SRasesh Mody #define BFI_FWBOOT_ENV_OFF 12 278078086f3SRasesh Mody #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \ 279078086f3SRasesh Mody (((u32)(__asic_gen)) << 24 | \ 280078086f3SRasesh Mody ((u32)(__asic_mode)) << 16 | \ 281078086f3SRasesh Mody ((u32)(__p0_mode)) << 8 | \ 282078086f3SRasesh Mody ((u32)(__p1_mode))) 283078086f3SRasesh Mody 284f844a0eaSJeff Kirsher enum bfi_fwboot_type { 285f844a0eaSJeff Kirsher BFI_FWBOOT_TYPE_NORMAL = 0, 286f844a0eaSJeff Kirsher BFI_FWBOOT_TYPE_FLASH = 1, 287f844a0eaSJeff Kirsher BFI_FWBOOT_TYPE_MEMTEST = 2, 288f844a0eaSJeff Kirsher }; 289f844a0eaSJeff Kirsher 290078086f3SRasesh Mody enum bfi_port_mode { 291078086f3SRasesh Mody BFI_PORT_MODE_FC = 1, 292078086f3SRasesh Mody BFI_PORT_MODE_ETH = 2, 293078086f3SRasesh Mody }; 294078086f3SRasesh Mody 295f844a0eaSJeff Kirsher struct bfi_ioc_hbeat { 296f844a0eaSJeff Kirsher struct bfi_mhdr mh; /*!< common msg header */ 297f844a0eaSJeff Kirsher u32 hb_count; /*!< current heart beat count */ 298f844a0eaSJeff Kirsher }; 299f844a0eaSJeff Kirsher 300f844a0eaSJeff Kirsher /** 301f844a0eaSJeff Kirsher * IOC hardware/firmware state 302f844a0eaSJeff Kirsher */ 303f844a0eaSJeff Kirsher enum bfi_ioc_state { 304f844a0eaSJeff Kirsher BFI_IOC_UNINIT = 0, /*!< not initialized */ 305f844a0eaSJeff Kirsher BFI_IOC_INITING = 1, /*!< h/w is being initialized */ 306f844a0eaSJeff Kirsher BFI_IOC_HWINIT = 2, /*!< h/w is initialized */ 307f844a0eaSJeff Kirsher BFI_IOC_CFG = 3, /*!< IOC configuration in progress */ 308f844a0eaSJeff Kirsher BFI_IOC_OP = 4, /*!< IOC is operational */ 309f844a0eaSJeff Kirsher BFI_IOC_DISABLING = 5, /*!< IOC is being disabled */ 310f844a0eaSJeff Kirsher BFI_IOC_DISABLED = 6, /*!< IOC is disabled */ 311f844a0eaSJeff Kirsher BFI_IOC_CFG_DISABLED = 7, /*!< IOC is being disabled;transient */ 312f844a0eaSJeff Kirsher BFI_IOC_FAIL = 8, /*!< IOC heart-beat failure */ 313f844a0eaSJeff Kirsher BFI_IOC_MEMTEST = 9, /*!< IOC is doing memtest */ 314f844a0eaSJeff Kirsher }; 315f844a0eaSJeff Kirsher 316f844a0eaSJeff Kirsher #define BFI_IOC_ENDIAN_SIG 0x12345678 317f844a0eaSJeff Kirsher 318f844a0eaSJeff Kirsher enum { 319f844a0eaSJeff Kirsher BFI_ADAPTER_TYPE_FC = 0x01, /*!< FC adapters */ 320f844a0eaSJeff Kirsher BFI_ADAPTER_TYPE_MK = 0x0f0000, /*!< adapter type mask */ 321f844a0eaSJeff Kirsher BFI_ADAPTER_TYPE_SH = 16, /*!< adapter type shift */ 322f844a0eaSJeff Kirsher BFI_ADAPTER_NPORTS_MK = 0xff00, /*!< number of ports mask */ 323f844a0eaSJeff Kirsher BFI_ADAPTER_NPORTS_SH = 8, /*!< number of ports shift */ 324f844a0eaSJeff Kirsher BFI_ADAPTER_SPEED_MK = 0xff, /*!< adapter speed mask */ 325f844a0eaSJeff Kirsher BFI_ADAPTER_SPEED_SH = 0, /*!< adapter speed shift */ 326f844a0eaSJeff Kirsher BFI_ADAPTER_PROTO = 0x100000, /*!< prototype adapaters */ 327f844a0eaSJeff Kirsher BFI_ADAPTER_TTV = 0x200000, /*!< TTV debug capable */ 328f844a0eaSJeff Kirsher BFI_ADAPTER_UNSUPP = 0x400000, /*!< unknown adapter type */ 329f844a0eaSJeff Kirsher }; 330f844a0eaSJeff Kirsher 331f844a0eaSJeff Kirsher #define BFI_ADAPTER_GETP(__prop, __adap_prop) \ 332f844a0eaSJeff Kirsher (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \ 333f844a0eaSJeff Kirsher BFI_ADAPTER_ ## __prop ## _SH) 334f844a0eaSJeff Kirsher #define BFI_ADAPTER_SETP(__prop, __val) \ 335f844a0eaSJeff Kirsher ((__val) << BFI_ADAPTER_ ## __prop ## _SH) 336f844a0eaSJeff Kirsher #define BFI_ADAPTER_IS_PROTO(__adap_type) \ 337f844a0eaSJeff Kirsher ((__adap_type) & BFI_ADAPTER_PROTO) 338f844a0eaSJeff Kirsher #define BFI_ADAPTER_IS_TTV(__adap_type) \ 339f844a0eaSJeff Kirsher ((__adap_type) & BFI_ADAPTER_TTV) 340f844a0eaSJeff Kirsher #define BFI_ADAPTER_IS_UNSUPP(__adap_type) \ 341f844a0eaSJeff Kirsher ((__adap_type) & BFI_ADAPTER_UNSUPP) 342f844a0eaSJeff Kirsher #define BFI_ADAPTER_IS_SPECIAL(__adap_type) \ 343f844a0eaSJeff Kirsher ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \ 344f844a0eaSJeff Kirsher BFI_ADAPTER_UNSUPP)) 345f844a0eaSJeff Kirsher 346f844a0eaSJeff Kirsher /** 347f844a0eaSJeff Kirsher * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages 348f844a0eaSJeff Kirsher */ 349f844a0eaSJeff Kirsher struct bfi_ioc_ctrl_req { 350f844a0eaSJeff Kirsher struct bfi_mhdr mh; 351078086f3SRasesh Mody u16 clscode; 352078086f3SRasesh Mody u16 rsvd; 353f844a0eaSJeff Kirsher u32 tv_sec; 354f844a0eaSJeff Kirsher }; 355f844a0eaSJeff Kirsher 356f844a0eaSJeff Kirsher /** 357f844a0eaSJeff Kirsher * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages 358f844a0eaSJeff Kirsher */ 359f844a0eaSJeff Kirsher struct bfi_ioc_ctrl_reply { 360f844a0eaSJeff Kirsher struct bfi_mhdr mh; /*!< Common msg header */ 361f844a0eaSJeff Kirsher u8 status; /*!< enable/disable status */ 362078086f3SRasesh Mody u8 port_mode; /*!< enum bfa_mode */ 363078086f3SRasesh Mody u8 cap_bm; /*!< capability bit mask */ 364078086f3SRasesh Mody u8 rsvd; 365f844a0eaSJeff Kirsher }; 366f844a0eaSJeff Kirsher 367f844a0eaSJeff Kirsher #define BFI_IOC_MSGSZ 8 368f844a0eaSJeff Kirsher /** 369f844a0eaSJeff Kirsher * H2I Messages 370f844a0eaSJeff Kirsher */ 371f844a0eaSJeff Kirsher union bfi_ioc_h2i_msg_u { 372f844a0eaSJeff Kirsher struct bfi_mhdr mh; 373f844a0eaSJeff Kirsher struct bfi_ioc_ctrl_req enable_req; 374f844a0eaSJeff Kirsher struct bfi_ioc_ctrl_req disable_req; 375f844a0eaSJeff Kirsher struct bfi_ioc_getattr_req getattr_req; 376f844a0eaSJeff Kirsher u32 mboxmsg[BFI_IOC_MSGSZ]; 377f844a0eaSJeff Kirsher }; 378f844a0eaSJeff Kirsher 379f844a0eaSJeff Kirsher /** 380f844a0eaSJeff Kirsher * I2H Messages 381f844a0eaSJeff Kirsher */ 382f844a0eaSJeff Kirsher union bfi_ioc_i2h_msg_u { 383f844a0eaSJeff Kirsher struct bfi_mhdr mh; 384078086f3SRasesh Mody struct bfi_ioc_ctrl_reply fw_event; 385f844a0eaSJeff Kirsher u32 mboxmsg[BFI_IOC_MSGSZ]; 386f844a0eaSJeff Kirsher }; 387f844a0eaSJeff Kirsher 388af027a34SRasesh Mody /** 389af027a34SRasesh Mody *---------------------------------------------------------------------- 390af027a34SRasesh Mody * MSGQ 391af027a34SRasesh Mody *---------------------------------------------------------------------- 392af027a34SRasesh Mody */ 393af027a34SRasesh Mody 394af027a34SRasesh Mody enum bfi_msgq_h2i_msgs { 395af027a34SRasesh Mody BFI_MSGQ_H2I_INIT_REQ = 1, 396af027a34SRasesh Mody BFI_MSGQ_H2I_DOORBELL_PI = 2, 397af027a34SRasesh Mody BFI_MSGQ_H2I_DOORBELL_CI = 3, 398af027a34SRasesh Mody BFI_MSGQ_H2I_CMDQ_COPY_RSP = 4, 399af027a34SRasesh Mody }; 400af027a34SRasesh Mody 401af027a34SRasesh Mody enum bfi_msgq_i2h_msgs { 402af027a34SRasesh Mody BFI_MSGQ_I2H_INIT_RSP = BFA_I2HM(BFI_MSGQ_H2I_INIT_REQ), 403af027a34SRasesh Mody BFI_MSGQ_I2H_DOORBELL_PI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_PI), 404af027a34SRasesh Mody BFI_MSGQ_I2H_DOORBELL_CI = BFA_I2HM(BFI_MSGQ_H2I_DOORBELL_CI), 405af027a34SRasesh Mody BFI_MSGQ_I2H_CMDQ_COPY_REQ = BFA_I2HM(BFI_MSGQ_H2I_CMDQ_COPY_RSP), 406af027a34SRasesh Mody }; 407af027a34SRasesh Mody 408af027a34SRasesh Mody /* Messages(commands/responsed/AENS will have the following header */ 409af027a34SRasesh Mody struct bfi_msgq_mhdr { 410af027a34SRasesh Mody u8 msg_class; 411af027a34SRasesh Mody u8 msg_id; 412af027a34SRasesh Mody u16 msg_token; 413af027a34SRasesh Mody u16 num_entries; 414af027a34SRasesh Mody u8 enet_id; 415af027a34SRasesh Mody u8 rsvd[1]; 416af027a34SRasesh Mody }; 417af027a34SRasesh Mody 418af027a34SRasesh Mody #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \ 419af027a34SRasesh Mody (_mh).msg_class = (_mc); \ 420af027a34SRasesh Mody (_mh).msg_id = (_mid); \ 421af027a34SRasesh Mody (_mh).msg_token = (_tok); \ 422af027a34SRasesh Mody (_mh).enet_id = (_enet_id); \ 423af027a34SRasesh Mody } while (0) 424af027a34SRasesh Mody 425af027a34SRasesh Mody /* 426af027a34SRasesh Mody * Mailbox for messaging interface 427af027a34SRasesh Mody */ 428af027a34SRasesh Mody #define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */ 429af027a34SRasesh Mody #define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */ 430af027a34SRasesh Mody 431af027a34SRasesh Mody #define bfi_msgq_num_cmd_entries(_size) \ 432af027a34SRasesh Mody (((_size) + BFI_MSGQ_CMD_ENTRY_SIZE - 1) / BFI_MSGQ_CMD_ENTRY_SIZE) 433af027a34SRasesh Mody 434af027a34SRasesh Mody struct bfi_msgq { 435af027a34SRasesh Mody union bfi_addr_u addr; 436af027a34SRasesh Mody u16 q_depth; /* Total num of entries in the queue */ 437af027a34SRasesh Mody u8 rsvd[2]; 438af027a34SRasesh Mody }; 439af027a34SRasesh Mody 440af027a34SRasesh Mody /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */ 441af027a34SRasesh Mody struct bfi_msgq_cfg_req { 442af027a34SRasesh Mody struct bfi_mhdr mh; 443af027a34SRasesh Mody struct bfi_msgq cmdq; 444af027a34SRasesh Mody struct bfi_msgq rspq; 445af027a34SRasesh Mody }; 446af027a34SRasesh Mody 447af027a34SRasesh Mody /* BFI_ENET_MSGQ_CFG_RSP */ 448af027a34SRasesh Mody struct bfi_msgq_cfg_rsp { 449af027a34SRasesh Mody struct bfi_mhdr mh; 450af027a34SRasesh Mody u8 cmd_status; 451af027a34SRasesh Mody u8 rsvd[3]; 452af027a34SRasesh Mody }; 453af027a34SRasesh Mody 454af027a34SRasesh Mody /* BFI_MSGQ_H2I_DOORBELL */ 455af027a34SRasesh Mody struct bfi_msgq_h2i_db { 456af027a34SRasesh Mody struct bfi_mhdr mh; 457af027a34SRasesh Mody union { 458af027a34SRasesh Mody u16 cmdq_pi; 459af027a34SRasesh Mody u16 rspq_ci; 460af027a34SRasesh Mody } idx; 461af027a34SRasesh Mody }; 462af027a34SRasesh Mody 463af027a34SRasesh Mody /* BFI_MSGQ_I2H_DOORBELL */ 464af027a34SRasesh Mody struct bfi_msgq_i2h_db { 465af027a34SRasesh Mody struct bfi_mhdr mh; 466af027a34SRasesh Mody union { 467af027a34SRasesh Mody u16 rspq_pi; 468af027a34SRasesh Mody u16 cmdq_ci; 469af027a34SRasesh Mody } idx; 470af027a34SRasesh Mody }; 471af027a34SRasesh Mody 472af027a34SRasesh Mody #define BFI_CMD_COPY_SZ 28 473af027a34SRasesh Mody 474af027a34SRasesh Mody /* BFI_MSGQ_H2I_CMD_COPY_RSP */ 475af027a34SRasesh Mody struct bfi_msgq_h2i_cmdq_copy_rsp { 476af027a34SRasesh Mody struct bfi_mhdr mh; 477af027a34SRasesh Mody u8 data[BFI_CMD_COPY_SZ]; 478af027a34SRasesh Mody }; 479af027a34SRasesh Mody 480af027a34SRasesh Mody /* BFI_MSGQ_I2H_CMD_COPY_REQ */ 481af027a34SRasesh Mody struct bfi_msgq_i2h_cmdq_copy_req { 482af027a34SRasesh Mody struct bfi_mhdr mh; 483af027a34SRasesh Mody u16 offset; 484af027a34SRasesh Mody u16 len; 485af027a34SRasesh Mody }; 486af027a34SRasesh Mody 487*72a9730bSKrishna Gudipati /* 488*72a9730bSKrishna Gudipati * FLASH module specific 489*72a9730bSKrishna Gudipati */ 490*72a9730bSKrishna Gudipati enum bfi_flash_h2i_msgs { 491*72a9730bSKrishna Gudipati BFI_FLASH_H2I_QUERY_REQ = 1, 492*72a9730bSKrishna Gudipati BFI_FLASH_H2I_ERASE_REQ = 2, 493*72a9730bSKrishna Gudipati BFI_FLASH_H2I_WRITE_REQ = 3, 494*72a9730bSKrishna Gudipati BFI_FLASH_H2I_READ_REQ = 4, 495*72a9730bSKrishna Gudipati BFI_FLASH_H2I_BOOT_VER_REQ = 5, 496*72a9730bSKrishna Gudipati }; 497*72a9730bSKrishna Gudipati 498*72a9730bSKrishna Gudipati enum bfi_flash_i2h_msgs { 499*72a9730bSKrishna Gudipati BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1), 500*72a9730bSKrishna Gudipati BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2), 501*72a9730bSKrishna Gudipati BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3), 502*72a9730bSKrishna Gudipati BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4), 503*72a9730bSKrishna Gudipati BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5), 504*72a9730bSKrishna Gudipati BFI_FLASH_I2H_EVENT = BFA_I2HM(127), 505*72a9730bSKrishna Gudipati }; 506*72a9730bSKrishna Gudipati 507*72a9730bSKrishna Gudipati /* 508*72a9730bSKrishna Gudipati * Flash query request 509*72a9730bSKrishna Gudipati */ 510*72a9730bSKrishna Gudipati struct bfi_flash_query_req { 511*72a9730bSKrishna Gudipati struct bfi_mhdr mh; /* Common msg header */ 512*72a9730bSKrishna Gudipati struct bfi_alen alen; 513*72a9730bSKrishna Gudipati }; 514*72a9730bSKrishna Gudipati 515*72a9730bSKrishna Gudipati /* 516*72a9730bSKrishna Gudipati * Flash write request 517*72a9730bSKrishna Gudipati */ 518*72a9730bSKrishna Gudipati struct bfi_flash_write_req { 519*72a9730bSKrishna Gudipati struct bfi_mhdr mh; /* Common msg header */ 520*72a9730bSKrishna Gudipati struct bfi_alen alen; 521*72a9730bSKrishna Gudipati u32 type; /* partition type */ 522*72a9730bSKrishna Gudipati u8 instance; /* partition instance */ 523*72a9730bSKrishna Gudipati u8 last; 524*72a9730bSKrishna Gudipati u8 rsv[2]; 525*72a9730bSKrishna Gudipati u32 offset; 526*72a9730bSKrishna Gudipati u32 length; 527*72a9730bSKrishna Gudipati }; 528*72a9730bSKrishna Gudipati 529*72a9730bSKrishna Gudipati /* 530*72a9730bSKrishna Gudipati * Flash read request 531*72a9730bSKrishna Gudipati */ 532*72a9730bSKrishna Gudipati struct bfi_flash_read_req { 533*72a9730bSKrishna Gudipati struct bfi_mhdr mh; /* Common msg header */ 534*72a9730bSKrishna Gudipati u32 type; /* partition type */ 535*72a9730bSKrishna Gudipati u8 instance; /* partition instance */ 536*72a9730bSKrishna Gudipati u8 rsv[3]; 537*72a9730bSKrishna Gudipati u32 offset; 538*72a9730bSKrishna Gudipati u32 length; 539*72a9730bSKrishna Gudipati struct bfi_alen alen; 540*72a9730bSKrishna Gudipati }; 541*72a9730bSKrishna Gudipati 542*72a9730bSKrishna Gudipati /* 543*72a9730bSKrishna Gudipati * Flash query response 544*72a9730bSKrishna Gudipati */ 545*72a9730bSKrishna Gudipati struct bfi_flash_query_rsp { 546*72a9730bSKrishna Gudipati struct bfi_mhdr mh; /* Common msg header */ 547*72a9730bSKrishna Gudipati u32 status; 548*72a9730bSKrishna Gudipati }; 549*72a9730bSKrishna Gudipati 550*72a9730bSKrishna Gudipati /* 551*72a9730bSKrishna Gudipati * Flash read response 552*72a9730bSKrishna Gudipati */ 553*72a9730bSKrishna Gudipati struct bfi_flash_read_rsp { 554*72a9730bSKrishna Gudipati struct bfi_mhdr mh; /* Common msg header */ 555*72a9730bSKrishna Gudipati u32 type; /* partition type */ 556*72a9730bSKrishna Gudipati u8 instance; /* partition instance */ 557*72a9730bSKrishna Gudipati u8 rsv[3]; 558*72a9730bSKrishna Gudipati u32 status; 559*72a9730bSKrishna Gudipati u32 length; 560*72a9730bSKrishna Gudipati }; 561*72a9730bSKrishna Gudipati 562*72a9730bSKrishna Gudipati /* 563*72a9730bSKrishna Gudipati * Flash write response 564*72a9730bSKrishna Gudipati */ 565*72a9730bSKrishna Gudipati struct bfi_flash_write_rsp { 566*72a9730bSKrishna Gudipati struct bfi_mhdr mh; /* Common msg header */ 567*72a9730bSKrishna Gudipati u32 type; /* partition type */ 568*72a9730bSKrishna Gudipati u8 instance; /* partition instance */ 569*72a9730bSKrishna Gudipati u8 rsv[3]; 570*72a9730bSKrishna Gudipati u32 status; 571*72a9730bSKrishna Gudipati u32 length; 572*72a9730bSKrishna Gudipati }; 573*72a9730bSKrishna Gudipati 574f844a0eaSJeff Kirsher #pragma pack() 575f844a0eaSJeff Kirsher 576f844a0eaSJeff Kirsher #endif /* __BFI_H__ */ 577