xref: /openbmc/linux/drivers/net/ethernet/amazon/ena/ena_netdev.h (revision aeddf9a2731de8235b2b433533d06ee7dc73d233)
12246cbc2SShay Agroskin /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
21738cd3eSNetanel Belgazal /*
32246cbc2SShay Agroskin  * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
41738cd3eSNetanel Belgazal  */
51738cd3eSNetanel Belgazal 
61738cd3eSNetanel Belgazal #ifndef ENA_H
71738cd3eSNetanel Belgazal #define ENA_H
81738cd3eSNetanel Belgazal 
91738cd3eSNetanel Belgazal #include <linux/bitops.h>
10282faf61SArthur Kiyanovski #include <linux/dim.h>
111738cd3eSNetanel Belgazal #include <linux/etherdevice.h>
12838c93dcSSameeh Jubran #include <linux/if_vlan.h>
131738cd3eSNetanel Belgazal #include <linux/inetdevice.h>
141738cd3eSNetanel Belgazal #include <linux/interrupt.h>
151738cd3eSNetanel Belgazal #include <linux/netdevice.h>
161738cd3eSNetanel Belgazal #include <linux/skbuff.h>
1792272ec4SJakub Kicinski #include <net/xdp.h>
183b80b73aSJakub Kicinski #include <uapi/linux/bpf.h>
191738cd3eSNetanel Belgazal 
201738cd3eSNetanel Belgazal #include "ena_com.h"
211738cd3eSNetanel Belgazal #include "ena_eth_com.h"
221738cd3eSNetanel Belgazal 
2392040c6dSArthur Kiyanovski #define DRV_MODULE_GEN_MAJOR	2
2492040c6dSArthur Kiyanovski #define DRV_MODULE_GEN_MINOR	1
2592040c6dSArthur Kiyanovski #define DRV_MODULE_GEN_SUBMINOR 0
2692040c6dSArthur Kiyanovski 
271738cd3eSNetanel Belgazal #define DRV_MODULE_NAME		"ena"
2892040c6dSArthur Kiyanovski 
291738cd3eSNetanel Belgazal #define DEVICE_NAME	"Elastic Network Adapter (ENA)"
301738cd3eSNetanel Belgazal 
311738cd3eSNetanel Belgazal /* 1 for AENQ + ADMIN */
3206443684SNetanel Belgazal #define ENA_ADMIN_MSIX_VEC		1
3306443684SNetanel Belgazal #define ENA_MAX_MSIX_VEC(io_queues)	(ENA_ADMIN_MSIX_VEC + (io_queues))
3406443684SNetanel Belgazal 
35bd791175SArthur Kiyanovski /* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the
36bd791175SArthur Kiyanovski  * driver passes 0.
37bd791175SArthur Kiyanovski  * Since the max packet size the ENA handles is ~9kB limit the buffer length to
38bd791175SArthur Kiyanovski  * 16kB.
39bd791175SArthur Kiyanovski  */
40bd791175SArthur Kiyanovski #if PAGE_SIZE > SZ_16K
41caec6619SGavin Shan #define ENA_PAGE_SIZE (_AC(SZ_16K, UL))
42bd791175SArthur Kiyanovski #else
43bd791175SArthur Kiyanovski #define ENA_PAGE_SIZE PAGE_SIZE
44bd791175SArthur Kiyanovski #endif
45bd791175SArthur Kiyanovski 
4606443684SNetanel Belgazal #define ENA_MIN_MSIX_VEC		2
471738cd3eSNetanel Belgazal 
481738cd3eSNetanel Belgazal #define ENA_REG_BAR			0
491738cd3eSNetanel Belgazal #define ENA_MEM_BAR			2
501738cd3eSNetanel Belgazal #define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))
511738cd3eSNetanel Belgazal 
521738cd3eSNetanel Belgazal #define ENA_DEFAULT_RING_SIZE	(1024)
5313ca32a6SSameeh Jubran #define ENA_MIN_RING_SIZE	(256)
5413ca32a6SSameeh Jubran 
55f7d625adSDavid Arinzon #define ENA_MIN_RX_BUF_SIZE (2048)
56f7d625adSDavid Arinzon 
572413ea97SSameeh Jubran #define ENA_MIN_NUM_IO_QUEUES	(1)
582413ea97SSameeh Jubran 
591738cd3eSNetanel Belgazal #define ENA_TX_WAKEUP_THRESH		(MAX_SKB_FRAGS + 2)
6087731f0cSArthur Kiyanovski #define ENA_DEFAULT_RX_COPYBREAK	(256 - NET_IP_ALIGN)
611738cd3eSNetanel Belgazal 
621738cd3eSNetanel Belgazal #define ENA_MIN_MTU		128
631738cd3eSNetanel Belgazal 
641738cd3eSNetanel Belgazal #define ENA_NAME_MAX_LEN	20
651738cd3eSNetanel Belgazal #define ENA_IRQNAME_SIZE	40
661738cd3eSNetanel Belgazal 
671738cd3eSNetanel Belgazal #define ENA_PKT_MAX_BUFS	19
681738cd3eSNetanel Belgazal 
691738cd3eSNetanel Belgazal #define ENA_RX_RSS_TABLE_LOG_SIZE  7
701738cd3eSNetanel Belgazal #define ENA_RX_RSS_TABLE_SIZE	(1 << ENA_RX_RSS_TABLE_LOG_SIZE)
711738cd3eSNetanel Belgazal 
721738cd3eSNetanel Belgazal /* The number of tx packet completions that will be handled each NAPI poll
731738cd3eSNetanel Belgazal  * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER.
741738cd3eSNetanel Belgazal  */
751738cd3eSNetanel Belgazal #define ENA_TX_POLL_BUDGET_DIVIDER	4
761738cd3eSNetanel Belgazal 
770574bb80SArthur Kiyanovski /* Refill Rx queue when number of required descriptors is above
780574bb80SArthur Kiyanovski  * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER or ENA_RX_REFILL_THRESH_PACKET
791738cd3eSNetanel Belgazal  */
801738cd3eSNetanel Belgazal #define ENA_RX_REFILL_THRESH_DIVIDER	8
810574bb80SArthur Kiyanovski #define ENA_RX_REFILL_THRESH_PACKET	256
821738cd3eSNetanel Belgazal 
831738cd3eSNetanel Belgazal /* Number of queues to check for missing queues per timer service */
841738cd3eSNetanel Belgazal #define ENA_MONITORED_TX_QUEUES	4
851738cd3eSNetanel Belgazal /* Max timeout packets before device reset */
867102a18aSNetanel Belgazal #define MAX_NUM_OF_TIMEOUTED_PACKETS 128
871738cd3eSNetanel Belgazal 
881738cd3eSNetanel Belgazal #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
891738cd3eSNetanel Belgazal 
901738cd3eSNetanel Belgazal #define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
911738cd3eSNetanel Belgazal #define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \
921738cd3eSNetanel Belgazal 	(((idx) + (n)) & ((ring_size) - 1))
931738cd3eSNetanel Belgazal 
941738cd3eSNetanel Belgazal #define ENA_IO_TXQ_IDX(q)	(2 * (q))
951738cd3eSNetanel Belgazal #define ENA_IO_RXQ_IDX(q)	(2 * (q) + 1)
9692569fd2SArthur Kiyanovski #define ENA_IO_TXQ_IDX_TO_COMBINED_IDX(q)	((q) / 2)
9792569fd2SArthur Kiyanovski #define ENA_IO_RXQ_IDX_TO_COMBINED_IDX(q)	(((q) - 1) / 2)
981738cd3eSNetanel Belgazal 
991738cd3eSNetanel Belgazal #define ENA_MGMNT_IRQ_IDX		0
1001738cd3eSNetanel Belgazal #define ENA_IO_IRQ_FIRST_IDX		1
1011738cd3eSNetanel Belgazal #define ENA_IO_IRQ_IDX(q)		(ENA_IO_IRQ_FIRST_IDX + (q))
1021738cd3eSNetanel Belgazal 
1034bb7f4cfSArthur Kiyanovski #define ENA_ADMIN_POLL_DELAY_US 100
1044bb7f4cfSArthur Kiyanovski 
1051738cd3eSNetanel Belgazal /* ENA device should send keep alive msg every 1 sec.
1067102a18aSNetanel Belgazal  * We wait for 6 sec just to be on the safe side.
1071738cd3eSNetanel Belgazal  */
1087102a18aSNetanel Belgazal #define ENA_DEVICE_KALIVE_TIMEOUT	(6 * HZ)
1098510e1a3SNetanel Belgazal #define ENA_MAX_NO_INTERRUPT_ITERATIONS 3
1101738cd3eSNetanel Belgazal 
1111738cd3eSNetanel Belgazal #define ENA_MMIO_DISABLE_REG_READ	BIT(0)
1121738cd3eSNetanel Belgazal 
1131738cd3eSNetanel Belgazal struct ena_irq {
1141738cd3eSNetanel Belgazal 	irq_handler_t handler;
1151738cd3eSNetanel Belgazal 	void *data;
1161738cd3eSNetanel Belgazal 	int cpu;
1171738cd3eSNetanel Belgazal 	u32 vector;
1181738cd3eSNetanel Belgazal 	cpumask_t affinity_hint_mask;
1191738cd3eSNetanel Belgazal 	char name[ENA_IRQNAME_SIZE];
1201738cd3eSNetanel Belgazal };
1211738cd3eSNetanel Belgazal 
1221738cd3eSNetanel Belgazal struct ena_napi {
123e4ac382eSShay Agroskin 	u8 first_interrupt ____cacheline_aligned;
124e4ac382eSShay Agroskin 	u8 interrupts_masked;
125e4ac382eSShay Agroskin 	struct napi_struct napi;
1261738cd3eSNetanel Belgazal 	struct ena_ring *tx_ring;
1271738cd3eSNetanel Belgazal 	struct ena_ring *rx_ring;
1281738cd3eSNetanel Belgazal 	u32 qid;
129282faf61SArthur Kiyanovski 	struct dim dim;
1301738cd3eSNetanel Belgazal };
1311738cd3eSNetanel Belgazal 
1321738cd3eSNetanel Belgazal struct ena_tx_buffer {
1331738cd3eSNetanel Belgazal 	struct sk_buff *skb;
1341738cd3eSNetanel Belgazal 	/* num of ena desc for this specific skb
1351738cd3eSNetanel Belgazal 	 * (includes data desc and metadata desc)
1361738cd3eSNetanel Belgazal 	 */
1371738cd3eSNetanel Belgazal 	u32 tx_descs;
1381738cd3eSNetanel Belgazal 	/* num of buffers used by this skb */
1391738cd3eSNetanel Belgazal 	u32 num_of_bufs;
140800c55cbSNetanel Belgazal 
141548c4940SSameeh Jubran 	/* XDP buffer structure which is used for sending packets in
142548c4940SSameeh Jubran 	 * the xdp queues
143548c4940SSameeh Jubran 	 */
144548c4940SSameeh Jubran 	struct xdp_frame *xdpf;
145548c4940SSameeh Jubran 
14638005ca8SArthur Kiyanovski 	/* Indicate if bufs[0] map the linear data of the skb. */
14738005ca8SArthur Kiyanovski 	u8 map_linear_data;
14838005ca8SArthur Kiyanovski 
149800c55cbSNetanel Belgazal 	/* Used for detect missing tx packets to limit the number of prints */
150800c55cbSNetanel Belgazal 	u32 print_once;
151800c55cbSNetanel Belgazal 	/* Save the last jiffies to detect missing tx packets
152800c55cbSNetanel Belgazal 	 *
153800c55cbSNetanel Belgazal 	 * sets to non zero value on ena_start_xmit and set to zero on
154800c55cbSNetanel Belgazal 	 * napi and timer_Service_routine.
155800c55cbSNetanel Belgazal 	 *
156800c55cbSNetanel Belgazal 	 * while this value is not protected by lock,
157800c55cbSNetanel Belgazal 	 * a given packet is not expected to be handled by ena_start_xmit
158800c55cbSNetanel Belgazal 	 * and by napi/timer_service at the same time.
159800c55cbSNetanel Belgazal 	 */
1601738cd3eSNetanel Belgazal 	unsigned long last_jiffies;
1611738cd3eSNetanel Belgazal 	struct ena_com_buf bufs[ENA_PKT_MAX_BUFS];
1621738cd3eSNetanel Belgazal } ____cacheline_aligned;
1631738cd3eSNetanel Belgazal 
1641738cd3eSNetanel Belgazal struct ena_rx_buffer {
1651738cd3eSNetanel Belgazal 	struct sk_buff *skb;
1661738cd3eSNetanel Belgazal 	struct page *page;
167f7d625adSDavid Arinzon 	dma_addr_t dma_addr;
1681738cd3eSNetanel Belgazal 	u32 page_offset;
169f7d625adSDavid Arinzon 	u32 buf_offset;
1701738cd3eSNetanel Belgazal 	struct ena_com_buf ena_buf;
1711738cd3eSNetanel Belgazal } ____cacheline_aligned;
1721738cd3eSNetanel Belgazal 
1731738cd3eSNetanel Belgazal struct ena_stats_tx {
1741738cd3eSNetanel Belgazal 	u64 cnt;
1751738cd3eSNetanel Belgazal 	u64 bytes;
1761738cd3eSNetanel Belgazal 	u64 queue_stop;
1771738cd3eSNetanel Belgazal 	u64 prepare_ctx_err;
1781738cd3eSNetanel Belgazal 	u64 queue_wakeup;
1791738cd3eSNetanel Belgazal 	u64 dma_mapping_err;
1801738cd3eSNetanel Belgazal 	u64 linearize;
1811738cd3eSNetanel Belgazal 	u64 linearize_failed;
1821738cd3eSNetanel Belgazal 	u64 napi_comp;
1831738cd3eSNetanel Belgazal 	u64 tx_poll;
1841738cd3eSNetanel Belgazal 	u64 doorbells;
1851738cd3eSNetanel Belgazal 	u64 bad_req_id;
18638005ca8SArthur Kiyanovski 	u64 llq_buffer_copy;
18711095fdbSNetanel Belgazal 	u64 missed_tx;
188d4a8b3bbSSameeh Jubran 	u64 unmask_interrupt;
1890ee251cdSShay Agroskin 	u64 last_napi_jiffies;
1901738cd3eSNetanel Belgazal };
1911738cd3eSNetanel Belgazal 
1921738cd3eSNetanel Belgazal struct ena_stats_rx {
1931738cd3eSNetanel Belgazal 	u64 cnt;
1941738cd3eSNetanel Belgazal 	u64 bytes;
195d2eecc6eSSameeh Jubran 	u64 rx_copybreak_pkt;
196d2eecc6eSSameeh Jubran 	u64 csum_good;
1971738cd3eSNetanel Belgazal 	u64 refil_partial;
198d0e8831dSArthur Kiyanovski 	u64 csum_bad;
1991738cd3eSNetanel Belgazal 	u64 page_alloc_fail;
2001738cd3eSNetanel Belgazal 	u64 skb_alloc_fail;
2011738cd3eSNetanel Belgazal 	u64 dma_mapping_err;
2021738cd3eSNetanel Belgazal 	u64 bad_desc_num;
203ad974baeSNetanel Belgazal 	u64 bad_req_id;
204a3af7c18SNetanel Belgazal 	u64 empty_rx_ring;
205cb36bb36SArthur Kiyanovski 	u64 csum_unchecked;
2064cd28b21SSameeh Jubran 	u64 xdp_aborted;
2074cd28b21SSameeh Jubran 	u64 xdp_drop;
2084cd28b21SSameeh Jubran 	u64 xdp_pass;
2094cd28b21SSameeh Jubran 	u64 xdp_tx;
2104cd28b21SSameeh Jubran 	u64 xdp_invalid;
211a318c70aSShay Agroskin 	u64 xdp_redirect;
2121738cd3eSNetanel Belgazal };
2131738cd3eSNetanel Belgazal 
2141738cd3eSNetanel Belgazal struct ena_ring {
215ad974baeSNetanel Belgazal 	/* Holds the empty requests for TX/RX
216ad974baeSNetanel Belgazal 	 * out of order completions
217ad974baeSNetanel Belgazal 	 */
218f9172498SSameeh Jubran 	u16 *free_ids;
219ad974baeSNetanel Belgazal 
2201738cd3eSNetanel Belgazal 	union {
2211738cd3eSNetanel Belgazal 		struct ena_tx_buffer *tx_buffer_info;
2221738cd3eSNetanel Belgazal 		struct ena_rx_buffer *rx_buffer_info;
2231738cd3eSNetanel Belgazal 	};
2241738cd3eSNetanel Belgazal 
2251738cd3eSNetanel Belgazal 	/* cache ptr to avoid using the adapter */
2261738cd3eSNetanel Belgazal 	struct device *dev;
2271738cd3eSNetanel Belgazal 	struct pci_dev *pdev;
2281738cd3eSNetanel Belgazal 	struct napi_struct *napi;
2291738cd3eSNetanel Belgazal 	struct net_device *netdev;
2301738cd3eSNetanel Belgazal 	struct ena_com_dev *ena_dev;
2311738cd3eSNetanel Belgazal 	struct ena_adapter *adapter;
2321738cd3eSNetanel Belgazal 	struct ena_com_io_cq *ena_com_io_cq;
2331738cd3eSNetanel Belgazal 	struct ena_com_io_sq *ena_com_io_sq;
234838c93dcSSameeh Jubran 	struct bpf_prog *xdp_bpf_prog;
235838c93dcSSameeh Jubran 	struct xdp_rxq_info xdp_rxq;
236f1a25589SShay Agroskin 	spinlock_t xdp_tx_lock;	/* synchronize XDP TX/Redirect traffic */
237e4ac382eSShay Agroskin 	/* Used for rx queues only to point to the xdp tx ring, to
238e4ac382eSShay Agroskin 	 * which traffic should be redirected from this rx ring.
239e4ac382eSShay Agroskin 	 */
240e4ac382eSShay Agroskin 	struct ena_ring *xdp_ring;
2411738cd3eSNetanel Belgazal 
2421738cd3eSNetanel Belgazal 	u16 next_to_use;
2431738cd3eSNetanel Belgazal 	u16 next_to_clean;
2441738cd3eSNetanel Belgazal 	u16 rx_copybreak;
245838c93dcSSameeh Jubran 	u16 rx_headroom;
2461738cd3eSNetanel Belgazal 	u16 qid;
2471738cd3eSNetanel Belgazal 	u16 mtu;
2481738cd3eSNetanel Belgazal 	u16 sgl_size;
2491738cd3eSNetanel Belgazal 
2501738cd3eSNetanel Belgazal 	/* The maximum header length the device can handle */
2511738cd3eSNetanel Belgazal 	u8 tx_max_header_size;
2521738cd3eSNetanel Belgazal 
2530e3a3f6dSArthur Kiyanovski 	bool disable_meta_caching;
2548510e1a3SNetanel Belgazal 	u16 no_interrupt_event_cnt;
2558510e1a3SNetanel Belgazal 
256a8ee104fSDavid Arinzon 	/* cpu and NUMA for TPH */
2571738cd3eSNetanel Belgazal 	int cpu;
258a8ee104fSDavid Arinzon 	int numa_node;
259a8ee104fSDavid Arinzon 
2601738cd3eSNetanel Belgazal 	/* number of tx/rx_buffer_info's entries */
2611738cd3eSNetanel Belgazal 	int ring_size;
2621738cd3eSNetanel Belgazal 
2631738cd3eSNetanel Belgazal 	enum ena_admin_placement_policy_type tx_mem_queue_type;
2641738cd3eSNetanel Belgazal 
2651738cd3eSNetanel Belgazal 	struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS];
2661738cd3eSNetanel Belgazal 	u32  smoothed_interval;
2671738cd3eSNetanel Belgazal 	u32  per_napi_packets;
268282faf61SArthur Kiyanovski 	u16 non_empty_napi_events;
2691738cd3eSNetanel Belgazal 	struct u64_stats_sync syncp;
2701738cd3eSNetanel Belgazal 	union {
2711738cd3eSNetanel Belgazal 		struct ena_stats_tx tx_stats;
2721738cd3eSNetanel Belgazal 		struct ena_stats_rx rx_stats;
2731738cd3eSNetanel Belgazal 	};
27438005ca8SArthur Kiyanovski 
27538005ca8SArthur Kiyanovski 	u8 *push_buf_intermediate_buf;
276a3af7c18SNetanel Belgazal 	int empty_rx_queue;
2771738cd3eSNetanel Belgazal } ____cacheline_aligned;
2781738cd3eSNetanel Belgazal 
2791738cd3eSNetanel Belgazal struct ena_stats_dev {
2801738cd3eSNetanel Belgazal 	u64 tx_timeout;
2818c5c7abdSNetanel Belgazal 	u64 suspend;
2828c5c7abdSNetanel Belgazal 	u64 resume;
2831738cd3eSNetanel Belgazal 	u64 wd_expired;
2841738cd3eSNetanel Belgazal 	u64 interface_up;
2851738cd3eSNetanel Belgazal 	u64 interface_down;
2861738cd3eSNetanel Belgazal 	u64 admin_q_pause;
287d81db240SNetanel Belgazal 	u64 rx_drops;
2885c665f8cSSameeh Jubran 	u64 tx_drops;
2891738cd3eSNetanel Belgazal };
2901738cd3eSNetanel Belgazal 
2911738cd3eSNetanel Belgazal enum ena_flags_t {
2921738cd3eSNetanel Belgazal 	ENA_FLAG_DEVICE_RUNNING,
2931738cd3eSNetanel Belgazal 	ENA_FLAG_DEV_UP,
2941738cd3eSNetanel Belgazal 	ENA_FLAG_LINK_UP,
29506443684SNetanel Belgazal 	ENA_FLAG_MSIX_ENABLED,
296d18e4f68SNetanel Belgazal 	ENA_FLAG_TRIGGER_RESET,
297d18e4f68SNetanel Belgazal 	ENA_FLAG_ONGOING_RESET
2981738cd3eSNetanel Belgazal };
2991738cd3eSNetanel Belgazal 
3001738cd3eSNetanel Belgazal /* adapter specific private data structure */
3011738cd3eSNetanel Belgazal struct ena_adapter {
3021738cd3eSNetanel Belgazal 	struct ena_com_dev *ena_dev;
3031738cd3eSNetanel Belgazal 	/* OS defined structs */
3041738cd3eSNetanel Belgazal 	struct net_device *netdev;
3051738cd3eSNetanel Belgazal 	struct pci_dev *pdev;
3061738cd3eSNetanel Belgazal 
3071738cd3eSNetanel Belgazal 	/* rx packets that shorter that this len will be copied to the skb
3081738cd3eSNetanel Belgazal 	 * header
3091738cd3eSNetanel Belgazal 	 */
3101738cd3eSNetanel Belgazal 	u32 rx_copybreak;
3111738cd3eSNetanel Belgazal 	u32 max_mtu;
3121738cd3eSNetanel Belgazal 
313736ce3f4SSameeh Jubran 	u32 num_io_queues;
314736ce3f4SSameeh Jubran 	u32 max_num_io_queues;
3151738cd3eSNetanel Belgazal 
3161738cd3eSNetanel Belgazal 	int msix_vecs;
3171738cd3eSNetanel Belgazal 
31882ef30f1SNetanel Belgazal 	u32 missing_tx_completion_threshold;
31982ef30f1SNetanel Belgazal 
32013ca32a6SSameeh Jubran 	u32 requested_tx_ring_size;
32113ca32a6SSameeh Jubran 	u32 requested_rx_ring_size;
3221738cd3eSNetanel Belgazal 
32331aa9857SSameeh Jubran 	u32 max_tx_ring_size;
32431aa9857SSameeh Jubran 	u32 max_rx_ring_size;
32531aa9857SSameeh Jubran 
3261738cd3eSNetanel Belgazal 	u32 msg_enable;
3271738cd3eSNetanel Belgazal 
3281e366688SDavid Arinzon 	/* large_llq_header_enabled is used for two purposes:
3291e366688SDavid Arinzon 	 * 1. Indicates that large LLQ has been requested.
3301e366688SDavid Arinzon 	 * 2. Indicates whether large LLQ is set or not after device
3311e366688SDavid Arinzon 	 *    initialization / configuration.
3321e366688SDavid Arinzon 	 */
3331e366688SDavid Arinzon 	bool large_llq_header_enabled;
3341e366688SDavid Arinzon 	bool large_llq_header_supported;
3351e366688SDavid Arinzon 
3361738cd3eSNetanel Belgazal 	u16 max_tx_sgl_size;
3371738cd3eSNetanel Belgazal 	u16 max_rx_sgl_size;
3381738cd3eSNetanel Belgazal 
3391738cd3eSNetanel Belgazal 	u8 mac_addr[ETH_ALEN];
3401738cd3eSNetanel Belgazal 
34182ef30f1SNetanel Belgazal 	unsigned long keep_alive_timeout;
34282ef30f1SNetanel Belgazal 	unsigned long missing_tx_completion_to;
34382ef30f1SNetanel Belgazal 
3441738cd3eSNetanel Belgazal 	char name[ENA_NAME_MAX_LEN];
3451738cd3eSNetanel Belgazal 
3461738cd3eSNetanel Belgazal 	unsigned long flags;
3471738cd3eSNetanel Belgazal 	/* TX */
3481738cd3eSNetanel Belgazal 	struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES]
3491738cd3eSNetanel Belgazal 		____cacheline_aligned_in_smp;
3501738cd3eSNetanel Belgazal 
3511738cd3eSNetanel Belgazal 	/* RX */
3521738cd3eSNetanel Belgazal 	struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES]
3531738cd3eSNetanel Belgazal 		____cacheline_aligned_in_smp;
3541738cd3eSNetanel Belgazal 
3551738cd3eSNetanel Belgazal 	struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES];
3561738cd3eSNetanel Belgazal 
3571738cd3eSNetanel Belgazal 	struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)];
3581738cd3eSNetanel Belgazal 
3591738cd3eSNetanel Belgazal 	/* timer service */
3601738cd3eSNetanel Belgazal 	struct work_struct reset_task;
3611738cd3eSNetanel Belgazal 	struct timer_list timer_service;
3621738cd3eSNetanel Belgazal 
3631738cd3eSNetanel Belgazal 	bool wd_state;
3648c5c7abdSNetanel Belgazal 	bool dev_up_before_reset;
3650e3a3f6dSArthur Kiyanovski 	bool disable_meta_caching;
3661738cd3eSNetanel Belgazal 	unsigned long last_keep_alive_jiffies;
3671738cd3eSNetanel Belgazal 
3681738cd3eSNetanel Belgazal 	struct u64_stats_sync syncp;
3691738cd3eSNetanel Belgazal 	struct ena_stats_dev dev_stats;
370713865daSSameeh Jubran 	struct ena_admin_eni_stats eni_stats;
3711738cd3eSNetanel Belgazal 
3721738cd3eSNetanel Belgazal 	/* last queue index that was checked for uncompleted tx packets */
3731738cd3eSNetanel Belgazal 	u32 last_monitored_tx_qid;
374e2eed0e3SNetanel Belgazal 
375e2eed0e3SNetanel Belgazal 	enum ena_regs_reset_reason_types reset_reason;
376838c93dcSSameeh Jubran 
377838c93dcSSameeh Jubran 	struct bpf_prog *xdp_bpf_prog;
378548c4940SSameeh Jubran 	u32 xdp_first_ring;
379548c4940SSameeh Jubran 	u32 xdp_num_queues;
3801738cd3eSNetanel Belgazal };
3811738cd3eSNetanel Belgazal 
3821738cd3eSNetanel Belgazal void ena_set_ethtool_ops(struct net_device *netdev);
3831738cd3eSNetanel Belgazal 
3841738cd3eSNetanel Belgazal void ena_dump_stats_to_dmesg(struct ena_adapter *adapter);
3851738cd3eSNetanel Belgazal 
3861738cd3eSNetanel Belgazal void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);
3871738cd3eSNetanel Belgazal 
388713865daSSameeh Jubran int ena_update_hw_stats(struct ena_adapter *adapter);
389713865daSSameeh Jubran 
390b0c59e53SShay Agroskin int ena_update_queue_params(struct ena_adapter *adapter,
391eece4d2aSSameeh Jubran 			    u32 new_tx_size,
392b0c59e53SShay Agroskin 			    u32 new_rx_size,
393b0c59e53SShay Agroskin 			    u32 new_llq_header_len);
394838c93dcSSameeh Jubran 
3952413ea97SSameeh Jubran int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count);
396eece4d2aSSameeh Jubran 
397c7062aaeSDavid Arinzon int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak);
398c7062aaeSDavid Arinzon 
3991738cd3eSNetanel Belgazal int ena_get_sset_count(struct net_device *netdev, int sset);
4001738cd3eSNetanel Belgazal 
ena_reset_device(struct ena_adapter * adapter,enum ena_regs_reset_reason_types reset_reason)4019fe890ccSArthur Kiyanovski static inline void ena_reset_device(struct ena_adapter *adapter,
4029fe890ccSArthur Kiyanovski 				    enum ena_regs_reset_reason_types reset_reason)
4039fe890ccSArthur Kiyanovski {
4049fe890ccSArthur Kiyanovski 	adapter->reset_reason = reset_reason;
4059fe890ccSArthur Kiyanovski 	/* Make sure reset reason is set before triggering the reset */
4069fe890ccSArthur Kiyanovski 	smp_mb__before_atomic();
4079fe890ccSArthur Kiyanovski 	set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
4089fe890ccSArthur Kiyanovski }
4099fe890ccSArthur Kiyanovski 
410c891d767SDavid Arinzon int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,
411c891d767SDavid Arinzon 			  struct ena_tx_buffer *tx_info, bool is_xdp);
412548c4940SSameeh Jubran 
413c891d767SDavid Arinzon /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */
ena_increase_stat(u64 * statp,u64 cnt,struct u64_stats_sync * syncp)414c891d767SDavid Arinzon static inline void ena_increase_stat(u64 *statp, u64 cnt,
415c891d767SDavid Arinzon 				     struct u64_stats_sync *syncp)
416838c93dcSSameeh Jubran {
417c891d767SDavid Arinzon 	u64_stats_update_begin(syncp);
418c891d767SDavid Arinzon 	(*statp) += cnt;
419c891d767SDavid Arinzon 	u64_stats_update_end(syncp);
420838c93dcSSameeh Jubran }
421838c93dcSSameeh Jubran 
ena_ring_tx_doorbell(struct ena_ring * tx_ring)422c891d767SDavid Arinzon static inline void ena_ring_tx_doorbell(struct ena_ring *tx_ring)
423838c93dcSSameeh Jubran {
424c891d767SDavid Arinzon 	ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
425c891d767SDavid Arinzon 	ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp);
426838c93dcSSameeh Jubran }
427838c93dcSSameeh Jubran 
428*bc0ad685SDavid Arinzon int ena_xmit_common(struct ena_adapter *adapter,
429c891d767SDavid Arinzon 		    struct ena_ring *ring,
430c891d767SDavid Arinzon 		    struct ena_tx_buffer *tx_info,
431c891d767SDavid Arinzon 		    struct ena_com_tx_ctx *ena_tx_ctx,
432c891d767SDavid Arinzon 		    u16 next_to_use,
433c891d767SDavid Arinzon 		    u32 bytes);
434c891d767SDavid Arinzon void ena_unmap_tx_buff(struct ena_ring *tx_ring,
435c891d767SDavid Arinzon 		       struct ena_tx_buffer *tx_info);
436c891d767SDavid Arinzon void ena_init_io_rings(struct ena_adapter *adapter,
437c891d767SDavid Arinzon 		       int first_index, int count);
438c891d767SDavid Arinzon int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,
439c891d767SDavid Arinzon 				     int first_index, int count);
440c891d767SDavid Arinzon int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,
441c891d767SDavid Arinzon 				    int first_index, int count);
442c891d767SDavid Arinzon void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,
443c891d767SDavid Arinzon 					   int first_index, int count);
444c891d767SDavid Arinzon void ena_free_all_io_tx_resources(struct ena_adapter *adapter);
445c891d767SDavid Arinzon void ena_down(struct ena_adapter *adapter);
446c891d767SDavid Arinzon int ena_up(struct ena_adapter *adapter);
447c891d767SDavid Arinzon void ena_unmask_interrupt(struct ena_ring *tx_ring, struct ena_ring *rx_ring);
448c891d767SDavid Arinzon void ena_update_ring_numa_node(struct ena_ring *tx_ring,
449c891d767SDavid Arinzon 			       struct ena_ring *rx_ring);
4501738cd3eSNetanel Belgazal #endif /* !(ENA_H) */
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