1*1fe003fdSJeff Kirsher #ifndef GRETH_H 2*1fe003fdSJeff Kirsher #define GRETH_H 3*1fe003fdSJeff Kirsher 4*1fe003fdSJeff Kirsher #include <linux/phy.h> 5*1fe003fdSJeff Kirsher 6*1fe003fdSJeff Kirsher /* Register bits and masks */ 7*1fe003fdSJeff Kirsher #define GRETH_RESET 0x40 8*1fe003fdSJeff Kirsher #define GRETH_MII_BUSY 0x8 9*1fe003fdSJeff Kirsher #define GRETH_MII_NVALID 0x10 10*1fe003fdSJeff Kirsher 11*1fe003fdSJeff Kirsher #define GRETH_CTRL_FD 0x10 12*1fe003fdSJeff Kirsher #define GRETH_CTRL_PR 0x20 13*1fe003fdSJeff Kirsher #define GRETH_CTRL_SP 0x80 14*1fe003fdSJeff Kirsher #define GRETH_CTRL_GB 0x100 15*1fe003fdSJeff Kirsher #define GRETH_CTRL_PSTATIEN 0x400 16*1fe003fdSJeff Kirsher #define GRETH_CTRL_MCEN 0x800 17*1fe003fdSJeff Kirsher #define GRETH_CTRL_DISDUPLEX 0x1000 18*1fe003fdSJeff Kirsher #define GRETH_STATUS_PHYSTAT 0x100 19*1fe003fdSJeff Kirsher 20*1fe003fdSJeff Kirsher #define GRETH_BD_EN 0x800 21*1fe003fdSJeff Kirsher #define GRETH_BD_WR 0x1000 22*1fe003fdSJeff Kirsher #define GRETH_BD_IE 0x2000 23*1fe003fdSJeff Kirsher #define GRETH_BD_LEN 0x7FF 24*1fe003fdSJeff Kirsher 25*1fe003fdSJeff Kirsher #define GRETH_TXEN 0x1 26*1fe003fdSJeff Kirsher #define GRETH_INT_TE 0x2 27*1fe003fdSJeff Kirsher #define GRETH_INT_TX 0x8 28*1fe003fdSJeff Kirsher #define GRETH_TXI 0x4 29*1fe003fdSJeff Kirsher #define GRETH_TXBD_STATUS 0x0001C000 30*1fe003fdSJeff Kirsher #define GRETH_TXBD_MORE 0x20000 31*1fe003fdSJeff Kirsher #define GRETH_TXBD_IPCS 0x40000 32*1fe003fdSJeff Kirsher #define GRETH_TXBD_TCPCS 0x80000 33*1fe003fdSJeff Kirsher #define GRETH_TXBD_UDPCS 0x100000 34*1fe003fdSJeff Kirsher #define GRETH_TXBD_CSALL (GRETH_TXBD_IPCS | GRETH_TXBD_TCPCS | GRETH_TXBD_UDPCS) 35*1fe003fdSJeff Kirsher #define GRETH_TXBD_ERR_LC 0x10000 36*1fe003fdSJeff Kirsher #define GRETH_TXBD_ERR_UE 0x4000 37*1fe003fdSJeff Kirsher #define GRETH_TXBD_ERR_AL 0x8000 38*1fe003fdSJeff Kirsher 39*1fe003fdSJeff Kirsher #define GRETH_INT_RE 0x1 40*1fe003fdSJeff Kirsher #define GRETH_INT_RX 0x4 41*1fe003fdSJeff Kirsher #define GRETH_RXEN 0x2 42*1fe003fdSJeff Kirsher #define GRETH_RXI 0x8 43*1fe003fdSJeff Kirsher #define GRETH_RXBD_STATUS 0xFFFFC000 44*1fe003fdSJeff Kirsher #define GRETH_RXBD_ERR_AE 0x4000 45*1fe003fdSJeff Kirsher #define GRETH_RXBD_ERR_FT 0x8000 46*1fe003fdSJeff Kirsher #define GRETH_RXBD_ERR_CRC 0x10000 47*1fe003fdSJeff Kirsher #define GRETH_RXBD_ERR_OE 0x20000 48*1fe003fdSJeff Kirsher #define GRETH_RXBD_ERR_LE 0x40000 49*1fe003fdSJeff Kirsher #define GRETH_RXBD_IP 0x80000 50*1fe003fdSJeff Kirsher #define GRETH_RXBD_IP_CSERR 0x100000 51*1fe003fdSJeff Kirsher #define GRETH_RXBD_UDP 0x200000 52*1fe003fdSJeff Kirsher #define GRETH_RXBD_UDP_CSERR 0x400000 53*1fe003fdSJeff Kirsher #define GRETH_RXBD_TCP 0x800000 54*1fe003fdSJeff Kirsher #define GRETH_RXBD_TCP_CSERR 0x1000000 55*1fe003fdSJeff Kirsher #define GRETH_RXBD_IP_FRAG 0x2000000 56*1fe003fdSJeff Kirsher #define GRETH_RXBD_MCAST 0x4000000 57*1fe003fdSJeff Kirsher 58*1fe003fdSJeff Kirsher /* Descriptor parameters */ 59*1fe003fdSJeff Kirsher #define GRETH_TXBD_NUM 128 60*1fe003fdSJeff Kirsher #define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1) 61*1fe003fdSJeff Kirsher #define GRETH_TX_BUF_SIZE 2048 62*1fe003fdSJeff Kirsher #define GRETH_RXBD_NUM 128 63*1fe003fdSJeff Kirsher #define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1) 64*1fe003fdSJeff Kirsher #define GRETH_RX_BUF_SIZE 2048 65*1fe003fdSJeff Kirsher 66*1fe003fdSJeff Kirsher /* Buffers per page */ 67*1fe003fdSJeff Kirsher #define GRETH_RX_BUF_PPGAE (PAGE_SIZE/GRETH_RX_BUF_SIZE) 68*1fe003fdSJeff Kirsher #define GRETH_TX_BUF_PPGAE (PAGE_SIZE/GRETH_TX_BUF_SIZE) 69*1fe003fdSJeff Kirsher 70*1fe003fdSJeff Kirsher /* How many pages are needed for buffers */ 71*1fe003fdSJeff Kirsher #define GRETH_RX_BUF_PAGE_NUM (GRETH_RXBD_NUM/GRETH_RX_BUF_PPGAE) 72*1fe003fdSJeff Kirsher #define GRETH_TX_BUF_PAGE_NUM (GRETH_TXBD_NUM/GRETH_TX_BUF_PPGAE) 73*1fe003fdSJeff Kirsher 74*1fe003fdSJeff Kirsher /* Buffer size. 75*1fe003fdSJeff Kirsher * Gbit MAC uses tagged maximum frame size which is 1518 excluding CRC. 76*1fe003fdSJeff Kirsher * Set to 1520 to make all buffers word aligned for non-gbit MAC. 77*1fe003fdSJeff Kirsher */ 78*1fe003fdSJeff Kirsher #define MAX_FRAME_SIZE 1520 79*1fe003fdSJeff Kirsher 80*1fe003fdSJeff Kirsher /* GRETH APB registers */ 81*1fe003fdSJeff Kirsher struct greth_regs { 82*1fe003fdSJeff Kirsher u32 control; 83*1fe003fdSJeff Kirsher u32 status; 84*1fe003fdSJeff Kirsher u32 esa_msb; 85*1fe003fdSJeff Kirsher u32 esa_lsb; 86*1fe003fdSJeff Kirsher u32 mdio; 87*1fe003fdSJeff Kirsher u32 tx_desc_p; 88*1fe003fdSJeff Kirsher u32 rx_desc_p; 89*1fe003fdSJeff Kirsher u32 edclip; 90*1fe003fdSJeff Kirsher u32 hash_msb; 91*1fe003fdSJeff Kirsher u32 hash_lsb; 92*1fe003fdSJeff Kirsher }; 93*1fe003fdSJeff Kirsher 94*1fe003fdSJeff Kirsher /* GRETH buffer descriptor */ 95*1fe003fdSJeff Kirsher struct greth_bd { 96*1fe003fdSJeff Kirsher u32 stat; 97*1fe003fdSJeff Kirsher u32 addr; 98*1fe003fdSJeff Kirsher }; 99*1fe003fdSJeff Kirsher 100*1fe003fdSJeff Kirsher struct greth_private { 101*1fe003fdSJeff Kirsher struct sk_buff *rx_skbuff[GRETH_RXBD_NUM]; 102*1fe003fdSJeff Kirsher struct sk_buff *tx_skbuff[GRETH_TXBD_NUM]; 103*1fe003fdSJeff Kirsher 104*1fe003fdSJeff Kirsher unsigned char *tx_bufs[GRETH_TXBD_NUM]; 105*1fe003fdSJeff Kirsher unsigned char *rx_bufs[GRETH_RXBD_NUM]; 106*1fe003fdSJeff Kirsher 107*1fe003fdSJeff Kirsher u16 tx_next; 108*1fe003fdSJeff Kirsher u16 tx_last; 109*1fe003fdSJeff Kirsher u16 tx_free; 110*1fe003fdSJeff Kirsher u16 rx_cur; 111*1fe003fdSJeff Kirsher 112*1fe003fdSJeff Kirsher struct greth_regs *regs; /* Address of controller registers. */ 113*1fe003fdSJeff Kirsher struct greth_bd *rx_bd_base; /* Address of Rx BDs. */ 114*1fe003fdSJeff Kirsher struct greth_bd *tx_bd_base; /* Address of Tx BDs. */ 115*1fe003fdSJeff Kirsher dma_addr_t rx_bd_base_phys; 116*1fe003fdSJeff Kirsher dma_addr_t tx_bd_base_phys; 117*1fe003fdSJeff Kirsher 118*1fe003fdSJeff Kirsher int irq; 119*1fe003fdSJeff Kirsher 120*1fe003fdSJeff Kirsher struct device *dev; /* Pointer to platform_device->dev */ 121*1fe003fdSJeff Kirsher struct net_device *netdev; 122*1fe003fdSJeff Kirsher struct napi_struct napi; 123*1fe003fdSJeff Kirsher spinlock_t devlock; 124*1fe003fdSJeff Kirsher 125*1fe003fdSJeff Kirsher struct phy_device *phy; 126*1fe003fdSJeff Kirsher struct mii_bus *mdio; 127*1fe003fdSJeff Kirsher int mdio_irqs[PHY_MAX_ADDR]; 128*1fe003fdSJeff Kirsher unsigned int link; 129*1fe003fdSJeff Kirsher unsigned int speed; 130*1fe003fdSJeff Kirsher unsigned int duplex; 131*1fe003fdSJeff Kirsher 132*1fe003fdSJeff Kirsher u32 msg_enable; 133*1fe003fdSJeff Kirsher 134*1fe003fdSJeff Kirsher u8 phyaddr; 135*1fe003fdSJeff Kirsher u8 multicast; 136*1fe003fdSJeff Kirsher u8 gbit_mac; 137*1fe003fdSJeff Kirsher u8 mdio_int_en; 138*1fe003fdSJeff Kirsher u8 edcl; 139*1fe003fdSJeff Kirsher }; 140*1fe003fdSJeff Kirsher 141*1fe003fdSJeff Kirsher #endif 142