18aa9ebccSVladimir Oltean // SPDX-License-Identifier: GPL-2.0 28aa9ebccSVladimir Oltean /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH 38aa9ebccSVladimir Oltean * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> 48aa9ebccSVladimir Oltean */ 58aa9ebccSVladimir Oltean 68aa9ebccSVladimir Oltean #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 78aa9ebccSVladimir Oltean 88aa9ebccSVladimir Oltean #include <linux/delay.h> 98aa9ebccSVladimir Oltean #include <linux/module.h> 108aa9ebccSVladimir Oltean #include <linux/printk.h> 118aa9ebccSVladimir Oltean #include <linux/spi/spi.h> 128aa9ebccSVladimir Oltean #include <linux/errno.h> 138aa9ebccSVladimir Oltean #include <linux/gpio/consumer.h> 14ad9f299aSVladimir Oltean #include <linux/phylink.h> 158aa9ebccSVladimir Oltean #include <linux/of.h> 168aa9ebccSVladimir Oltean #include <linux/of_net.h> 178aa9ebccSVladimir Oltean #include <linux/of_mdio.h> 188aa9ebccSVladimir Oltean #include <linux/of_device.h> 193ad1d171SVladimir Oltean #include <linux/pcs/pcs-xpcs.h> 208aa9ebccSVladimir Oltean #include <linux/netdev_features.h> 218aa9ebccSVladimir Oltean #include <linux/netdevice.h> 228aa9ebccSVladimir Oltean #include <linux/if_bridge.h> 238aa9ebccSVladimir Oltean #include <linux/if_ether.h> 24227d07a0SVladimir Oltean #include <linux/dsa/8021q.h> 258aa9ebccSVladimir Oltean #include "sja1105.h" 26317ab5b8SVladimir Oltean #include "sja1105_tas.h" 278aa9ebccSVladimir Oltean 284d942354SVladimir Oltean #define SJA1105_UNKNOWN_MULTICAST 0x010000000000ull 29ed040abcSVladimir Oltean #define SJA1105_DEFAULT_VLAN (VLAN_N_VID - 1) 304d942354SVladimir Oltean 31ac02a451SVladimir Oltean static const struct dsa_switch_ops sja1105_switch_ops; 32ac02a451SVladimir Oltean 338aa9ebccSVladimir Oltean static void sja1105_hw_reset(struct gpio_desc *gpio, unsigned int pulse_len, 348aa9ebccSVladimir Oltean unsigned int startup_delay) 358aa9ebccSVladimir Oltean { 368aa9ebccSVladimir Oltean gpiod_set_value_cansleep(gpio, 1); 378aa9ebccSVladimir Oltean /* Wait for minimum reset pulse length */ 388aa9ebccSVladimir Oltean msleep(pulse_len); 398aa9ebccSVladimir Oltean gpiod_set_value_cansleep(gpio, 0); 408aa9ebccSVladimir Oltean /* Wait until chip is ready after reset */ 418aa9ebccSVladimir Oltean msleep(startup_delay); 428aa9ebccSVladimir Oltean } 438aa9ebccSVladimir Oltean 448aa9ebccSVladimir Oltean static void 458aa9ebccSVladimir Oltean sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd, 468aa9ebccSVladimir Oltean int from, int to, bool allow) 478aa9ebccSVladimir Oltean { 484d942354SVladimir Oltean if (allow) 498aa9ebccSVladimir Oltean l2_fwd[from].reach_port |= BIT(to); 504d942354SVladimir Oltean else 518aa9ebccSVladimir Oltean l2_fwd[from].reach_port &= ~BIT(to); 528aa9ebccSVladimir Oltean } 538aa9ebccSVladimir Oltean 547f7ccdeaSVladimir Oltean static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry *l2_fwd, 557f7ccdeaSVladimir Oltean int from, int to) 567f7ccdeaSVladimir Oltean { 577f7ccdeaSVladimir Oltean return !!(l2_fwd[from].reach_port & BIT(to)); 587f7ccdeaSVladimir Oltean } 597f7ccdeaSVladimir Oltean 608aa9ebccSVladimir Oltean static int sja1105_init_mac_settings(struct sja1105_private *priv) 618aa9ebccSVladimir Oltean { 628aa9ebccSVladimir Oltean struct sja1105_mac_config_entry default_mac = { 638aa9ebccSVladimir Oltean /* Enable all 8 priority queues on egress. 648aa9ebccSVladimir Oltean * Every queue i holds top[i] - base[i] frames. 658aa9ebccSVladimir Oltean * Sum of top[i] - base[i] is 511 (max hardware limit). 668aa9ebccSVladimir Oltean */ 678aa9ebccSVladimir Oltean .top = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF}, 688aa9ebccSVladimir Oltean .base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0}, 698aa9ebccSVladimir Oltean .enabled = {true, true, true, true, true, true, true, true}, 708aa9ebccSVladimir Oltean /* Keep standard IFG of 12 bytes on egress. */ 718aa9ebccSVladimir Oltean .ifg = 0, 728aa9ebccSVladimir Oltean /* Always put the MAC speed in automatic mode, where it can be 731fd4a173SVladimir Oltean * adjusted at runtime by PHYLINK. 748aa9ebccSVladimir Oltean */ 7541fed17fSVladimir Oltean .speed = priv->info->port_speed[SJA1105_SPEED_AUTO], 768aa9ebccSVladimir Oltean /* No static correction for 1-step 1588 events */ 778aa9ebccSVladimir Oltean .tp_delin = 0, 788aa9ebccSVladimir Oltean .tp_delout = 0, 798aa9ebccSVladimir Oltean /* Disable aging for critical TTEthernet traffic */ 808aa9ebccSVladimir Oltean .maxage = 0xFF, 818aa9ebccSVladimir Oltean /* Internal VLAN (pvid) to apply to untagged ingress */ 828aa9ebccSVladimir Oltean .vlanprio = 0, 83e3502b82SVladimir Oltean .vlanid = 1, 848aa9ebccSVladimir Oltean .ing_mirr = false, 858aa9ebccSVladimir Oltean .egr_mirr = false, 868aa9ebccSVladimir Oltean /* Don't drop traffic with other EtherType than ETH_P_IP */ 878aa9ebccSVladimir Oltean .drpnona664 = false, 888aa9ebccSVladimir Oltean /* Don't drop double-tagged traffic */ 898aa9ebccSVladimir Oltean .drpdtag = false, 908aa9ebccSVladimir Oltean /* Don't drop untagged traffic */ 918aa9ebccSVladimir Oltean .drpuntag = false, 928aa9ebccSVladimir Oltean /* Don't retag 802.1p (VID 0) traffic with the pvid */ 938aa9ebccSVladimir Oltean .retag = false, 94640f763fSVladimir Oltean /* Disable learning and I/O on user ports by default - 95640f763fSVladimir Oltean * STP will enable it. 96640f763fSVladimir Oltean */ 97640f763fSVladimir Oltean .dyn_learn = false, 988aa9ebccSVladimir Oltean .egress = false, 998aa9ebccSVladimir Oltean .ingress = false, 1008aa9ebccSVladimir Oltean }; 1018aa9ebccSVladimir Oltean struct sja1105_mac_config_entry *mac; 102542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 1038aa9ebccSVladimir Oltean struct sja1105_table *table; 1048aa9ebccSVladimir Oltean int i; 1058aa9ebccSVladimir Oltean 1068aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_MAC_CONFIG]; 1078aa9ebccSVladimir Oltean 1088aa9ebccSVladimir Oltean /* Discard previous MAC Configuration Table */ 1098aa9ebccSVladimir Oltean if (table->entry_count) { 1108aa9ebccSVladimir Oltean kfree(table->entries); 1118aa9ebccSVladimir Oltean table->entry_count = 0; 1128aa9ebccSVladimir Oltean } 1138aa9ebccSVladimir Oltean 114fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 1158aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 1168aa9ebccSVladimir Oltean if (!table->entries) 1178aa9ebccSVladimir Oltean return -ENOMEM; 1188aa9ebccSVladimir Oltean 119fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 1208aa9ebccSVladimir Oltean 1218aa9ebccSVladimir Oltean mac = table->entries; 1228aa9ebccSVladimir Oltean 123542043e9SVladimir Oltean for (i = 0; i < ds->num_ports; i++) { 1248aa9ebccSVladimir Oltean mac[i] = default_mac; 125b0b33b04SVladimir Oltean 126b0b33b04SVladimir Oltean /* Let sja1105_bridge_stp_state_set() keep address learning 127b0b33b04SVladimir Oltean * enabled for the CPU port. 128640f763fSVladimir Oltean */ 129b0b33b04SVladimir Oltean if (dsa_is_cpu_port(ds, i)) 130b0b33b04SVladimir Oltean priv->learn_ena |= BIT(i); 131640f763fSVladimir Oltean } 1328aa9ebccSVladimir Oltean 1338aa9ebccSVladimir Oltean return 0; 1348aa9ebccSVladimir Oltean } 1358aa9ebccSVladimir Oltean 1365d645df9SVladimir Oltean static int sja1105_init_mii_settings(struct sja1105_private *priv) 1378aa9ebccSVladimir Oltean { 1388aa9ebccSVladimir Oltean struct device *dev = &priv->spidev->dev; 1398aa9ebccSVladimir Oltean struct sja1105_xmii_params_entry *mii; 140542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 1418aa9ebccSVladimir Oltean struct sja1105_table *table; 1428aa9ebccSVladimir Oltean int i; 1438aa9ebccSVladimir Oltean 1448aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_XMII_PARAMS]; 1458aa9ebccSVladimir Oltean 1468aa9ebccSVladimir Oltean /* Discard previous xMII Mode Parameters Table */ 1478aa9ebccSVladimir Oltean if (table->entry_count) { 1488aa9ebccSVladimir Oltean kfree(table->entries); 1498aa9ebccSVladimir Oltean table->entry_count = 0; 1508aa9ebccSVladimir Oltean } 1518aa9ebccSVladimir Oltean 152fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 1538aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 1548aa9ebccSVladimir Oltean if (!table->entries) 1558aa9ebccSVladimir Oltean return -ENOMEM; 1568aa9ebccSVladimir Oltean 1571fd4a173SVladimir Oltean /* Override table based on PHYLINK DT bindings */ 158fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 1598aa9ebccSVladimir Oltean 1608aa9ebccSVladimir Oltean mii = table->entries; 1618aa9ebccSVladimir Oltean 162542043e9SVladimir Oltean for (i = 0; i < ds->num_ports; i++) { 1635d645df9SVladimir Oltean sja1105_mii_role_t role = XMII_MAC; 1645d645df9SVladimir Oltean 165ee9d0cb6SVladimir Oltean if (dsa_is_unused_port(priv->ds, i)) 166ee9d0cb6SVladimir Oltean continue; 167ee9d0cb6SVladimir Oltean 1685d645df9SVladimir Oltean switch (priv->phy_mode[i]) { 1695a8f0974SVladimir Oltean case PHY_INTERFACE_MODE_INTERNAL: 1705a8f0974SVladimir Oltean if (priv->info->internal_phy[i] == SJA1105_NO_PHY) 1715a8f0974SVladimir Oltean goto unsupported; 1725a8f0974SVladimir Oltean 1735a8f0974SVladimir Oltean mii->xmii_mode[i] = XMII_MODE_MII; 1745a8f0974SVladimir Oltean if (priv->info->internal_phy[i] == SJA1105_PHY_BASE_TX) 1755a8f0974SVladimir Oltean mii->special[i] = true; 1765a8f0974SVladimir Oltean 1775a8f0974SVladimir Oltean break; 1785d645df9SVladimir Oltean case PHY_INTERFACE_MODE_REVMII: 1795d645df9SVladimir Oltean role = XMII_PHY; 1805d645df9SVladimir Oltean fallthrough; 1818aa9ebccSVladimir Oltean case PHY_INTERFACE_MODE_MII: 18291a05078SVladimir Oltean if (!priv->info->supports_mii[i]) 18391a05078SVladimir Oltean goto unsupported; 18491a05078SVladimir Oltean 1858aa9ebccSVladimir Oltean mii->xmii_mode[i] = XMII_MODE_MII; 1868aa9ebccSVladimir Oltean break; 1875d645df9SVladimir Oltean case PHY_INTERFACE_MODE_REVRMII: 1885d645df9SVladimir Oltean role = XMII_PHY; 1895d645df9SVladimir Oltean fallthrough; 1908aa9ebccSVladimir Oltean case PHY_INTERFACE_MODE_RMII: 19191a05078SVladimir Oltean if (!priv->info->supports_rmii[i]) 19291a05078SVladimir Oltean goto unsupported; 19391a05078SVladimir Oltean 1948aa9ebccSVladimir Oltean mii->xmii_mode[i] = XMII_MODE_RMII; 1958aa9ebccSVladimir Oltean break; 1968aa9ebccSVladimir Oltean case PHY_INTERFACE_MODE_RGMII: 1978aa9ebccSVladimir Oltean case PHY_INTERFACE_MODE_RGMII_ID: 1988aa9ebccSVladimir Oltean case PHY_INTERFACE_MODE_RGMII_RXID: 1998aa9ebccSVladimir Oltean case PHY_INTERFACE_MODE_RGMII_TXID: 20091a05078SVladimir Oltean if (!priv->info->supports_rgmii[i]) 20191a05078SVladimir Oltean goto unsupported; 20291a05078SVladimir Oltean 2038aa9ebccSVladimir Oltean mii->xmii_mode[i] = XMII_MODE_RGMII; 2048aa9ebccSVladimir Oltean break; 205ffe10e67SVladimir Oltean case PHY_INTERFACE_MODE_SGMII: 20691a05078SVladimir Oltean if (!priv->info->supports_sgmii[i]) 20791a05078SVladimir Oltean goto unsupported; 20891a05078SVladimir Oltean 209ffe10e67SVladimir Oltean mii->xmii_mode[i] = XMII_MODE_SGMII; 210ece578bcSVladimir Oltean mii->special[i] = true; 211ffe10e67SVladimir Oltean break; 21291a05078SVladimir Oltean case PHY_INTERFACE_MODE_2500BASEX: 21391a05078SVladimir Oltean if (!priv->info->supports_2500basex[i]) 21491a05078SVladimir Oltean goto unsupported; 21591a05078SVladimir Oltean 21691a05078SVladimir Oltean mii->xmii_mode[i] = XMII_MODE_SGMII; 217ece578bcSVladimir Oltean mii->special[i] = true; 21891a05078SVladimir Oltean break; 21991a05078SVladimir Oltean unsupported: 2208aa9ebccSVladimir Oltean default: 22191a05078SVladimir Oltean dev_err(dev, "Unsupported PHY mode %s on port %d!\n", 2225d645df9SVladimir Oltean phy_modes(priv->phy_mode[i]), i); 2236729188dSVladimir Oltean return -EINVAL; 2248aa9ebccSVladimir Oltean } 2258aa9ebccSVladimir Oltean 2265d645df9SVladimir Oltean mii->phy_mac[i] = role; 2278aa9ebccSVladimir Oltean } 2288aa9ebccSVladimir Oltean return 0; 2298aa9ebccSVladimir Oltean } 2308aa9ebccSVladimir Oltean 2318aa9ebccSVladimir Oltean static int sja1105_init_static_fdb(struct sja1105_private *priv) 2328aa9ebccSVladimir Oltean { 2334d942354SVladimir Oltean struct sja1105_l2_lookup_entry *l2_lookup; 2348aa9ebccSVladimir Oltean struct sja1105_table *table; 2354d942354SVladimir Oltean int port; 2368aa9ebccSVladimir Oltean 2378aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 2388aa9ebccSVladimir Oltean 2394d942354SVladimir Oltean /* We only populate the FDB table through dynamic L2 Address Lookup 2404d942354SVladimir Oltean * entries, except for a special entry at the end which is a catch-all 2414d942354SVladimir Oltean * for unknown multicast and will be used to control flooding domain. 242291d1e72SVladimir Oltean */ 2438aa9ebccSVladimir Oltean if (table->entry_count) { 2448aa9ebccSVladimir Oltean kfree(table->entries); 2458aa9ebccSVladimir Oltean table->entry_count = 0; 2468aa9ebccSVladimir Oltean } 2474d942354SVladimir Oltean 2484d942354SVladimir Oltean if (!priv->info->can_limit_mcast_flood) 2494d942354SVladimir Oltean return 0; 2504d942354SVladimir Oltean 2514d942354SVladimir Oltean table->entries = kcalloc(1, table->ops->unpacked_entry_size, 2524d942354SVladimir Oltean GFP_KERNEL); 2534d942354SVladimir Oltean if (!table->entries) 2544d942354SVladimir Oltean return -ENOMEM; 2554d942354SVladimir Oltean 2564d942354SVladimir Oltean table->entry_count = 1; 2574d942354SVladimir Oltean l2_lookup = table->entries; 2584d942354SVladimir Oltean 2594d942354SVladimir Oltean /* All L2 multicast addresses have an odd first octet */ 2604d942354SVladimir Oltean l2_lookup[0].macaddr = SJA1105_UNKNOWN_MULTICAST; 2614d942354SVladimir Oltean l2_lookup[0].mask_macaddr = SJA1105_UNKNOWN_MULTICAST; 2624d942354SVladimir Oltean l2_lookup[0].lockeds = true; 2634d942354SVladimir Oltean l2_lookup[0].index = SJA1105_MAX_L2_LOOKUP_COUNT - 1; 2644d942354SVladimir Oltean 2654d942354SVladimir Oltean /* Flood multicast to every port by default */ 2664d942354SVladimir Oltean for (port = 0; port < priv->ds->num_ports; port++) 2674d942354SVladimir Oltean if (!dsa_is_unused_port(priv->ds, port)) 2684d942354SVladimir Oltean l2_lookup[0].destports |= BIT(port); 2694d942354SVladimir Oltean 2708aa9ebccSVladimir Oltean return 0; 2718aa9ebccSVladimir Oltean } 2728aa9ebccSVladimir Oltean 2738aa9ebccSVladimir Oltean static int sja1105_init_l2_lookup_params(struct sja1105_private *priv) 2748aa9ebccSVladimir Oltean { 2758aa9ebccSVladimir Oltean struct sja1105_l2_lookup_params_entry default_l2_lookup_params = { 2768456721dSVladimir Oltean /* Learned FDB entries are forgotten after 300 seconds */ 2778456721dSVladimir Oltean .maxage = SJA1105_AGEING_TIME_MS(300000), 2788aa9ebccSVladimir Oltean /* All entries within a FDB bin are available for learning */ 2798aa9ebccSVladimir Oltean .dyn_tbsz = SJA1105ET_FDB_BIN_SIZE, 2801da73821SVladimir Oltean /* And the P/Q/R/S equivalent setting: */ 2811da73821SVladimir Oltean .start_dynspc = 0, 2828aa9ebccSVladimir Oltean /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */ 2838aa9ebccSVladimir Oltean .poly = 0x97, 2848aa9ebccSVladimir Oltean /* This selects between Independent VLAN Learning (IVL) and 2858aa9ebccSVladimir Oltean * Shared VLAN Learning (SVL) 2868aa9ebccSVladimir Oltean */ 2876d7c7d94SVladimir Oltean .shared_learn = true, 2888aa9ebccSVladimir Oltean /* Don't discard management traffic based on ENFPORT - 2898aa9ebccSVladimir Oltean * we don't perform SMAC port enforcement anyway, so 2908aa9ebccSVladimir Oltean * what we are setting here doesn't matter. 2918aa9ebccSVladimir Oltean */ 2928aa9ebccSVladimir Oltean .no_enf_hostprt = false, 2938aa9ebccSVladimir Oltean /* Don't learn SMAC for mac_fltres1 and mac_fltres0. 2948aa9ebccSVladimir Oltean * Maybe correlate with no_linklocal_learn from bridge driver? 2958aa9ebccSVladimir Oltean */ 2968aa9ebccSVladimir Oltean .no_mgmt_learn = true, 2971da73821SVladimir Oltean /* P/Q/R/S only */ 2981da73821SVladimir Oltean .use_static = true, 2991da73821SVladimir Oltean /* Dynamically learned FDB entries can overwrite other (older) 3001da73821SVladimir Oltean * dynamic FDB entries 3011da73821SVladimir Oltean */ 3021da73821SVladimir Oltean .owr_dyn = true, 3031da73821SVladimir Oltean .drpnolearn = true, 3048aa9ebccSVladimir Oltean }; 305542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 306f238fef1SVladimir Oltean int port, num_used_ports = 0; 307542043e9SVladimir Oltean struct sja1105_table *table; 308542043e9SVladimir Oltean u64 max_fdb_entries; 309542043e9SVladimir Oltean 310542043e9SVladimir Oltean for (port = 0; port < ds->num_ports; port++) 311f238fef1SVladimir Oltean if (!dsa_is_unused_port(ds, port)) 312f238fef1SVladimir Oltean num_used_ports++; 313f238fef1SVladimir Oltean 314f238fef1SVladimir Oltean max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / num_used_ports; 315f238fef1SVladimir Oltean 316f238fef1SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 317f238fef1SVladimir Oltean if (dsa_is_unused_port(ds, port)) 318f238fef1SVladimir Oltean continue; 319f238fef1SVladimir Oltean 320542043e9SVladimir Oltean default_l2_lookup_params.maxaddrp[port] = max_fdb_entries; 321f238fef1SVladimir Oltean } 3228aa9ebccSVladimir Oltean 3238aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS]; 3248aa9ebccSVladimir Oltean 3258aa9ebccSVladimir Oltean if (table->entry_count) { 3268aa9ebccSVladimir Oltean kfree(table->entries); 3278aa9ebccSVladimir Oltean table->entry_count = 0; 3288aa9ebccSVladimir Oltean } 3298aa9ebccSVladimir Oltean 330fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 3318aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 3328aa9ebccSVladimir Oltean if (!table->entries) 3338aa9ebccSVladimir Oltean return -ENOMEM; 3348aa9ebccSVladimir Oltean 335fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 3368aa9ebccSVladimir Oltean 3378aa9ebccSVladimir Oltean /* This table only has a single entry */ 3388aa9ebccSVladimir Oltean ((struct sja1105_l2_lookup_params_entry *)table->entries)[0] = 3398aa9ebccSVladimir Oltean default_l2_lookup_params; 3408aa9ebccSVladimir Oltean 3418aa9ebccSVladimir Oltean return 0; 3428aa9ebccSVladimir Oltean } 3438aa9ebccSVladimir Oltean 344ed040abcSVladimir Oltean /* Set up a default VLAN for untagged traffic injected from the CPU 345ed040abcSVladimir Oltean * using management routes (e.g. STP, PTP) as opposed to tag_8021q. 346ed040abcSVladimir Oltean * All DT-defined ports are members of this VLAN, and there are no 347ed040abcSVladimir Oltean * restrictions on forwarding (since the CPU selects the destination). 348ed040abcSVladimir Oltean * Frames from this VLAN will always be transmitted as untagged, and 349ed040abcSVladimir Oltean * neither the bridge nor the 8021q module cannot create this VLAN ID. 350ed040abcSVladimir Oltean */ 3518aa9ebccSVladimir Oltean static int sja1105_init_static_vlan(struct sja1105_private *priv) 3528aa9ebccSVladimir Oltean { 3538aa9ebccSVladimir Oltean struct sja1105_table *table; 3548aa9ebccSVladimir Oltean struct sja1105_vlan_lookup_entry pvid = { 3553e77e59bSVladimir Oltean .type_entry = SJA1110_VLAN_D_TAG, 3568aa9ebccSVladimir Oltean .ving_mirr = 0, 3578aa9ebccSVladimir Oltean .vegr_mirr = 0, 3588aa9ebccSVladimir Oltean .vmemb_port = 0, 3598aa9ebccSVladimir Oltean .vlan_bc = 0, 3608aa9ebccSVladimir Oltean .tag_port = 0, 361ed040abcSVladimir Oltean .vlanid = SJA1105_DEFAULT_VLAN, 3628aa9ebccSVladimir Oltean }; 363ec5ae610SVladimir Oltean struct dsa_switch *ds = priv->ds; 364ec5ae610SVladimir Oltean int port; 3658aa9ebccSVladimir Oltean 3668aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP]; 3678aa9ebccSVladimir Oltean 3688aa9ebccSVladimir Oltean if (table->entry_count) { 3698aa9ebccSVladimir Oltean kfree(table->entries); 3708aa9ebccSVladimir Oltean table->entry_count = 0; 3718aa9ebccSVladimir Oltean } 3728aa9ebccSVladimir Oltean 373c75857b0SZheng Yongjun table->entries = kzalloc(table->ops->unpacked_entry_size, 3748aa9ebccSVladimir Oltean GFP_KERNEL); 3758aa9ebccSVladimir Oltean if (!table->entries) 3768aa9ebccSVladimir Oltean return -ENOMEM; 3778aa9ebccSVladimir Oltean 3788aa9ebccSVladimir Oltean table->entry_count = 1; 3798aa9ebccSVladimir Oltean 380ec5ae610SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 381ec5ae610SVladimir Oltean if (dsa_is_unused_port(ds, port)) 382ec5ae610SVladimir Oltean continue; 383ec5ae610SVladimir Oltean 384ec5ae610SVladimir Oltean pvid.vmemb_port |= BIT(port); 385ec5ae610SVladimir Oltean pvid.vlan_bc |= BIT(port); 386ec5ae610SVladimir Oltean pvid.tag_port &= ~BIT(port); 387ec5ae610SVladimir Oltean 388*6dfd23d3SVladimir Oltean if (dsa_is_cpu_port(ds, port)) { 389*6dfd23d3SVladimir Oltean priv->tag_8021q_pvid[port] = SJA1105_DEFAULT_VLAN; 390*6dfd23d3SVladimir Oltean priv->bridge_pvid[port] = SJA1105_DEFAULT_VLAN; 391*6dfd23d3SVladimir Oltean } 3928aa9ebccSVladimir Oltean } 3938aa9ebccSVladimir Oltean 3948aa9ebccSVladimir Oltean ((struct sja1105_vlan_lookup_entry *)table->entries)[0] = pvid; 3958aa9ebccSVladimir Oltean return 0; 3968aa9ebccSVladimir Oltean } 3978aa9ebccSVladimir Oltean 3988aa9ebccSVladimir Oltean static int sja1105_init_l2_forwarding(struct sja1105_private *priv) 3998aa9ebccSVladimir Oltean { 4008aa9ebccSVladimir Oltean struct sja1105_l2_forwarding_entry *l2fwd; 401542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 4028aa9ebccSVladimir Oltean struct sja1105_table *table; 4038aa9ebccSVladimir Oltean int i, j; 4048aa9ebccSVladimir Oltean 4058aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING]; 4068aa9ebccSVladimir Oltean 4078aa9ebccSVladimir Oltean if (table->entry_count) { 4088aa9ebccSVladimir Oltean kfree(table->entries); 4098aa9ebccSVladimir Oltean table->entry_count = 0; 4108aa9ebccSVladimir Oltean } 4118aa9ebccSVladimir Oltean 412fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 4138aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 4148aa9ebccSVladimir Oltean if (!table->entries) 4158aa9ebccSVladimir Oltean return -ENOMEM; 4168aa9ebccSVladimir Oltean 417fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 4188aa9ebccSVladimir Oltean 4198aa9ebccSVladimir Oltean l2fwd = table->entries; 4208aa9ebccSVladimir Oltean 4218aa9ebccSVladimir Oltean /* First 5 entries define the forwarding rules */ 422542043e9SVladimir Oltean for (i = 0; i < ds->num_ports; i++) { 4238aa9ebccSVladimir Oltean unsigned int upstream = dsa_upstream_port(priv->ds, i); 4248aa9ebccSVladimir Oltean 425f238fef1SVladimir Oltean if (dsa_is_unused_port(ds, i)) 426f238fef1SVladimir Oltean continue; 427f238fef1SVladimir Oltean 4288aa9ebccSVladimir Oltean for (j = 0; j < SJA1105_NUM_TC; j++) 4298aa9ebccSVladimir Oltean l2fwd[i].vlan_pmap[j] = j; 4308aa9ebccSVladimir Oltean 4317f7ccdeaSVladimir Oltean /* All ports start up with egress flooding enabled, 4327f7ccdeaSVladimir Oltean * including the CPU port. 4337f7ccdeaSVladimir Oltean */ 4347f7ccdeaSVladimir Oltean priv->ucast_egress_floods |= BIT(i); 4357f7ccdeaSVladimir Oltean priv->bcast_egress_floods |= BIT(i); 4367f7ccdeaSVladimir Oltean 4378aa9ebccSVladimir Oltean if (i == upstream) 4388aa9ebccSVladimir Oltean continue; 4398aa9ebccSVladimir Oltean 4408aa9ebccSVladimir Oltean sja1105_port_allow_traffic(l2fwd, i, upstream, true); 4418aa9ebccSVladimir Oltean sja1105_port_allow_traffic(l2fwd, upstream, i, true); 4424d942354SVladimir Oltean 4434d942354SVladimir Oltean l2fwd[i].bc_domain = BIT(upstream); 4444d942354SVladimir Oltean l2fwd[i].fl_domain = BIT(upstream); 4454d942354SVladimir Oltean 4464d942354SVladimir Oltean l2fwd[upstream].bc_domain |= BIT(i); 4474d942354SVladimir Oltean l2fwd[upstream].fl_domain |= BIT(i); 4488aa9ebccSVladimir Oltean } 449f238fef1SVladimir Oltean 4508aa9ebccSVladimir Oltean /* Next 8 entries define VLAN PCP mapping from ingress to egress. 4518aa9ebccSVladimir Oltean * Create a one-to-one mapping. 4528aa9ebccSVladimir Oltean */ 453f238fef1SVladimir Oltean for (i = 0; i < SJA1105_NUM_TC; i++) { 454f238fef1SVladimir Oltean for (j = 0; j < ds->num_ports; j++) { 455f238fef1SVladimir Oltean if (dsa_is_unused_port(ds, j)) 456f238fef1SVladimir Oltean continue; 457f238fef1SVladimir Oltean 458542043e9SVladimir Oltean l2fwd[ds->num_ports + i].vlan_pmap[j] = i; 459f238fef1SVladimir Oltean } 4603e77e59bSVladimir Oltean 4613e77e59bSVladimir Oltean l2fwd[ds->num_ports + i].type_egrpcp2outputq = true; 4623e77e59bSVladimir Oltean } 4633e77e59bSVladimir Oltean 4643e77e59bSVladimir Oltean return 0; 4653e77e59bSVladimir Oltean } 4663e77e59bSVladimir Oltean 4673e77e59bSVladimir Oltean static int sja1110_init_pcp_remapping(struct sja1105_private *priv) 4683e77e59bSVladimir Oltean { 4693e77e59bSVladimir Oltean struct sja1110_pcp_remapping_entry *pcp_remap; 4703e77e59bSVladimir Oltean struct dsa_switch *ds = priv->ds; 4713e77e59bSVladimir Oltean struct sja1105_table *table; 4723e77e59bSVladimir Oltean int port, tc; 4733e77e59bSVladimir Oltean 4743e77e59bSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_PCP_REMAPPING]; 4753e77e59bSVladimir Oltean 4763e77e59bSVladimir Oltean /* Nothing to do for SJA1105 */ 4773e77e59bSVladimir Oltean if (!table->ops->max_entry_count) 4783e77e59bSVladimir Oltean return 0; 4793e77e59bSVladimir Oltean 4803e77e59bSVladimir Oltean if (table->entry_count) { 4813e77e59bSVladimir Oltean kfree(table->entries); 4823e77e59bSVladimir Oltean table->entry_count = 0; 4833e77e59bSVladimir Oltean } 4843e77e59bSVladimir Oltean 4853e77e59bSVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 4863e77e59bSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 4873e77e59bSVladimir Oltean if (!table->entries) 4883e77e59bSVladimir Oltean return -ENOMEM; 4893e77e59bSVladimir Oltean 4903e77e59bSVladimir Oltean table->entry_count = table->ops->max_entry_count; 4913e77e59bSVladimir Oltean 4923e77e59bSVladimir Oltean pcp_remap = table->entries; 4933e77e59bSVladimir Oltean 4943e77e59bSVladimir Oltean /* Repeat the configuration done for vlan_pmap */ 4953e77e59bSVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 4963e77e59bSVladimir Oltean if (dsa_is_unused_port(ds, port)) 4973e77e59bSVladimir Oltean continue; 4983e77e59bSVladimir Oltean 4993e77e59bSVladimir Oltean for (tc = 0; tc < SJA1105_NUM_TC; tc++) 5003e77e59bSVladimir Oltean pcp_remap[port].egrpcp[tc] = tc; 501f238fef1SVladimir Oltean } 5028aa9ebccSVladimir Oltean 5038aa9ebccSVladimir Oltean return 0; 5048aa9ebccSVladimir Oltean } 5058aa9ebccSVladimir Oltean 5068aa9ebccSVladimir Oltean static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv) 5078aa9ebccSVladimir Oltean { 5081bf658eeSVladimir Oltean struct sja1105_l2_forwarding_params_entry *l2fwd_params; 5098aa9ebccSVladimir Oltean struct sja1105_table *table; 5108aa9ebccSVladimir Oltean 5118aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS]; 5128aa9ebccSVladimir Oltean 5138aa9ebccSVladimir Oltean if (table->entry_count) { 5148aa9ebccSVladimir Oltean kfree(table->entries); 5158aa9ebccSVladimir Oltean table->entry_count = 0; 5168aa9ebccSVladimir Oltean } 5178aa9ebccSVladimir Oltean 518fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 5198aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 5208aa9ebccSVladimir Oltean if (!table->entries) 5218aa9ebccSVladimir Oltean return -ENOMEM; 5228aa9ebccSVladimir Oltean 523fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 5248aa9ebccSVladimir Oltean 5258aa9ebccSVladimir Oltean /* This table only has a single entry */ 5261bf658eeSVladimir Oltean l2fwd_params = table->entries; 5271bf658eeSVladimir Oltean 5281bf658eeSVladimir Oltean /* Disallow dynamic reconfiguration of vlan_pmap */ 5291bf658eeSVladimir Oltean l2fwd_params->max_dynp = 0; 5301bf658eeSVladimir Oltean /* Use a single memory partition for all ingress queues */ 5311bf658eeSVladimir Oltean l2fwd_params->part_spc[0] = priv->info->max_frame_mem; 5328aa9ebccSVladimir Oltean 5338aa9ebccSVladimir Oltean return 0; 5348aa9ebccSVladimir Oltean } 5358aa9ebccSVladimir Oltean 536aaa270c6SVladimir Oltean void sja1105_frame_memory_partitioning(struct sja1105_private *priv) 537aaa270c6SVladimir Oltean { 538aaa270c6SVladimir Oltean struct sja1105_l2_forwarding_params_entry *l2_fwd_params; 539aaa270c6SVladimir Oltean struct sja1105_vl_forwarding_params_entry *vl_fwd_params; 540aaa270c6SVladimir Oltean struct sja1105_table *table; 541aaa270c6SVladimir Oltean 542aaa270c6SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS]; 543aaa270c6SVladimir Oltean l2_fwd_params = table->entries; 5440fac6aa0SVladimir Oltean l2_fwd_params->part_spc[0] = SJA1105_MAX_FRAME_MEMORY; 545aaa270c6SVladimir Oltean 546aaa270c6SVladimir Oltean /* If we have any critical-traffic virtual links, we need to reserve 547aaa270c6SVladimir Oltean * some frame buffer memory for them. At the moment, hardcode the value 548aaa270c6SVladimir Oltean * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks 549aaa270c6SVladimir Oltean * remaining for best-effort traffic. TODO: figure out a more flexible 550aaa270c6SVladimir Oltean * way to perform the frame buffer partitioning. 551aaa270c6SVladimir Oltean */ 552aaa270c6SVladimir Oltean if (!priv->static_config.tables[BLK_IDX_VL_FORWARDING].entry_count) 553aaa270c6SVladimir Oltean return; 554aaa270c6SVladimir Oltean 555aaa270c6SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS]; 556aaa270c6SVladimir Oltean vl_fwd_params = table->entries; 557aaa270c6SVladimir Oltean 558aaa270c6SVladimir Oltean l2_fwd_params->part_spc[0] -= SJA1105_VL_FRAME_MEMORY; 559aaa270c6SVladimir Oltean vl_fwd_params->partspc[0] = SJA1105_VL_FRAME_MEMORY; 560aaa270c6SVladimir Oltean } 561aaa270c6SVladimir Oltean 562ceec8bc0SVladimir Oltean /* SJA1110 TDMACONFIGIDX values: 563ceec8bc0SVladimir Oltean * 564ceec8bc0SVladimir Oltean * | 100 Mbps ports | 1Gbps ports | 2.5Gbps ports | Disabled ports 565ceec8bc0SVladimir Oltean * -----+----------------+---------------+---------------+--------------- 566ceec8bc0SVladimir Oltean * 0 | 0, [5:10] | [1:2] | [3:4] | retag 567ceec8bc0SVladimir Oltean * 1 |0, [5:10], retag| [1:2] | [3:4] | - 568ceec8bc0SVladimir Oltean * 2 | 0, [5:10] | [1:3], retag | 4 | - 569ceec8bc0SVladimir Oltean * 3 | 0, [5:10] |[1:2], 4, retag| 3 | - 570ceec8bc0SVladimir Oltean * 4 | 0, 2, [5:10] | 1, retag | [3:4] | - 571ceec8bc0SVladimir Oltean * 5 | 0, 1, [5:10] | 2, retag | [3:4] | - 572ceec8bc0SVladimir Oltean * 14 | 0, [5:10] | [1:4], retag | - | - 573ceec8bc0SVladimir Oltean * 15 | [5:10] | [0:4], retag | - | - 574ceec8bc0SVladimir Oltean */ 575ceec8bc0SVladimir Oltean static void sja1110_select_tdmaconfigidx(struct sja1105_private *priv) 576ceec8bc0SVladimir Oltean { 577ceec8bc0SVladimir Oltean struct sja1105_general_params_entry *general_params; 578ceec8bc0SVladimir Oltean struct sja1105_table *table; 579ceec8bc0SVladimir Oltean bool port_1_is_base_tx; 580ceec8bc0SVladimir Oltean bool port_3_is_2500; 581ceec8bc0SVladimir Oltean bool port_4_is_2500; 582ceec8bc0SVladimir Oltean u64 tdmaconfigidx; 583ceec8bc0SVladimir Oltean 584ceec8bc0SVladimir Oltean if (priv->info->device_id != SJA1110_DEVICE_ID) 585ceec8bc0SVladimir Oltean return; 586ceec8bc0SVladimir Oltean 587ceec8bc0SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 588ceec8bc0SVladimir Oltean general_params = table->entries; 589ceec8bc0SVladimir Oltean 590ceec8bc0SVladimir Oltean /* All the settings below are "as opposed to SGMII", which is the 591ceec8bc0SVladimir Oltean * other pinmuxing option. 592ceec8bc0SVladimir Oltean */ 593ceec8bc0SVladimir Oltean port_1_is_base_tx = priv->phy_mode[1] == PHY_INTERFACE_MODE_INTERNAL; 594ceec8bc0SVladimir Oltean port_3_is_2500 = priv->phy_mode[3] == PHY_INTERFACE_MODE_2500BASEX; 595ceec8bc0SVladimir Oltean port_4_is_2500 = priv->phy_mode[4] == PHY_INTERFACE_MODE_2500BASEX; 596ceec8bc0SVladimir Oltean 597ceec8bc0SVladimir Oltean if (port_1_is_base_tx) 598ceec8bc0SVladimir Oltean /* Retagging port will operate at 1 Gbps */ 599ceec8bc0SVladimir Oltean tdmaconfigidx = 5; 600ceec8bc0SVladimir Oltean else if (port_3_is_2500 && port_4_is_2500) 601ceec8bc0SVladimir Oltean /* Retagging port will operate at 100 Mbps */ 602ceec8bc0SVladimir Oltean tdmaconfigidx = 1; 603ceec8bc0SVladimir Oltean else if (port_3_is_2500) 604ceec8bc0SVladimir Oltean /* Retagging port will operate at 1 Gbps */ 605ceec8bc0SVladimir Oltean tdmaconfigidx = 3; 606ceec8bc0SVladimir Oltean else if (port_4_is_2500) 607ceec8bc0SVladimir Oltean /* Retagging port will operate at 1 Gbps */ 608ceec8bc0SVladimir Oltean tdmaconfigidx = 2; 609ceec8bc0SVladimir Oltean else 610ceec8bc0SVladimir Oltean /* Retagging port will operate at 1 Gbps */ 611ceec8bc0SVladimir Oltean tdmaconfigidx = 14; 612ceec8bc0SVladimir Oltean 613ceec8bc0SVladimir Oltean general_params->tdmaconfigidx = tdmaconfigidx; 614ceec8bc0SVladimir Oltean } 615ceec8bc0SVladimir Oltean 6168aa9ebccSVladimir Oltean static int sja1105_init_general_params(struct sja1105_private *priv) 6178aa9ebccSVladimir Oltean { 6188aa9ebccSVladimir Oltean struct sja1105_general_params_entry default_general_params = { 619511e6ca0SVladimir Oltean /* Allow dynamic changing of the mirror port */ 620511e6ca0SVladimir Oltean .mirr_ptacu = true, 6218aa9ebccSVladimir Oltean .switchid = priv->ds->index, 6225f06c63bSVladimir Oltean /* Priority queue for link-local management frames 6235f06c63bSVladimir Oltean * (both ingress to and egress from CPU - PTP, STP etc) 6245f06c63bSVladimir Oltean */ 62508fde09aSVladimir Oltean .hostprio = 7, 6268aa9ebccSVladimir Oltean .mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A, 6278aa9ebccSVladimir Oltean .mac_flt1 = SJA1105_LINKLOCAL_FILTER_A_MASK, 62842824463SVladimir Oltean .incl_srcpt1 = false, 6298aa9ebccSVladimir Oltean .send_meta1 = false, 6308aa9ebccSVladimir Oltean .mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B, 6318aa9ebccSVladimir Oltean .mac_flt0 = SJA1105_LINKLOCAL_FILTER_B_MASK, 63242824463SVladimir Oltean .incl_srcpt0 = false, 6338aa9ebccSVladimir Oltean .send_meta0 = false, 6348aa9ebccSVladimir Oltean /* The destination for traffic matching mac_fltres1 and 6358aa9ebccSVladimir Oltean * mac_fltres0 on all ports except host_port. Such traffic 6368aa9ebccSVladimir Oltean * receieved on host_port itself would be dropped, except 6378aa9ebccSVladimir Oltean * by installing a temporary 'management route' 6388aa9ebccSVladimir Oltean */ 639df2a81a3SVladimir Oltean .host_port = priv->ds->num_ports, 640511e6ca0SVladimir Oltean /* Default to an invalid value */ 641542043e9SVladimir Oltean .mirr_port = priv->ds->num_ports, 6428aa9ebccSVladimir Oltean /* No TTEthernet */ 643dfacc5a2SVladimir Oltean .vllupformat = SJA1105_VL_FORMAT_PSFP, 6448aa9ebccSVladimir Oltean .vlmarker = 0, 6458aa9ebccSVladimir Oltean .vlmask = 0, 6468aa9ebccSVladimir Oltean /* Only update correctionField for 1-step PTP (L2 transport) */ 6478aa9ebccSVladimir Oltean .ignore2stf = 0, 6486666cebcSVladimir Oltean /* Forcefully disable VLAN filtering by telling 6496666cebcSVladimir Oltean * the switch that VLAN has a different EtherType. 6506666cebcSVladimir Oltean */ 6516666cebcSVladimir Oltean .tpid = ETH_P_SJA1105, 6526666cebcSVladimir Oltean .tpid2 = ETH_P_SJA1105, 65329305260SVladimir Oltean /* Enable the TTEthernet engine on SJA1110 */ 65429305260SVladimir Oltean .tte_en = true, 6554913b8ebSVladimir Oltean /* Set up the EtherType for control packets on SJA1110 */ 6564913b8ebSVladimir Oltean .header_type = ETH_P_SJA1110, 6578aa9ebccSVladimir Oltean }; 6586c0de59bSVladimir Oltean struct sja1105_general_params_entry *general_params; 659df2a81a3SVladimir Oltean struct dsa_switch *ds = priv->ds; 6608aa9ebccSVladimir Oltean struct sja1105_table *table; 661df2a81a3SVladimir Oltean int port; 662df2a81a3SVladimir Oltean 663df2a81a3SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 664df2a81a3SVladimir Oltean if (dsa_is_cpu_port(ds, port)) { 665df2a81a3SVladimir Oltean default_general_params.host_port = port; 666df2a81a3SVladimir Oltean break; 667df2a81a3SVladimir Oltean } 668df2a81a3SVladimir Oltean } 6698aa9ebccSVladimir Oltean 6708aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 6718aa9ebccSVladimir Oltean 6728aa9ebccSVladimir Oltean if (table->entry_count) { 6738aa9ebccSVladimir Oltean kfree(table->entries); 6748aa9ebccSVladimir Oltean table->entry_count = 0; 6758aa9ebccSVladimir Oltean } 6768aa9ebccSVladimir Oltean 677fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 6788aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 6798aa9ebccSVladimir Oltean if (!table->entries) 6808aa9ebccSVladimir Oltean return -ENOMEM; 6818aa9ebccSVladimir Oltean 682fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 6838aa9ebccSVladimir Oltean 6846c0de59bSVladimir Oltean general_params = table->entries; 6856c0de59bSVladimir Oltean 6868aa9ebccSVladimir Oltean /* This table only has a single entry */ 6876c0de59bSVladimir Oltean general_params[0] = default_general_params; 6888aa9ebccSVladimir Oltean 689ceec8bc0SVladimir Oltean sja1110_select_tdmaconfigidx(priv); 690ceec8bc0SVladimir Oltean 6916c0de59bSVladimir Oltean /* Link-local traffic received on casc_port will be forwarded 6926c0de59bSVladimir Oltean * to host_port without embedding the source port and device ID 6936c0de59bSVladimir Oltean * info in the destination MAC address, and no RX timestamps will be 6946c0de59bSVladimir Oltean * taken either (presumably because it is a cascaded port and a 6956c0de59bSVladimir Oltean * downstream SJA switch already did that). 6966c0de59bSVladimir Oltean * To disable the feature, we need to do different things depending on 6976c0de59bSVladimir Oltean * switch generation. On SJA1105 we need to set an invalid port, while 6986c0de59bSVladimir Oltean * on SJA1110 which support multiple cascaded ports, this field is a 6996c0de59bSVladimir Oltean * bitmask so it must be left zero. 7006c0de59bSVladimir Oltean */ 7016c0de59bSVladimir Oltean if (!priv->info->multiple_cascade_ports) 7026c0de59bSVladimir Oltean general_params->casc_port = ds->num_ports; 7036c0de59bSVladimir Oltean 7048aa9ebccSVladimir Oltean return 0; 7058aa9ebccSVladimir Oltean } 7068aa9ebccSVladimir Oltean 70779d5511cSVladimir Oltean static int sja1105_init_avb_params(struct sja1105_private *priv) 70879d5511cSVladimir Oltean { 70979d5511cSVladimir Oltean struct sja1105_avb_params_entry *avb; 71079d5511cSVladimir Oltean struct sja1105_table *table; 71179d5511cSVladimir Oltean 71279d5511cSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_AVB_PARAMS]; 71379d5511cSVladimir Oltean 71479d5511cSVladimir Oltean /* Discard previous AVB Parameters Table */ 71579d5511cSVladimir Oltean if (table->entry_count) { 71679d5511cSVladimir Oltean kfree(table->entries); 71779d5511cSVladimir Oltean table->entry_count = 0; 71879d5511cSVladimir Oltean } 71979d5511cSVladimir Oltean 720fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 72179d5511cSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 72279d5511cSVladimir Oltean if (!table->entries) 72379d5511cSVladimir Oltean return -ENOMEM; 72479d5511cSVladimir Oltean 725fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 72679d5511cSVladimir Oltean 72779d5511cSVladimir Oltean avb = table->entries; 72879d5511cSVladimir Oltean 72979d5511cSVladimir Oltean /* Configure the MAC addresses for meta frames */ 73079d5511cSVladimir Oltean avb->destmeta = SJA1105_META_DMAC; 73179d5511cSVladimir Oltean avb->srcmeta = SJA1105_META_SMAC; 732747e5eb3SVladimir Oltean /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by 733747e5eb3SVladimir Oltean * default. This is because there might be boards with a hardware 734747e5eb3SVladimir Oltean * layout where enabling the pin as output might cause an electrical 735747e5eb3SVladimir Oltean * clash. On E/T the pin is always an output, which the board designers 736747e5eb3SVladimir Oltean * probably already knew, so even if there are going to be electrical 737747e5eb3SVladimir Oltean * issues, there's nothing we can do. 738747e5eb3SVladimir Oltean */ 739747e5eb3SVladimir Oltean avb->cas_master = false; 74079d5511cSVladimir Oltean 74179d5511cSVladimir Oltean return 0; 74279d5511cSVladimir Oltean } 74379d5511cSVladimir Oltean 744a7cc081cSVladimir Oltean /* The L2 policing table is 2-stage. The table is looked up for each frame 745a7cc081cSVladimir Oltean * according to the ingress port, whether it was broadcast or not, and the 746a7cc081cSVladimir Oltean * classified traffic class (given by VLAN PCP). This portion of the lookup is 747a7cc081cSVladimir Oltean * fixed, and gives access to the SHARINDX, an indirection register pointing 748a7cc081cSVladimir Oltean * within the policing table itself, which is used to resolve the policer that 749a7cc081cSVladimir Oltean * will be used for this frame. 750a7cc081cSVladimir Oltean * 751a7cc081cSVladimir Oltean * Stage 1 Stage 2 752a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 753a7cc081cSVladimir Oltean * |Port 0 TC 0 |SHARINDX| | Policer 0: Rate, Burst, MTU | 754a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 755a7cc081cSVladimir Oltean * |Port 0 TC 1 |SHARINDX| | Policer 1: Rate, Burst, MTU | 756a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 757a7cc081cSVladimir Oltean * ... | Policer 2: Rate, Burst, MTU | 758a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 759a7cc081cSVladimir Oltean * |Port 0 TC 7 |SHARINDX| | Policer 3: Rate, Burst, MTU | 760a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 761a7cc081cSVladimir Oltean * |Port 1 TC 0 |SHARINDX| | Policer 4: Rate, Burst, MTU | 762a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 763a7cc081cSVladimir Oltean * ... | Policer 5: Rate, Burst, MTU | 764a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 765a7cc081cSVladimir Oltean * |Port 1 TC 7 |SHARINDX| | Policer 6: Rate, Burst, MTU | 766a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 767a7cc081cSVladimir Oltean * ... | Policer 7: Rate, Burst, MTU | 768a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 769a7cc081cSVladimir Oltean * |Port 4 TC 7 |SHARINDX| ... 770a7cc081cSVladimir Oltean * +------------+--------+ 771a7cc081cSVladimir Oltean * |Port 0 BCAST|SHARINDX| ... 772a7cc081cSVladimir Oltean * +------------+--------+ 773a7cc081cSVladimir Oltean * |Port 1 BCAST|SHARINDX| ... 774a7cc081cSVladimir Oltean * +------------+--------+ 775a7cc081cSVladimir Oltean * ... ... 776a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 777a7cc081cSVladimir Oltean * |Port 4 BCAST|SHARINDX| | Policer 44: Rate, Burst, MTU | 778a7cc081cSVladimir Oltean * +------------+--------+ +---------------------------------+ 779a7cc081cSVladimir Oltean * 780a7cc081cSVladimir Oltean * In this driver, we shall use policers 0-4 as statically alocated port 781a7cc081cSVladimir Oltean * (matchall) policers. So we need to make the SHARINDX for all lookups 782a7cc081cSVladimir Oltean * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast 783a7cc081cSVladimir Oltean * lookup) equal. 784a7cc081cSVladimir Oltean * The remaining policers (40) shall be dynamically allocated for flower 785a7cc081cSVladimir Oltean * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff. 786a7cc081cSVladimir Oltean */ 7878aa9ebccSVladimir Oltean #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000) 7888aa9ebccSVladimir Oltean 7898aa9ebccSVladimir Oltean static int sja1105_init_l2_policing(struct sja1105_private *priv) 7908aa9ebccSVladimir Oltean { 7918aa9ebccSVladimir Oltean struct sja1105_l2_policing_entry *policing; 792542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 7938aa9ebccSVladimir Oltean struct sja1105_table *table; 794a7cc081cSVladimir Oltean int port, tc; 7958aa9ebccSVladimir Oltean 7968aa9ebccSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_POLICING]; 7978aa9ebccSVladimir Oltean 7988aa9ebccSVladimir Oltean /* Discard previous L2 Policing Table */ 7998aa9ebccSVladimir Oltean if (table->entry_count) { 8008aa9ebccSVladimir Oltean kfree(table->entries); 8018aa9ebccSVladimir Oltean table->entry_count = 0; 8028aa9ebccSVladimir Oltean } 8038aa9ebccSVladimir Oltean 804fd6f2c25SVladimir Oltean table->entries = kcalloc(table->ops->max_entry_count, 8058aa9ebccSVladimir Oltean table->ops->unpacked_entry_size, GFP_KERNEL); 8068aa9ebccSVladimir Oltean if (!table->entries) 8078aa9ebccSVladimir Oltean return -ENOMEM; 8088aa9ebccSVladimir Oltean 809fd6f2c25SVladimir Oltean table->entry_count = table->ops->max_entry_count; 8108aa9ebccSVladimir Oltean 8118aa9ebccSVladimir Oltean policing = table->entries; 8128aa9ebccSVladimir Oltean 813a7cc081cSVladimir Oltean /* Setup shared indices for the matchall policers */ 814542043e9SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 81538fbe91fSVladimir Oltean int mcast = (ds->num_ports * (SJA1105_NUM_TC + 1)) + port; 816542043e9SVladimir Oltean int bcast = (ds->num_ports * SJA1105_NUM_TC) + port; 817a7cc081cSVladimir Oltean 818a7cc081cSVladimir Oltean for (tc = 0; tc < SJA1105_NUM_TC; tc++) 819a7cc081cSVladimir Oltean policing[port * SJA1105_NUM_TC + tc].sharindx = port; 820a7cc081cSVladimir Oltean 821a7cc081cSVladimir Oltean policing[bcast].sharindx = port; 82238fbe91fSVladimir Oltean /* Only SJA1110 has multicast policers */ 82338fbe91fSVladimir Oltean if (mcast <= table->ops->max_entry_count) 82438fbe91fSVladimir Oltean policing[mcast].sharindx = port; 825a7cc081cSVladimir Oltean } 826a7cc081cSVladimir Oltean 827a7cc081cSVladimir Oltean /* Setup the matchall policer parameters */ 828542043e9SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 829c279c726SVladimir Oltean int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN; 830c279c726SVladimir Oltean 831a7cc081cSVladimir Oltean if (dsa_is_cpu_port(priv->ds, port)) 832c279c726SVladimir Oltean mtu += VLAN_HLEN; 8338aa9ebccSVladimir Oltean 834a7cc081cSVladimir Oltean policing[port].smax = 65535; /* Burst size in bytes */ 835a7cc081cSVladimir Oltean policing[port].rate = SJA1105_RATE_MBPS(1000); 836a7cc081cSVladimir Oltean policing[port].maxlen = mtu; 837a7cc081cSVladimir Oltean policing[port].partition = 0; 8388aa9ebccSVladimir Oltean } 839a7cc081cSVladimir Oltean 8408aa9ebccSVladimir Oltean return 0; 8418aa9ebccSVladimir Oltean } 8428aa9ebccSVladimir Oltean 8435d645df9SVladimir Oltean static int sja1105_static_config_load(struct sja1105_private *priv) 8448aa9ebccSVladimir Oltean { 8458aa9ebccSVladimir Oltean int rc; 8468aa9ebccSVladimir Oltean 8478aa9ebccSVladimir Oltean sja1105_static_config_free(&priv->static_config); 8488aa9ebccSVladimir Oltean rc = sja1105_static_config_init(&priv->static_config, 8498aa9ebccSVladimir Oltean priv->info->static_ops, 8508aa9ebccSVladimir Oltean priv->info->device_id); 8518aa9ebccSVladimir Oltean if (rc) 8528aa9ebccSVladimir Oltean return rc; 8538aa9ebccSVladimir Oltean 8548aa9ebccSVladimir Oltean /* Build static configuration */ 8558aa9ebccSVladimir Oltean rc = sja1105_init_mac_settings(priv); 8568aa9ebccSVladimir Oltean if (rc < 0) 8578aa9ebccSVladimir Oltean return rc; 8585d645df9SVladimir Oltean rc = sja1105_init_mii_settings(priv); 8598aa9ebccSVladimir Oltean if (rc < 0) 8608aa9ebccSVladimir Oltean return rc; 8618aa9ebccSVladimir Oltean rc = sja1105_init_static_fdb(priv); 8628aa9ebccSVladimir Oltean if (rc < 0) 8638aa9ebccSVladimir Oltean return rc; 8648aa9ebccSVladimir Oltean rc = sja1105_init_static_vlan(priv); 8658aa9ebccSVladimir Oltean if (rc < 0) 8668aa9ebccSVladimir Oltean return rc; 8678aa9ebccSVladimir Oltean rc = sja1105_init_l2_lookup_params(priv); 8688aa9ebccSVladimir Oltean if (rc < 0) 8698aa9ebccSVladimir Oltean return rc; 8708aa9ebccSVladimir Oltean rc = sja1105_init_l2_forwarding(priv); 8718aa9ebccSVladimir Oltean if (rc < 0) 8728aa9ebccSVladimir Oltean return rc; 8738aa9ebccSVladimir Oltean rc = sja1105_init_l2_forwarding_params(priv); 8748aa9ebccSVladimir Oltean if (rc < 0) 8758aa9ebccSVladimir Oltean return rc; 8768aa9ebccSVladimir Oltean rc = sja1105_init_l2_policing(priv); 8778aa9ebccSVladimir Oltean if (rc < 0) 8788aa9ebccSVladimir Oltean return rc; 8798aa9ebccSVladimir Oltean rc = sja1105_init_general_params(priv); 8808aa9ebccSVladimir Oltean if (rc < 0) 8818aa9ebccSVladimir Oltean return rc; 88279d5511cSVladimir Oltean rc = sja1105_init_avb_params(priv); 88379d5511cSVladimir Oltean if (rc < 0) 88479d5511cSVladimir Oltean return rc; 8853e77e59bSVladimir Oltean rc = sja1110_init_pcp_remapping(priv); 8863e77e59bSVladimir Oltean if (rc < 0) 8873e77e59bSVladimir Oltean return rc; 8888aa9ebccSVladimir Oltean 8898aa9ebccSVladimir Oltean /* Send initial configuration to hardware via SPI */ 8908aa9ebccSVladimir Oltean return sja1105_static_config_upload(priv); 8918aa9ebccSVladimir Oltean } 8928aa9ebccSVladimir Oltean 89329afb83aSVladimir Oltean static int sja1105_parse_rgmii_delays(struct sja1105_private *priv) 894f5b8631cSVladimir Oltean { 895542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 89629afb83aSVladimir Oltean int port; 897f5b8631cSVladimir Oltean 89829afb83aSVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 89929afb83aSVladimir Oltean if (!priv->fixed_link[port]) 900f5b8631cSVladimir Oltean continue; 901f5b8631cSVladimir Oltean 90229afb83aSVladimir Oltean if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_RXID || 90329afb83aSVladimir Oltean priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID) 90429afb83aSVladimir Oltean priv->rgmii_rx_delay[port] = true; 905f5b8631cSVladimir Oltean 90629afb83aSVladimir Oltean if (priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_TXID || 90729afb83aSVladimir Oltean priv->phy_mode[port] == PHY_INTERFACE_MODE_RGMII_ID) 90829afb83aSVladimir Oltean priv->rgmii_tx_delay[port] = true; 909f5b8631cSVladimir Oltean 91029afb83aSVladimir Oltean if ((priv->rgmii_rx_delay[port] || priv->rgmii_tx_delay[port]) && 911f5b8631cSVladimir Oltean !priv->info->setup_rgmii_delay) 912f5b8631cSVladimir Oltean return -EINVAL; 913f5b8631cSVladimir Oltean } 914f5b8631cSVladimir Oltean return 0; 915f5b8631cSVladimir Oltean } 916f5b8631cSVladimir Oltean 9178aa9ebccSVladimir Oltean static int sja1105_parse_ports_node(struct sja1105_private *priv, 9188aa9ebccSVladimir Oltean struct device_node *ports_node) 9198aa9ebccSVladimir Oltean { 9208aa9ebccSVladimir Oltean struct device *dev = &priv->spidev->dev; 9218aa9ebccSVladimir Oltean struct device_node *child; 9228aa9ebccSVladimir Oltean 92327afe0d3SVladimir Oltean for_each_available_child_of_node(ports_node, child) { 9248aa9ebccSVladimir Oltean struct device_node *phy_node; 9250c65b2b9SAndrew Lunn phy_interface_t phy_mode; 9268aa9ebccSVladimir Oltean u32 index; 9270c65b2b9SAndrew Lunn int err; 9288aa9ebccSVladimir Oltean 9298aa9ebccSVladimir Oltean /* Get switch port number from DT */ 9308aa9ebccSVladimir Oltean if (of_property_read_u32(child, "reg", &index) < 0) { 9318aa9ebccSVladimir Oltean dev_err(dev, "Port number not defined in device tree " 9328aa9ebccSVladimir Oltean "(property \"reg\")\n"); 9337ba771e3SNishka Dasgupta of_node_put(child); 9348aa9ebccSVladimir Oltean return -ENODEV; 9358aa9ebccSVladimir Oltean } 9368aa9ebccSVladimir Oltean 9378aa9ebccSVladimir Oltean /* Get PHY mode from DT */ 9380c65b2b9SAndrew Lunn err = of_get_phy_mode(child, &phy_mode); 9390c65b2b9SAndrew Lunn if (err) { 9408aa9ebccSVladimir Oltean dev_err(dev, "Failed to read phy-mode or " 9418aa9ebccSVladimir Oltean "phy-interface-type property for port %d\n", 9428aa9ebccSVladimir Oltean index); 9437ba771e3SNishka Dasgupta of_node_put(child); 9448aa9ebccSVladimir Oltean return -ENODEV; 9458aa9ebccSVladimir Oltean } 9468aa9ebccSVladimir Oltean 9478aa9ebccSVladimir Oltean phy_node = of_parse_phandle(child, "phy-handle", 0); 9488aa9ebccSVladimir Oltean if (!phy_node) { 9498aa9ebccSVladimir Oltean if (!of_phy_is_fixed_link(child)) { 9508aa9ebccSVladimir Oltean dev_err(dev, "phy-handle or fixed-link " 9518aa9ebccSVladimir Oltean "properties missing!\n"); 9527ba771e3SNishka Dasgupta of_node_put(child); 9538aa9ebccSVladimir Oltean return -ENODEV; 9548aa9ebccSVladimir Oltean } 9558aa9ebccSVladimir Oltean /* phy-handle is missing, but fixed-link isn't. 9568aa9ebccSVladimir Oltean * So it's a fixed link. Default to PHY role. 9578aa9ebccSVladimir Oltean */ 95829afb83aSVladimir Oltean priv->fixed_link[index] = true; 9598aa9ebccSVladimir Oltean } else { 9608aa9ebccSVladimir Oltean of_node_put(phy_node); 9618aa9ebccSVladimir Oltean } 9628aa9ebccSVladimir Oltean 963bf4edf4aSVladimir Oltean priv->phy_mode[index] = phy_mode; 9648aa9ebccSVladimir Oltean } 9658aa9ebccSVladimir Oltean 9668aa9ebccSVladimir Oltean return 0; 9678aa9ebccSVladimir Oltean } 9688aa9ebccSVladimir Oltean 9695d645df9SVladimir Oltean static int sja1105_parse_dt(struct sja1105_private *priv) 9708aa9ebccSVladimir Oltean { 9718aa9ebccSVladimir Oltean struct device *dev = &priv->spidev->dev; 9728aa9ebccSVladimir Oltean struct device_node *switch_node = dev->of_node; 9738aa9ebccSVladimir Oltean struct device_node *ports_node; 9748aa9ebccSVladimir Oltean int rc; 9758aa9ebccSVladimir Oltean 9768aa9ebccSVladimir Oltean ports_node = of_get_child_by_name(switch_node, "ports"); 97715074a36SVladimir Oltean if (!ports_node) 97815074a36SVladimir Oltean ports_node = of_get_child_by_name(switch_node, "ethernet-ports"); 9798aa9ebccSVladimir Oltean if (!ports_node) { 9808aa9ebccSVladimir Oltean dev_err(dev, "Incorrect bindings: absent \"ports\" node\n"); 9818aa9ebccSVladimir Oltean return -ENODEV; 9828aa9ebccSVladimir Oltean } 9838aa9ebccSVladimir Oltean 9845d645df9SVladimir Oltean rc = sja1105_parse_ports_node(priv, ports_node); 9858aa9ebccSVladimir Oltean of_node_put(ports_node); 9868aa9ebccSVladimir Oltean 9878aa9ebccSVladimir Oltean return rc; 9888aa9ebccSVladimir Oltean } 9898aa9ebccSVladimir Oltean 990c44d0535SVladimir Oltean /* Convert link speed from SJA1105 to ethtool encoding */ 99141fed17fSVladimir Oltean static int sja1105_port_speed_to_ethtool(struct sja1105_private *priv, 99241fed17fSVladimir Oltean u64 speed) 99341fed17fSVladimir Oltean { 99441fed17fSVladimir Oltean if (speed == priv->info->port_speed[SJA1105_SPEED_10MBPS]) 99541fed17fSVladimir Oltean return SPEED_10; 99641fed17fSVladimir Oltean if (speed == priv->info->port_speed[SJA1105_SPEED_100MBPS]) 99741fed17fSVladimir Oltean return SPEED_100; 99841fed17fSVladimir Oltean if (speed == priv->info->port_speed[SJA1105_SPEED_1000MBPS]) 99941fed17fSVladimir Oltean return SPEED_1000; 100041fed17fSVladimir Oltean if (speed == priv->info->port_speed[SJA1105_SPEED_2500MBPS]) 100141fed17fSVladimir Oltean return SPEED_2500; 100241fed17fSVladimir Oltean return SPEED_UNKNOWN; 100341fed17fSVladimir Oltean } 10048aa9ebccSVladimir Oltean 10058400cff6SVladimir Oltean /* Set link speed in the MAC configuration for a specific port. */ 10068aa9ebccSVladimir Oltean static int sja1105_adjust_port_config(struct sja1105_private *priv, int port, 10078400cff6SVladimir Oltean int speed_mbps) 10088aa9ebccSVladimir Oltean { 10098aa9ebccSVladimir Oltean struct sja1105_mac_config_entry *mac; 10108aa9ebccSVladimir Oltean struct device *dev = priv->ds->dev; 101141fed17fSVladimir Oltean u64 speed; 10128aa9ebccSVladimir Oltean int rc; 10138aa9ebccSVladimir Oltean 10148400cff6SVladimir Oltean /* On P/Q/R/S, one can read from the device via the MAC reconfiguration 10158400cff6SVladimir Oltean * tables. On E/T, MAC reconfig tables are not readable, only writable. 10168400cff6SVladimir Oltean * We have to *know* what the MAC looks like. For the sake of keeping 10178400cff6SVladimir Oltean * the code common, we'll use the static configuration tables as a 10188400cff6SVladimir Oltean * reasonable approximation for both E/T and P/Q/R/S. 10198400cff6SVladimir Oltean */ 10208aa9ebccSVladimir Oltean mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 10218aa9ebccSVladimir Oltean 1022f4cfcfbdSVladimir Oltean switch (speed_mbps) { 1023c44d0535SVladimir Oltean case SPEED_UNKNOWN: 1024a979a0abSVladimir Oltean /* PHYLINK called sja1105_mac_config() to inform us about 1025a979a0abSVladimir Oltean * the state->interface, but AN has not completed and the 1026a979a0abSVladimir Oltean * speed is not yet valid. UM10944.pdf says that setting 1027a979a0abSVladimir Oltean * SJA1105_SPEED_AUTO at runtime disables the port, so that is 1028a979a0abSVladimir Oltean * ok for power consumption in case AN will never complete - 1029a979a0abSVladimir Oltean * otherwise PHYLINK should come back with a new update. 1030a979a0abSVladimir Oltean */ 103141fed17fSVladimir Oltean speed = priv->info->port_speed[SJA1105_SPEED_AUTO]; 1032f4cfcfbdSVladimir Oltean break; 1033c44d0535SVladimir Oltean case SPEED_10: 103441fed17fSVladimir Oltean speed = priv->info->port_speed[SJA1105_SPEED_10MBPS]; 1035f4cfcfbdSVladimir Oltean break; 1036c44d0535SVladimir Oltean case SPEED_100: 103741fed17fSVladimir Oltean speed = priv->info->port_speed[SJA1105_SPEED_100MBPS]; 1038f4cfcfbdSVladimir Oltean break; 1039c44d0535SVladimir Oltean case SPEED_1000: 104041fed17fSVladimir Oltean speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS]; 1041f4cfcfbdSVladimir Oltean break; 104256b63466SVladimir Oltean case SPEED_2500: 104356b63466SVladimir Oltean speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS]; 104456b63466SVladimir Oltean break; 1045f4cfcfbdSVladimir Oltean default: 10468aa9ebccSVladimir Oltean dev_err(dev, "Invalid speed %iMbps\n", speed_mbps); 10478aa9ebccSVladimir Oltean return -EINVAL; 10488aa9ebccSVladimir Oltean } 10498aa9ebccSVladimir Oltean 10508400cff6SVladimir Oltean /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration 10518400cff6SVladimir Oltean * table, since this will be used for the clocking setup, and we no 10528400cff6SVladimir Oltean * longer need to store it in the static config (already told hardware 10538400cff6SVladimir Oltean * we want auto during upload phase). 1054ffe10e67SVladimir Oltean * Actually for the SGMII port, the MAC is fixed at 1 Gbps and 1055ffe10e67SVladimir Oltean * we need to configure the PCS only (if even that). 10568aa9ebccSVladimir Oltean */ 105791a05078SVladimir Oltean if (priv->phy_mode[port] == PHY_INTERFACE_MODE_SGMII) 105841fed17fSVladimir Oltean mac[port].speed = priv->info->port_speed[SJA1105_SPEED_1000MBPS]; 105956b63466SVladimir Oltean else if (priv->phy_mode[port] == PHY_INTERFACE_MODE_2500BASEX) 106056b63466SVladimir Oltean mac[port].speed = priv->info->port_speed[SJA1105_SPEED_2500MBPS]; 1061ffe10e67SVladimir Oltean else 10628aa9ebccSVladimir Oltean mac[port].speed = speed; 10638aa9ebccSVladimir Oltean 10648aa9ebccSVladimir Oltean /* Write to the dynamic reconfiguration tables */ 10658400cff6SVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 10668400cff6SVladimir Oltean &mac[port], true); 10678aa9ebccSVladimir Oltean if (rc < 0) { 10688aa9ebccSVladimir Oltean dev_err(dev, "Failed to write MAC config: %d\n", rc); 10698aa9ebccSVladimir Oltean return rc; 10708aa9ebccSVladimir Oltean } 10718aa9ebccSVladimir Oltean 10728aa9ebccSVladimir Oltean /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at 10738aa9ebccSVladimir Oltean * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and 10748aa9ebccSVladimir Oltean * RMII no change of the clock setup is required. Actually, changing 10758aa9ebccSVladimir Oltean * the clock setup does interrupt the clock signal for a certain time 10768aa9ebccSVladimir Oltean * which causes trouble for all PHYs relying on this signal. 10778aa9ebccSVladimir Oltean */ 107891a05078SVladimir Oltean if (!phy_interface_mode_is_rgmii(priv->phy_mode[port])) 10798aa9ebccSVladimir Oltean return 0; 10808aa9ebccSVladimir Oltean 10818aa9ebccSVladimir Oltean return sja1105_clocking_setup_port(priv, port); 10828aa9ebccSVladimir Oltean } 10838aa9ebccSVladimir Oltean 108439710229SVladimir Oltean /* The SJA1105 MAC programming model is through the static config (the xMII 108539710229SVladimir Oltean * Mode table cannot be dynamically reconfigured), and we have to program 108639710229SVladimir Oltean * that early (earlier than PHYLINK calls us, anyway). 108739710229SVladimir Oltean * So just error out in case the connected PHY attempts to change the initial 108839710229SVladimir Oltean * system interface MII protocol from what is defined in the DT, at least for 108939710229SVladimir Oltean * now. 109039710229SVladimir Oltean */ 109139710229SVladimir Oltean static bool sja1105_phy_mode_mismatch(struct sja1105_private *priv, int port, 109239710229SVladimir Oltean phy_interface_t interface) 109339710229SVladimir Oltean { 1094bf4edf4aSVladimir Oltean return priv->phy_mode[port] != interface; 109539710229SVladimir Oltean } 109639710229SVladimir Oltean 1097af7cd036SVladimir Oltean static void sja1105_mac_config(struct dsa_switch *ds, int port, 1098ffe10e67SVladimir Oltean unsigned int mode, 1099af7cd036SVladimir Oltean const struct phylink_link_state *state) 11008aa9ebccSVladimir Oltean { 11013ad1d171SVladimir Oltean struct dsa_port *dp = dsa_to_port(ds, port); 11028aa9ebccSVladimir Oltean struct sja1105_private *priv = ds->priv; 11033ad1d171SVladimir Oltean struct dw_xpcs *xpcs; 11048aa9ebccSVladimir Oltean 1105ec8582d1SVladimir Oltean if (sja1105_phy_mode_mismatch(priv, port, state->interface)) { 1106ec8582d1SVladimir Oltean dev_err(ds->dev, "Changing PHY mode to %s not supported!\n", 1107ec8582d1SVladimir Oltean phy_modes(state->interface)); 110839710229SVladimir Oltean return; 1109ec8582d1SVladimir Oltean } 111039710229SVladimir Oltean 11113ad1d171SVladimir Oltean xpcs = priv->xpcs[port]; 1112ffe10e67SVladimir Oltean 11133ad1d171SVladimir Oltean if (xpcs) 11143ad1d171SVladimir Oltean phylink_set_pcs(dp->pl, &xpcs->pcs); 11158400cff6SVladimir Oltean } 11168400cff6SVladimir Oltean 11178400cff6SVladimir Oltean static void sja1105_mac_link_down(struct dsa_switch *ds, int port, 11188400cff6SVladimir Oltean unsigned int mode, 11198400cff6SVladimir Oltean phy_interface_t interface) 11208400cff6SVladimir Oltean { 11218400cff6SVladimir Oltean sja1105_inhibit_tx(ds->priv, BIT(port), true); 11228400cff6SVladimir Oltean } 11238400cff6SVladimir Oltean 11248400cff6SVladimir Oltean static void sja1105_mac_link_up(struct dsa_switch *ds, int port, 11258400cff6SVladimir Oltean unsigned int mode, 11268400cff6SVladimir Oltean phy_interface_t interface, 11275b502a7bSRussell King struct phy_device *phydev, 11285b502a7bSRussell King int speed, int duplex, 11295b502a7bSRussell King bool tx_pause, bool rx_pause) 11308400cff6SVladimir Oltean { 1131ec8582d1SVladimir Oltean struct sja1105_private *priv = ds->priv; 1132ec8582d1SVladimir Oltean 1133ec8582d1SVladimir Oltean sja1105_adjust_port_config(priv, port, speed); 1134ec8582d1SVladimir Oltean 1135ec8582d1SVladimir Oltean sja1105_inhibit_tx(priv, BIT(port), false); 11368aa9ebccSVladimir Oltean } 11378aa9ebccSVladimir Oltean 1138ad9f299aSVladimir Oltean static void sja1105_phylink_validate(struct dsa_switch *ds, int port, 1139ad9f299aSVladimir Oltean unsigned long *supported, 1140ad9f299aSVladimir Oltean struct phylink_link_state *state) 1141ad9f299aSVladimir Oltean { 1142ad9f299aSVladimir Oltean /* Construct a new mask which exhaustively contains all link features 1143ad9f299aSVladimir Oltean * supported by the MAC, and then apply that (logical AND) to what will 1144ad9f299aSVladimir Oltean * be sent to the PHY for "marketing". 1145ad9f299aSVladimir Oltean */ 1146ad9f299aSVladimir Oltean __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 1147ad9f299aSVladimir Oltean struct sja1105_private *priv = ds->priv; 1148ad9f299aSVladimir Oltean struct sja1105_xmii_params_entry *mii; 1149ad9f299aSVladimir Oltean 1150ad9f299aSVladimir Oltean mii = priv->static_config.tables[BLK_IDX_XMII_PARAMS].entries; 1151ad9f299aSVladimir Oltean 115239710229SVladimir Oltean /* include/linux/phylink.h says: 115339710229SVladimir Oltean * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink 115439710229SVladimir Oltean * expects the MAC driver to return all supported link modes. 115539710229SVladimir Oltean */ 115639710229SVladimir Oltean if (state->interface != PHY_INTERFACE_MODE_NA && 115739710229SVladimir Oltean sja1105_phy_mode_mismatch(priv, port, state->interface)) { 115839710229SVladimir Oltean bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 115939710229SVladimir Oltean return; 116039710229SVladimir Oltean } 116139710229SVladimir Oltean 1162ad9f299aSVladimir Oltean /* The MAC does not support pause frames, and also doesn't 1163ad9f299aSVladimir Oltean * support half-duplex traffic modes. 1164ad9f299aSVladimir Oltean */ 1165ad9f299aSVladimir Oltean phylink_set(mask, Autoneg); 1166ad9f299aSVladimir Oltean phylink_set(mask, MII); 1167ad9f299aSVladimir Oltean phylink_set(mask, 10baseT_Full); 1168ad9f299aSVladimir Oltean phylink_set(mask, 100baseT_Full); 1169ca68e138SOleksij Rempel phylink_set(mask, 100baseT1_Full); 1170ffe10e67SVladimir Oltean if (mii->xmii_mode[port] == XMII_MODE_RGMII || 1171ffe10e67SVladimir Oltean mii->xmii_mode[port] == XMII_MODE_SGMII) 1172ad9f299aSVladimir Oltean phylink_set(mask, 1000baseT_Full); 117356b63466SVladimir Oltean if (priv->info->supports_2500basex[port]) { 117456b63466SVladimir Oltean phylink_set(mask, 2500baseT_Full); 117556b63466SVladimir Oltean phylink_set(mask, 2500baseX_Full); 117656b63466SVladimir Oltean } 1177ad9f299aSVladimir Oltean 1178ad9f299aSVladimir Oltean bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); 1179ad9f299aSVladimir Oltean bitmap_and(state->advertising, state->advertising, mask, 1180ad9f299aSVladimir Oltean __ETHTOOL_LINK_MODE_MASK_NBITS); 1181ad9f299aSVladimir Oltean } 1182ad9f299aSVladimir Oltean 118360f6053fSVladimir Oltean static int 118460f6053fSVladimir Oltean sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port, 118560f6053fSVladimir Oltean const struct sja1105_l2_lookup_entry *requested) 118660f6053fSVladimir Oltean { 118760f6053fSVladimir Oltean struct sja1105_l2_lookup_entry *l2_lookup; 118860f6053fSVladimir Oltean struct sja1105_table *table; 118960f6053fSVladimir Oltean int i; 119060f6053fSVladimir Oltean 119160f6053fSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 119260f6053fSVladimir Oltean l2_lookup = table->entries; 119360f6053fSVladimir Oltean 119460f6053fSVladimir Oltean for (i = 0; i < table->entry_count; i++) 119560f6053fSVladimir Oltean if (l2_lookup[i].macaddr == requested->macaddr && 119660f6053fSVladimir Oltean l2_lookup[i].vlanid == requested->vlanid && 119760f6053fSVladimir Oltean l2_lookup[i].destports & BIT(port)) 119860f6053fSVladimir Oltean return i; 119960f6053fSVladimir Oltean 120060f6053fSVladimir Oltean return -1; 120160f6053fSVladimir Oltean } 120260f6053fSVladimir Oltean 120360f6053fSVladimir Oltean /* We want FDB entries added statically through the bridge command to persist 120460f6053fSVladimir Oltean * across switch resets, which are a common thing during normal SJA1105 120560f6053fSVladimir Oltean * operation. So we have to back them up in the static configuration tables 120660f6053fSVladimir Oltean * and hence apply them on next static config upload... yay! 120760f6053fSVladimir Oltean */ 120860f6053fSVladimir Oltean static int 120960f6053fSVladimir Oltean sja1105_static_fdb_change(struct sja1105_private *priv, int port, 121060f6053fSVladimir Oltean const struct sja1105_l2_lookup_entry *requested, 121160f6053fSVladimir Oltean bool keep) 121260f6053fSVladimir Oltean { 121360f6053fSVladimir Oltean struct sja1105_l2_lookup_entry *l2_lookup; 121460f6053fSVladimir Oltean struct sja1105_table *table; 121560f6053fSVladimir Oltean int rc, match; 121660f6053fSVladimir Oltean 121760f6053fSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 121860f6053fSVladimir Oltean 121960f6053fSVladimir Oltean match = sja1105_find_static_fdb_entry(priv, port, requested); 122060f6053fSVladimir Oltean if (match < 0) { 122160f6053fSVladimir Oltean /* Can't delete a missing entry. */ 122260f6053fSVladimir Oltean if (!keep) 122360f6053fSVladimir Oltean return 0; 122460f6053fSVladimir Oltean 122560f6053fSVladimir Oltean /* No match => new entry */ 122660f6053fSVladimir Oltean rc = sja1105_table_resize(table, table->entry_count + 1); 122760f6053fSVladimir Oltean if (rc) 122860f6053fSVladimir Oltean return rc; 122960f6053fSVladimir Oltean 123060f6053fSVladimir Oltean match = table->entry_count - 1; 123160f6053fSVladimir Oltean } 123260f6053fSVladimir Oltean 123360f6053fSVladimir Oltean /* Assign pointer after the resize (it may be new memory) */ 123460f6053fSVladimir Oltean l2_lookup = table->entries; 123560f6053fSVladimir Oltean 123660f6053fSVladimir Oltean /* We have a match. 123760f6053fSVladimir Oltean * If the job was to add this FDB entry, it's already done (mostly 123860f6053fSVladimir Oltean * anyway, since the port forwarding mask may have changed, case in 123960f6053fSVladimir Oltean * which we update it). 124060f6053fSVladimir Oltean * Otherwise we have to delete it. 124160f6053fSVladimir Oltean */ 124260f6053fSVladimir Oltean if (keep) { 124360f6053fSVladimir Oltean l2_lookup[match] = *requested; 124460f6053fSVladimir Oltean return 0; 124560f6053fSVladimir Oltean } 124660f6053fSVladimir Oltean 124760f6053fSVladimir Oltean /* To remove, the strategy is to overwrite the element with 124860f6053fSVladimir Oltean * the last one, and then reduce the array size by 1 124960f6053fSVladimir Oltean */ 125060f6053fSVladimir Oltean l2_lookup[match] = l2_lookup[table->entry_count - 1]; 125160f6053fSVladimir Oltean return sja1105_table_resize(table, table->entry_count - 1); 125260f6053fSVladimir Oltean } 125360f6053fSVladimir Oltean 1254291d1e72SVladimir Oltean /* First-generation switches have a 4-way set associative TCAM that 1255291d1e72SVladimir Oltean * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of 1256291d1e72SVladimir Oltean * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin). 1257291d1e72SVladimir Oltean * For the placement of a newly learnt FDB entry, the switch selects the bin 1258291d1e72SVladimir Oltean * based on a hash function, and the way within that bin incrementally. 1259291d1e72SVladimir Oltean */ 126009c1b412SVladimir Oltean static int sja1105et_fdb_index(int bin, int way) 1261291d1e72SVladimir Oltean { 1262291d1e72SVladimir Oltean return bin * SJA1105ET_FDB_BIN_SIZE + way; 1263291d1e72SVladimir Oltean } 1264291d1e72SVladimir Oltean 12659dfa6911SVladimir Oltean static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin, 1266291d1e72SVladimir Oltean const u8 *addr, u16 vid, 1267291d1e72SVladimir Oltean struct sja1105_l2_lookup_entry *match, 1268291d1e72SVladimir Oltean int *last_unused) 1269291d1e72SVladimir Oltean { 1270291d1e72SVladimir Oltean int way; 1271291d1e72SVladimir Oltean 1272291d1e72SVladimir Oltean for (way = 0; way < SJA1105ET_FDB_BIN_SIZE; way++) { 1273291d1e72SVladimir Oltean struct sja1105_l2_lookup_entry l2_lookup = {0}; 1274291d1e72SVladimir Oltean int index = sja1105et_fdb_index(bin, way); 1275291d1e72SVladimir Oltean 1276291d1e72SVladimir Oltean /* Skip unused entries, optionally marking them 1277291d1e72SVladimir Oltean * into the return value 1278291d1e72SVladimir Oltean */ 1279291d1e72SVladimir Oltean if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 1280291d1e72SVladimir Oltean index, &l2_lookup)) { 1281291d1e72SVladimir Oltean if (last_unused) 1282291d1e72SVladimir Oltean *last_unused = way; 1283291d1e72SVladimir Oltean continue; 1284291d1e72SVladimir Oltean } 1285291d1e72SVladimir Oltean 1286291d1e72SVladimir Oltean if (l2_lookup.macaddr == ether_addr_to_u64(addr) && 1287291d1e72SVladimir Oltean l2_lookup.vlanid == vid) { 1288291d1e72SVladimir Oltean if (match) 1289291d1e72SVladimir Oltean *match = l2_lookup; 1290291d1e72SVladimir Oltean return way; 1291291d1e72SVladimir Oltean } 1292291d1e72SVladimir Oltean } 1293291d1e72SVladimir Oltean /* Return an invalid entry index if not found */ 1294291d1e72SVladimir Oltean return -1; 1295291d1e72SVladimir Oltean } 1296291d1e72SVladimir Oltean 12979dfa6911SVladimir Oltean int sja1105et_fdb_add(struct dsa_switch *ds, int port, 1298291d1e72SVladimir Oltean const unsigned char *addr, u16 vid) 1299291d1e72SVladimir Oltean { 1300291d1e72SVladimir Oltean struct sja1105_l2_lookup_entry l2_lookup = {0}; 1301291d1e72SVladimir Oltean struct sja1105_private *priv = ds->priv; 1302291d1e72SVladimir Oltean struct device *dev = ds->dev; 1303291d1e72SVladimir Oltean int last_unused = -1; 130460f6053fSVladimir Oltean int bin, way, rc; 1305291d1e72SVladimir Oltean 13069dfa6911SVladimir Oltean bin = sja1105et_fdb_hash(priv, addr, vid); 1307291d1e72SVladimir Oltean 13089dfa6911SVladimir Oltean way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid, 1309291d1e72SVladimir Oltean &l2_lookup, &last_unused); 1310291d1e72SVladimir Oltean if (way >= 0) { 1311291d1e72SVladimir Oltean /* We have an FDB entry. Is our port in the destination 1312291d1e72SVladimir Oltean * mask? If yes, we need to do nothing. If not, we need 1313291d1e72SVladimir Oltean * to rewrite the entry by adding this port to it. 1314291d1e72SVladimir Oltean */ 1315291d1e72SVladimir Oltean if (l2_lookup.destports & BIT(port)) 1316291d1e72SVladimir Oltean return 0; 1317291d1e72SVladimir Oltean l2_lookup.destports |= BIT(port); 1318291d1e72SVladimir Oltean } else { 1319291d1e72SVladimir Oltean int index = sja1105et_fdb_index(bin, way); 1320291d1e72SVladimir Oltean 1321291d1e72SVladimir Oltean /* We don't have an FDB entry. We construct a new one and 1322291d1e72SVladimir Oltean * try to find a place for it within the FDB table. 1323291d1e72SVladimir Oltean */ 1324291d1e72SVladimir Oltean l2_lookup.macaddr = ether_addr_to_u64(addr); 1325291d1e72SVladimir Oltean l2_lookup.destports = BIT(port); 1326291d1e72SVladimir Oltean l2_lookup.vlanid = vid; 1327291d1e72SVladimir Oltean 1328291d1e72SVladimir Oltean if (last_unused >= 0) { 1329291d1e72SVladimir Oltean way = last_unused; 1330291d1e72SVladimir Oltean } else { 1331291d1e72SVladimir Oltean /* Bin is full, need to evict somebody. 1332291d1e72SVladimir Oltean * Choose victim at random. If you get these messages 1333291d1e72SVladimir Oltean * often, you may need to consider changing the 1334291d1e72SVladimir Oltean * distribution function: 1335291d1e72SVladimir Oltean * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly 1336291d1e72SVladimir Oltean */ 1337291d1e72SVladimir Oltean get_random_bytes(&way, sizeof(u8)); 1338291d1e72SVladimir Oltean way %= SJA1105ET_FDB_BIN_SIZE; 1339291d1e72SVladimir Oltean dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n", 1340291d1e72SVladimir Oltean bin, addr, way); 1341291d1e72SVladimir Oltean /* Evict entry */ 1342291d1e72SVladimir Oltean sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1343291d1e72SVladimir Oltean index, NULL, false); 1344291d1e72SVladimir Oltean } 1345291d1e72SVladimir Oltean } 1346291d1e72SVladimir Oltean l2_lookup.index = sja1105et_fdb_index(bin, way); 1347291d1e72SVladimir Oltean 134860f6053fSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1349291d1e72SVladimir Oltean l2_lookup.index, &l2_lookup, 1350291d1e72SVladimir Oltean true); 135160f6053fSVladimir Oltean if (rc < 0) 135260f6053fSVladimir Oltean return rc; 135360f6053fSVladimir Oltean 135460f6053fSVladimir Oltean return sja1105_static_fdb_change(priv, port, &l2_lookup, true); 1355291d1e72SVladimir Oltean } 1356291d1e72SVladimir Oltean 13579dfa6911SVladimir Oltean int sja1105et_fdb_del(struct dsa_switch *ds, int port, 1358291d1e72SVladimir Oltean const unsigned char *addr, u16 vid) 1359291d1e72SVladimir Oltean { 1360291d1e72SVladimir Oltean struct sja1105_l2_lookup_entry l2_lookup = {0}; 1361291d1e72SVladimir Oltean struct sja1105_private *priv = ds->priv; 136260f6053fSVladimir Oltean int index, bin, way, rc; 1363291d1e72SVladimir Oltean bool keep; 1364291d1e72SVladimir Oltean 13659dfa6911SVladimir Oltean bin = sja1105et_fdb_hash(priv, addr, vid); 13669dfa6911SVladimir Oltean way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid, 1367291d1e72SVladimir Oltean &l2_lookup, NULL); 1368291d1e72SVladimir Oltean if (way < 0) 1369291d1e72SVladimir Oltean return 0; 1370291d1e72SVladimir Oltean index = sja1105et_fdb_index(bin, way); 1371291d1e72SVladimir Oltean 1372291d1e72SVladimir Oltean /* We have an FDB entry. Is our port in the destination mask? If yes, 1373291d1e72SVladimir Oltean * we need to remove it. If the resulting port mask becomes empty, we 1374291d1e72SVladimir Oltean * need to completely evict the FDB entry. 1375291d1e72SVladimir Oltean * Otherwise we just write it back. 1376291d1e72SVladimir Oltean */ 1377291d1e72SVladimir Oltean l2_lookup.destports &= ~BIT(port); 13787752e937SVladimir Oltean 1379291d1e72SVladimir Oltean if (l2_lookup.destports) 1380291d1e72SVladimir Oltean keep = true; 1381291d1e72SVladimir Oltean else 1382291d1e72SVladimir Oltean keep = false; 1383291d1e72SVladimir Oltean 138460f6053fSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 1385291d1e72SVladimir Oltean index, &l2_lookup, keep); 138660f6053fSVladimir Oltean if (rc < 0) 138760f6053fSVladimir Oltean return rc; 138860f6053fSVladimir Oltean 138960f6053fSVladimir Oltean return sja1105_static_fdb_change(priv, port, &l2_lookup, keep); 1390291d1e72SVladimir Oltean } 1391291d1e72SVladimir Oltean 13929dfa6911SVladimir Oltean int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, 13939dfa6911SVladimir Oltean const unsigned char *addr, u16 vid) 13949dfa6911SVladimir Oltean { 13951da73821SVladimir Oltean struct sja1105_l2_lookup_entry l2_lookup = {0}; 13961da73821SVladimir Oltean struct sja1105_private *priv = ds->priv; 13971da73821SVladimir Oltean int rc, i; 13981da73821SVladimir Oltean 13991da73821SVladimir Oltean /* Search for an existing entry in the FDB table */ 14001da73821SVladimir Oltean l2_lookup.macaddr = ether_addr_to_u64(addr); 14011da73821SVladimir Oltean l2_lookup.vlanid = vid; 14021da73821SVladimir Oltean l2_lookup.iotag = SJA1105_S_TAG; 14031da73821SVladimir Oltean l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0); 14040fac6aa0SVladimir Oltean if (priv->vlan_aware) { 14051da73821SVladimir Oltean l2_lookup.mask_vlanid = VLAN_VID_MASK; 14061da73821SVladimir Oltean l2_lookup.mask_iotag = BIT(0); 14076d7c7d94SVladimir Oltean } else { 14086d7c7d94SVladimir Oltean l2_lookup.mask_vlanid = 0; 14096d7c7d94SVladimir Oltean l2_lookup.mask_iotag = 0; 14106d7c7d94SVladimir Oltean } 14111da73821SVladimir Oltean l2_lookup.destports = BIT(port); 14121da73821SVladimir Oltean 14131da73821SVladimir Oltean rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 14141da73821SVladimir Oltean SJA1105_SEARCH, &l2_lookup); 14151da73821SVladimir Oltean if (rc == 0) { 14161da73821SVladimir Oltean /* Found and this port is already in the entry's 14171da73821SVladimir Oltean * port mask => job done 14181da73821SVladimir Oltean */ 14191da73821SVladimir Oltean if (l2_lookup.destports & BIT(port)) 14201da73821SVladimir Oltean return 0; 14211da73821SVladimir Oltean /* l2_lookup.index is populated by the switch in case it 14221da73821SVladimir Oltean * found something. 14231da73821SVladimir Oltean */ 14241da73821SVladimir Oltean l2_lookup.destports |= BIT(port); 14251da73821SVladimir Oltean goto skip_finding_an_index; 14261da73821SVladimir Oltean } 14271da73821SVladimir Oltean 14281da73821SVladimir Oltean /* Not found, so try to find an unused spot in the FDB. 14291da73821SVladimir Oltean * This is slightly inefficient because the strategy is knock-knock at 14301da73821SVladimir Oltean * every possible position from 0 to 1023. 14311da73821SVladimir Oltean */ 14321da73821SVladimir Oltean for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) { 14331da73821SVladimir Oltean rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 14341da73821SVladimir Oltean i, NULL); 14351da73821SVladimir Oltean if (rc < 0) 14361da73821SVladimir Oltean break; 14371da73821SVladimir Oltean } 14381da73821SVladimir Oltean if (i == SJA1105_MAX_L2_LOOKUP_COUNT) { 14391da73821SVladimir Oltean dev_err(ds->dev, "FDB is full, cannot add entry.\n"); 14401da73821SVladimir Oltean return -EINVAL; 14411da73821SVladimir Oltean } 144217ae6555SVladimir Oltean l2_lookup.lockeds = true; 14431da73821SVladimir Oltean l2_lookup.index = i; 14441da73821SVladimir Oltean 14451da73821SVladimir Oltean skip_finding_an_index: 144660f6053fSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 14471da73821SVladimir Oltean l2_lookup.index, &l2_lookup, 14481da73821SVladimir Oltean true); 144960f6053fSVladimir Oltean if (rc < 0) 145060f6053fSVladimir Oltean return rc; 145160f6053fSVladimir Oltean 145260f6053fSVladimir Oltean return sja1105_static_fdb_change(priv, port, &l2_lookup, true); 14539dfa6911SVladimir Oltean } 14549dfa6911SVladimir Oltean 14559dfa6911SVladimir Oltean int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, 14569dfa6911SVladimir Oltean const unsigned char *addr, u16 vid) 14579dfa6911SVladimir Oltean { 14581da73821SVladimir Oltean struct sja1105_l2_lookup_entry l2_lookup = {0}; 14591da73821SVladimir Oltean struct sja1105_private *priv = ds->priv; 14601da73821SVladimir Oltean bool keep; 14611da73821SVladimir Oltean int rc; 14621da73821SVladimir Oltean 14631da73821SVladimir Oltean l2_lookup.macaddr = ether_addr_to_u64(addr); 14641da73821SVladimir Oltean l2_lookup.vlanid = vid; 14651da73821SVladimir Oltean l2_lookup.iotag = SJA1105_S_TAG; 14661da73821SVladimir Oltean l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0); 14670fac6aa0SVladimir Oltean if (priv->vlan_aware) { 14681da73821SVladimir Oltean l2_lookup.mask_vlanid = VLAN_VID_MASK; 14691da73821SVladimir Oltean l2_lookup.mask_iotag = BIT(0); 14706d7c7d94SVladimir Oltean } else { 14716d7c7d94SVladimir Oltean l2_lookup.mask_vlanid = 0; 14726d7c7d94SVladimir Oltean l2_lookup.mask_iotag = 0; 14736d7c7d94SVladimir Oltean } 14741da73821SVladimir Oltean l2_lookup.destports = BIT(port); 14751da73821SVladimir Oltean 14761da73821SVladimir Oltean rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 14771da73821SVladimir Oltean SJA1105_SEARCH, &l2_lookup); 14781da73821SVladimir Oltean if (rc < 0) 14791da73821SVladimir Oltean return 0; 14801da73821SVladimir Oltean 14811da73821SVladimir Oltean l2_lookup.destports &= ~BIT(port); 14821da73821SVladimir Oltean 14831da73821SVladimir Oltean /* Decide whether we remove just this port from the FDB entry, 14841da73821SVladimir Oltean * or if we remove it completely. 14851da73821SVladimir Oltean */ 14861da73821SVladimir Oltean if (l2_lookup.destports) 14871da73821SVladimir Oltean keep = true; 14881da73821SVladimir Oltean else 14891da73821SVladimir Oltean keep = false; 14901da73821SVladimir Oltean 149160f6053fSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 14921da73821SVladimir Oltean l2_lookup.index, &l2_lookup, keep); 149360f6053fSVladimir Oltean if (rc < 0) 149460f6053fSVladimir Oltean return rc; 149560f6053fSVladimir Oltean 149660f6053fSVladimir Oltean return sja1105_static_fdb_change(priv, port, &l2_lookup, keep); 14979dfa6911SVladimir Oltean } 14989dfa6911SVladimir Oltean 14999dfa6911SVladimir Oltean static int sja1105_fdb_add(struct dsa_switch *ds, int port, 15009dfa6911SVladimir Oltean const unsigned char *addr, u16 vid) 15019dfa6911SVladimir Oltean { 15029dfa6911SVladimir Oltean struct sja1105_private *priv = ds->priv; 1503b3ee526aSVladimir Oltean 15046d7c7d94SVladimir Oltean /* dsa_8021q is in effect when the bridge's vlan_filtering isn't, 15056d7c7d94SVladimir Oltean * so the switch still does some VLAN processing internally. 15066d7c7d94SVladimir Oltean * But Shared VLAN Learning (SVL) is also active, and it will take 15076d7c7d94SVladimir Oltean * care of autonomous forwarding between the unique pvid's of each 15086d7c7d94SVladimir Oltean * port. Here we just make sure that users can't add duplicate FDB 15096d7c7d94SVladimir Oltean * entries when in this mode - the actual VID doesn't matter except 15106d7c7d94SVladimir Oltean * for what gets printed in 'bridge fdb show'. In the case of zero, 15116d7c7d94SVladimir Oltean * no VID gets printed at all. 151293647594SVladimir Oltean */ 15130fac6aa0SVladimir Oltean if (!priv->vlan_aware) 15146d7c7d94SVladimir Oltean vid = 0; 151593647594SVladimir Oltean 15166d7c7d94SVladimir Oltean return priv->info->fdb_add_cmd(ds, port, addr, vid); 15179dfa6911SVladimir Oltean } 15189dfa6911SVladimir Oltean 15199dfa6911SVladimir Oltean static int sja1105_fdb_del(struct dsa_switch *ds, int port, 15209dfa6911SVladimir Oltean const unsigned char *addr, u16 vid) 15219dfa6911SVladimir Oltean { 15229dfa6911SVladimir Oltean struct sja1105_private *priv = ds->priv; 15239dfa6911SVladimir Oltean 15240fac6aa0SVladimir Oltean if (!priv->vlan_aware) 15256d7c7d94SVladimir Oltean vid = 0; 15266d7c7d94SVladimir Oltean 1527b3ee526aSVladimir Oltean return priv->info->fdb_del_cmd(ds, port, addr, vid); 15289dfa6911SVladimir Oltean } 15299dfa6911SVladimir Oltean 1530291d1e72SVladimir Oltean static int sja1105_fdb_dump(struct dsa_switch *ds, int port, 1531291d1e72SVladimir Oltean dsa_fdb_dump_cb_t *cb, void *data) 1532291d1e72SVladimir Oltean { 1533291d1e72SVladimir Oltean struct sja1105_private *priv = ds->priv; 1534291d1e72SVladimir Oltean struct device *dev = ds->dev; 1535291d1e72SVladimir Oltean int i; 1536291d1e72SVladimir Oltean 1537291d1e72SVladimir Oltean for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) { 1538291d1e72SVladimir Oltean struct sja1105_l2_lookup_entry l2_lookup = {0}; 1539291d1e72SVladimir Oltean u8 macaddr[ETH_ALEN]; 1540291d1e72SVladimir Oltean int rc; 1541291d1e72SVladimir Oltean 1542291d1e72SVladimir Oltean rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP, 1543291d1e72SVladimir Oltean i, &l2_lookup); 1544291d1e72SVladimir Oltean /* No fdb entry at i, not an issue */ 1545def84604SVladimir Oltean if (rc == -ENOENT) 1546291d1e72SVladimir Oltean continue; 1547291d1e72SVladimir Oltean if (rc) { 1548291d1e72SVladimir Oltean dev_err(dev, "Failed to dump FDB: %d\n", rc); 1549291d1e72SVladimir Oltean return rc; 1550291d1e72SVladimir Oltean } 1551291d1e72SVladimir Oltean 1552291d1e72SVladimir Oltean /* FDB dump callback is per port. This means we have to 1553291d1e72SVladimir Oltean * disregard a valid entry if it's not for this port, even if 1554291d1e72SVladimir Oltean * only to revisit it later. This is inefficient because the 1555291d1e72SVladimir Oltean * 1024-sized FDB table needs to be traversed 4 times through 1556291d1e72SVladimir Oltean * SPI during a 'bridge fdb show' command. 1557291d1e72SVladimir Oltean */ 1558291d1e72SVladimir Oltean if (!(l2_lookup.destports & BIT(port))) 1559291d1e72SVladimir Oltean continue; 15604d942354SVladimir Oltean 15614d942354SVladimir Oltean /* We need to hide the FDB entry for unknown multicast */ 15624d942354SVladimir Oltean if (l2_lookup.macaddr == SJA1105_UNKNOWN_MULTICAST && 15634d942354SVladimir Oltean l2_lookup.mask_macaddr == SJA1105_UNKNOWN_MULTICAST) 15644d942354SVladimir Oltean continue; 15654d942354SVladimir Oltean 1566291d1e72SVladimir Oltean u64_to_ether_addr(l2_lookup.macaddr, macaddr); 156793647594SVladimir Oltean 15686d7c7d94SVladimir Oltean /* We need to hide the dsa_8021q VLANs from the user. */ 15690fac6aa0SVladimir Oltean if (!priv->vlan_aware) 15706d7c7d94SVladimir Oltean l2_lookup.vlanid = 0; 157117ae6555SVladimir Oltean cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data); 1572291d1e72SVladimir Oltean } 1573291d1e72SVladimir Oltean return 0; 1574291d1e72SVladimir Oltean } 1575291d1e72SVladimir Oltean 1576a52b2da7SVladimir Oltean static int sja1105_mdb_add(struct dsa_switch *ds, int port, 1577291d1e72SVladimir Oltean const struct switchdev_obj_port_mdb *mdb) 1578291d1e72SVladimir Oltean { 1579a52b2da7SVladimir Oltean return sja1105_fdb_add(ds, port, mdb->addr, mdb->vid); 1580291d1e72SVladimir Oltean } 1581291d1e72SVladimir Oltean 1582291d1e72SVladimir Oltean static int sja1105_mdb_del(struct dsa_switch *ds, int port, 1583291d1e72SVladimir Oltean const struct switchdev_obj_port_mdb *mdb) 1584291d1e72SVladimir Oltean { 1585291d1e72SVladimir Oltean return sja1105_fdb_del(ds, port, mdb->addr, mdb->vid); 1586291d1e72SVladimir Oltean } 1587291d1e72SVladimir Oltean 15887f7ccdeaSVladimir Oltean /* Common function for unicast and broadcast flood configuration. 15897f7ccdeaSVladimir Oltean * Flooding is configured between each {ingress, egress} port pair, and since 15907f7ccdeaSVladimir Oltean * the bridge's semantics are those of "egress flooding", it means we must 15917f7ccdeaSVladimir Oltean * enable flooding towards this port from all ingress ports that are in the 15927f7ccdeaSVladimir Oltean * same forwarding domain. 15937f7ccdeaSVladimir Oltean */ 15947f7ccdeaSVladimir Oltean static int sja1105_manage_flood_domains(struct sja1105_private *priv) 15957f7ccdeaSVladimir Oltean { 15967f7ccdeaSVladimir Oltean struct sja1105_l2_forwarding_entry *l2_fwd; 15977f7ccdeaSVladimir Oltean struct dsa_switch *ds = priv->ds; 15987f7ccdeaSVladimir Oltean int from, to, rc; 15997f7ccdeaSVladimir Oltean 16007f7ccdeaSVladimir Oltean l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries; 16017f7ccdeaSVladimir Oltean 16027f7ccdeaSVladimir Oltean for (from = 0; from < ds->num_ports; from++) { 16037f7ccdeaSVladimir Oltean u64 fl_domain = 0, bc_domain = 0; 16047f7ccdeaSVladimir Oltean 16057f7ccdeaSVladimir Oltean for (to = 0; to < priv->ds->num_ports; to++) { 16067f7ccdeaSVladimir Oltean if (!sja1105_can_forward(l2_fwd, from, to)) 16077f7ccdeaSVladimir Oltean continue; 16087f7ccdeaSVladimir Oltean 16097f7ccdeaSVladimir Oltean if (priv->ucast_egress_floods & BIT(to)) 16107f7ccdeaSVladimir Oltean fl_domain |= BIT(to); 16117f7ccdeaSVladimir Oltean if (priv->bcast_egress_floods & BIT(to)) 16127f7ccdeaSVladimir Oltean bc_domain |= BIT(to); 16137f7ccdeaSVladimir Oltean } 16147f7ccdeaSVladimir Oltean 16157f7ccdeaSVladimir Oltean /* Nothing changed, nothing to do */ 16167f7ccdeaSVladimir Oltean if (l2_fwd[from].fl_domain == fl_domain && 16177f7ccdeaSVladimir Oltean l2_fwd[from].bc_domain == bc_domain) 16187f7ccdeaSVladimir Oltean continue; 16197f7ccdeaSVladimir Oltean 16207f7ccdeaSVladimir Oltean l2_fwd[from].fl_domain = fl_domain; 16217f7ccdeaSVladimir Oltean l2_fwd[from].bc_domain = bc_domain; 16227f7ccdeaSVladimir Oltean 16237f7ccdeaSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING, 16247f7ccdeaSVladimir Oltean from, &l2_fwd[from], true); 16257f7ccdeaSVladimir Oltean if (rc < 0) 16267f7ccdeaSVladimir Oltean return rc; 16277f7ccdeaSVladimir Oltean } 16287f7ccdeaSVladimir Oltean 16297f7ccdeaSVladimir Oltean return 0; 16307f7ccdeaSVladimir Oltean } 16317f7ccdeaSVladimir Oltean 16328aa9ebccSVladimir Oltean static int sja1105_bridge_member(struct dsa_switch *ds, int port, 16338aa9ebccSVladimir Oltean struct net_device *br, bool member) 16348aa9ebccSVladimir Oltean { 16358aa9ebccSVladimir Oltean struct sja1105_l2_forwarding_entry *l2_fwd; 16368aa9ebccSVladimir Oltean struct sja1105_private *priv = ds->priv; 16378aa9ebccSVladimir Oltean int i, rc; 16388aa9ebccSVladimir Oltean 16398aa9ebccSVladimir Oltean l2_fwd = priv->static_config.tables[BLK_IDX_L2_FORWARDING].entries; 16408aa9ebccSVladimir Oltean 1641542043e9SVladimir Oltean for (i = 0; i < ds->num_ports; i++) { 16428aa9ebccSVladimir Oltean /* Add this port to the forwarding matrix of the 16438aa9ebccSVladimir Oltean * other ports in the same bridge, and viceversa. 16448aa9ebccSVladimir Oltean */ 16458aa9ebccSVladimir Oltean if (!dsa_is_user_port(ds, i)) 16468aa9ebccSVladimir Oltean continue; 16478aa9ebccSVladimir Oltean /* For the ports already under the bridge, only one thing needs 16488aa9ebccSVladimir Oltean * to be done, and that is to add this port to their 16498aa9ebccSVladimir Oltean * reachability domain. So we can perform the SPI write for 16508aa9ebccSVladimir Oltean * them immediately. However, for this port itself (the one 16518aa9ebccSVladimir Oltean * that is new to the bridge), we need to add all other ports 16528aa9ebccSVladimir Oltean * to its reachability domain. So we do that incrementally in 16538aa9ebccSVladimir Oltean * this loop, and perform the SPI write only at the end, once 16548aa9ebccSVladimir Oltean * the domain contains all other bridge ports. 16558aa9ebccSVladimir Oltean */ 16568aa9ebccSVladimir Oltean if (i == port) 16578aa9ebccSVladimir Oltean continue; 16588aa9ebccSVladimir Oltean if (dsa_to_port(ds, i)->bridge_dev != br) 16598aa9ebccSVladimir Oltean continue; 16608aa9ebccSVladimir Oltean sja1105_port_allow_traffic(l2_fwd, i, port, member); 16618aa9ebccSVladimir Oltean sja1105_port_allow_traffic(l2_fwd, port, i, member); 16628aa9ebccSVladimir Oltean 16638aa9ebccSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING, 16648aa9ebccSVladimir Oltean i, &l2_fwd[i], true); 16658aa9ebccSVladimir Oltean if (rc < 0) 16668aa9ebccSVladimir Oltean return rc; 16678aa9ebccSVladimir Oltean } 16688aa9ebccSVladimir Oltean 16697f7ccdeaSVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING, 16708aa9ebccSVladimir Oltean port, &l2_fwd[port], true); 16717f7ccdeaSVladimir Oltean if (rc) 16727f7ccdeaSVladimir Oltean return rc; 16737f7ccdeaSVladimir Oltean 16747f7ccdeaSVladimir Oltean return sja1105_manage_flood_domains(priv); 16758aa9ebccSVladimir Oltean } 16768aa9ebccSVladimir Oltean 1677640f763fSVladimir Oltean static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port, 1678640f763fSVladimir Oltean u8 state) 1679640f763fSVladimir Oltean { 1680640f763fSVladimir Oltean struct sja1105_private *priv = ds->priv; 1681640f763fSVladimir Oltean struct sja1105_mac_config_entry *mac; 1682640f763fSVladimir Oltean 1683640f763fSVladimir Oltean mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 1684640f763fSVladimir Oltean 1685640f763fSVladimir Oltean switch (state) { 1686640f763fSVladimir Oltean case BR_STATE_DISABLED: 1687640f763fSVladimir Oltean case BR_STATE_BLOCKING: 1688640f763fSVladimir Oltean /* From UM10944 description of DRPDTAG (why put this there?): 1689640f763fSVladimir Oltean * "Management traffic flows to the port regardless of the state 1690640f763fSVladimir Oltean * of the INGRESS flag". So BPDUs are still be allowed to pass. 1691640f763fSVladimir Oltean * At the moment no difference between DISABLED and BLOCKING. 1692640f763fSVladimir Oltean */ 1693640f763fSVladimir Oltean mac[port].ingress = false; 1694640f763fSVladimir Oltean mac[port].egress = false; 1695640f763fSVladimir Oltean mac[port].dyn_learn = false; 1696640f763fSVladimir Oltean break; 1697640f763fSVladimir Oltean case BR_STATE_LISTENING: 1698640f763fSVladimir Oltean mac[port].ingress = true; 1699640f763fSVladimir Oltean mac[port].egress = false; 1700640f763fSVladimir Oltean mac[port].dyn_learn = false; 1701640f763fSVladimir Oltean break; 1702640f763fSVladimir Oltean case BR_STATE_LEARNING: 1703640f763fSVladimir Oltean mac[port].ingress = true; 1704640f763fSVladimir Oltean mac[port].egress = false; 17054d942354SVladimir Oltean mac[port].dyn_learn = !!(priv->learn_ena & BIT(port)); 1706640f763fSVladimir Oltean break; 1707640f763fSVladimir Oltean case BR_STATE_FORWARDING: 1708640f763fSVladimir Oltean mac[port].ingress = true; 1709640f763fSVladimir Oltean mac[port].egress = true; 17104d942354SVladimir Oltean mac[port].dyn_learn = !!(priv->learn_ena & BIT(port)); 1711640f763fSVladimir Oltean break; 1712640f763fSVladimir Oltean default: 1713640f763fSVladimir Oltean dev_err(ds->dev, "invalid STP state: %d\n", state); 1714640f763fSVladimir Oltean return; 1715640f763fSVladimir Oltean } 1716640f763fSVladimir Oltean 1717640f763fSVladimir Oltean sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 1718640f763fSVladimir Oltean &mac[port], true); 1719640f763fSVladimir Oltean } 1720640f763fSVladimir Oltean 17218aa9ebccSVladimir Oltean static int sja1105_bridge_join(struct dsa_switch *ds, int port, 17228aa9ebccSVladimir Oltean struct net_device *br) 17238aa9ebccSVladimir Oltean { 17248aa9ebccSVladimir Oltean return sja1105_bridge_member(ds, port, br, true); 17258aa9ebccSVladimir Oltean } 17268aa9ebccSVladimir Oltean 17278aa9ebccSVladimir Oltean static void sja1105_bridge_leave(struct dsa_switch *ds, int port, 17288aa9ebccSVladimir Oltean struct net_device *br) 17298aa9ebccSVladimir Oltean { 17308aa9ebccSVladimir Oltean sja1105_bridge_member(ds, port, br, false); 17318aa9ebccSVladimir Oltean } 17328aa9ebccSVladimir Oltean 17334d752508SVladimir Oltean #define BYTES_PER_KBIT (1000LL / 8) 17344d752508SVladimir Oltean 17354d752508SVladimir Oltean static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv) 17364d752508SVladimir Oltean { 17374d752508SVladimir Oltean int i; 17384d752508SVladimir Oltean 17394d752508SVladimir Oltean for (i = 0; i < priv->info->num_cbs_shapers; i++) 17404d752508SVladimir Oltean if (!priv->cbs[i].idle_slope && !priv->cbs[i].send_slope) 17414d752508SVladimir Oltean return i; 17424d752508SVladimir Oltean 17434d752508SVladimir Oltean return -1; 17444d752508SVladimir Oltean } 17454d752508SVladimir Oltean 17464d752508SVladimir Oltean static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int port, 17474d752508SVladimir Oltean int prio) 17484d752508SVladimir Oltean { 17494d752508SVladimir Oltean int i; 17504d752508SVladimir Oltean 17514d752508SVladimir Oltean for (i = 0; i < priv->info->num_cbs_shapers; i++) { 17524d752508SVladimir Oltean struct sja1105_cbs_entry *cbs = &priv->cbs[i]; 17534d752508SVladimir Oltean 17544d752508SVladimir Oltean if (cbs->port == port && cbs->prio == prio) { 17554d752508SVladimir Oltean memset(cbs, 0, sizeof(*cbs)); 17564d752508SVladimir Oltean return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, 17574d752508SVladimir Oltean i, cbs, true); 17584d752508SVladimir Oltean } 17594d752508SVladimir Oltean } 17604d752508SVladimir Oltean 17614d752508SVladimir Oltean return 0; 17624d752508SVladimir Oltean } 17634d752508SVladimir Oltean 17644d752508SVladimir Oltean static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port, 17654d752508SVladimir Oltean struct tc_cbs_qopt_offload *offload) 17664d752508SVladimir Oltean { 17674d752508SVladimir Oltean struct sja1105_private *priv = ds->priv; 17684d752508SVladimir Oltean struct sja1105_cbs_entry *cbs; 17694d752508SVladimir Oltean int index; 17704d752508SVladimir Oltean 17714d752508SVladimir Oltean if (!offload->enable) 17724d752508SVladimir Oltean return sja1105_delete_cbs_shaper(priv, port, offload->queue); 17734d752508SVladimir Oltean 17744d752508SVladimir Oltean index = sja1105_find_unused_cbs_shaper(priv); 17754d752508SVladimir Oltean if (index < 0) 17764d752508SVladimir Oltean return -ENOSPC; 17774d752508SVladimir Oltean 17784d752508SVladimir Oltean cbs = &priv->cbs[index]; 17794d752508SVladimir Oltean cbs->port = port; 17804d752508SVladimir Oltean cbs->prio = offload->queue; 17814d752508SVladimir Oltean /* locredit and sendslope are negative by definition. In hardware, 17824d752508SVladimir Oltean * positive values must be provided, and the negative sign is implicit. 17834d752508SVladimir Oltean */ 17844d752508SVladimir Oltean cbs->credit_hi = offload->hicredit; 17854d752508SVladimir Oltean cbs->credit_lo = abs(offload->locredit); 17864d752508SVladimir Oltean /* User space is in kbits/sec, hardware in bytes/sec */ 17874d752508SVladimir Oltean cbs->idle_slope = offload->idleslope * BYTES_PER_KBIT; 17884d752508SVladimir Oltean cbs->send_slope = abs(offload->sendslope * BYTES_PER_KBIT); 17894d752508SVladimir Oltean /* Convert the negative values from 64-bit 2's complement 17904d752508SVladimir Oltean * to 32-bit 2's complement (for the case of 0x80000000 whose 17914d752508SVladimir Oltean * negative is still negative). 17924d752508SVladimir Oltean */ 17934d752508SVladimir Oltean cbs->credit_lo &= GENMASK_ULL(31, 0); 17944d752508SVladimir Oltean cbs->send_slope &= GENMASK_ULL(31, 0); 17954d752508SVladimir Oltean 17964d752508SVladimir Oltean return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs, 17974d752508SVladimir Oltean true); 17984d752508SVladimir Oltean } 17994d752508SVladimir Oltean 18004d752508SVladimir Oltean static int sja1105_reload_cbs(struct sja1105_private *priv) 18014d752508SVladimir Oltean { 18024d752508SVladimir Oltean int rc = 0, i; 18034d752508SVladimir Oltean 1804be7f62eeSVladimir Oltean /* The credit based shapers are only allocated if 1805be7f62eeSVladimir Oltean * CONFIG_NET_SCH_CBS is enabled. 1806be7f62eeSVladimir Oltean */ 1807be7f62eeSVladimir Oltean if (!priv->cbs) 1808be7f62eeSVladimir Oltean return 0; 1809be7f62eeSVladimir Oltean 18104d752508SVladimir Oltean for (i = 0; i < priv->info->num_cbs_shapers; i++) { 18114d752508SVladimir Oltean struct sja1105_cbs_entry *cbs = &priv->cbs[i]; 18124d752508SVladimir Oltean 18134d752508SVladimir Oltean if (!cbs->idle_slope && !cbs->send_slope) 18144d752508SVladimir Oltean continue; 18154d752508SVladimir Oltean 18164d752508SVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, cbs, 18174d752508SVladimir Oltean true); 18184d752508SVladimir Oltean if (rc) 18194d752508SVladimir Oltean break; 18204d752508SVladimir Oltean } 18214d752508SVladimir Oltean 18224d752508SVladimir Oltean return rc; 18234d752508SVladimir Oltean } 18244d752508SVladimir Oltean 18252eea1fa8SVladimir Oltean static const char * const sja1105_reset_reasons[] = { 18262eea1fa8SVladimir Oltean [SJA1105_VLAN_FILTERING] = "VLAN filtering", 18272eea1fa8SVladimir Oltean [SJA1105_RX_HWTSTAMPING] = "RX timestamping", 18282eea1fa8SVladimir Oltean [SJA1105_AGEING_TIME] = "Ageing time", 18292eea1fa8SVladimir Oltean [SJA1105_SCHEDULING] = "Time-aware scheduling", 1830c279c726SVladimir Oltean [SJA1105_BEST_EFFORT_POLICING] = "Best-effort policing", 1831dfacc5a2SVladimir Oltean [SJA1105_VIRTUAL_LINKS] = "Virtual links", 18322eea1fa8SVladimir Oltean }; 18332eea1fa8SVladimir Oltean 18346666cebcSVladimir Oltean /* For situations where we need to change a setting at runtime that is only 18356666cebcSVladimir Oltean * available through the static configuration, resetting the switch in order 18366666cebcSVladimir Oltean * to upload the new static config is unavoidable. Back up the settings we 18376666cebcSVladimir Oltean * modify at runtime (currently only MAC) and restore them after uploading, 18386666cebcSVladimir Oltean * such that this operation is relatively seamless. 18396666cebcSVladimir Oltean */ 18402eea1fa8SVladimir Oltean int sja1105_static_config_reload(struct sja1105_private *priv, 18412eea1fa8SVladimir Oltean enum sja1105_reset_reason reason) 18426666cebcSVladimir Oltean { 18436cf99c13SVladimir Oltean struct ptp_system_timestamp ptp_sts_before; 18446cf99c13SVladimir Oltean struct ptp_system_timestamp ptp_sts_after; 184582760d7fSVladimir Oltean int speed_mbps[SJA1105_MAX_NUM_PORTS]; 184684db00f2SVladimir Oltean u16 bmcr[SJA1105_MAX_NUM_PORTS] = {0}; 18476666cebcSVladimir Oltean struct sja1105_mac_config_entry *mac; 18486cf99c13SVladimir Oltean struct dsa_switch *ds = priv->ds; 18496cf99c13SVladimir Oltean s64 t1, t2, t3, t4; 18506cf99c13SVladimir Oltean s64 t12, t34; 18516666cebcSVladimir Oltean int rc, i; 18526cf99c13SVladimir Oltean s64 now; 18536666cebcSVladimir Oltean 1854af580ae2SVladimir Oltean mutex_lock(&priv->mgmt_lock); 1855af580ae2SVladimir Oltean 18566666cebcSVladimir Oltean mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 18576666cebcSVladimir Oltean 18588400cff6SVladimir Oltean /* Back up the dynamic link speed changed by sja1105_adjust_port_config 18598400cff6SVladimir Oltean * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the 18608400cff6SVladimir Oltean * switch wants to see in the static config in order to allow us to 18618400cff6SVladimir Oltean * change it through the dynamic interface later. 18626666cebcSVladimir Oltean */ 1863542043e9SVladimir Oltean for (i = 0; i < ds->num_ports; i++) { 18643ad1d171SVladimir Oltean u32 reg_addr = mdiobus_c45_addr(MDIO_MMD_VEND2, MDIO_CTRL1); 18653ad1d171SVladimir Oltean 186641fed17fSVladimir Oltean speed_mbps[i] = sja1105_port_speed_to_ethtool(priv, 186741fed17fSVladimir Oltean mac[i].speed); 186841fed17fSVladimir Oltean mac[i].speed = priv->info->port_speed[SJA1105_SPEED_AUTO]; 18696666cebcSVladimir Oltean 18703ad1d171SVladimir Oltean if (priv->xpcs[i]) 18713ad1d171SVladimir Oltean bmcr[i] = mdiobus_read(priv->mdio_pcs, i, reg_addr); 187284db00f2SVladimir Oltean } 1873ffe10e67SVladimir Oltean 18746cf99c13SVladimir Oltean /* No PTP operations can run right now */ 18756cf99c13SVladimir Oltean mutex_lock(&priv->ptp_data.lock); 18766cf99c13SVladimir Oltean 18776cf99c13SVladimir Oltean rc = __sja1105_ptp_gettimex(ds, &now, &ptp_sts_before); 187861c77533SVladimir Oltean if (rc < 0) { 187961c77533SVladimir Oltean mutex_unlock(&priv->ptp_data.lock); 188061c77533SVladimir Oltean goto out; 188161c77533SVladimir Oltean } 18826cf99c13SVladimir Oltean 18836666cebcSVladimir Oltean /* Reset switch and send updated static configuration */ 18846666cebcSVladimir Oltean rc = sja1105_static_config_upload(priv); 188561c77533SVladimir Oltean if (rc < 0) { 188661c77533SVladimir Oltean mutex_unlock(&priv->ptp_data.lock); 188761c77533SVladimir Oltean goto out; 188861c77533SVladimir Oltean } 18896cf99c13SVladimir Oltean 18906cf99c13SVladimir Oltean rc = __sja1105_ptp_settime(ds, 0, &ptp_sts_after); 189161c77533SVladimir Oltean if (rc < 0) { 189261c77533SVladimir Oltean mutex_unlock(&priv->ptp_data.lock); 189361c77533SVladimir Oltean goto out; 189461c77533SVladimir Oltean } 18956cf99c13SVladimir Oltean 18966cf99c13SVladimir Oltean t1 = timespec64_to_ns(&ptp_sts_before.pre_ts); 18976cf99c13SVladimir Oltean t2 = timespec64_to_ns(&ptp_sts_before.post_ts); 18986cf99c13SVladimir Oltean t3 = timespec64_to_ns(&ptp_sts_after.pre_ts); 18996cf99c13SVladimir Oltean t4 = timespec64_to_ns(&ptp_sts_after.post_ts); 19006cf99c13SVladimir Oltean /* Mid point, corresponds to pre-reset PTPCLKVAL */ 19016cf99c13SVladimir Oltean t12 = t1 + (t2 - t1) / 2; 19026cf99c13SVladimir Oltean /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */ 19036cf99c13SVladimir Oltean t34 = t3 + (t4 - t3) / 2; 19046cf99c13SVladimir Oltean /* Advance PTPCLKVAL by the time it took since its readout */ 19056cf99c13SVladimir Oltean now += (t34 - t12); 19066cf99c13SVladimir Oltean 19076cf99c13SVladimir Oltean __sja1105_ptp_adjtime(ds, now); 19086cf99c13SVladimir Oltean 19096cf99c13SVladimir Oltean mutex_unlock(&priv->ptp_data.lock); 19106666cebcSVladimir Oltean 19112eea1fa8SVladimir Oltean dev_info(priv->ds->dev, 19122eea1fa8SVladimir Oltean "Reset switch and programmed static config. Reason: %s\n", 19132eea1fa8SVladimir Oltean sja1105_reset_reasons[reason]); 19142eea1fa8SVladimir Oltean 19156666cebcSVladimir Oltean /* Configure the CGU (PLLs) for MII and RMII PHYs. 19166666cebcSVladimir Oltean * For these interfaces there is no dynamic configuration 19176666cebcSVladimir Oltean * needed, since PLLs have same settings at all speeds. 19186666cebcSVladimir Oltean */ 1919cb5a82d2SVladimir Oltean if (priv->info->clocking_setup) { 1920c5037678SVladimir Oltean rc = priv->info->clocking_setup(priv); 19216666cebcSVladimir Oltean if (rc < 0) 19226666cebcSVladimir Oltean goto out; 1923cb5a82d2SVladimir Oltean } 19246666cebcSVladimir Oltean 1925542043e9SVladimir Oltean for (i = 0; i < ds->num_ports; i++) { 19263ad1d171SVladimir Oltean struct dw_xpcs *xpcs = priv->xpcs[i]; 19273ad1d171SVladimir Oltean unsigned int mode; 192884db00f2SVladimir Oltean 19298400cff6SVladimir Oltean rc = sja1105_adjust_port_config(priv, i, speed_mbps[i]); 19306666cebcSVladimir Oltean if (rc < 0) 19316666cebcSVladimir Oltean goto out; 1932ffe10e67SVladimir Oltean 19333ad1d171SVladimir Oltean if (!xpcs) 193484db00f2SVladimir Oltean continue; 1935ffe10e67SVladimir Oltean 19363ad1d171SVladimir Oltean if (bmcr[i] & BMCR_ANENABLE) 19373ad1d171SVladimir Oltean mode = MLO_AN_INBAND; 19383ad1d171SVladimir Oltean else if (priv->fixed_link[i]) 19393ad1d171SVladimir Oltean mode = MLO_AN_FIXED; 19403ad1d171SVladimir Oltean else 19413ad1d171SVladimir Oltean mode = MLO_AN_PHY; 194284db00f2SVladimir Oltean 19433ad1d171SVladimir Oltean rc = xpcs_do_config(xpcs, priv->phy_mode[i], mode); 19443ad1d171SVladimir Oltean if (rc < 0) 19453ad1d171SVladimir Oltean goto out; 1946ffe10e67SVladimir Oltean 19473ad1d171SVladimir Oltean if (!phylink_autoneg_inband(mode)) { 1948ffe10e67SVladimir Oltean int speed = SPEED_UNKNOWN; 1949ffe10e67SVladimir Oltean 195056b63466SVladimir Oltean if (priv->phy_mode[i] == PHY_INTERFACE_MODE_2500BASEX) 195156b63466SVladimir Oltean speed = SPEED_2500; 195256b63466SVladimir Oltean else if (bmcr[i] & BMCR_SPEED1000) 1953ffe10e67SVladimir Oltean speed = SPEED_1000; 195484db00f2SVladimir Oltean else if (bmcr[i] & BMCR_SPEED100) 1955ffe10e67SVladimir Oltean speed = SPEED_100; 1956053d8ad1SVladimir Oltean else 1957ffe10e67SVladimir Oltean speed = SPEED_10; 1958ffe10e67SVladimir Oltean 19593ad1d171SVladimir Oltean xpcs_link_up(&xpcs->pcs, mode, priv->phy_mode[i], 19603ad1d171SVladimir Oltean speed, DUPLEX_FULL); 1961ffe10e67SVladimir Oltean } 1962ffe10e67SVladimir Oltean } 19634d752508SVladimir Oltean 19644d752508SVladimir Oltean rc = sja1105_reload_cbs(priv); 19654d752508SVladimir Oltean if (rc < 0) 19664d752508SVladimir Oltean goto out; 19676666cebcSVladimir Oltean out: 1968af580ae2SVladimir Oltean mutex_unlock(&priv->mgmt_lock); 1969af580ae2SVladimir Oltean 19706666cebcSVladimir Oltean return rc; 19716666cebcSVladimir Oltean } 19726666cebcSVladimir Oltean 19736666cebcSVladimir Oltean static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid) 19746666cebcSVladimir Oltean { 19756666cebcSVladimir Oltean struct sja1105_mac_config_entry *mac; 19766666cebcSVladimir Oltean 19776666cebcSVladimir Oltean mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 19786666cebcSVladimir Oltean 1979*6dfd23d3SVladimir Oltean if (mac[port].vlanid == pvid) 1980*6dfd23d3SVladimir Oltean return 0; 1981*6dfd23d3SVladimir Oltean 19826666cebcSVladimir Oltean mac[port].vlanid = pvid; 19836666cebcSVladimir Oltean 19846666cebcSVladimir Oltean return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 19856666cebcSVladimir Oltean &mac[port], true); 19866666cebcSVladimir Oltean } 19876666cebcSVladimir Oltean 1988*6dfd23d3SVladimir Oltean static int sja1105_commit_pvid(struct dsa_switch *ds, int port) 1989*6dfd23d3SVladimir Oltean { 1990*6dfd23d3SVladimir Oltean struct dsa_port *dp = dsa_to_port(ds, port); 1991*6dfd23d3SVladimir Oltean struct sja1105_private *priv = ds->priv; 1992*6dfd23d3SVladimir Oltean u16 pvid; 1993*6dfd23d3SVladimir Oltean 1994*6dfd23d3SVladimir Oltean if (dp->bridge_dev && br_vlan_enabled(dp->bridge_dev)) 1995*6dfd23d3SVladimir Oltean pvid = priv->bridge_pvid[port]; 1996*6dfd23d3SVladimir Oltean else 1997*6dfd23d3SVladimir Oltean pvid = priv->tag_8021q_pvid[port]; 1998*6dfd23d3SVladimir Oltean 1999*6dfd23d3SVladimir Oltean return sja1105_pvid_apply(priv, port, pvid); 2000*6dfd23d3SVladimir Oltean } 2001*6dfd23d3SVladimir Oltean 20028aa9ebccSVladimir Oltean static enum dsa_tag_protocol 20034d776482SFlorian Fainelli sja1105_get_tag_protocol(struct dsa_switch *ds, int port, 20044d776482SFlorian Fainelli enum dsa_tag_protocol mp) 20058aa9ebccSVladimir Oltean { 20064913b8ebSVladimir Oltean struct sja1105_private *priv = ds->priv; 20074913b8ebSVladimir Oltean 20084913b8ebSVladimir Oltean return priv->info->tag_proto; 20098aa9ebccSVladimir Oltean } 20108aa9ebccSVladimir Oltean 2011ec5ae610SVladimir Oltean static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid) 2012ec5ae610SVladimir Oltean { 2013ec5ae610SVladimir Oltean struct sja1105_vlan_lookup_entry *vlan; 2014ec5ae610SVladimir Oltean int count, i; 2015ec5ae610SVladimir Oltean 2016ec5ae610SVladimir Oltean vlan = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entries; 2017ec5ae610SVladimir Oltean count = priv->static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count; 2018ec5ae610SVladimir Oltean 2019ec5ae610SVladimir Oltean for (i = 0; i < count; i++) 2020ec5ae610SVladimir Oltean if (vlan[i].vlanid == vid) 2021ec5ae610SVladimir Oltean return i; 2022ec5ae610SVladimir Oltean 2023ec5ae610SVladimir Oltean /* Return an invalid entry index if not found */ 2024ec5ae610SVladimir Oltean return -1; 2025ec5ae610SVladimir Oltean } 2026ec5ae610SVladimir Oltean 2027070ca3bbSVladimir Oltean /* The TPID setting belongs to the General Parameters table, 2028070ca3bbSVladimir Oltean * which can only be partially reconfigured at runtime (and not the TPID). 2029070ca3bbSVladimir Oltean * So a switch reset is required. 2030070ca3bbSVladimir Oltean */ 203189153ed6SVladimir Oltean int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled, 203289153ed6SVladimir Oltean struct netlink_ext_ack *extack) 20336666cebcSVladimir Oltean { 20346d7c7d94SVladimir Oltean struct sja1105_l2_lookup_params_entry *l2_lookup_params; 2035070ca3bbSVladimir Oltean struct sja1105_general_params_entry *general_params; 20366666cebcSVladimir Oltean struct sja1105_private *priv = ds->priv; 2037070ca3bbSVladimir Oltean struct sja1105_table *table; 2038dfacc5a2SVladimir Oltean struct sja1105_rule *rule; 2039070ca3bbSVladimir Oltean u16 tpid, tpid2; 20406666cebcSVladimir Oltean int rc; 20416666cebcSVladimir Oltean 2042dfacc5a2SVladimir Oltean list_for_each_entry(rule, &priv->flow_block.rules, list) { 2043dfacc5a2SVladimir Oltean if (rule->type == SJA1105_RULE_VL) { 204489153ed6SVladimir Oltean NL_SET_ERR_MSG_MOD(extack, 204589153ed6SVladimir Oltean "Cannot change VLAN filtering with active VL rules"); 2046dfacc5a2SVladimir Oltean return -EBUSY; 2047dfacc5a2SVladimir Oltean } 2048dfacc5a2SVladimir Oltean } 2049dfacc5a2SVladimir Oltean 2050070ca3bbSVladimir Oltean if (enabled) { 20516666cebcSVladimir Oltean /* Enable VLAN filtering. */ 205254fa49eeSVladimir Oltean tpid = ETH_P_8021Q; 205354fa49eeSVladimir Oltean tpid2 = ETH_P_8021AD; 2054070ca3bbSVladimir Oltean } else { 20556666cebcSVladimir Oltean /* Disable VLAN filtering. */ 2056070ca3bbSVladimir Oltean tpid = ETH_P_SJA1105; 2057070ca3bbSVladimir Oltean tpid2 = ETH_P_SJA1105; 2058070ca3bbSVladimir Oltean } 2059070ca3bbSVladimir Oltean 206038b5beeaSVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 206138b5beeaSVladimir Oltean struct sja1105_port *sp = &priv->ports[port]; 206238b5beeaSVladimir Oltean 206338b5beeaSVladimir Oltean if (enabled) 206438b5beeaSVladimir Oltean sp->xmit_tpid = priv->info->qinq_tpid; 206538b5beeaSVladimir Oltean else 206638b5beeaSVladimir Oltean sp->xmit_tpid = ETH_P_SJA1105; 206738b5beeaSVladimir Oltean } 206838b5beeaSVladimir Oltean 20690fac6aa0SVladimir Oltean if (priv->vlan_aware == enabled) 2070cfa36b1fSVladimir Oltean return 0; 2071cfa36b1fSVladimir Oltean 20720fac6aa0SVladimir Oltean priv->vlan_aware = enabled; 20737f14937fSVladimir Oltean 2074070ca3bbSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 2075070ca3bbSVladimir Oltean general_params = table->entries; 2076f9a1a764SVladimir Oltean /* EtherType used to identify inner tagged (C-tag) VLAN traffic */ 207754fa49eeSVladimir Oltean general_params->tpid = tpid; 207854fa49eeSVladimir Oltean /* EtherType used to identify outer tagged (S-tag) VLAN traffic */ 2079070ca3bbSVladimir Oltean general_params->tpid2 = tpid2; 208042824463SVladimir Oltean /* When VLAN filtering is on, we need to at least be able to 208142824463SVladimir Oltean * decode management traffic through the "backup plan". 208242824463SVladimir Oltean */ 208342824463SVladimir Oltean general_params->incl_srcpt1 = enabled; 208442824463SVladimir Oltean general_params->incl_srcpt0 = enabled; 2085070ca3bbSVladimir Oltean 20866d7c7d94SVladimir Oltean /* VLAN filtering => independent VLAN learning. 20872cafa72eSVladimir Oltean * No VLAN filtering (or best effort) => shared VLAN learning. 20886d7c7d94SVladimir Oltean * 20896d7c7d94SVladimir Oltean * In shared VLAN learning mode, untagged traffic still gets 20906d7c7d94SVladimir Oltean * pvid-tagged, and the FDB table gets populated with entries 20916d7c7d94SVladimir Oltean * containing the "real" (pvid or from VLAN tag) VLAN ID. 20926d7c7d94SVladimir Oltean * However the switch performs a masked L2 lookup in the FDB, 20936d7c7d94SVladimir Oltean * effectively only looking up a frame's DMAC (and not VID) for the 20946d7c7d94SVladimir Oltean * forwarding decision. 20956d7c7d94SVladimir Oltean * 20966d7c7d94SVladimir Oltean * This is extremely convenient for us, because in modes with 20976d7c7d94SVladimir Oltean * vlan_filtering=0, dsa_8021q actually installs unique pvid's into 20986d7c7d94SVladimir Oltean * each front panel port. This is good for identification but breaks 20996d7c7d94SVladimir Oltean * learning badly - the VID of the learnt FDB entry is unique, aka 21006d7c7d94SVladimir Oltean * no frames coming from any other port are going to have it. So 21016d7c7d94SVladimir Oltean * for forwarding purposes, this is as though learning was broken 21026d7c7d94SVladimir Oltean * (all frames get flooded). 21036d7c7d94SVladimir Oltean */ 21046d7c7d94SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS]; 21056d7c7d94SVladimir Oltean l2_lookup_params = table->entries; 21060fac6aa0SVladimir Oltean l2_lookup_params->shared_learn = !priv->vlan_aware; 2107aaa270c6SVladimir Oltean 2108*6dfd23d3SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 2109*6dfd23d3SVladimir Oltean if (dsa_is_unused_port(ds, port)) 2110*6dfd23d3SVladimir Oltean continue; 2111*6dfd23d3SVladimir Oltean 2112*6dfd23d3SVladimir Oltean rc = sja1105_commit_pvid(ds, port); 2113aef31718SVladimir Oltean if (rc) 2114aef31718SVladimir Oltean return rc; 2115*6dfd23d3SVladimir Oltean } 2116aef31718SVladimir Oltean 21172eea1fa8SVladimir Oltean rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING); 21186666cebcSVladimir Oltean if (rc) 211989153ed6SVladimir Oltean NL_SET_ERR_MSG_MOD(extack, "Failed to change VLAN Ethertype"); 21206666cebcSVladimir Oltean 21210fac6aa0SVladimir Oltean return rc; 21226666cebcSVladimir Oltean } 21236666cebcSVladimir Oltean 2124*6dfd23d3SVladimir Oltean static int sja1105_vlan_add(struct sja1105_private *priv, int port, u16 vid, 2125*6dfd23d3SVladimir Oltean u16 flags) 21265899ee36SVladimir Oltean { 2127*6dfd23d3SVladimir Oltean struct sja1105_vlan_lookup_entry *vlan; 2128*6dfd23d3SVladimir Oltean struct sja1105_table *table; 2129*6dfd23d3SVladimir Oltean int match, rc; 21305899ee36SVladimir Oltean 2131*6dfd23d3SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP]; 2132*6dfd23d3SVladimir Oltean 2133*6dfd23d3SVladimir Oltean match = sja1105_is_vlan_configured(priv, vid); 2134*6dfd23d3SVladimir Oltean if (match < 0) { 2135*6dfd23d3SVladimir Oltean rc = sja1105_table_resize(table, table->entry_count + 1); 2136*6dfd23d3SVladimir Oltean if (rc) 2137*6dfd23d3SVladimir Oltean return rc; 2138*6dfd23d3SVladimir Oltean match = table->entry_count - 1; 2139*6dfd23d3SVladimir Oltean } 2140*6dfd23d3SVladimir Oltean 2141*6dfd23d3SVladimir Oltean /* Assign pointer after the resize (it's new memory) */ 2142*6dfd23d3SVladimir Oltean vlan = table->entries; 2143*6dfd23d3SVladimir Oltean 2144*6dfd23d3SVladimir Oltean vlan[match].type_entry = SJA1110_VLAN_D_TAG; 2145*6dfd23d3SVladimir Oltean vlan[match].vlanid = vid; 2146*6dfd23d3SVladimir Oltean vlan[match].vlan_bc |= BIT(port); 2147*6dfd23d3SVladimir Oltean vlan[match].vmemb_port |= BIT(port); 2148*6dfd23d3SVladimir Oltean if (flags & BRIDGE_VLAN_INFO_UNTAGGED) 2149*6dfd23d3SVladimir Oltean vlan[match].tag_port &= ~BIT(port); 2150*6dfd23d3SVladimir Oltean else 2151*6dfd23d3SVladimir Oltean vlan[match].tag_port |= BIT(port); 2152*6dfd23d3SVladimir Oltean 2153*6dfd23d3SVladimir Oltean return sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid, 2154*6dfd23d3SVladimir Oltean &vlan[match], true); 2155*6dfd23d3SVladimir Oltean } 2156*6dfd23d3SVladimir Oltean 2157*6dfd23d3SVladimir Oltean static int sja1105_vlan_del(struct sja1105_private *priv, int port, u16 vid) 2158*6dfd23d3SVladimir Oltean { 2159*6dfd23d3SVladimir Oltean struct sja1105_vlan_lookup_entry *vlan; 2160*6dfd23d3SVladimir Oltean struct sja1105_table *table; 2161*6dfd23d3SVladimir Oltean bool keep = true; 2162*6dfd23d3SVladimir Oltean int match, rc; 2163*6dfd23d3SVladimir Oltean 2164*6dfd23d3SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_VLAN_LOOKUP]; 2165*6dfd23d3SVladimir Oltean 2166*6dfd23d3SVladimir Oltean match = sja1105_is_vlan_configured(priv, vid); 2167*6dfd23d3SVladimir Oltean /* Can't delete a missing entry. */ 2168*6dfd23d3SVladimir Oltean if (match < 0) 21695899ee36SVladimir Oltean return 0; 21705899ee36SVladimir Oltean 2171*6dfd23d3SVladimir Oltean /* Assign pointer after the resize (it's new memory) */ 2172*6dfd23d3SVladimir Oltean vlan = table->entries; 2173*6dfd23d3SVladimir Oltean 2174*6dfd23d3SVladimir Oltean vlan[match].vlanid = vid; 2175*6dfd23d3SVladimir Oltean vlan[match].vlan_bc &= ~BIT(port); 2176*6dfd23d3SVladimir Oltean vlan[match].vmemb_port &= ~BIT(port); 2177*6dfd23d3SVladimir Oltean /* Also unset tag_port, just so we don't have a confusing bitmap 2178*6dfd23d3SVladimir Oltean * (no practical purpose). 2179b38e659dSVladimir Oltean */ 2180*6dfd23d3SVladimir Oltean vlan[match].tag_port &= ~BIT(port); 2181b38e659dSVladimir Oltean 2182*6dfd23d3SVladimir Oltean /* If there's no port left as member of this VLAN, 2183*6dfd23d3SVladimir Oltean * it's time for it to go. 2184*6dfd23d3SVladimir Oltean */ 2185*6dfd23d3SVladimir Oltean if (!vlan[match].vmemb_port) 2186*6dfd23d3SVladimir Oltean keep = false; 21875899ee36SVladimir Oltean 2188*6dfd23d3SVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid, 2189*6dfd23d3SVladimir Oltean &vlan[match], keep); 2190*6dfd23d3SVladimir Oltean if (rc < 0) 2191*6dfd23d3SVladimir Oltean return rc; 21925899ee36SVladimir Oltean 2193*6dfd23d3SVladimir Oltean if (!keep) 2194*6dfd23d3SVladimir Oltean return sja1105_table_delete_entry(table, match); 21955899ee36SVladimir Oltean 21965899ee36SVladimir Oltean return 0; 21975899ee36SVladimir Oltean } 21985899ee36SVladimir Oltean 2199*6dfd23d3SVladimir Oltean static int sja1105_bridge_vlan_add(struct dsa_switch *ds, int port, 220031046a5fSVladimir Oltean const struct switchdev_obj_port_vlan *vlan, 220131046a5fSVladimir Oltean struct netlink_ext_ack *extack) 22026666cebcSVladimir Oltean { 22036666cebcSVladimir Oltean struct sja1105_private *priv = ds->priv; 22046666cebcSVladimir Oltean int rc; 22056666cebcSVladimir Oltean 22060fac6aa0SVladimir Oltean /* Be sure to deny alterations to the configuration done by tag_8021q. 22071958d581SVladimir Oltean */ 22080fac6aa0SVladimir Oltean if (vid_is_dsa_8021q(vlan->vid)) { 220931046a5fSVladimir Oltean NL_SET_ERR_MSG_MOD(extack, 221031046a5fSVladimir Oltean "Range 1024-3071 reserved for dsa_8021q operation"); 22111958d581SVladimir Oltean return -EBUSY; 22121958d581SVladimir Oltean } 22131958d581SVladimir Oltean 2214*6dfd23d3SVladimir Oltean rc = sja1105_vlan_add(priv, port, vlan->vid, vlan->flags); 2215*6dfd23d3SVladimir Oltean if (rc) 22161958d581SVladimir Oltean return rc; 2217ec5ae610SVladimir Oltean 2218*6dfd23d3SVladimir Oltean if (vlan->flags & BRIDGE_VLAN_INFO_PVID) 2219*6dfd23d3SVladimir Oltean priv->bridge_pvid[port] = vlan->vid; 2220ec5ae610SVladimir Oltean 2221*6dfd23d3SVladimir Oltean return sja1105_commit_pvid(ds, port); 22226666cebcSVladimir Oltean } 22236666cebcSVladimir Oltean 2224*6dfd23d3SVladimir Oltean static int sja1105_bridge_vlan_del(struct dsa_switch *ds, int port, 22256666cebcSVladimir Oltean const struct switchdev_obj_port_vlan *vlan) 22266666cebcSVladimir Oltean { 22276666cebcSVladimir Oltean struct sja1105_private *priv = ds->priv; 22286666cebcSVladimir Oltean 2229*6dfd23d3SVladimir Oltean return sja1105_vlan_del(priv, port, vlan->vid); 22306666cebcSVladimir Oltean } 22316666cebcSVladimir Oltean 22325899ee36SVladimir Oltean static int sja1105_dsa_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid, 22335899ee36SVladimir Oltean u16 flags) 22345899ee36SVladimir Oltean { 22355899ee36SVladimir Oltean struct sja1105_private *priv = ds->priv; 22365899ee36SVladimir Oltean int rc; 22375899ee36SVladimir Oltean 2238*6dfd23d3SVladimir Oltean rc = sja1105_vlan_add(priv, port, vid, flags); 2239*6dfd23d3SVladimir Oltean if (rc) 22405899ee36SVladimir Oltean return rc; 22415899ee36SVladimir Oltean 2242*6dfd23d3SVladimir Oltean if (flags & BRIDGE_VLAN_INFO_PVID) 2243*6dfd23d3SVladimir Oltean priv->tag_8021q_pvid[port] = vid; 2244*6dfd23d3SVladimir Oltean 2245*6dfd23d3SVladimir Oltean return sja1105_commit_pvid(ds, port); 22465899ee36SVladimir Oltean } 22475899ee36SVladimir Oltean 22485899ee36SVladimir Oltean static int sja1105_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid) 22495899ee36SVladimir Oltean { 22505899ee36SVladimir Oltean struct sja1105_private *priv = ds->priv; 22515899ee36SVladimir Oltean 2252*6dfd23d3SVladimir Oltean return sja1105_vlan_del(priv, port, vid); 22535899ee36SVladimir Oltean } 22545899ee36SVladimir Oltean 22558aa9ebccSVladimir Oltean /* The programming model for the SJA1105 switch is "all-at-once" via static 22568aa9ebccSVladimir Oltean * configuration tables. Some of these can be dynamically modified at runtime, 22578aa9ebccSVladimir Oltean * but not the xMII mode parameters table. 22588aa9ebccSVladimir Oltean * Furthermode, some PHYs may not have crystals for generating their clocks 22598aa9ebccSVladimir Oltean * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's 22608aa9ebccSVladimir Oltean * ref_clk pin. So port clocking needs to be initialized early, before 22618aa9ebccSVladimir Oltean * connecting to PHYs is attempted, otherwise they won't respond through MDIO. 22628aa9ebccSVladimir Oltean * Setting correct PHY link speed does not matter now. 22638aa9ebccSVladimir Oltean * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY 22648aa9ebccSVladimir Oltean * bindings are not yet parsed by DSA core. We need to parse early so that we 22658aa9ebccSVladimir Oltean * can populate the xMII mode parameters table. 22668aa9ebccSVladimir Oltean */ 22678aa9ebccSVladimir Oltean static int sja1105_setup(struct dsa_switch *ds) 22688aa9ebccSVladimir Oltean { 22698aa9ebccSVladimir Oltean struct sja1105_private *priv = ds->priv; 22708aa9ebccSVladimir Oltean int rc; 22718aa9ebccSVladimir Oltean 22725d645df9SVladimir Oltean rc = sja1105_parse_dt(priv); 22738aa9ebccSVladimir Oltean if (rc < 0) { 22748aa9ebccSVladimir Oltean dev_err(ds->dev, "Failed to parse DT: %d\n", rc); 22758aa9ebccSVladimir Oltean return rc; 22768aa9ebccSVladimir Oltean } 2277f5b8631cSVladimir Oltean 2278f5b8631cSVladimir Oltean /* Error out early if internal delays are required through DT 2279f5b8631cSVladimir Oltean * and we can't apply them. 2280f5b8631cSVladimir Oltean */ 228129afb83aSVladimir Oltean rc = sja1105_parse_rgmii_delays(priv); 2282f5b8631cSVladimir Oltean if (rc < 0) { 2283f5b8631cSVladimir Oltean dev_err(ds->dev, "RGMII delay not supported\n"); 2284f5b8631cSVladimir Oltean return rc; 2285f5b8631cSVladimir Oltean } 2286f5b8631cSVladimir Oltean 228761c77126SVladimir Oltean rc = sja1105_ptp_clock_register(ds); 2288bb77f36aSVladimir Oltean if (rc < 0) { 2289bb77f36aSVladimir Oltean dev_err(ds->dev, "Failed to register PTP clock: %d\n", rc); 2290bb77f36aSVladimir Oltean return rc; 2291bb77f36aSVladimir Oltean } 22925a8f0974SVladimir Oltean 22935a8f0974SVladimir Oltean rc = sja1105_mdiobus_register(ds); 22945a8f0974SVladimir Oltean if (rc < 0) { 22955a8f0974SVladimir Oltean dev_err(ds->dev, "Failed to register MDIO bus: %pe\n", 22965a8f0974SVladimir Oltean ERR_PTR(rc)); 22975a8f0974SVladimir Oltean goto out_ptp_clock_unregister; 22985a8f0974SVladimir Oltean } 22995a8f0974SVladimir Oltean 2300cb5a82d2SVladimir Oltean if (priv->info->disable_microcontroller) { 2301cb5a82d2SVladimir Oltean rc = priv->info->disable_microcontroller(priv); 2302cb5a82d2SVladimir Oltean if (rc < 0) { 2303cb5a82d2SVladimir Oltean dev_err(ds->dev, 2304cb5a82d2SVladimir Oltean "Failed to disable microcontroller: %pe\n", 2305cb5a82d2SVladimir Oltean ERR_PTR(rc)); 2306cb5a82d2SVladimir Oltean goto out_mdiobus_unregister; 2307cb5a82d2SVladimir Oltean } 2308cb5a82d2SVladimir Oltean } 2309cb5a82d2SVladimir Oltean 23108aa9ebccSVladimir Oltean /* Create and send configuration down to device */ 23115d645df9SVladimir Oltean rc = sja1105_static_config_load(priv); 23128aa9ebccSVladimir Oltean if (rc < 0) { 23138aa9ebccSVladimir Oltean dev_err(ds->dev, "Failed to load static config: %d\n", rc); 23145a8f0974SVladimir Oltean goto out_mdiobus_unregister; 23158aa9ebccSVladimir Oltean } 2316cb5a82d2SVladimir Oltean 23178aa9ebccSVladimir Oltean /* Configure the CGU (PHY link modes and speeds) */ 2318cb5a82d2SVladimir Oltean if (priv->info->clocking_setup) { 2319c5037678SVladimir Oltean rc = priv->info->clocking_setup(priv); 23208aa9ebccSVladimir Oltean if (rc < 0) { 2321cb5a82d2SVladimir Oltean dev_err(ds->dev, 2322cb5a82d2SVladimir Oltean "Failed to configure MII clocking: %pe\n", 2323cb5a82d2SVladimir Oltean ERR_PTR(rc)); 2324cec279a8SVladimir Oltean goto out_static_config_free; 23258aa9ebccSVladimir Oltean } 2326cb5a82d2SVladimir Oltean } 2327cb5a82d2SVladimir Oltean 23286666cebcSVladimir Oltean /* On SJA1105, VLAN filtering per se is always enabled in hardware. 23296666cebcSVladimir Oltean * The only thing we can do to disable it is lie about what the 802.1Q 23306666cebcSVladimir Oltean * EtherType is. 23316666cebcSVladimir Oltean * So it will still try to apply VLAN filtering, but all ingress 23326666cebcSVladimir Oltean * traffic (except frames received with EtherType of ETH_P_SJA1105) 23336666cebcSVladimir Oltean * will be internally tagged with a distorted VLAN header where the 23346666cebcSVladimir Oltean * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid. 23356666cebcSVladimir Oltean */ 23366666cebcSVladimir Oltean ds->vlan_filtering_is_global = true; 23378aa9ebccSVladimir Oltean 23385f06c63bSVladimir Oltean /* Advertise the 8 egress queues */ 23395f06c63bSVladimir Oltean ds->num_tx_queues = SJA1105_NUM_TC; 23405f06c63bSVladimir Oltean 2341c279c726SVladimir Oltean ds->mtu_enforcement_ingress = true; 2342c279c726SVladimir Oltean 23430a7bdbc2SVladimir Oltean rc = sja1105_devlink_setup(ds); 23442cafa72eSVladimir Oltean if (rc < 0) 2345cec279a8SVladimir Oltean goto out_static_config_free; 23462cafa72eSVladimir Oltean 2347bbed0bbdSVladimir Oltean rtnl_lock(); 2348328621f6SVladimir Oltean rc = dsa_tag_8021q_register(ds, htons(ETH_P_8021Q)); 2349bbed0bbdSVladimir Oltean rtnl_unlock(); 2350cec279a8SVladimir Oltean if (rc) 2351cec279a8SVladimir Oltean goto out_devlink_teardown; 2352cec279a8SVladimir Oltean 2353cec279a8SVladimir Oltean return 0; 2354cec279a8SVladimir Oltean 2355cec279a8SVladimir Oltean out_devlink_teardown: 2356cec279a8SVladimir Oltean sja1105_devlink_teardown(ds); 23575a8f0974SVladimir Oltean out_mdiobus_unregister: 23585a8f0974SVladimir Oltean sja1105_mdiobus_unregister(ds); 2359cec279a8SVladimir Oltean out_ptp_clock_unregister: 2360cec279a8SVladimir Oltean sja1105_ptp_clock_unregister(ds); 2361cec279a8SVladimir Oltean out_static_config_free: 2362cec279a8SVladimir Oltean sja1105_static_config_free(&priv->static_config); 2363bbed0bbdSVladimir Oltean 2364bbed0bbdSVladimir Oltean return rc; 2365227d07a0SVladimir Oltean } 2366227d07a0SVladimir Oltean 2367f3097be2SVladimir Oltean static void sja1105_teardown(struct dsa_switch *ds) 2368f3097be2SVladimir Oltean { 2369f3097be2SVladimir Oltean struct sja1105_private *priv = ds->priv; 2370a68578c2SVladimir Oltean int port; 2371a68578c2SVladimir Oltean 2372328621f6SVladimir Oltean rtnl_lock(); 2373328621f6SVladimir Oltean dsa_tag_8021q_unregister(ds); 2374328621f6SVladimir Oltean rtnl_unlock(); 2375328621f6SVladimir Oltean 2376542043e9SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 2377a68578c2SVladimir Oltean struct sja1105_port *sp = &priv->ports[port]; 2378a68578c2SVladimir Oltean 2379a68578c2SVladimir Oltean if (!dsa_is_user_port(ds, port)) 2380a68578c2SVladimir Oltean continue; 2381a68578c2SVladimir Oltean 238252c0d4e3SVladimir Oltean if (sp->xmit_worker) 2383a68578c2SVladimir Oltean kthread_destroy_worker(sp->xmit_worker); 2384a68578c2SVladimir Oltean } 2385f3097be2SVladimir Oltean 23860a7bdbc2SVladimir Oltean sja1105_devlink_teardown(ds); 2387a6af7763SVladimir Oltean sja1105_flower_teardown(ds); 2388317ab5b8SVladimir Oltean sja1105_tas_teardown(ds); 238961c77126SVladimir Oltean sja1105_ptp_clock_unregister(ds); 23906cb0abbdSVladimir Oltean sja1105_static_config_free(&priv->static_config); 2391f3097be2SVladimir Oltean } 2392f3097be2SVladimir Oltean 2393a68578c2SVladimir Oltean static void sja1105_port_disable(struct dsa_switch *ds, int port) 2394a68578c2SVladimir Oltean { 2395a68578c2SVladimir Oltean struct sja1105_private *priv = ds->priv; 2396a68578c2SVladimir Oltean struct sja1105_port *sp = &priv->ports[port]; 2397a68578c2SVladimir Oltean 2398a68578c2SVladimir Oltean if (!dsa_is_user_port(ds, port)) 2399a68578c2SVladimir Oltean return; 2400a68578c2SVladimir Oltean 2401a68578c2SVladimir Oltean kthread_cancel_work_sync(&sp->xmit_work); 2402a68578c2SVladimir Oltean skb_queue_purge(&sp->xmit_queue); 2403a68578c2SVladimir Oltean } 2404a68578c2SVladimir Oltean 2405227d07a0SVladimir Oltean static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot, 240647ed985eSVladimir Oltean struct sk_buff *skb, bool takets) 2407227d07a0SVladimir Oltean { 2408227d07a0SVladimir Oltean struct sja1105_mgmt_entry mgmt_route = {0}; 2409227d07a0SVladimir Oltean struct sja1105_private *priv = ds->priv; 2410227d07a0SVladimir Oltean struct ethhdr *hdr; 2411227d07a0SVladimir Oltean int timeout = 10; 2412227d07a0SVladimir Oltean int rc; 2413227d07a0SVladimir Oltean 2414227d07a0SVladimir Oltean hdr = eth_hdr(skb); 2415227d07a0SVladimir Oltean 2416227d07a0SVladimir Oltean mgmt_route.macaddr = ether_addr_to_u64(hdr->h_dest); 2417227d07a0SVladimir Oltean mgmt_route.destports = BIT(port); 2418227d07a0SVladimir Oltean mgmt_route.enfport = 1; 241947ed985eSVladimir Oltean mgmt_route.tsreg = 0; 242047ed985eSVladimir Oltean mgmt_route.takets = takets; 2421227d07a0SVladimir Oltean 2422227d07a0SVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE, 2423227d07a0SVladimir Oltean slot, &mgmt_route, true); 2424227d07a0SVladimir Oltean if (rc < 0) { 2425227d07a0SVladimir Oltean kfree_skb(skb); 2426227d07a0SVladimir Oltean return rc; 2427227d07a0SVladimir Oltean } 2428227d07a0SVladimir Oltean 2429227d07a0SVladimir Oltean /* Transfer skb to the host port. */ 243068bb8ea8SVivien Didelot dsa_enqueue_skb(skb, dsa_to_port(ds, port)->slave); 2431227d07a0SVladimir Oltean 2432227d07a0SVladimir Oltean /* Wait until the switch has processed the frame */ 2433227d07a0SVladimir Oltean do { 2434227d07a0SVladimir Oltean rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE, 2435227d07a0SVladimir Oltean slot, &mgmt_route); 2436227d07a0SVladimir Oltean if (rc < 0) { 2437227d07a0SVladimir Oltean dev_err_ratelimited(priv->ds->dev, 2438227d07a0SVladimir Oltean "failed to poll for mgmt route\n"); 2439227d07a0SVladimir Oltean continue; 2440227d07a0SVladimir Oltean } 2441227d07a0SVladimir Oltean 2442227d07a0SVladimir Oltean /* UM10944: The ENFPORT flag of the respective entry is 2443227d07a0SVladimir Oltean * cleared when a match is found. The host can use this 2444227d07a0SVladimir Oltean * flag as an acknowledgment. 2445227d07a0SVladimir Oltean */ 2446227d07a0SVladimir Oltean cpu_relax(); 2447227d07a0SVladimir Oltean } while (mgmt_route.enfport && --timeout); 2448227d07a0SVladimir Oltean 2449227d07a0SVladimir Oltean if (!timeout) { 2450227d07a0SVladimir Oltean /* Clean up the management route so that a follow-up 2451227d07a0SVladimir Oltean * frame may not match on it by mistake. 24522a7e7409SVladimir Oltean * This is only hardware supported on P/Q/R/S - on E/T it is 24532a7e7409SVladimir Oltean * a no-op and we are silently discarding the -EOPNOTSUPP. 2454227d07a0SVladimir Oltean */ 2455227d07a0SVladimir Oltean sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE, 2456227d07a0SVladimir Oltean slot, &mgmt_route, false); 2457227d07a0SVladimir Oltean dev_err_ratelimited(priv->ds->dev, "xmit timed out\n"); 2458227d07a0SVladimir Oltean } 2459227d07a0SVladimir Oltean 2460227d07a0SVladimir Oltean return NETDEV_TX_OK; 2461227d07a0SVladimir Oltean } 2462227d07a0SVladimir Oltean 2463a68578c2SVladimir Oltean #define work_to_port(work) \ 2464a68578c2SVladimir Oltean container_of((work), struct sja1105_port, xmit_work) 2465a68578c2SVladimir Oltean #define tagger_to_sja1105(t) \ 2466a68578c2SVladimir Oltean container_of((t), struct sja1105_private, tagger_data) 2467a68578c2SVladimir Oltean 2468227d07a0SVladimir Oltean /* Deferred work is unfortunately necessary because setting up the management 2469227d07a0SVladimir Oltean * route cannot be done from atomit context (SPI transfer takes a sleepable 2470227d07a0SVladimir Oltean * lock on the bus) 2471227d07a0SVladimir Oltean */ 2472a68578c2SVladimir Oltean static void sja1105_port_deferred_xmit(struct kthread_work *work) 2473227d07a0SVladimir Oltean { 2474a68578c2SVladimir Oltean struct sja1105_port *sp = work_to_port(work); 2475a68578c2SVladimir Oltean struct sja1105_tagger_data *tagger_data = sp->data; 2476a68578c2SVladimir Oltean struct sja1105_private *priv = tagger_to_sja1105(tagger_data); 2477a68578c2SVladimir Oltean int port = sp - priv->ports; 2478a68578c2SVladimir Oltean struct sk_buff *skb; 2479a68578c2SVladimir Oltean 2480a68578c2SVladimir Oltean while ((skb = skb_dequeue(&sp->xmit_queue)) != NULL) { 2481c4b364ceSYangbo Lu struct sk_buff *clone = SJA1105_SKB_CB(skb)->clone; 2482227d07a0SVladimir Oltean 2483227d07a0SVladimir Oltean mutex_lock(&priv->mgmt_lock); 2484227d07a0SVladimir Oltean 2485a68578c2SVladimir Oltean sja1105_mgmt_xmit(priv->ds, port, 0, skb, !!clone); 2486a68578c2SVladimir Oltean 248747ed985eSVladimir Oltean /* The clone, if there, was made by dsa_skb_tx_timestamp */ 2488a68578c2SVladimir Oltean if (clone) 2489a68578c2SVladimir Oltean sja1105_ptp_txtstamp_skb(priv->ds, port, clone); 2490227d07a0SVladimir Oltean 2491227d07a0SVladimir Oltean mutex_unlock(&priv->mgmt_lock); 2492a68578c2SVladimir Oltean } 24938aa9ebccSVladimir Oltean } 24948aa9ebccSVladimir Oltean 24958456721dSVladimir Oltean /* The MAXAGE setting belongs to the L2 Forwarding Parameters table, 24968456721dSVladimir Oltean * which cannot be reconfigured at runtime. So a switch reset is required. 24978456721dSVladimir Oltean */ 24988456721dSVladimir Oltean static int sja1105_set_ageing_time(struct dsa_switch *ds, 24998456721dSVladimir Oltean unsigned int ageing_time) 25008456721dSVladimir Oltean { 25018456721dSVladimir Oltean struct sja1105_l2_lookup_params_entry *l2_lookup_params; 25028456721dSVladimir Oltean struct sja1105_private *priv = ds->priv; 25038456721dSVladimir Oltean struct sja1105_table *table; 25048456721dSVladimir Oltean unsigned int maxage; 25058456721dSVladimir Oltean 25068456721dSVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS]; 25078456721dSVladimir Oltean l2_lookup_params = table->entries; 25088456721dSVladimir Oltean 25098456721dSVladimir Oltean maxage = SJA1105_AGEING_TIME_MS(ageing_time); 25108456721dSVladimir Oltean 25118456721dSVladimir Oltean if (l2_lookup_params->maxage == maxage) 25128456721dSVladimir Oltean return 0; 25138456721dSVladimir Oltean 25148456721dSVladimir Oltean l2_lookup_params->maxage = maxage; 25158456721dSVladimir Oltean 25162eea1fa8SVladimir Oltean return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME); 25178456721dSVladimir Oltean } 25188456721dSVladimir Oltean 2519c279c726SVladimir Oltean static int sja1105_change_mtu(struct dsa_switch *ds, int port, int new_mtu) 2520c279c726SVladimir Oltean { 2521c279c726SVladimir Oltean struct sja1105_l2_policing_entry *policing; 2522c279c726SVladimir Oltean struct sja1105_private *priv = ds->priv; 2523c279c726SVladimir Oltean 2524c279c726SVladimir Oltean new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN; 2525c279c726SVladimir Oltean 2526c279c726SVladimir Oltean if (dsa_is_cpu_port(ds, port)) 2527c279c726SVladimir Oltean new_mtu += VLAN_HLEN; 2528c279c726SVladimir Oltean 2529c279c726SVladimir Oltean policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries; 2530c279c726SVladimir Oltean 2531a7cc081cSVladimir Oltean if (policing[port].maxlen == new_mtu) 2532c279c726SVladimir Oltean return 0; 2533c279c726SVladimir Oltean 2534a7cc081cSVladimir Oltean policing[port].maxlen = new_mtu; 2535c279c726SVladimir Oltean 2536c279c726SVladimir Oltean return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING); 2537c279c726SVladimir Oltean } 2538c279c726SVladimir Oltean 2539c279c726SVladimir Oltean static int sja1105_get_max_mtu(struct dsa_switch *ds, int port) 2540c279c726SVladimir Oltean { 2541c279c726SVladimir Oltean return 2043 - VLAN_ETH_HLEN - ETH_FCS_LEN; 2542c279c726SVladimir Oltean } 2543c279c726SVladimir Oltean 2544317ab5b8SVladimir Oltean static int sja1105_port_setup_tc(struct dsa_switch *ds, int port, 2545317ab5b8SVladimir Oltean enum tc_setup_type type, 2546317ab5b8SVladimir Oltean void *type_data) 2547317ab5b8SVladimir Oltean { 2548317ab5b8SVladimir Oltean switch (type) { 2549317ab5b8SVladimir Oltean case TC_SETUP_QDISC_TAPRIO: 2550317ab5b8SVladimir Oltean return sja1105_setup_tc_taprio(ds, port, type_data); 25514d752508SVladimir Oltean case TC_SETUP_QDISC_CBS: 25524d752508SVladimir Oltean return sja1105_setup_tc_cbs(ds, port, type_data); 2553317ab5b8SVladimir Oltean default: 2554317ab5b8SVladimir Oltean return -EOPNOTSUPP; 2555317ab5b8SVladimir Oltean } 2556317ab5b8SVladimir Oltean } 2557317ab5b8SVladimir Oltean 2558511e6ca0SVladimir Oltean /* We have a single mirror (@to) port, but can configure ingress and egress 2559511e6ca0SVladimir Oltean * mirroring on all other (@from) ports. 2560511e6ca0SVladimir Oltean * We need to allow mirroring rules only as long as the @to port is always the 2561511e6ca0SVladimir Oltean * same, and we need to unset the @to port from mirr_port only when there is no 2562511e6ca0SVladimir Oltean * mirroring rule that references it. 2563511e6ca0SVladimir Oltean */ 2564511e6ca0SVladimir Oltean static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to, 2565511e6ca0SVladimir Oltean bool ingress, bool enabled) 2566511e6ca0SVladimir Oltean { 2567511e6ca0SVladimir Oltean struct sja1105_general_params_entry *general_params; 2568511e6ca0SVladimir Oltean struct sja1105_mac_config_entry *mac; 2569542043e9SVladimir Oltean struct dsa_switch *ds = priv->ds; 2570511e6ca0SVladimir Oltean struct sja1105_table *table; 2571511e6ca0SVladimir Oltean bool already_enabled; 2572511e6ca0SVladimir Oltean u64 new_mirr_port; 2573511e6ca0SVladimir Oltean int rc; 2574511e6ca0SVladimir Oltean 2575511e6ca0SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_GENERAL_PARAMS]; 2576511e6ca0SVladimir Oltean general_params = table->entries; 2577511e6ca0SVladimir Oltean 2578511e6ca0SVladimir Oltean mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 2579511e6ca0SVladimir Oltean 2580542043e9SVladimir Oltean already_enabled = (general_params->mirr_port != ds->num_ports); 2581511e6ca0SVladimir Oltean if (already_enabled && enabled && general_params->mirr_port != to) { 2582511e6ca0SVladimir Oltean dev_err(priv->ds->dev, 2583511e6ca0SVladimir Oltean "Delete mirroring rules towards port %llu first\n", 2584511e6ca0SVladimir Oltean general_params->mirr_port); 2585511e6ca0SVladimir Oltean return -EBUSY; 2586511e6ca0SVladimir Oltean } 2587511e6ca0SVladimir Oltean 2588511e6ca0SVladimir Oltean new_mirr_port = to; 2589511e6ca0SVladimir Oltean if (!enabled) { 2590511e6ca0SVladimir Oltean bool keep = false; 2591511e6ca0SVladimir Oltean int port; 2592511e6ca0SVladimir Oltean 2593511e6ca0SVladimir Oltean /* Anybody still referencing mirr_port? */ 2594542043e9SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 2595511e6ca0SVladimir Oltean if (mac[port].ing_mirr || mac[port].egr_mirr) { 2596511e6ca0SVladimir Oltean keep = true; 2597511e6ca0SVladimir Oltean break; 2598511e6ca0SVladimir Oltean } 2599511e6ca0SVladimir Oltean } 2600511e6ca0SVladimir Oltean /* Unset already_enabled for next time */ 2601511e6ca0SVladimir Oltean if (!keep) 2602542043e9SVladimir Oltean new_mirr_port = ds->num_ports; 2603511e6ca0SVladimir Oltean } 2604511e6ca0SVladimir Oltean if (new_mirr_port != general_params->mirr_port) { 2605511e6ca0SVladimir Oltean general_params->mirr_port = new_mirr_port; 2606511e6ca0SVladimir Oltean 2607511e6ca0SVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS, 2608511e6ca0SVladimir Oltean 0, general_params, true); 2609511e6ca0SVladimir Oltean if (rc < 0) 2610511e6ca0SVladimir Oltean return rc; 2611511e6ca0SVladimir Oltean } 2612511e6ca0SVladimir Oltean 2613511e6ca0SVladimir Oltean if (ingress) 2614511e6ca0SVladimir Oltean mac[from].ing_mirr = enabled; 2615511e6ca0SVladimir Oltean else 2616511e6ca0SVladimir Oltean mac[from].egr_mirr = enabled; 2617511e6ca0SVladimir Oltean 2618511e6ca0SVladimir Oltean return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from, 2619511e6ca0SVladimir Oltean &mac[from], true); 2620511e6ca0SVladimir Oltean } 2621511e6ca0SVladimir Oltean 2622511e6ca0SVladimir Oltean static int sja1105_mirror_add(struct dsa_switch *ds, int port, 2623511e6ca0SVladimir Oltean struct dsa_mall_mirror_tc_entry *mirror, 2624511e6ca0SVladimir Oltean bool ingress) 2625511e6ca0SVladimir Oltean { 2626511e6ca0SVladimir Oltean return sja1105_mirror_apply(ds->priv, port, mirror->to_local_port, 2627511e6ca0SVladimir Oltean ingress, true); 2628511e6ca0SVladimir Oltean } 2629511e6ca0SVladimir Oltean 2630511e6ca0SVladimir Oltean static void sja1105_mirror_del(struct dsa_switch *ds, int port, 2631511e6ca0SVladimir Oltean struct dsa_mall_mirror_tc_entry *mirror) 2632511e6ca0SVladimir Oltean { 2633511e6ca0SVladimir Oltean sja1105_mirror_apply(ds->priv, port, mirror->to_local_port, 2634511e6ca0SVladimir Oltean mirror->ingress, false); 2635511e6ca0SVladimir Oltean } 2636511e6ca0SVladimir Oltean 2637a7cc081cSVladimir Oltean static int sja1105_port_policer_add(struct dsa_switch *ds, int port, 2638a7cc081cSVladimir Oltean struct dsa_mall_policer_tc_entry *policer) 2639a7cc081cSVladimir Oltean { 2640a7cc081cSVladimir Oltean struct sja1105_l2_policing_entry *policing; 2641a7cc081cSVladimir Oltean struct sja1105_private *priv = ds->priv; 2642a7cc081cSVladimir Oltean 2643a7cc081cSVladimir Oltean policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries; 2644a7cc081cSVladimir Oltean 2645a7cc081cSVladimir Oltean /* In hardware, every 8 microseconds the credit level is incremented by 2646a7cc081cSVladimir Oltean * the value of RATE bytes divided by 64, up to a maximum of SMAX 2647a7cc081cSVladimir Oltean * bytes. 2648a7cc081cSVladimir Oltean */ 2649a7cc081cSVladimir Oltean policing[port].rate = div_u64(512 * policer->rate_bytes_per_sec, 2650a7cc081cSVladimir Oltean 1000000); 26515f035af7SPo Liu policing[port].smax = policer->burst; 2652a7cc081cSVladimir Oltean 2653a7cc081cSVladimir Oltean return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING); 2654a7cc081cSVladimir Oltean } 2655a7cc081cSVladimir Oltean 2656a7cc081cSVladimir Oltean static void sja1105_port_policer_del(struct dsa_switch *ds, int port) 2657a7cc081cSVladimir Oltean { 2658a7cc081cSVladimir Oltean struct sja1105_l2_policing_entry *policing; 2659a7cc081cSVladimir Oltean struct sja1105_private *priv = ds->priv; 2660a7cc081cSVladimir Oltean 2661a7cc081cSVladimir Oltean policing = priv->static_config.tables[BLK_IDX_L2_POLICING].entries; 2662a7cc081cSVladimir Oltean 2663a7cc081cSVladimir Oltean policing[port].rate = SJA1105_RATE_MBPS(1000); 2664a7cc081cSVladimir Oltean policing[port].smax = 65535; 2665a7cc081cSVladimir Oltean 2666a7cc081cSVladimir Oltean sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING); 2667a7cc081cSVladimir Oltean } 2668a7cc081cSVladimir Oltean 26694d942354SVladimir Oltean static int sja1105_port_set_learning(struct sja1105_private *priv, int port, 26704d942354SVladimir Oltean bool enabled) 26714d942354SVladimir Oltean { 26724d942354SVladimir Oltean struct sja1105_mac_config_entry *mac; 26734d942354SVladimir Oltean int rc; 26744d942354SVladimir Oltean 26754d942354SVladimir Oltean mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries; 26764d942354SVladimir Oltean 26774c44fc5eSVladimir Oltean mac[port].dyn_learn = enabled; 26784d942354SVladimir Oltean 26794d942354SVladimir Oltean rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port, 26804d942354SVladimir Oltean &mac[port], true); 26814d942354SVladimir Oltean if (rc) 26824d942354SVladimir Oltean return rc; 26834d942354SVladimir Oltean 26844d942354SVladimir Oltean if (enabled) 26854d942354SVladimir Oltean priv->learn_ena |= BIT(port); 26864d942354SVladimir Oltean else 26874d942354SVladimir Oltean priv->learn_ena &= ~BIT(port); 26884d942354SVladimir Oltean 26894d942354SVladimir Oltean return 0; 26904d942354SVladimir Oltean } 26914d942354SVladimir Oltean 26924d942354SVladimir Oltean static int sja1105_port_ucast_bcast_flood(struct sja1105_private *priv, int to, 26934d942354SVladimir Oltean struct switchdev_brport_flags flags) 26944d942354SVladimir Oltean { 26954d942354SVladimir Oltean if (flags.mask & BR_FLOOD) { 26964d942354SVladimir Oltean if (flags.val & BR_FLOOD) 26977f7ccdeaSVladimir Oltean priv->ucast_egress_floods |= BIT(to); 26984d942354SVladimir Oltean else 26996a5166e0SVladimir Oltean priv->ucast_egress_floods &= ~BIT(to); 27004d942354SVladimir Oltean } 27017f7ccdeaSVladimir Oltean 27024d942354SVladimir Oltean if (flags.mask & BR_BCAST_FLOOD) { 27034d942354SVladimir Oltean if (flags.val & BR_BCAST_FLOOD) 27047f7ccdeaSVladimir Oltean priv->bcast_egress_floods |= BIT(to); 27054d942354SVladimir Oltean else 27066a5166e0SVladimir Oltean priv->bcast_egress_floods &= ~BIT(to); 27074d942354SVladimir Oltean } 27084d942354SVladimir Oltean 27097f7ccdeaSVladimir Oltean return sja1105_manage_flood_domains(priv); 27104d942354SVladimir Oltean } 27114d942354SVladimir Oltean 27124d942354SVladimir Oltean static int sja1105_port_mcast_flood(struct sja1105_private *priv, int to, 27134d942354SVladimir Oltean struct switchdev_brport_flags flags, 27144d942354SVladimir Oltean struct netlink_ext_ack *extack) 27154d942354SVladimir Oltean { 27164d942354SVladimir Oltean struct sja1105_l2_lookup_entry *l2_lookup; 27174d942354SVladimir Oltean struct sja1105_table *table; 27184d942354SVladimir Oltean int match; 27194d942354SVladimir Oltean 27204d942354SVladimir Oltean table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP]; 27214d942354SVladimir Oltean l2_lookup = table->entries; 27224d942354SVladimir Oltean 27234d942354SVladimir Oltean for (match = 0; match < table->entry_count; match++) 27244d942354SVladimir Oltean if (l2_lookup[match].macaddr == SJA1105_UNKNOWN_MULTICAST && 27254d942354SVladimir Oltean l2_lookup[match].mask_macaddr == SJA1105_UNKNOWN_MULTICAST) 27264d942354SVladimir Oltean break; 27274d942354SVladimir Oltean 27284d942354SVladimir Oltean if (match == table->entry_count) { 27294d942354SVladimir Oltean NL_SET_ERR_MSG_MOD(extack, 27304d942354SVladimir Oltean "Could not find FDB entry for unknown multicast"); 27314d942354SVladimir Oltean return -ENOSPC; 27324d942354SVladimir Oltean } 27334d942354SVladimir Oltean 27344d942354SVladimir Oltean if (flags.val & BR_MCAST_FLOOD) 27354d942354SVladimir Oltean l2_lookup[match].destports |= BIT(to); 27364d942354SVladimir Oltean else 27374d942354SVladimir Oltean l2_lookup[match].destports &= ~BIT(to); 27384d942354SVladimir Oltean 27394d942354SVladimir Oltean return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP, 27404d942354SVladimir Oltean l2_lookup[match].index, 27414d942354SVladimir Oltean &l2_lookup[match], 27424d942354SVladimir Oltean true); 27434d942354SVladimir Oltean } 27444d942354SVladimir Oltean 27454d942354SVladimir Oltean static int sja1105_port_pre_bridge_flags(struct dsa_switch *ds, int port, 27464d942354SVladimir Oltean struct switchdev_brport_flags flags, 27474d942354SVladimir Oltean struct netlink_ext_ack *extack) 27484d942354SVladimir Oltean { 27494d942354SVladimir Oltean struct sja1105_private *priv = ds->priv; 27504d942354SVladimir Oltean 27514d942354SVladimir Oltean if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD | 27524d942354SVladimir Oltean BR_BCAST_FLOOD)) 27534d942354SVladimir Oltean return -EINVAL; 27544d942354SVladimir Oltean 27554d942354SVladimir Oltean if (flags.mask & (BR_FLOOD | BR_MCAST_FLOOD) && 27564d942354SVladimir Oltean !priv->info->can_limit_mcast_flood) { 27574d942354SVladimir Oltean bool multicast = !!(flags.val & BR_MCAST_FLOOD); 27584d942354SVladimir Oltean bool unicast = !!(flags.val & BR_FLOOD); 27594d942354SVladimir Oltean 27604d942354SVladimir Oltean if (unicast != multicast) { 27614d942354SVladimir Oltean NL_SET_ERR_MSG_MOD(extack, 27624d942354SVladimir Oltean "This chip cannot configure multicast flooding independently of unicast"); 27634d942354SVladimir Oltean return -EINVAL; 27644d942354SVladimir Oltean } 27654d942354SVladimir Oltean } 27664d942354SVladimir Oltean 27674d942354SVladimir Oltean return 0; 27684d942354SVladimir Oltean } 27694d942354SVladimir Oltean 27704d942354SVladimir Oltean static int sja1105_port_bridge_flags(struct dsa_switch *ds, int port, 27714d942354SVladimir Oltean struct switchdev_brport_flags flags, 27724d942354SVladimir Oltean struct netlink_ext_ack *extack) 27734d942354SVladimir Oltean { 27744d942354SVladimir Oltean struct sja1105_private *priv = ds->priv; 27754d942354SVladimir Oltean int rc; 27764d942354SVladimir Oltean 27774d942354SVladimir Oltean if (flags.mask & BR_LEARNING) { 27784d942354SVladimir Oltean bool learn_ena = !!(flags.val & BR_LEARNING); 27794d942354SVladimir Oltean 27804d942354SVladimir Oltean rc = sja1105_port_set_learning(priv, port, learn_ena); 27814d942354SVladimir Oltean if (rc) 27824d942354SVladimir Oltean return rc; 27834d942354SVladimir Oltean } 27844d942354SVladimir Oltean 27854d942354SVladimir Oltean if (flags.mask & (BR_FLOOD | BR_BCAST_FLOOD)) { 27864d942354SVladimir Oltean rc = sja1105_port_ucast_bcast_flood(priv, port, flags); 27874d942354SVladimir Oltean if (rc) 27884d942354SVladimir Oltean return rc; 27894d942354SVladimir Oltean } 27904d942354SVladimir Oltean 27914d942354SVladimir Oltean /* For chips that can't offload BR_MCAST_FLOOD independently, there 27924d942354SVladimir Oltean * is nothing to do here, we ensured the configuration is in sync by 27934d942354SVladimir Oltean * offloading BR_FLOOD. 27944d942354SVladimir Oltean */ 27954d942354SVladimir Oltean if (flags.mask & BR_MCAST_FLOOD && priv->info->can_limit_mcast_flood) { 27964d942354SVladimir Oltean rc = sja1105_port_mcast_flood(priv, port, flags, 27974d942354SVladimir Oltean extack); 27984d942354SVladimir Oltean if (rc) 27994d942354SVladimir Oltean return rc; 28004d942354SVladimir Oltean } 28014d942354SVladimir Oltean 28024d942354SVladimir Oltean return 0; 28034d942354SVladimir Oltean } 28044d942354SVladimir Oltean 28058aa9ebccSVladimir Oltean static const struct dsa_switch_ops sja1105_switch_ops = { 28068aa9ebccSVladimir Oltean .get_tag_protocol = sja1105_get_tag_protocol, 28078aa9ebccSVladimir Oltean .setup = sja1105_setup, 2808f3097be2SVladimir Oltean .teardown = sja1105_teardown, 28098456721dSVladimir Oltean .set_ageing_time = sja1105_set_ageing_time, 2810c279c726SVladimir Oltean .port_change_mtu = sja1105_change_mtu, 2811c279c726SVladimir Oltean .port_max_mtu = sja1105_get_max_mtu, 2812ad9f299aSVladimir Oltean .phylink_validate = sja1105_phylink_validate, 2813af7cd036SVladimir Oltean .phylink_mac_config = sja1105_mac_config, 28148400cff6SVladimir Oltean .phylink_mac_link_up = sja1105_mac_link_up, 28158400cff6SVladimir Oltean .phylink_mac_link_down = sja1105_mac_link_down, 281652c34e6eSVladimir Oltean .get_strings = sja1105_get_strings, 281752c34e6eSVladimir Oltean .get_ethtool_stats = sja1105_get_ethtool_stats, 281852c34e6eSVladimir Oltean .get_sset_count = sja1105_get_sset_count, 2819bb77f36aSVladimir Oltean .get_ts_info = sja1105_get_ts_info, 2820a68578c2SVladimir Oltean .port_disable = sja1105_port_disable, 2821291d1e72SVladimir Oltean .port_fdb_dump = sja1105_fdb_dump, 2822291d1e72SVladimir Oltean .port_fdb_add = sja1105_fdb_add, 2823291d1e72SVladimir Oltean .port_fdb_del = sja1105_fdb_del, 28248aa9ebccSVladimir Oltean .port_bridge_join = sja1105_bridge_join, 28258aa9ebccSVladimir Oltean .port_bridge_leave = sja1105_bridge_leave, 28264d942354SVladimir Oltean .port_pre_bridge_flags = sja1105_port_pre_bridge_flags, 28274d942354SVladimir Oltean .port_bridge_flags = sja1105_port_bridge_flags, 2828640f763fSVladimir Oltean .port_stp_state_set = sja1105_bridge_stp_state_set, 28296666cebcSVladimir Oltean .port_vlan_filtering = sja1105_vlan_filtering, 2830*6dfd23d3SVladimir Oltean .port_vlan_add = sja1105_bridge_vlan_add, 2831*6dfd23d3SVladimir Oltean .port_vlan_del = sja1105_bridge_vlan_del, 2832291d1e72SVladimir Oltean .port_mdb_add = sja1105_mdb_add, 2833291d1e72SVladimir Oltean .port_mdb_del = sja1105_mdb_del, 2834a602afd2SVladimir Oltean .port_hwtstamp_get = sja1105_hwtstamp_get, 2835a602afd2SVladimir Oltean .port_hwtstamp_set = sja1105_hwtstamp_set, 2836f3097be2SVladimir Oltean .port_rxtstamp = sja1105_port_rxtstamp, 283747ed985eSVladimir Oltean .port_txtstamp = sja1105_port_txtstamp, 2838317ab5b8SVladimir Oltean .port_setup_tc = sja1105_port_setup_tc, 2839511e6ca0SVladimir Oltean .port_mirror_add = sja1105_mirror_add, 2840511e6ca0SVladimir Oltean .port_mirror_del = sja1105_mirror_del, 2841a7cc081cSVladimir Oltean .port_policer_add = sja1105_port_policer_add, 2842a7cc081cSVladimir Oltean .port_policer_del = sja1105_port_policer_del, 2843a6af7763SVladimir Oltean .cls_flower_add = sja1105_cls_flower_add, 2844a6af7763SVladimir Oltean .cls_flower_del = sja1105_cls_flower_del, 2845834f8933SVladimir Oltean .cls_flower_stats = sja1105_cls_flower_stats, 2846ff4cf8eaSVladimir Oltean .devlink_info_get = sja1105_devlink_info_get, 28475da11eb4SVladimir Oltean .tag_8021q_vlan_add = sja1105_dsa_8021q_vlan_add, 28485da11eb4SVladimir Oltean .tag_8021q_vlan_del = sja1105_dsa_8021q_vlan_del, 28498aa9ebccSVladimir Oltean }; 28508aa9ebccSVladimir Oltean 28510b0e2997SVladimir Oltean static const struct of_device_id sja1105_dt_ids[]; 28520b0e2997SVladimir Oltean 28538aa9ebccSVladimir Oltean static int sja1105_check_device_id(struct sja1105_private *priv) 28548aa9ebccSVladimir Oltean { 28558aa9ebccSVladimir Oltean const struct sja1105_regs *regs = priv->info->regs; 28568aa9ebccSVladimir Oltean u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0}; 28578aa9ebccSVladimir Oltean struct device *dev = &priv->spidev->dev; 28580b0e2997SVladimir Oltean const struct of_device_id *match; 2859dff79620SVladimir Oltean u32 device_id; 28608aa9ebccSVladimir Oltean u64 part_no; 28618aa9ebccSVladimir Oltean int rc; 28628aa9ebccSVladimir Oltean 286334d76e9fSVladimir Oltean rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id, 286434d76e9fSVladimir Oltean NULL); 28658aa9ebccSVladimir Oltean if (rc < 0) 28668aa9ebccSVladimir Oltean return rc; 28678aa9ebccSVladimir Oltean 28681bd44870SVladimir Oltean rc = sja1105_xfer_buf(priv, SPI_READ, regs->prod_id, prod_id, 28691bd44870SVladimir Oltean SJA1105_SIZE_DEVICE_ID); 28708aa9ebccSVladimir Oltean if (rc < 0) 28718aa9ebccSVladimir Oltean return rc; 28728aa9ebccSVladimir Oltean 28738aa9ebccSVladimir Oltean sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID); 28748aa9ebccSVladimir Oltean 28755978fac0SNathan Chancellor for (match = sja1105_dt_ids; match->compatible[0]; match++) { 28760b0e2997SVladimir Oltean const struct sja1105_info *info = match->data; 28770b0e2997SVladimir Oltean 28780b0e2997SVladimir Oltean /* Is what's been probed in our match table at all? */ 28790b0e2997SVladimir Oltean if (info->device_id != device_id || info->part_no != part_no) 28800b0e2997SVladimir Oltean continue; 28810b0e2997SVladimir Oltean 28820b0e2997SVladimir Oltean /* But is it what's in the device tree? */ 28830b0e2997SVladimir Oltean if (priv->info->device_id != device_id || 28840b0e2997SVladimir Oltean priv->info->part_no != part_no) { 28850b0e2997SVladimir Oltean dev_warn(dev, "Device tree specifies chip %s but found %s, please fix it!\n", 28860b0e2997SVladimir Oltean priv->info->name, info->name); 28870b0e2997SVladimir Oltean /* It isn't. No problem, pick that up. */ 28880b0e2997SVladimir Oltean priv->info = info; 28898aa9ebccSVladimir Oltean } 28908aa9ebccSVladimir Oltean 28918aa9ebccSVladimir Oltean return 0; 28928aa9ebccSVladimir Oltean } 28938aa9ebccSVladimir Oltean 28940b0e2997SVladimir Oltean dev_err(dev, "Unexpected {device ID, part number}: 0x%x 0x%llx\n", 28950b0e2997SVladimir Oltean device_id, part_no); 28960b0e2997SVladimir Oltean 28970b0e2997SVladimir Oltean return -ENODEV; 28980b0e2997SVladimir Oltean } 28990b0e2997SVladimir Oltean 29008aa9ebccSVladimir Oltean static int sja1105_probe(struct spi_device *spi) 29018aa9ebccSVladimir Oltean { 2902844d7edcSVladimir Oltean struct sja1105_tagger_data *tagger_data; 29038aa9ebccSVladimir Oltean struct device *dev = &spi->dev; 29048aa9ebccSVladimir Oltean struct sja1105_private *priv; 2905718bad0eSVladimir Oltean size_t max_xfer, max_msg; 29068aa9ebccSVladimir Oltean struct dsa_switch *ds; 2907a68578c2SVladimir Oltean int rc, port; 29088aa9ebccSVladimir Oltean 29098aa9ebccSVladimir Oltean if (!dev->of_node) { 29108aa9ebccSVladimir Oltean dev_err(dev, "No DTS bindings for SJA1105 driver\n"); 29118aa9ebccSVladimir Oltean return -EINVAL; 29128aa9ebccSVladimir Oltean } 29138aa9ebccSVladimir Oltean 29148aa9ebccSVladimir Oltean priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL); 29158aa9ebccSVladimir Oltean if (!priv) 29168aa9ebccSVladimir Oltean return -ENOMEM; 29178aa9ebccSVladimir Oltean 29188aa9ebccSVladimir Oltean /* Configure the optional reset pin and bring up switch */ 29198aa9ebccSVladimir Oltean priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 29208aa9ebccSVladimir Oltean if (IS_ERR(priv->reset_gpio)) 29218aa9ebccSVladimir Oltean dev_dbg(dev, "reset-gpios not defined, ignoring\n"); 29228aa9ebccSVladimir Oltean else 29238aa9ebccSVladimir Oltean sja1105_hw_reset(priv->reset_gpio, 1, 1); 29248aa9ebccSVladimir Oltean 29258aa9ebccSVladimir Oltean /* Populate our driver private structure (priv) based on 29268aa9ebccSVladimir Oltean * the device tree node that was probed (spi) 29278aa9ebccSVladimir Oltean */ 29288aa9ebccSVladimir Oltean priv->spidev = spi; 29298aa9ebccSVladimir Oltean spi_set_drvdata(spi, priv); 29308aa9ebccSVladimir Oltean 29318aa9ebccSVladimir Oltean /* Configure the SPI bus */ 29328aa9ebccSVladimir Oltean spi->bits_per_word = 8; 29338aa9ebccSVladimir Oltean rc = spi_setup(spi); 29348aa9ebccSVladimir Oltean if (rc < 0) { 29358aa9ebccSVladimir Oltean dev_err(dev, "Could not init SPI\n"); 29368aa9ebccSVladimir Oltean return rc; 29378aa9ebccSVladimir Oltean } 29388aa9ebccSVladimir Oltean 2939718bad0eSVladimir Oltean /* In sja1105_xfer, we send spi_messages composed of two spi_transfers: 2940718bad0eSVladimir Oltean * a small one for the message header and another one for the current 2941718bad0eSVladimir Oltean * chunk of the packed buffer. 2942718bad0eSVladimir Oltean * Check that the restrictions imposed by the SPI controller are 2943718bad0eSVladimir Oltean * respected: the chunk buffer is smaller than the max transfer size, 2944718bad0eSVladimir Oltean * and the total length of the chunk plus its message header is smaller 2945718bad0eSVladimir Oltean * than the max message size. 2946718bad0eSVladimir Oltean * We do that during probe time since the maximum transfer size is a 2947718bad0eSVladimir Oltean * runtime invariant. 2948718bad0eSVladimir Oltean */ 2949718bad0eSVladimir Oltean max_xfer = spi_max_transfer_size(spi); 2950718bad0eSVladimir Oltean max_msg = spi_max_message_size(spi); 2951718bad0eSVladimir Oltean 2952718bad0eSVladimir Oltean /* We need to send at least one 64-bit word of SPI payload per message 2953718bad0eSVladimir Oltean * in order to be able to make useful progress. 2954718bad0eSVladimir Oltean */ 2955718bad0eSVladimir Oltean if (max_msg < SJA1105_SIZE_SPI_MSG_HEADER + 8) { 2956718bad0eSVladimir Oltean dev_err(dev, "SPI master cannot send large enough buffers, aborting\n"); 2957718bad0eSVladimir Oltean return -EINVAL; 2958718bad0eSVladimir Oltean } 2959718bad0eSVladimir Oltean 2960718bad0eSVladimir Oltean priv->max_xfer_len = SJA1105_SIZE_SPI_MSG_MAXLEN; 2961718bad0eSVladimir Oltean if (priv->max_xfer_len > max_xfer) 2962718bad0eSVladimir Oltean priv->max_xfer_len = max_xfer; 2963718bad0eSVladimir Oltean if (priv->max_xfer_len > max_msg - SJA1105_SIZE_SPI_MSG_HEADER) 2964718bad0eSVladimir Oltean priv->max_xfer_len = max_msg - SJA1105_SIZE_SPI_MSG_HEADER; 2965718bad0eSVladimir Oltean 29668aa9ebccSVladimir Oltean priv->info = of_device_get_match_data(dev); 29678aa9ebccSVladimir Oltean 29688aa9ebccSVladimir Oltean /* Detect hardware device */ 29698aa9ebccSVladimir Oltean rc = sja1105_check_device_id(priv); 29708aa9ebccSVladimir Oltean if (rc < 0) { 29718aa9ebccSVladimir Oltean dev_err(dev, "Device ID check failed: %d\n", rc); 29728aa9ebccSVladimir Oltean return rc; 29738aa9ebccSVladimir Oltean } 29748aa9ebccSVladimir Oltean 29758aa9ebccSVladimir Oltean dev_info(dev, "Probed switch chip: %s\n", priv->info->name); 29768aa9ebccSVladimir Oltean 29777e99e347SVivien Didelot ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL); 29788aa9ebccSVladimir Oltean if (!ds) 29798aa9ebccSVladimir Oltean return -ENOMEM; 29808aa9ebccSVladimir Oltean 29817e99e347SVivien Didelot ds->dev = dev; 29823e77e59bSVladimir Oltean ds->num_ports = priv->info->num_ports; 29838aa9ebccSVladimir Oltean ds->ops = &sja1105_switch_ops; 29848aa9ebccSVladimir Oltean ds->priv = priv; 29858aa9ebccSVladimir Oltean priv->ds = ds; 29868aa9ebccSVladimir Oltean 2987844d7edcSVladimir Oltean tagger_data = &priv->tagger_data; 2988844d7edcSVladimir Oltean 2989d5a619bfSVivien Didelot mutex_init(&priv->ptp_data.lock); 2990d5a619bfSVivien Didelot mutex_init(&priv->mgmt_lock); 2991d5a619bfSVivien Didelot 2992d5a619bfSVivien Didelot sja1105_tas_setup(ds); 2993a6af7763SVladimir Oltean sja1105_flower_setup(ds); 2994d5a619bfSVivien Didelot 2995d5a619bfSVivien Didelot rc = dsa_register_switch(priv->ds); 2996d5a619bfSVivien Didelot if (rc) 2997328621f6SVladimir Oltean return rc; 2998d5a619bfSVivien Didelot 29994d752508SVladimir Oltean if (IS_ENABLED(CONFIG_NET_SCH_CBS)) { 30004d752508SVladimir Oltean priv->cbs = devm_kcalloc(dev, priv->info->num_cbs_shapers, 30014d752508SVladimir Oltean sizeof(struct sja1105_cbs_entry), 30024d752508SVladimir Oltean GFP_KERNEL); 3003dc596e3fSVladimir Oltean if (!priv->cbs) { 3004dc596e3fSVladimir Oltean rc = -ENOMEM; 3005dc596e3fSVladimir Oltean goto out_unregister_switch; 3006dc596e3fSVladimir Oltean } 30074d752508SVladimir Oltean } 30084d752508SVladimir Oltean 3009227d07a0SVladimir Oltean /* Connections between dsa_port and sja1105_port */ 3010542043e9SVladimir Oltean for (port = 0; port < ds->num_ports; port++) { 3011a68578c2SVladimir Oltean struct sja1105_port *sp = &priv->ports[port]; 3012a68578c2SVladimir Oltean struct dsa_port *dp = dsa_to_port(ds, port); 3013a68578c2SVladimir Oltean struct net_device *slave; 3014227d07a0SVladimir Oltean 3015a68578c2SVladimir Oltean if (!dsa_is_user_port(ds, port)) 3016a68578c2SVladimir Oltean continue; 3017a68578c2SVladimir Oltean 3018a68578c2SVladimir Oltean dp->priv = sp; 3019a68578c2SVladimir Oltean sp->dp = dp; 3020844d7edcSVladimir Oltean sp->data = tagger_data; 3021a68578c2SVladimir Oltean slave = dp->slave; 3022a68578c2SVladimir Oltean kthread_init_work(&sp->xmit_work, sja1105_port_deferred_xmit); 3023a68578c2SVladimir Oltean sp->xmit_worker = kthread_create_worker(0, "%s_xmit", 3024a68578c2SVladimir Oltean slave->name); 3025a68578c2SVladimir Oltean if (IS_ERR(sp->xmit_worker)) { 3026a68578c2SVladimir Oltean rc = PTR_ERR(sp->xmit_worker); 3027a68578c2SVladimir Oltean dev_err(ds->dev, 3028a68578c2SVladimir Oltean "failed to create deferred xmit thread: %d\n", 3029a68578c2SVladimir Oltean rc); 3030dc596e3fSVladimir Oltean goto out_destroy_workers; 3031a68578c2SVladimir Oltean } 3032a68578c2SVladimir Oltean skb_queue_head_init(&sp->xmit_queue); 303338b5beeaSVladimir Oltean sp->xmit_tpid = ETH_P_SJA1105; 3034227d07a0SVladimir Oltean } 3035227d07a0SVladimir Oltean 3036d5a619bfSVivien Didelot return 0; 3037dc596e3fSVladimir Oltean 3038dc596e3fSVladimir Oltean out_destroy_workers: 3039a68578c2SVladimir Oltean while (port-- > 0) { 3040a68578c2SVladimir Oltean struct sja1105_port *sp = &priv->ports[port]; 3041a68578c2SVladimir Oltean 3042a68578c2SVladimir Oltean if (!dsa_is_user_port(ds, port)) 3043a68578c2SVladimir Oltean continue; 3044a68578c2SVladimir Oltean 3045a68578c2SVladimir Oltean kthread_destroy_worker(sp->xmit_worker); 3046a68578c2SVladimir Oltean } 3047dc596e3fSVladimir Oltean 3048dc596e3fSVladimir Oltean out_unregister_switch: 3049dc596e3fSVladimir Oltean dsa_unregister_switch(ds); 3050dc596e3fSVladimir Oltean 3051a68578c2SVladimir Oltean return rc; 30528aa9ebccSVladimir Oltean } 30538aa9ebccSVladimir Oltean 30548aa9ebccSVladimir Oltean static int sja1105_remove(struct spi_device *spi) 30558aa9ebccSVladimir Oltean { 30568aa9ebccSVladimir Oltean struct sja1105_private *priv = spi_get_drvdata(spi); 3057cedf4670SVladimir Oltean struct dsa_switch *ds = priv->ds; 30588aa9ebccSVladimir Oltean 3059cedf4670SVladimir Oltean dsa_unregister_switch(ds); 3060cedf4670SVladimir Oltean 30618aa9ebccSVladimir Oltean return 0; 30628aa9ebccSVladimir Oltean } 30638aa9ebccSVladimir Oltean 30648aa9ebccSVladimir Oltean static const struct of_device_id sja1105_dt_ids[] = { 30658aa9ebccSVladimir Oltean { .compatible = "nxp,sja1105e", .data = &sja1105e_info }, 30668aa9ebccSVladimir Oltean { .compatible = "nxp,sja1105t", .data = &sja1105t_info }, 30678aa9ebccSVladimir Oltean { .compatible = "nxp,sja1105p", .data = &sja1105p_info }, 30688aa9ebccSVladimir Oltean { .compatible = "nxp,sja1105q", .data = &sja1105q_info }, 30698aa9ebccSVladimir Oltean { .compatible = "nxp,sja1105r", .data = &sja1105r_info }, 30708aa9ebccSVladimir Oltean { .compatible = "nxp,sja1105s", .data = &sja1105s_info }, 30713e77e59bSVladimir Oltean { .compatible = "nxp,sja1110a", .data = &sja1110a_info }, 30723e77e59bSVladimir Oltean { .compatible = "nxp,sja1110b", .data = &sja1110b_info }, 30733e77e59bSVladimir Oltean { .compatible = "nxp,sja1110c", .data = &sja1110c_info }, 30743e77e59bSVladimir Oltean { .compatible = "nxp,sja1110d", .data = &sja1110d_info }, 30758aa9ebccSVladimir Oltean { /* sentinel */ }, 30768aa9ebccSVladimir Oltean }; 30778aa9ebccSVladimir Oltean MODULE_DEVICE_TABLE(of, sja1105_dt_ids); 30788aa9ebccSVladimir Oltean 30798aa9ebccSVladimir Oltean static struct spi_driver sja1105_driver = { 30808aa9ebccSVladimir Oltean .driver = { 30818aa9ebccSVladimir Oltean .name = "sja1105", 30828aa9ebccSVladimir Oltean .owner = THIS_MODULE, 30838aa9ebccSVladimir Oltean .of_match_table = of_match_ptr(sja1105_dt_ids), 30848aa9ebccSVladimir Oltean }, 30858aa9ebccSVladimir Oltean .probe = sja1105_probe, 30868aa9ebccSVladimir Oltean .remove = sja1105_remove, 30878aa9ebccSVladimir Oltean }; 30888aa9ebccSVladimir Oltean 30898aa9ebccSVladimir Oltean module_spi_driver(sja1105_driver); 30908aa9ebccSVladimir Oltean 30918aa9ebccSVladimir Oltean MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>"); 30928aa9ebccSVladimir Oltean MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>"); 30938aa9ebccSVladimir Oltean MODULE_DESCRIPTION("SJA1105 Driver"); 30948aa9ebccSVladimir Oltean MODULE_LICENSE("GPL v2"); 3095