xref: /openbmc/linux/drivers/net/dsa/sja1105/sja1105.h (revision 8aa9ebccae87621d997707e4f25e53fddd7e30e4)
1*8aa9ebccSVladimir Oltean /* SPDX-License-Identifier: GPL-2.0
2*8aa9ebccSVladimir Oltean  * Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3*8aa9ebccSVladimir Oltean  * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
4*8aa9ebccSVladimir Oltean  */
5*8aa9ebccSVladimir Oltean #ifndef _SJA1105_H
6*8aa9ebccSVladimir Oltean #define _SJA1105_H
7*8aa9ebccSVladimir Oltean 
8*8aa9ebccSVladimir Oltean #include <linux/dsa/sja1105.h>
9*8aa9ebccSVladimir Oltean #include <net/dsa.h>
10*8aa9ebccSVladimir Oltean #include "sja1105_static_config.h"
11*8aa9ebccSVladimir Oltean 
12*8aa9ebccSVladimir Oltean #define SJA1105_NUM_PORTS		5
13*8aa9ebccSVladimir Oltean #define SJA1105_NUM_TC			8
14*8aa9ebccSVladimir Oltean #define SJA1105ET_FDB_BIN_SIZE		4
15*8aa9ebccSVladimir Oltean 
16*8aa9ebccSVladimir Oltean /* Keeps the different addresses between E/T and P/Q/R/S */
17*8aa9ebccSVladimir Oltean struct sja1105_regs {
18*8aa9ebccSVladimir Oltean 	u64 device_id;
19*8aa9ebccSVladimir Oltean 	u64 prod_id;
20*8aa9ebccSVladimir Oltean 	u64 status;
21*8aa9ebccSVladimir Oltean 	u64 rgu;
22*8aa9ebccSVladimir Oltean 	u64 config;
23*8aa9ebccSVladimir Oltean 	u64 rmii_pll1;
24*8aa9ebccSVladimir Oltean 	u64 pad_mii_tx[SJA1105_NUM_PORTS];
25*8aa9ebccSVladimir Oltean 	u64 cgu_idiv[SJA1105_NUM_PORTS];
26*8aa9ebccSVladimir Oltean 	u64 rgmii_pad_mii_tx[SJA1105_NUM_PORTS];
27*8aa9ebccSVladimir Oltean 	u64 mii_tx_clk[SJA1105_NUM_PORTS];
28*8aa9ebccSVladimir Oltean 	u64 mii_rx_clk[SJA1105_NUM_PORTS];
29*8aa9ebccSVladimir Oltean 	u64 mii_ext_tx_clk[SJA1105_NUM_PORTS];
30*8aa9ebccSVladimir Oltean 	u64 mii_ext_rx_clk[SJA1105_NUM_PORTS];
31*8aa9ebccSVladimir Oltean 	u64 rgmii_tx_clk[SJA1105_NUM_PORTS];
32*8aa9ebccSVladimir Oltean 	u64 rmii_ref_clk[SJA1105_NUM_PORTS];
33*8aa9ebccSVladimir Oltean 	u64 rmii_ext_tx_clk[SJA1105_NUM_PORTS];
34*8aa9ebccSVladimir Oltean 	u64 mac[SJA1105_NUM_PORTS];
35*8aa9ebccSVladimir Oltean 	u64 mac_hl1[SJA1105_NUM_PORTS];
36*8aa9ebccSVladimir Oltean 	u64 mac_hl2[SJA1105_NUM_PORTS];
37*8aa9ebccSVladimir Oltean 	u64 qlevel[SJA1105_NUM_PORTS];
38*8aa9ebccSVladimir Oltean };
39*8aa9ebccSVladimir Oltean 
40*8aa9ebccSVladimir Oltean struct sja1105_info {
41*8aa9ebccSVladimir Oltean 	u64 device_id;
42*8aa9ebccSVladimir Oltean 	/* Needed for distinction between P and R, and between Q and S
43*8aa9ebccSVladimir Oltean 	 * (since the parts with/without SGMII share the same
44*8aa9ebccSVladimir Oltean 	 * switch core and device_id)
45*8aa9ebccSVladimir Oltean 	 */
46*8aa9ebccSVladimir Oltean 	u64 part_no;
47*8aa9ebccSVladimir Oltean 	const struct sja1105_dynamic_table_ops *dyn_ops;
48*8aa9ebccSVladimir Oltean 	const struct sja1105_table_ops *static_ops;
49*8aa9ebccSVladimir Oltean 	const struct sja1105_regs *regs;
50*8aa9ebccSVladimir Oltean 	int (*reset_cmd)(const void *ctx, const void *data);
51*8aa9ebccSVladimir Oltean 	const char *name;
52*8aa9ebccSVladimir Oltean };
53*8aa9ebccSVladimir Oltean 
54*8aa9ebccSVladimir Oltean struct sja1105_private {
55*8aa9ebccSVladimir Oltean 	struct sja1105_static_config static_config;
56*8aa9ebccSVladimir Oltean 	const struct sja1105_info *info;
57*8aa9ebccSVladimir Oltean 	struct gpio_desc *reset_gpio;
58*8aa9ebccSVladimir Oltean 	struct spi_device *spidev;
59*8aa9ebccSVladimir Oltean 	struct dsa_switch *ds;
60*8aa9ebccSVladimir Oltean };
61*8aa9ebccSVladimir Oltean 
62*8aa9ebccSVladimir Oltean #include "sja1105_dynamic_config.h"
63*8aa9ebccSVladimir Oltean 
64*8aa9ebccSVladimir Oltean struct sja1105_spi_message {
65*8aa9ebccSVladimir Oltean 	u64 access;
66*8aa9ebccSVladimir Oltean 	u64 read_count;
67*8aa9ebccSVladimir Oltean 	u64 address;
68*8aa9ebccSVladimir Oltean };
69*8aa9ebccSVladimir Oltean 
70*8aa9ebccSVladimir Oltean typedef enum {
71*8aa9ebccSVladimir Oltean 	SPI_READ = 0,
72*8aa9ebccSVladimir Oltean 	SPI_WRITE = 1,
73*8aa9ebccSVladimir Oltean } sja1105_spi_rw_mode_t;
74*8aa9ebccSVladimir Oltean 
75*8aa9ebccSVladimir Oltean /* From sja1105_spi.c */
76*8aa9ebccSVladimir Oltean int sja1105_spi_send_packed_buf(const struct sja1105_private *priv,
77*8aa9ebccSVladimir Oltean 				sja1105_spi_rw_mode_t rw, u64 reg_addr,
78*8aa9ebccSVladimir Oltean 				void *packed_buf, size_t size_bytes);
79*8aa9ebccSVladimir Oltean int sja1105_spi_send_int(const struct sja1105_private *priv,
80*8aa9ebccSVladimir Oltean 			 sja1105_spi_rw_mode_t rw, u64 reg_addr,
81*8aa9ebccSVladimir Oltean 			 u64 *value, u64 size_bytes);
82*8aa9ebccSVladimir Oltean int sja1105_spi_send_long_packed_buf(const struct sja1105_private *priv,
83*8aa9ebccSVladimir Oltean 				     sja1105_spi_rw_mode_t rw, u64 base_addr,
84*8aa9ebccSVladimir Oltean 				     void *packed_buf, u64 buf_len);
85*8aa9ebccSVladimir Oltean int sja1105_static_config_upload(struct sja1105_private *priv);
86*8aa9ebccSVladimir Oltean 
87*8aa9ebccSVladimir Oltean extern struct sja1105_info sja1105e_info;
88*8aa9ebccSVladimir Oltean extern struct sja1105_info sja1105t_info;
89*8aa9ebccSVladimir Oltean extern struct sja1105_info sja1105p_info;
90*8aa9ebccSVladimir Oltean extern struct sja1105_info sja1105q_info;
91*8aa9ebccSVladimir Oltean extern struct sja1105_info sja1105r_info;
92*8aa9ebccSVladimir Oltean extern struct sja1105_info sja1105s_info;
93*8aa9ebccSVladimir Oltean 
94*8aa9ebccSVladimir Oltean /* From sja1105_clocking.c */
95*8aa9ebccSVladimir Oltean 
96*8aa9ebccSVladimir Oltean typedef enum {
97*8aa9ebccSVladimir Oltean 	XMII_MAC = 0,
98*8aa9ebccSVladimir Oltean 	XMII_PHY = 1,
99*8aa9ebccSVladimir Oltean } sja1105_mii_role_t;
100*8aa9ebccSVladimir Oltean 
101*8aa9ebccSVladimir Oltean typedef enum {
102*8aa9ebccSVladimir Oltean 	XMII_MODE_MII		= 0,
103*8aa9ebccSVladimir Oltean 	XMII_MODE_RMII		= 1,
104*8aa9ebccSVladimir Oltean 	XMII_MODE_RGMII		= 2,
105*8aa9ebccSVladimir Oltean } sja1105_phy_interface_t;
106*8aa9ebccSVladimir Oltean 
107*8aa9ebccSVladimir Oltean typedef enum {
108*8aa9ebccSVladimir Oltean 	SJA1105_SPEED_10MBPS	= 3,
109*8aa9ebccSVladimir Oltean 	SJA1105_SPEED_100MBPS	= 2,
110*8aa9ebccSVladimir Oltean 	SJA1105_SPEED_1000MBPS	= 1,
111*8aa9ebccSVladimir Oltean 	SJA1105_SPEED_AUTO	= 0,
112*8aa9ebccSVladimir Oltean } sja1105_speed_t;
113*8aa9ebccSVladimir Oltean 
114*8aa9ebccSVladimir Oltean int sja1105_clocking_setup_port(struct sja1105_private *priv, int port);
115*8aa9ebccSVladimir Oltean int sja1105_clocking_setup(struct sja1105_private *priv);
116*8aa9ebccSVladimir Oltean 
117*8aa9ebccSVladimir Oltean /* From sja1105_dynamic_config.c */
118*8aa9ebccSVladimir Oltean 
119*8aa9ebccSVladimir Oltean int sja1105_dynamic_config_read(struct sja1105_private *priv,
120*8aa9ebccSVladimir Oltean 				enum sja1105_blk_idx blk_idx,
121*8aa9ebccSVladimir Oltean 				int index, void *entry);
122*8aa9ebccSVladimir Oltean int sja1105_dynamic_config_write(struct sja1105_private *priv,
123*8aa9ebccSVladimir Oltean 				 enum sja1105_blk_idx blk_idx,
124*8aa9ebccSVladimir Oltean 				 int index, void *entry, bool keep);
125*8aa9ebccSVladimir Oltean 
126*8aa9ebccSVladimir Oltean /* Common implementations for the static and dynamic configs */
127*8aa9ebccSVladimir Oltean size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr,
128*8aa9ebccSVladimir Oltean 					   enum packing_op op);
129*8aa9ebccSVladimir Oltean size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr,
130*8aa9ebccSVladimir Oltean 					   enum packing_op op);
131*8aa9ebccSVladimir Oltean size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr,
132*8aa9ebccSVladimir Oltean 					 enum packing_op op);
133*8aa9ebccSVladimir Oltean size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr,
134*8aa9ebccSVladimir Oltean 					 enum packing_op op);
135*8aa9ebccSVladimir Oltean size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr,
136*8aa9ebccSVladimir Oltean 					    enum packing_op op);
137*8aa9ebccSVladimir Oltean 
138*8aa9ebccSVladimir Oltean #endif
139