xref: /openbmc/linux/drivers/net/dsa/ocelot/felix.c (revision 91c724cfc0cbc049f18c04634ad56080650e93b8)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019 NXP Semiconductors
3  */
4 #include <uapi/linux/if_bridge.h>
5 #include <soc/mscc/ocelot_vcap.h>
6 #include <soc/mscc/ocelot_qsys.h>
7 #include <soc/mscc/ocelot_sys.h>
8 #include <soc/mscc/ocelot_dev.h>
9 #include <soc/mscc/ocelot_ana.h>
10 #include <soc/mscc/ocelot_ptp.h>
11 #include <soc/mscc/ocelot.h>
12 #include <linux/packing.h>
13 #include <linux/module.h>
14 #include <linux/of_net.h>
15 #include <linux/pci.h>
16 #include <linux/of.h>
17 #include <net/pkt_sched.h>
18 #include <net/dsa.h>
19 #include "felix.h"
20 
21 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
22 						    int port,
23 						    enum dsa_tag_protocol mp)
24 {
25 	return DSA_TAG_PROTO_OCELOT;
26 }
27 
28 static int felix_set_ageing_time(struct dsa_switch *ds,
29 				 unsigned int ageing_time)
30 {
31 	struct ocelot *ocelot = ds->priv;
32 
33 	ocelot_set_ageing_time(ocelot, ageing_time);
34 
35 	return 0;
36 }
37 
38 static int felix_fdb_dump(struct dsa_switch *ds, int port,
39 			  dsa_fdb_dump_cb_t *cb, void *data)
40 {
41 	struct ocelot *ocelot = ds->priv;
42 
43 	return ocelot_fdb_dump(ocelot, port, cb, data);
44 }
45 
46 static int felix_fdb_add(struct dsa_switch *ds, int port,
47 			 const unsigned char *addr, u16 vid)
48 {
49 	struct ocelot *ocelot = ds->priv;
50 
51 	return ocelot_fdb_add(ocelot, port, addr, vid);
52 }
53 
54 static int felix_fdb_del(struct dsa_switch *ds, int port,
55 			 const unsigned char *addr, u16 vid)
56 {
57 	struct ocelot *ocelot = ds->priv;
58 
59 	return ocelot_fdb_del(ocelot, port, addr, vid);
60 }
61 
62 /* This callback needs to be present */
63 static int felix_mdb_prepare(struct dsa_switch *ds, int port,
64 			     const struct switchdev_obj_port_mdb *mdb)
65 {
66 	return 0;
67 }
68 
69 static void felix_mdb_add(struct dsa_switch *ds, int port,
70 			  const struct switchdev_obj_port_mdb *mdb)
71 {
72 	struct ocelot *ocelot = ds->priv;
73 
74 	ocelot_port_mdb_add(ocelot, port, mdb);
75 }
76 
77 static int felix_mdb_del(struct dsa_switch *ds, int port,
78 			 const struct switchdev_obj_port_mdb *mdb)
79 {
80 	struct ocelot *ocelot = ds->priv;
81 
82 	return ocelot_port_mdb_del(ocelot, port, mdb);
83 }
84 
85 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
86 				       u8 state)
87 {
88 	struct ocelot *ocelot = ds->priv;
89 
90 	return ocelot_bridge_stp_state_set(ocelot, port, state);
91 }
92 
93 static int felix_bridge_join(struct dsa_switch *ds, int port,
94 			     struct net_device *br)
95 {
96 	struct ocelot *ocelot = ds->priv;
97 
98 	return ocelot_port_bridge_join(ocelot, port, br);
99 }
100 
101 static void felix_bridge_leave(struct dsa_switch *ds, int port,
102 			       struct net_device *br)
103 {
104 	struct ocelot *ocelot = ds->priv;
105 
106 	ocelot_port_bridge_leave(ocelot, port, br);
107 }
108 
109 /* This callback needs to be present */
110 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
111 			      const struct switchdev_obj_port_vlan *vlan)
112 {
113 	return 0;
114 }
115 
116 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
117 {
118 	struct ocelot *ocelot = ds->priv;
119 
120 	ocelot_port_vlan_filtering(ocelot, port, enabled);
121 
122 	return 0;
123 }
124 
125 static void felix_vlan_add(struct dsa_switch *ds, int port,
126 			   const struct switchdev_obj_port_vlan *vlan)
127 {
128 	struct ocelot *ocelot = ds->priv;
129 	u16 flags = vlan->flags;
130 	u16 vid;
131 	int err;
132 
133 	if (dsa_is_cpu_port(ds, port))
134 		flags &= ~BRIDGE_VLAN_INFO_UNTAGGED;
135 
136 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
137 		err = ocelot_vlan_add(ocelot, port, vid,
138 				      flags & BRIDGE_VLAN_INFO_PVID,
139 				      flags & BRIDGE_VLAN_INFO_UNTAGGED);
140 		if (err) {
141 			dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
142 				vid, port, err);
143 			return;
144 		}
145 	}
146 }
147 
148 static int felix_vlan_del(struct dsa_switch *ds, int port,
149 			  const struct switchdev_obj_port_vlan *vlan)
150 {
151 	struct ocelot *ocelot = ds->priv;
152 	u16 vid;
153 	int err;
154 
155 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
156 		err = ocelot_vlan_del(ocelot, port, vid);
157 		if (err) {
158 			dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
159 				vid, port, err);
160 			return err;
161 		}
162 	}
163 	return 0;
164 }
165 
166 static int felix_port_enable(struct dsa_switch *ds, int port,
167 			     struct phy_device *phy)
168 {
169 	struct ocelot *ocelot = ds->priv;
170 
171 	ocelot_port_enable(ocelot, port, phy);
172 
173 	return 0;
174 }
175 
176 static void felix_port_disable(struct dsa_switch *ds, int port)
177 {
178 	struct ocelot *ocelot = ds->priv;
179 
180 	return ocelot_port_disable(ocelot, port);
181 }
182 
183 static void felix_phylink_validate(struct dsa_switch *ds, int port,
184 				   unsigned long *supported,
185 				   struct phylink_link_state *state)
186 {
187 	struct ocelot *ocelot = ds->priv;
188 	struct ocelot_port *ocelot_port = ocelot->ports[port];
189 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
190 
191 	if (state->interface != PHY_INTERFACE_MODE_NA &&
192 	    state->interface != ocelot_port->phy_mode) {
193 		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
194 		return;
195 	}
196 
197 	phylink_set_port_modes(mask);
198 	phylink_set(mask, Autoneg);
199 	phylink_set(mask, Pause);
200 	phylink_set(mask, Asym_Pause);
201 	phylink_set(mask, 10baseT_Half);
202 	phylink_set(mask, 10baseT_Full);
203 	phylink_set(mask, 100baseT_Half);
204 	phylink_set(mask, 100baseT_Full);
205 	phylink_set(mask, 1000baseT_Half);
206 	phylink_set(mask, 1000baseT_Full);
207 
208 	if (state->interface == PHY_INTERFACE_MODE_INTERNAL ||
209 	    state->interface == PHY_INTERFACE_MODE_2500BASEX ||
210 	    state->interface == PHY_INTERFACE_MODE_USXGMII) {
211 		phylink_set(mask, 2500baseT_Full);
212 		phylink_set(mask, 2500baseX_Full);
213 	}
214 
215 	bitmap_and(supported, supported, mask,
216 		   __ETHTOOL_LINK_MODE_MASK_NBITS);
217 	bitmap_and(state->advertising, state->advertising, mask,
218 		   __ETHTOOL_LINK_MODE_MASK_NBITS);
219 }
220 
221 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port,
222 					   struct phylink_link_state *state)
223 {
224 	struct ocelot *ocelot = ds->priv;
225 	struct felix *felix = ocelot_to_felix(ocelot);
226 
227 	if (felix->info->pcs_link_state)
228 		felix->info->pcs_link_state(ocelot, port, state);
229 
230 	return 0;
231 }
232 
233 static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
234 				     unsigned int link_an_mode,
235 				     const struct phylink_link_state *state)
236 {
237 	struct ocelot *ocelot = ds->priv;
238 	struct felix *felix = ocelot_to_felix(ocelot);
239 
240 	if (felix->info->pcs_config)
241 		felix->info->pcs_config(ocelot, port, link_an_mode, state);
242 }
243 
244 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
245 					unsigned int link_an_mode,
246 					phy_interface_t interface)
247 {
248 	struct ocelot *ocelot = ds->priv;
249 	struct ocelot_port *ocelot_port = ocelot->ports[port];
250 
251 	ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG);
252 	ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA,
253 		       QSYS_SWITCH_PORT_MODE, port);
254 }
255 
256 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
257 				      unsigned int link_an_mode,
258 				      phy_interface_t interface,
259 				      struct phy_device *phydev,
260 				      int speed, int duplex,
261 				      bool tx_pause, bool rx_pause)
262 {
263 	struct ocelot *ocelot = ds->priv;
264 	struct ocelot_port *ocelot_port = ocelot->ports[port];
265 	struct felix *felix = ocelot_to_felix(ocelot);
266 	u32 mac_fc_cfg;
267 
268 	/* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and
269 	 * PORT_RST bits in DEV_CLOCK_CFG. Note that the way this system is
270 	 * integrated is that the MAC speed is fixed and it's the PCS who is
271 	 * performing the rate adaptation, so we have to write "1000Mbps" into
272 	 * the LINK_SPEED field of DEV_CLOCK_CFG (which is also its default
273 	 * value).
274 	 */
275 	ocelot_port_writel(ocelot_port,
276 			   DEV_CLOCK_CFG_LINK_SPEED(OCELOT_SPEED_1000),
277 			   DEV_CLOCK_CFG);
278 
279 	switch (speed) {
280 	case SPEED_10:
281 		mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(3);
282 		break;
283 	case SPEED_100:
284 		mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(2);
285 		break;
286 	case SPEED_1000:
287 	case SPEED_2500:
288 		mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(1);
289 		break;
290 	default:
291 		dev_err(ocelot->dev, "Unsupported speed on port %d: %d\n",
292 			port, speed);
293 		return;
294 	}
295 
296 	/* handle Rx pause in all cases, with 2500base-X this is used for rate
297 	 * adaptation.
298 	 */
299 	mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
300 
301 	if (tx_pause)
302 		mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
303 			      SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |
304 			      SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) |
305 			      SYS_MAC_FC_CFG_ZERO_PAUSE_ENA;
306 
307 	/* Flow control. Link speed is only used here to evaluate the time
308 	 * specification in incoming pause frames.
309 	 */
310 	ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port);
311 
312 	ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port);
313 
314 	/* Undo the effects of felix_phylink_mac_link_down:
315 	 * enable MAC module
316 	 */
317 	ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
318 			   DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
319 
320 	/* Enable receiving frames on the port, and activate auto-learning of
321 	 * MAC addresses.
322 	 */
323 	ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO |
324 			 ANA_PORT_PORT_CFG_RECV_ENA |
325 			 ANA_PORT_PORT_CFG_PORTID_VAL(port),
326 			 ANA_PORT_PORT_CFG, port);
327 
328 	/* Core: Enable port for frame transfer */
329 	ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE |
330 			 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) |
331 			 QSYS_SWITCH_PORT_MODE_PORT_ENA,
332 			 QSYS_SWITCH_PORT_MODE, port);
333 
334 	if (felix->info->pcs_link_up)
335 		felix->info->pcs_link_up(ocelot, port, link_an_mode, interface,
336 					 speed, duplex);
337 
338 	if (felix->info->port_sched_speed_set)
339 		felix->info->port_sched_speed_set(ocelot, port, speed);
340 }
341 
342 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
343 {
344 	int i;
345 
346 	ocelot_rmw_gix(ocelot,
347 		       ANA_PORT_QOS_CFG_QOS_PCP_ENA,
348 		       ANA_PORT_QOS_CFG_QOS_PCP_ENA,
349 		       ANA_PORT_QOS_CFG,
350 		       port);
351 
352 	for (i = 0; i < FELIX_NUM_TC * 2; i++) {
353 		ocelot_rmw_ix(ocelot,
354 			      (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
355 			      ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
356 			      ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
357 			      ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
358 			      ANA_PORT_PCP_DEI_MAP,
359 			      port, i);
360 	}
361 }
362 
363 static void felix_get_strings(struct dsa_switch *ds, int port,
364 			      u32 stringset, u8 *data)
365 {
366 	struct ocelot *ocelot = ds->priv;
367 
368 	return ocelot_get_strings(ocelot, port, stringset, data);
369 }
370 
371 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
372 {
373 	struct ocelot *ocelot = ds->priv;
374 
375 	ocelot_get_ethtool_stats(ocelot, port, data);
376 }
377 
378 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
379 {
380 	struct ocelot *ocelot = ds->priv;
381 
382 	return ocelot_get_sset_count(ocelot, port, sset);
383 }
384 
385 static int felix_get_ts_info(struct dsa_switch *ds, int port,
386 			     struct ethtool_ts_info *info)
387 {
388 	struct ocelot *ocelot = ds->priv;
389 
390 	return ocelot_get_ts_info(ocelot, port, info);
391 }
392 
393 static int felix_parse_ports_node(struct felix *felix,
394 				  struct device_node *ports_node,
395 				  phy_interface_t *port_phy_modes)
396 {
397 	struct ocelot *ocelot = &felix->ocelot;
398 	struct device *dev = felix->ocelot.dev;
399 	struct device_node *child;
400 
401 	for_each_available_child_of_node(ports_node, child) {
402 		phy_interface_t phy_mode;
403 		u32 port;
404 		int err;
405 
406 		/* Get switch port number from DT */
407 		if (of_property_read_u32(child, "reg", &port) < 0) {
408 			dev_err(dev, "Port number not defined in device tree "
409 				"(property \"reg\")\n");
410 			of_node_put(child);
411 			return -ENODEV;
412 		}
413 
414 		/* Get PHY mode from DT */
415 		err = of_get_phy_mode(child, &phy_mode);
416 		if (err) {
417 			dev_err(dev, "Failed to read phy-mode or "
418 				"phy-interface-type property for port %d\n",
419 				port);
420 			of_node_put(child);
421 			return -ENODEV;
422 		}
423 
424 		err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode);
425 		if (err < 0) {
426 			dev_err(dev, "Unsupported PHY mode %s on port %d\n",
427 				phy_modes(phy_mode), port);
428 			return err;
429 		}
430 
431 		port_phy_modes[port] = phy_mode;
432 	}
433 
434 	return 0;
435 }
436 
437 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
438 {
439 	struct device *dev = felix->ocelot.dev;
440 	struct device_node *switch_node;
441 	struct device_node *ports_node;
442 	int err;
443 
444 	switch_node = dev->of_node;
445 
446 	ports_node = of_get_child_by_name(switch_node, "ports");
447 	if (!ports_node) {
448 		dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
449 		return -ENODEV;
450 	}
451 
452 	err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
453 	of_node_put(ports_node);
454 
455 	return err;
456 }
457 
458 static int felix_init_structs(struct felix *felix, int num_phys_ports)
459 {
460 	struct ocelot *ocelot = &felix->ocelot;
461 	phy_interface_t *port_phy_modes;
462 	resource_size_t switch_base;
463 	struct resource res;
464 	int port, i, err;
465 
466 	ocelot->num_phys_ports = num_phys_ports;
467 	ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
468 				     sizeof(struct ocelot_port *), GFP_KERNEL);
469 	if (!ocelot->ports)
470 		return -ENOMEM;
471 
472 	ocelot->map		= felix->info->map;
473 	ocelot->stats_layout	= felix->info->stats_layout;
474 	ocelot->num_stats	= felix->info->num_stats;
475 	ocelot->shared_queue_sz	= felix->info->shared_queue_sz;
476 	ocelot->num_mact_rows	= felix->info->num_mact_rows;
477 	ocelot->vcap_is2_keys	= felix->info->vcap_is2_keys;
478 	ocelot->vcap_is2_actions= felix->info->vcap_is2_actions;
479 	ocelot->vcap		= felix->info->vcap;
480 	ocelot->ops		= felix->info->ops;
481 
482 	port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
483 				 GFP_KERNEL);
484 	if (!port_phy_modes)
485 		return -ENOMEM;
486 
487 	err = felix_parse_dt(felix, port_phy_modes);
488 	if (err) {
489 		kfree(port_phy_modes);
490 		return err;
491 	}
492 
493 	switch_base = pci_resource_start(felix->pdev,
494 					 felix->info->switch_pci_bar);
495 
496 	for (i = 0; i < TARGET_MAX; i++) {
497 		struct regmap *target;
498 
499 		if (!felix->info->target_io_res[i].name)
500 			continue;
501 
502 		memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
503 		res.flags = IORESOURCE_MEM;
504 		res.start += switch_base;
505 		res.end += switch_base;
506 
507 		target = ocelot_regmap_init(ocelot, &res);
508 		if (IS_ERR(target)) {
509 			dev_err(ocelot->dev,
510 				"Failed to map device memory space\n");
511 			kfree(port_phy_modes);
512 			return PTR_ERR(target);
513 		}
514 
515 		ocelot->targets[i] = target;
516 	}
517 
518 	err = ocelot_regfields_init(ocelot, felix->info->regfields);
519 	if (err) {
520 		dev_err(ocelot->dev, "failed to init reg fields map\n");
521 		kfree(port_phy_modes);
522 		return err;
523 	}
524 
525 	for (port = 0; port < num_phys_ports; port++) {
526 		struct ocelot_port *ocelot_port;
527 		struct regmap *target;
528 
529 		ocelot_port = devm_kzalloc(ocelot->dev,
530 					   sizeof(struct ocelot_port),
531 					   GFP_KERNEL);
532 		if (!ocelot_port) {
533 			dev_err(ocelot->dev,
534 				"failed to allocate port memory\n");
535 			kfree(port_phy_modes);
536 			return -ENOMEM;
537 		}
538 
539 		memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
540 		res.flags = IORESOURCE_MEM;
541 		res.start += switch_base;
542 		res.end += switch_base;
543 
544 		target = ocelot_regmap_init(ocelot, &res);
545 		if (IS_ERR(target)) {
546 			dev_err(ocelot->dev,
547 				"Failed to map memory space for port %d\n",
548 				port);
549 			kfree(port_phy_modes);
550 			return PTR_ERR(target);
551 		}
552 
553 		ocelot_port->phy_mode = port_phy_modes[port];
554 		ocelot_port->ocelot = ocelot;
555 		ocelot_port->target = target;
556 		ocelot->ports[port] = ocelot_port;
557 	}
558 
559 	kfree(port_phy_modes);
560 
561 	if (felix->info->mdio_bus_alloc) {
562 		err = felix->info->mdio_bus_alloc(ocelot);
563 		if (err < 0)
564 			return err;
565 	}
566 
567 	return 0;
568 }
569 
570 static struct ptp_clock_info ocelot_ptp_clock_info = {
571 	.owner		= THIS_MODULE,
572 	.name		= "felix ptp",
573 	.max_adj	= 0x7fffffff,
574 	.n_alarm	= 0,
575 	.n_ext_ts	= 0,
576 	.n_per_out	= OCELOT_PTP_PINS_NUM,
577 	.n_pins		= OCELOT_PTP_PINS_NUM,
578 	.pps		= 0,
579 	.gettime64	= ocelot_ptp_gettime64,
580 	.settime64	= ocelot_ptp_settime64,
581 	.adjtime	= ocelot_ptp_adjtime,
582 	.adjfine	= ocelot_ptp_adjfine,
583 	.verify		= ocelot_ptp_verify,
584 	.enable		= ocelot_ptp_enable,
585 };
586 
587 /* Hardware initialization done here so that we can allocate structures with
588  * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
589  * us to allocate structures twice (leak memory) and map PCI memory twice
590  * (which will not work).
591  */
592 static int felix_setup(struct dsa_switch *ds)
593 {
594 	struct ocelot *ocelot = ds->priv;
595 	struct felix *felix = ocelot_to_felix(ocelot);
596 	int port, err;
597 	int tc;
598 
599 	err = felix_init_structs(felix, ds->num_ports);
600 	if (err)
601 		return err;
602 
603 	ocelot_init(ocelot);
604 	if (ocelot->ptp) {
605 		err = ocelot_init_timestamp(ocelot, &ocelot_ptp_clock_info);
606 		if (err) {
607 			dev_err(ocelot->dev,
608 				"Timestamp initialization failed\n");
609 			ocelot->ptp = 0;
610 		}
611 	}
612 
613 	for (port = 0; port < ds->num_ports; port++) {
614 		ocelot_init_port(ocelot, port);
615 
616 		/* Bring up the CPU port module and configure the NPI port */
617 		if (dsa_is_cpu_port(ds, port))
618 			ocelot_configure_cpu(ocelot, port,
619 					     OCELOT_TAG_PREFIX_NONE,
620 					     OCELOT_TAG_PREFIX_LONG);
621 
622 		/* Set the default QoS Classification based on PCP and DEI
623 		 * bits of vlan tag.
624 		 */
625 		felix_port_qos_map_init(ocelot, port);
626 	}
627 
628 	/* Include the CPU port module in the forwarding mask for unknown
629 	 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST
630 	 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since
631 	 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU.
632 	 */
633 	ocelot_write_rix(ocelot,
634 			 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)),
635 			 ANA_PGID_PGID, PGID_UC);
636 	/* Setup the per-traffic class flooding PGIDs */
637 	for (tc = 0; tc < FELIX_NUM_TC; tc++)
638 		ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) |
639 				 ANA_FLOODING_FLD_BROADCAST(PGID_MC) |
640 				 ANA_FLOODING_FLD_UNICAST(PGID_UC),
641 				 ANA_FLOODING, tc);
642 
643 	ds->mtu_enforcement_ingress = true;
644 	ds->configure_vlan_while_not_filtering = true;
645 	/* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040)
646 	 * isn't instantiated for the Felix PF.
647 	 * In-band AN may take a few ms to complete, so we need to poll.
648 	 */
649 	ds->pcs_poll = true;
650 
651 	return 0;
652 }
653 
654 static void felix_teardown(struct dsa_switch *ds)
655 {
656 	struct ocelot *ocelot = ds->priv;
657 	struct felix *felix = ocelot_to_felix(ocelot);
658 
659 	if (felix->info->mdio_bus_free)
660 		felix->info->mdio_bus_free(ocelot);
661 
662 	ocelot_deinit_timestamp(ocelot);
663 	/* stop workqueue thread */
664 	ocelot_deinit(ocelot);
665 }
666 
667 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
668 			      struct ifreq *ifr)
669 {
670 	struct ocelot *ocelot = ds->priv;
671 
672 	return ocelot_hwstamp_get(ocelot, port, ifr);
673 }
674 
675 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
676 			      struct ifreq *ifr)
677 {
678 	struct ocelot *ocelot = ds->priv;
679 
680 	return ocelot_hwstamp_set(ocelot, port, ifr);
681 }
682 
683 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
684 			   struct sk_buff *skb, unsigned int type)
685 {
686 	struct skb_shared_hwtstamps *shhwtstamps;
687 	struct ocelot *ocelot = ds->priv;
688 	u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN;
689 	u32 tstamp_lo, tstamp_hi;
690 	struct timespec64 ts;
691 	u64 tstamp, val;
692 
693 	ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
694 	tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
695 
696 	packing(extraction, &val,  116, 85, OCELOT_TAG_LEN, UNPACK, 0);
697 	tstamp_lo = (u32)val;
698 
699 	tstamp_hi = tstamp >> 32;
700 	if ((tstamp & 0xffffffff) < tstamp_lo)
701 		tstamp_hi--;
702 
703 	tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
704 
705 	shhwtstamps = skb_hwtstamps(skb);
706 	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
707 	shhwtstamps->hwtstamp = tstamp;
708 	return false;
709 }
710 
711 static bool felix_txtstamp(struct dsa_switch *ds, int port,
712 			   struct sk_buff *clone, unsigned int type)
713 {
714 	struct ocelot *ocelot = ds->priv;
715 	struct ocelot_port *ocelot_port = ocelot->ports[port];
716 
717 	if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone))
718 		return true;
719 
720 	return false;
721 }
722 
723 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
724 {
725 	struct ocelot *ocelot = ds->priv;
726 
727 	ocelot_port_set_maxlen(ocelot, port, new_mtu);
728 
729 	return 0;
730 }
731 
732 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
733 {
734 	struct ocelot *ocelot = ds->priv;
735 
736 	return ocelot_get_max_mtu(ocelot, port);
737 }
738 
739 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
740 				struct flow_cls_offload *cls, bool ingress)
741 {
742 	struct ocelot *ocelot = ds->priv;
743 
744 	return ocelot_cls_flower_replace(ocelot, port, cls, ingress);
745 }
746 
747 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
748 				struct flow_cls_offload *cls, bool ingress)
749 {
750 	struct ocelot *ocelot = ds->priv;
751 
752 	return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
753 }
754 
755 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
756 				  struct flow_cls_offload *cls, bool ingress)
757 {
758 	struct ocelot *ocelot = ds->priv;
759 
760 	return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
761 }
762 
763 static int felix_port_policer_add(struct dsa_switch *ds, int port,
764 				  struct dsa_mall_policer_tc_entry *policer)
765 {
766 	struct ocelot *ocelot = ds->priv;
767 	struct ocelot_policer pol = {
768 		.rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
769 		.burst = policer->burst,
770 	};
771 
772 	return ocelot_port_policer_add(ocelot, port, &pol);
773 }
774 
775 static void felix_port_policer_del(struct dsa_switch *ds, int port)
776 {
777 	struct ocelot *ocelot = ds->priv;
778 
779 	ocelot_port_policer_del(ocelot, port);
780 }
781 
782 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
783 			       enum tc_setup_type type,
784 			       void *type_data)
785 {
786 	struct ocelot *ocelot = ds->priv;
787 	struct felix *felix = ocelot_to_felix(ocelot);
788 
789 	if (felix->info->port_setup_tc)
790 		return felix->info->port_setup_tc(ds, port, type, type_data);
791 	else
792 		return -EOPNOTSUPP;
793 }
794 
795 static const struct dsa_switch_ops felix_switch_ops = {
796 	.get_tag_protocol	= felix_get_tag_protocol,
797 	.setup			= felix_setup,
798 	.teardown		= felix_teardown,
799 	.set_ageing_time	= felix_set_ageing_time,
800 	.get_strings		= felix_get_strings,
801 	.get_ethtool_stats	= felix_get_ethtool_stats,
802 	.get_sset_count		= felix_get_sset_count,
803 	.get_ts_info		= felix_get_ts_info,
804 	.phylink_validate	= felix_phylink_validate,
805 	.phylink_mac_link_state	= felix_phylink_mac_pcs_get_state,
806 	.phylink_mac_config	= felix_phylink_mac_config,
807 	.phylink_mac_link_down	= felix_phylink_mac_link_down,
808 	.phylink_mac_link_up	= felix_phylink_mac_link_up,
809 	.port_enable		= felix_port_enable,
810 	.port_disable		= felix_port_disable,
811 	.port_fdb_dump		= felix_fdb_dump,
812 	.port_fdb_add		= felix_fdb_add,
813 	.port_fdb_del		= felix_fdb_del,
814 	.port_mdb_prepare	= felix_mdb_prepare,
815 	.port_mdb_add		= felix_mdb_add,
816 	.port_mdb_del		= felix_mdb_del,
817 	.port_bridge_join	= felix_bridge_join,
818 	.port_bridge_leave	= felix_bridge_leave,
819 	.port_stp_state_set	= felix_bridge_stp_state_set,
820 	.port_vlan_prepare	= felix_vlan_prepare,
821 	.port_vlan_filtering	= felix_vlan_filtering,
822 	.port_vlan_add		= felix_vlan_add,
823 	.port_vlan_del		= felix_vlan_del,
824 	.port_hwtstamp_get	= felix_hwtstamp_get,
825 	.port_hwtstamp_set	= felix_hwtstamp_set,
826 	.port_rxtstamp		= felix_rxtstamp,
827 	.port_txtstamp		= felix_txtstamp,
828 	.port_change_mtu	= felix_change_mtu,
829 	.port_max_mtu		= felix_get_max_mtu,
830 	.port_policer_add	= felix_port_policer_add,
831 	.port_policer_del	= felix_port_policer_del,
832 	.cls_flower_add		= felix_cls_flower_add,
833 	.cls_flower_del		= felix_cls_flower_del,
834 	.cls_flower_stats	= felix_cls_flower_stats,
835 	.port_setup_tc          = felix_port_setup_tc,
836 };
837 
838 static struct felix_info *felix_instance_tbl[] = {
839 	[FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959,
840 };
841 
842 static irqreturn_t felix_irq_handler(int irq, void *data)
843 {
844 	struct ocelot *ocelot = (struct ocelot *)data;
845 
846 	/* The INTB interrupt is used for both PTP TX timestamp interrupt
847 	 * and preemption status change interrupt on each port.
848 	 *
849 	 * - Get txtstamp if have
850 	 * - TODO: handle preemption. Without handling it, driver may get
851 	 *   interrupt storm.
852 	 */
853 
854 	ocelot_get_txtstamp(ocelot);
855 
856 	return IRQ_HANDLED;
857 }
858 
859 static int felix_pci_probe(struct pci_dev *pdev,
860 			   const struct pci_device_id *id)
861 {
862 	enum felix_instance instance = id->driver_data;
863 	struct dsa_switch *ds;
864 	struct ocelot *ocelot;
865 	struct felix *felix;
866 	int err;
867 
868 	if (pdev->dev.of_node && !of_device_is_available(pdev->dev.of_node)) {
869 		dev_info(&pdev->dev, "device is disabled, skipping\n");
870 		return -ENODEV;
871 	}
872 
873 	err = pci_enable_device(pdev);
874 	if (err) {
875 		dev_err(&pdev->dev, "device enable failed\n");
876 		goto err_pci_enable;
877 	}
878 
879 	/* set up for high or low dma */
880 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
881 	if (err) {
882 		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
883 		if (err) {
884 			dev_err(&pdev->dev,
885 				"DMA configuration failed: 0x%x\n", err);
886 			goto err_dma;
887 		}
888 	}
889 
890 	felix = kzalloc(sizeof(struct felix), GFP_KERNEL);
891 	if (!felix) {
892 		err = -ENOMEM;
893 		dev_err(&pdev->dev, "Failed to allocate driver memory\n");
894 		goto err_alloc_felix;
895 	}
896 
897 	pci_set_drvdata(pdev, felix);
898 	ocelot = &felix->ocelot;
899 	ocelot->dev = &pdev->dev;
900 	felix->pdev = pdev;
901 	felix->info = felix_instance_tbl[instance];
902 
903 	pci_set_master(pdev);
904 
905 	err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL,
906 					&felix_irq_handler, IRQF_ONESHOT,
907 					"felix-intb", ocelot);
908 	if (err) {
909 		dev_err(&pdev->dev, "Failed to request irq\n");
910 		goto err_alloc_irq;
911 	}
912 
913 	ocelot->ptp = 1;
914 
915 	ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL);
916 	if (!ds) {
917 		err = -ENOMEM;
918 		dev_err(&pdev->dev, "Failed to allocate DSA switch\n");
919 		goto err_alloc_ds;
920 	}
921 
922 	ds->dev = &pdev->dev;
923 	ds->num_ports = felix->info->num_ports;
924 	ds->num_tx_queues = felix->info->num_tx_queues;
925 	ds->ops = &felix_switch_ops;
926 	ds->priv = ocelot;
927 	felix->ds = ds;
928 
929 	err = dsa_register_switch(ds);
930 	if (err) {
931 		dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err);
932 		goto err_register_ds;
933 	}
934 
935 	return 0;
936 
937 err_register_ds:
938 	kfree(ds);
939 err_alloc_ds:
940 err_alloc_irq:
941 err_alloc_felix:
942 	kfree(felix);
943 err_dma:
944 	pci_disable_device(pdev);
945 err_pci_enable:
946 	return err;
947 }
948 
949 static void felix_pci_remove(struct pci_dev *pdev)
950 {
951 	struct felix *felix;
952 
953 	felix = pci_get_drvdata(pdev);
954 
955 	dsa_unregister_switch(felix->ds);
956 
957 	kfree(felix->ds);
958 	kfree(felix);
959 
960 	pci_disable_device(pdev);
961 }
962 
963 static struct pci_device_id felix_ids[] = {
964 	{
965 		/* NXP LS1028A */
966 		PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0),
967 		.driver_data = FELIX_INSTANCE_VSC9959,
968 	},
969 	{ 0, }
970 };
971 MODULE_DEVICE_TABLE(pci, felix_ids);
972 
973 static struct pci_driver felix_pci_driver = {
974 	.name		= KBUILD_MODNAME,
975 	.id_table	= felix_ids,
976 	.probe		= felix_pci_probe,
977 	.remove		= felix_pci_remove,
978 };
979 
980 module_pci_driver(felix_pci_driver);
981 
982 MODULE_DESCRIPTION("Felix Switch driver");
983 MODULE_LICENSE("GPL v2");
984