xref: /openbmc/linux/drivers/net/dsa/microchip/ksz_common.h (revision c4748ff6566b77d236052375747576009a1af1f7)
1b31141d3SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0 */
2b31141d3SNishad Kamdar /* Microchip switch driver common header
3c2e86691STristram Ha  *
47c6ff470STristram Ha  * Copyright (C) 2017-2019 Microchip Technology Inc.
5c2e86691STristram Ha  */
6c2e86691STristram Ha 
7c2e86691STristram Ha #ifndef __KSZ_COMMON_H
8c2e86691STristram Ha #define __KSZ_COMMON_H
9c2e86691STristram Ha 
106a7abc61SMarek Vasut #include <linux/etherdevice.h>
116a7abc61SMarek Vasut #include <linux/kernel.h>
126a7abc61SMarek Vasut #include <linux/mutex.h>
136a7abc61SMarek Vasut #include <linux/phy.h>
14ee394feaSMarek Vasut #include <linux/regmap.h>
156a7abc61SMarek Vasut #include <net/dsa.h>
166a7abc61SMarek Vasut 
1765ac79e1SArun Ramadoss #define KSZ_MAX_NUM_PORTS 8
1865ac79e1SArun Ramadoss 
196a7abc61SMarek Vasut struct vlan_table {
206a7abc61SMarek Vasut 	u32 table[3];
216a7abc61SMarek Vasut };
226a7abc61SMarek Vasut 
236a7abc61SMarek Vasut struct ksz_port_mib {
246a7abc61SMarek Vasut 	struct mutex cnt_mutex;		/* structure access */
256a7abc61SMarek Vasut 	u8 cnt_ptr;
266a7abc61SMarek Vasut 	u64 *counters;
27a7f4f13aSOleksij Rempel 	struct rtnl_link_stats64 stats64;
28*c4748ff6SOleksij Rempel 	struct ethtool_pause_stats pause_stats;
29a7f4f13aSOleksij Rempel 	struct spinlock stats64_lock;
306a7abc61SMarek Vasut };
316a7abc61SMarek Vasut 
32a530e6f2SArun Ramadoss struct ksz_mib_names {
33a530e6f2SArun Ramadoss 	int index;
34a530e6f2SArun Ramadoss 	char string[ETH_GSTRING_LEN];
35a530e6f2SArun Ramadoss };
36a530e6f2SArun Ramadoss 
37462d5250SArun Ramadoss struct ksz_chip_data {
38462d5250SArun Ramadoss 	u32 chip_id;
39462d5250SArun Ramadoss 	const char *dev_name;
40462d5250SArun Ramadoss 	int num_vlans;
41462d5250SArun Ramadoss 	int num_alus;
42462d5250SArun Ramadoss 	int num_statics;
43462d5250SArun Ramadoss 	int cpu_ports;
44462d5250SArun Ramadoss 	int port_cnt;
456ec23aaaSArun Ramadoss 	const struct ksz_dev_ops *ops;
46462d5250SArun Ramadoss 	bool phy_errata_9477;
47462d5250SArun Ramadoss 	bool ksz87xx_eee_link_erratum;
48a530e6f2SArun Ramadoss 	const struct ksz_mib_names *mib_names;
49a530e6f2SArun Ramadoss 	int mib_cnt;
50a530e6f2SArun Ramadoss 	u8 reg_mib_cnt;
51a02579dfSArun Ramadoss 	const u16 *regs;
52d23a5e18SArun Ramadoss 	const u32 *masks;
5334e48383SArun Ramadoss 	const u8 *shifts;
54e593df51SArun Ramadoss 	int stp_ctrl_reg;
551ca6437fSArun Ramadoss 	int broadcast_ctrl_reg;
560abab9f3SArun Ramadoss 	int multicast_ctrl_reg;
57ad08ac18SArun Ramadoss 	int start_ctrl_reg;
5865ac79e1SArun Ramadoss 	bool supports_mii[KSZ_MAX_NUM_PORTS];
5965ac79e1SArun Ramadoss 	bool supports_rmii[KSZ_MAX_NUM_PORTS];
6065ac79e1SArun Ramadoss 	bool supports_rgmii[KSZ_MAX_NUM_PORTS];
6165ac79e1SArun Ramadoss 	bool internal_phy[KSZ_MAX_NUM_PORTS];
62462d5250SArun Ramadoss };
63462d5250SArun Ramadoss 
646a7abc61SMarek Vasut struct ksz_port {
658f4f58f8SBen Hutchings 	bool remove_tag;		/* Remove Tag flag set, for ksz8795 only */
666a7abc61SMarek Vasut 	int stp_state;
676a7abc61SMarek Vasut 	struct phy_device phydev;
686a7abc61SMarek Vasut 
696a7abc61SMarek Vasut 	u32 on:1;			/* port is not disabled by hardware */
706a7abc61SMarek Vasut 	u32 phy:1;			/* port has a PHY */
716a7abc61SMarek Vasut 	u32 fiber:1;			/* port is fiber */
726a7abc61SMarek Vasut 	u32 sgmii:1;			/* port is SGMII */
736a7abc61SMarek Vasut 	u32 force:1;
746a7abc61SMarek Vasut 	u32 read:1;			/* read MIB counters in background */
756a7abc61SMarek Vasut 	u32 freeze:1;			/* MIB counter freeze is enabled */
766a7abc61SMarek Vasut 
776a7abc61SMarek Vasut 	struct ksz_port_mib mib;
78edecfa98SHelmut Grohne 	phy_interface_t interface;
79e18058eaSOleksij Rempel 	u16 max_frame;
806a7abc61SMarek Vasut };
816a7abc61SMarek Vasut 
826a7abc61SMarek Vasut struct ksz_device {
836a7abc61SMarek Vasut 	struct dsa_switch *ds;
846a7abc61SMarek Vasut 	struct ksz_platform_data *pdata;
85462d5250SArun Ramadoss 	const struct ksz_chip_data *info;
866a7abc61SMarek Vasut 
876a7abc61SMarek Vasut 	struct mutex dev_mutex;		/* device access */
88013572a2SMarek Vasut 	struct mutex regmap_mutex;	/* regmap access */
896a7abc61SMarek Vasut 	struct mutex alu_mutex;		/* ALU access */
906a7abc61SMarek Vasut 	struct mutex vlan_mutex;	/* vlan access */
916a7abc61SMarek Vasut 	const struct ksz_dev_ops *dev_ops;
926a7abc61SMarek Vasut 
936a7abc61SMarek Vasut 	struct device *dev;
946a7abc61SMarek Vasut 	struct regmap *regmap[3];
956a7abc61SMarek Vasut 
966a7abc61SMarek Vasut 	void *priv;
976a7abc61SMarek Vasut 
986a7abc61SMarek Vasut 	struct gpio_desc *reset_gpio;	/* Optional reset GPIO */
996a7abc61SMarek Vasut 
1006a7abc61SMarek Vasut 	/* chip specific data */
1016a7abc61SMarek Vasut 	u32 chip_id;
10291a98917SArun Ramadoss 	u8 chip_rev;
1036a7abc61SMarek Vasut 	int cpu_port;			/* port connected to CPU */
1046a7abc61SMarek Vasut 	int phy_port_cnt;
105edecfa98SHelmut Grohne 	phy_interface_t compat_interface;
1066a7abc61SMarek Vasut 	bool synclko_125;
10748bf8b8aSRobert Hancock 	bool synclko_disable;
1086a7abc61SMarek Vasut 
1096a7abc61SMarek Vasut 	struct vlan_table *vlan_cache;
1106a7abc61SMarek Vasut 
1116a7abc61SMarek Vasut 	struct ksz_port *ports;
112469b390eSGeorge McCollister 	struct delayed_work mib_read;
1136a7abc61SMarek Vasut 	unsigned long mib_read_interval;
1146a7abc61SMarek Vasut 	u16 mirror_rx;
1156a7abc61SMarek Vasut 	u16 mirror_tx;
1166a7abc61SMarek Vasut 	u32 features;			/* chip specific features */
1176a7abc61SMarek Vasut 	u16 port_mask;
1186a7abc61SMarek Vasut };
1196a7abc61SMarek Vasut 
120462d5250SArun Ramadoss /* List of supported models */
121462d5250SArun Ramadoss enum ksz_model {
122462d5250SArun Ramadoss 	KSZ8795,
123462d5250SArun Ramadoss 	KSZ8794,
124462d5250SArun Ramadoss 	KSZ8765,
125462d5250SArun Ramadoss 	KSZ8830,
126462d5250SArun Ramadoss 	KSZ9477,
127462d5250SArun Ramadoss 	KSZ9897,
128462d5250SArun Ramadoss 	KSZ9893,
129462d5250SArun Ramadoss 	KSZ9567,
130462d5250SArun Ramadoss 	LAN9370,
131462d5250SArun Ramadoss 	LAN9371,
132462d5250SArun Ramadoss 	LAN9372,
133462d5250SArun Ramadoss 	LAN9373,
134462d5250SArun Ramadoss 	LAN9374,
135462d5250SArun Ramadoss };
136462d5250SArun Ramadoss 
137462d5250SArun Ramadoss enum ksz_chip_id {
138462d5250SArun Ramadoss 	KSZ8795_CHIP_ID = 0x8795,
139462d5250SArun Ramadoss 	KSZ8794_CHIP_ID = 0x8794,
140462d5250SArun Ramadoss 	KSZ8765_CHIP_ID = 0x8765,
141462d5250SArun Ramadoss 	KSZ8830_CHIP_ID = 0x8830,
142462d5250SArun Ramadoss 	KSZ9477_CHIP_ID = 0x00947700,
143462d5250SArun Ramadoss 	KSZ9897_CHIP_ID = 0x00989700,
144462d5250SArun Ramadoss 	KSZ9893_CHIP_ID = 0x00989300,
145462d5250SArun Ramadoss 	KSZ9567_CHIP_ID = 0x00956700,
146462d5250SArun Ramadoss 	LAN9370_CHIP_ID = 0x00937000,
147462d5250SArun Ramadoss 	LAN9371_CHIP_ID = 0x00937100,
148462d5250SArun Ramadoss 	LAN9372_CHIP_ID = 0x00937200,
149462d5250SArun Ramadoss 	LAN9373_CHIP_ID = 0x00937300,
150462d5250SArun Ramadoss 	LAN9374_CHIP_ID = 0x00937400,
151462d5250SArun Ramadoss };
152462d5250SArun Ramadoss 
153486f9ca7SArun Ramadoss enum ksz_regs {
154486f9ca7SArun Ramadoss 	REG_IND_CTRL_0,
155486f9ca7SArun Ramadoss 	REG_IND_DATA_8,
156486f9ca7SArun Ramadoss 	REG_IND_DATA_CHECK,
157486f9ca7SArun Ramadoss 	REG_IND_DATA_HI,
158486f9ca7SArun Ramadoss 	REG_IND_DATA_LO,
159486f9ca7SArun Ramadoss 	REG_IND_MIB_CHECK,
160486f9ca7SArun Ramadoss 	REG_IND_BYTE,
161486f9ca7SArun Ramadoss 	P_FORCE_CTRL,
162486f9ca7SArun Ramadoss 	P_LINK_STATUS,
163486f9ca7SArun Ramadoss 	P_LOCAL_CTRL,
164486f9ca7SArun Ramadoss 	P_NEG_RESTART_CTRL,
165486f9ca7SArun Ramadoss 	P_REMOTE_STATUS,
166486f9ca7SArun Ramadoss 	P_SPEED_STATUS,
167486f9ca7SArun Ramadoss 	S_TAIL_TAG_CTRL,
1686877102fSArun Ramadoss 	P_STP_CTRL,
1699d95329cSArun Ramadoss 	S_START_CTRL,
1709d95329cSArun Ramadoss 	S_BROADCAST_CTRL,
1719d95329cSArun Ramadoss 	S_MULTICAST_CTRL,
172486f9ca7SArun Ramadoss };
173486f9ca7SArun Ramadoss 
174d23a5e18SArun Ramadoss enum ksz_masks {
175d23a5e18SArun Ramadoss 	PORT_802_1P_REMAPPING,
176d23a5e18SArun Ramadoss 	SW_TAIL_TAG_ENABLE,
177d23a5e18SArun Ramadoss 	MIB_COUNTER_OVERFLOW,
178d23a5e18SArun Ramadoss 	MIB_COUNTER_VALID,
179d23a5e18SArun Ramadoss 	VLAN_TABLE_FID,
180d23a5e18SArun Ramadoss 	VLAN_TABLE_MEMBERSHIP,
181d23a5e18SArun Ramadoss 	VLAN_TABLE_VALID,
182d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_VALID,
183d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_USE_FID,
184d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_FID,
185d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_OVERRIDE,
186d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_FWD_PORTS,
187d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_ENTRIES_H,
188d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_MAC_EMPTY,
189d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_NOT_READY,
190d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_ENTRIES,
191d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_FID,
192d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_SRC_PORT,
193d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_TIMESTAMP,
194d23a5e18SArun Ramadoss };
195d23a5e18SArun Ramadoss 
19634e48383SArun Ramadoss enum ksz_shifts {
19734e48383SArun Ramadoss 	VLAN_TABLE_MEMBERSHIP_S,
19834e48383SArun Ramadoss 	VLAN_TABLE,
19934e48383SArun Ramadoss 	STATIC_MAC_FWD_PORTS,
20034e48383SArun Ramadoss 	STATIC_MAC_FID,
20134e48383SArun Ramadoss 	DYNAMIC_MAC_ENTRIES_H,
20234e48383SArun Ramadoss 	DYNAMIC_MAC_ENTRIES,
20334e48383SArun Ramadoss 	DYNAMIC_MAC_FID,
20434e48383SArun Ramadoss 	DYNAMIC_MAC_TIMESTAMP,
20534e48383SArun Ramadoss 	DYNAMIC_MAC_SRC_PORT,
20634e48383SArun Ramadoss };
20734e48383SArun Ramadoss 
2086a7abc61SMarek Vasut struct alu_struct {
2096a7abc61SMarek Vasut 	/* entry 1 */
2106a7abc61SMarek Vasut 	u8	is_static:1;
2116a7abc61SMarek Vasut 	u8	is_src_filter:1;
2126a7abc61SMarek Vasut 	u8	is_dst_filter:1;
2136a7abc61SMarek Vasut 	u8	prio_age:3;
2146a7abc61SMarek Vasut 	u32	_reserv_0_1:23;
2156a7abc61SMarek Vasut 	u8	mstp:3;
2166a7abc61SMarek Vasut 	/* entry 2 */
2176a7abc61SMarek Vasut 	u8	is_override:1;
2186a7abc61SMarek Vasut 	u8	is_use_fid:1;
2196a7abc61SMarek Vasut 	u32	_reserv_1_1:23;
2206a7abc61SMarek Vasut 	u8	port_forward:7;
2216a7abc61SMarek Vasut 	/* entry 3 & 4*/
2226a7abc61SMarek Vasut 	u32	_reserv_2_1:9;
2236a7abc61SMarek Vasut 	u8	fid:7;
2246a7abc61SMarek Vasut 	u8	mac[ETH_ALEN];
2256a7abc61SMarek Vasut };
2266a7abc61SMarek Vasut 
2276a7abc61SMarek Vasut struct ksz_dev_ops {
228d2822e68SArun Ramadoss 	int (*setup)(struct dsa_switch *ds);
2296a7abc61SMarek Vasut 	u32 (*get_port_addr)(int port, int offset);
2306a7abc61SMarek Vasut 	void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
2316a7abc61SMarek Vasut 	void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
2326a7abc61SMarek Vasut 	void (*port_cleanup)(struct ksz_device *dev, int port);
2336a7abc61SMarek Vasut 	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
2346a7abc61SMarek Vasut 	void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
2356a7abc61SMarek Vasut 	void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
2366a7abc61SMarek Vasut 	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
2376a7abc61SMarek Vasut 			  u64 *cnt);
2386a7abc61SMarek Vasut 	void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
2396a7abc61SMarek Vasut 			  u64 *dropped, u64 *cnt);
240a7f4f13aSOleksij Rempel 	void (*r_mib_stat64)(struct ksz_device *dev, int port);
241f0d997e3SArun Ramadoss 	int  (*vlan_filtering)(struct ksz_device *dev, int port,
242f0d997e3SArun Ramadoss 			       bool flag, struct netlink_ext_ack *extack);
243f0d997e3SArun Ramadoss 	int  (*vlan_add)(struct ksz_device *dev, int port,
244f0d997e3SArun Ramadoss 			 const struct switchdev_obj_port_vlan *vlan,
245f0d997e3SArun Ramadoss 			 struct netlink_ext_ack *extack);
246f0d997e3SArun Ramadoss 	int  (*vlan_del)(struct ksz_device *dev, int port,
247f0d997e3SArun Ramadoss 			 const struct switchdev_obj_port_vlan *vlan);
24800a298bbSArun Ramadoss 	int (*mirror_add)(struct ksz_device *dev, int port,
24900a298bbSArun Ramadoss 			  struct dsa_mall_mirror_tc_entry *mirror,
25000a298bbSArun Ramadoss 			  bool ingress, struct netlink_ext_ack *extack);
25100a298bbSArun Ramadoss 	void (*mirror_del)(struct ksz_device *dev, int port,
25200a298bbSArun Ramadoss 			   struct dsa_mall_mirror_tc_entry *mirror);
253e587be75SArun Ramadoss 	int (*fdb_add)(struct ksz_device *dev, int port,
254e587be75SArun Ramadoss 		       const unsigned char *addr, u16 vid, struct dsa_db db);
255e587be75SArun Ramadoss 	int (*fdb_del)(struct ksz_device *dev, int port,
256e587be75SArun Ramadoss 		       const unsigned char *addr, u16 vid, struct dsa_db db);
257e587be75SArun Ramadoss 	int (*fdb_dump)(struct ksz_device *dev, int port,
258e587be75SArun Ramadoss 			dsa_fdb_dump_cb_t *cb, void *data);
259980c7d17SArun Ramadoss 	int (*mdb_add)(struct ksz_device *dev, int port,
260980c7d17SArun Ramadoss 		       const struct switchdev_obj_port_mdb *mdb,
261980c7d17SArun Ramadoss 		       struct dsa_db db);
262980c7d17SArun Ramadoss 	int (*mdb_del)(struct ksz_device *dev, int port,
263980c7d17SArun Ramadoss 		       const struct switchdev_obj_port_mdb *mdb,
264980c7d17SArun Ramadoss 		       struct dsa_db db);
2657012033cSArun Ramadoss 	void (*get_caps)(struct ksz_device *dev, int port,
2667012033cSArun Ramadoss 			 struct phylink_config *config);
2671fe94f54SArun Ramadoss 	int (*change_mtu)(struct ksz_device *dev, int port, int mtu);
2681fe94f54SArun Ramadoss 	int (*max_mtu)(struct ksz_device *dev, int port);
2696a7abc61SMarek Vasut 	void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
2706a7abc61SMarek Vasut 	void (*port_init_cnt)(struct ksz_device *dev, int port);
271fb9324beSArun Ramadoss 	void (*config_cpu_port)(struct dsa_switch *ds);
272331d64f7SArun Ramadoss 	int (*enable_stp_addr)(struct ksz_device *dev);
273673b196fSArun Ramadoss 	int (*reset)(struct ksz_device *dev);
2746a7abc61SMarek Vasut 	int (*init)(struct ksz_device *dev);
2756a7abc61SMarek Vasut 	void (*exit)(struct ksz_device *dev);
2766a7abc61SMarek Vasut };
2776a7abc61SMarek Vasut 
2786a7abc61SMarek Vasut struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
2796ec23aaaSArun Ramadoss int ksz_switch_register(struct ksz_device *dev);
2806a7abc61SMarek Vasut void ksz_switch_remove(struct ksz_device *dev);
2816a7abc61SMarek Vasut 
2827c6ff470STristram Ha void ksz_init_mib_timer(struct ksz_device *dev);
283c6101dd7SArun Ramadoss void ksz_r_mib_stats64(struct ksz_device *dev, int port);
284e593df51SArun Ramadoss void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
2851958eee8SArun Ramadoss extern const struct ksz_chip_data ksz_switch_chips[];
286c2e86691STristram Ha 
287c2e86691STristram Ha /* Common register access functions */
288c2e86691STristram Ha 
289c2e86691STristram Ha static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
290c2e86691STristram Ha {
291ee394feaSMarek Vasut 	unsigned int value;
292ee394feaSMarek Vasut 	int ret = regmap_read(dev->regmap[0], reg, &value);
293c2e86691STristram Ha 
294ee394feaSMarek Vasut 	*val = value;
295c2e86691STristram Ha 	return ret;
296c2e86691STristram Ha }
297c2e86691STristram Ha 
298c2e86691STristram Ha static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
299c2e86691STristram Ha {
300ee394feaSMarek Vasut 	unsigned int value;
301ee394feaSMarek Vasut 	int ret = regmap_read(dev->regmap[1], reg, &value);
302c2e86691STristram Ha 
303ee394feaSMarek Vasut 	*val = value;
304c2e86691STristram Ha 	return ret;
305c2e86691STristram Ha }
306c2e86691STristram Ha 
307c2e86691STristram Ha static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
308c2e86691STristram Ha {
309ee394feaSMarek Vasut 	unsigned int value;
310ee394feaSMarek Vasut 	int ret = regmap_read(dev->regmap[2], reg, &value);
311c2e86691STristram Ha 
312ee394feaSMarek Vasut 	*val = value;
313c2e86691STristram Ha 	return ret;
314c2e86691STristram Ha }
315c2e86691STristram Ha 
316e66f840cSTristram Ha static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
317e66f840cSTristram Ha {
318e66f840cSTristram Ha 	u32 value[2];
319e66f840cSTristram Ha 	int ret;
320e66f840cSTristram Ha 
321e66f840cSTristram Ha 	ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
322c34f674cSBen Hutchings 	if (!ret)
323c34f674cSBen Hutchings 		*val = (u64)value[0] << 32 | value[1];
324e66f840cSTristram Ha 
325e66f840cSTristram Ha 	return ret;
326e66f840cSTristram Ha }
327e66f840cSTristram Ha 
328c2e86691STristram Ha static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
329c2e86691STristram Ha {
330ee394feaSMarek Vasut 	return regmap_write(dev->regmap[0], reg, value);
331c2e86691STristram Ha }
332c2e86691STristram Ha 
333c2e86691STristram Ha static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
334c2e86691STristram Ha {
335ee394feaSMarek Vasut 	return regmap_write(dev->regmap[1], reg, value);
336c2e86691STristram Ha }
337c2e86691STristram Ha 
338c2e86691STristram Ha static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
339c2e86691STristram Ha {
340ee394feaSMarek Vasut 	return regmap_write(dev->regmap[2], reg, value);
341c2e86691STristram Ha }
342c2e86691STristram Ha 
343e66f840cSTristram Ha static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
344e66f840cSTristram Ha {
345e66f840cSTristram Ha 	u32 val[2];
346e66f840cSTristram Ha 
347e66f840cSTristram Ha 	/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
348e66f840cSTristram Ha 	value = swab64(value);
349e66f840cSTristram Ha 	val[0] = swab32(value & 0xffffffffULL);
350e66f840cSTristram Ha 	val[1] = swab32(value >> 32ULL);
351e66f840cSTristram Ha 
352e66f840cSTristram Ha 	return regmap_bulk_write(dev->regmap[2], reg, val, 2);
353e66f840cSTristram Ha }
354e66f840cSTristram Ha 
355c2e86691STristram Ha static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
356c2e86691STristram Ha 			      u8 *data)
357c2e86691STristram Ha {
358c2e86691STristram Ha 	ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
359c2e86691STristram Ha }
360c2e86691STristram Ha 
361c2e86691STristram Ha static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
362c2e86691STristram Ha 			       u16 *data)
363c2e86691STristram Ha {
364c2e86691STristram Ha 	ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
365c2e86691STristram Ha }
366c2e86691STristram Ha 
367c2e86691STristram Ha static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
368c2e86691STristram Ha 			       u32 *data)
369c2e86691STristram Ha {
370c2e86691STristram Ha 	ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
371c2e86691STristram Ha }
372c2e86691STristram Ha 
373c2e86691STristram Ha static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
374c2e86691STristram Ha 			       u8 data)
375c2e86691STristram Ha {
376c2e86691STristram Ha 	ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
377c2e86691STristram Ha }
378c2e86691STristram Ha 
379c2e86691STristram Ha static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
380c2e86691STristram Ha 				u16 data)
381c2e86691STristram Ha {
382c2e86691STristram Ha 	ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
383c2e86691STristram Ha }
384c2e86691STristram Ha 
385c2e86691STristram Ha static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
386c2e86691STristram Ha 				u32 data)
387c2e86691STristram Ha {
388c2e86691STristram Ha 	ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
389c2e86691STristram Ha }
390c2e86691STristram Ha 
391013572a2SMarek Vasut static inline void ksz_regmap_lock(void *__mtx)
392013572a2SMarek Vasut {
393013572a2SMarek Vasut 	struct mutex *mtx = __mtx;
394013572a2SMarek Vasut 	mutex_lock(mtx);
395013572a2SMarek Vasut }
396013572a2SMarek Vasut 
397013572a2SMarek Vasut static inline void ksz_regmap_unlock(void *__mtx)
398013572a2SMarek Vasut {
399013572a2SMarek Vasut 	struct mutex *mtx = __mtx;
400013572a2SMarek Vasut 	mutex_unlock(mtx);
401013572a2SMarek Vasut }
402013572a2SMarek Vasut 
403de6dd626SArun Ramadoss /* STP State Defines */
404de6dd626SArun Ramadoss #define PORT_TX_ENABLE			BIT(2)
405de6dd626SArun Ramadoss #define PORT_RX_ENABLE			BIT(1)
406de6dd626SArun Ramadoss #define PORT_LEARN_DISABLE		BIT(0)
407de6dd626SArun Ramadoss 
40891a98917SArun Ramadoss /* Switch ID Defines */
40991a98917SArun Ramadoss #define REG_CHIP_ID0			0x00
41091a98917SArun Ramadoss 
41191a98917SArun Ramadoss #define SW_FAMILY_ID_M			GENMASK(15, 8)
41291a98917SArun Ramadoss #define KSZ87_FAMILY_ID			0x87
41391a98917SArun Ramadoss #define KSZ88_FAMILY_ID			0x88
41491a98917SArun Ramadoss 
41591a98917SArun Ramadoss #define KSZ8_PORT_STATUS_0		0x08
41691a98917SArun Ramadoss #define KSZ8_PORT_FIBER_MODE		BIT(7)
41791a98917SArun Ramadoss 
41891a98917SArun Ramadoss #define SW_CHIP_ID_M			GENMASK(7, 4)
41991a98917SArun Ramadoss #define KSZ87_CHIP_ID_94		0x6
42091a98917SArun Ramadoss #define KSZ87_CHIP_ID_95		0x9
42191a98917SArun Ramadoss #define KSZ88_CHIP_ID_63		0x3
42291a98917SArun Ramadoss 
42391a98917SArun Ramadoss #define SW_REV_ID_M			GENMASK(7, 4)
42491a98917SArun Ramadoss 
4251ca6437fSArun Ramadoss /* Driver set switch broadcast storm protection at 10% rate. */
4261ca6437fSArun Ramadoss #define BROADCAST_STORM_PROT_RATE	10
4271ca6437fSArun Ramadoss 
4281ca6437fSArun Ramadoss /* 148,800 frames * 67 ms / 100 */
4291ca6437fSArun Ramadoss #define BROADCAST_STORM_VALUE		9969
4301ca6437fSArun Ramadoss 
4311ca6437fSArun Ramadoss #define BROADCAST_STORM_RATE_HI		0x07
4321ca6437fSArun Ramadoss #define BROADCAST_STORM_RATE_LO		0xFF
4331ca6437fSArun Ramadoss #define BROADCAST_STORM_RATE		0x07FF
4341ca6437fSArun Ramadoss 
4350abab9f3SArun Ramadoss #define MULTICAST_STORM_DISABLE		BIT(6)
4360abab9f3SArun Ramadoss 
437ad08ac18SArun Ramadoss #define SW_START			0x01
438ad08ac18SArun Ramadoss 
439255b59adSMarek Vasut /* Regmap tables generation */
440255b59adSMarek Vasut #define KSZ_SPI_OP_RD		3
441255b59adSMarek Vasut #define KSZ_SPI_OP_WR		2
442255b59adSMarek Vasut 
44320e03777STristram Ha #define swabnot_used(x)		0
44420e03777STristram Ha 
445255b59adSMarek Vasut #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad)		\
446255b59adSMarek Vasut 	swab##swp((opcode) << ((regbits) + (regpad)))
447255b59adSMarek Vasut 
448255b59adSMarek Vasut #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign)		\
449255b59adSMarek Vasut 	{								\
4505f81d545SGeorge McCollister 		.name = #width,						\
451255b59adSMarek Vasut 		.val_bits = (width),					\
452a3aa6e65SMarek Vasut 		.reg_stride = 1,					\
453255b59adSMarek Vasut 		.reg_bits = (regbits) + (regalign),			\
454255b59adSMarek Vasut 		.pad_bits = (regpad),					\
455255b59adSMarek Vasut 		.max_register = BIT(regbits) - 1,			\
456255b59adSMarek Vasut 		.cache_type = REGCACHE_NONE,				\
457255b59adSMarek Vasut 		.read_flag_mask =					\
458255b59adSMarek Vasut 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp,	\
459255b59adSMarek Vasut 					     regbits, regpad),		\
460255b59adSMarek Vasut 		.write_flag_mask =					\
461255b59adSMarek Vasut 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\
462255b59adSMarek Vasut 					     regbits, regpad),		\
463013572a2SMarek Vasut 		.lock = ksz_regmap_lock,				\
464013572a2SMarek Vasut 		.unlock = ksz_regmap_unlock,				\
465255b59adSMarek Vasut 		.reg_format_endian = REGMAP_ENDIAN_BIG,			\
466255b59adSMarek Vasut 		.val_format_endian = REGMAP_ENDIAN_BIG			\
467255b59adSMarek Vasut 	}
468255b59adSMarek Vasut 
469255b59adSMarek Vasut #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign)		\
470255b59adSMarek Vasut 	static const struct regmap_config ksz##_regmap_config[] = {	\
471255b59adSMarek Vasut 		KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
472255b59adSMarek Vasut 		KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
473255b59adSMarek Vasut 		KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
474255b59adSMarek Vasut 	}
475255b59adSMarek Vasut 
476c2e86691STristram Ha #endif
477