xref: /openbmc/linux/drivers/net/dsa/microchip/ksz_common.h (revision 9d95329c65db9b3041693637339250979e762cbc)
1b31141d3SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0 */
2b31141d3SNishad Kamdar /* Microchip switch driver common header
3c2e86691STristram Ha  *
47c6ff470STristram Ha  * Copyright (C) 2017-2019 Microchip Technology Inc.
5c2e86691STristram Ha  */
6c2e86691STristram Ha 
7c2e86691STristram Ha #ifndef __KSZ_COMMON_H
8c2e86691STristram Ha #define __KSZ_COMMON_H
9c2e86691STristram Ha 
106a7abc61SMarek Vasut #include <linux/etherdevice.h>
116a7abc61SMarek Vasut #include <linux/kernel.h>
126a7abc61SMarek Vasut #include <linux/mutex.h>
136a7abc61SMarek Vasut #include <linux/phy.h>
14ee394feaSMarek Vasut #include <linux/regmap.h>
156a7abc61SMarek Vasut #include <net/dsa.h>
166a7abc61SMarek Vasut 
1765ac79e1SArun Ramadoss #define KSZ_MAX_NUM_PORTS 8
1865ac79e1SArun Ramadoss 
196a7abc61SMarek Vasut struct vlan_table {
206a7abc61SMarek Vasut 	u32 table[3];
216a7abc61SMarek Vasut };
226a7abc61SMarek Vasut 
236a7abc61SMarek Vasut struct ksz_port_mib {
246a7abc61SMarek Vasut 	struct mutex cnt_mutex;		/* structure access */
256a7abc61SMarek Vasut 	u8 cnt_ptr;
266a7abc61SMarek Vasut 	u64 *counters;
27a7f4f13aSOleksij Rempel 	struct rtnl_link_stats64 stats64;
28a7f4f13aSOleksij Rempel 	struct spinlock stats64_lock;
296a7abc61SMarek Vasut };
306a7abc61SMarek Vasut 
31a530e6f2SArun Ramadoss struct ksz_mib_names {
32a530e6f2SArun Ramadoss 	int index;
33a530e6f2SArun Ramadoss 	char string[ETH_GSTRING_LEN];
34a530e6f2SArun Ramadoss };
35a530e6f2SArun Ramadoss 
36462d5250SArun Ramadoss struct ksz_chip_data {
37462d5250SArun Ramadoss 	u32 chip_id;
38462d5250SArun Ramadoss 	const char *dev_name;
39462d5250SArun Ramadoss 	int num_vlans;
40462d5250SArun Ramadoss 	int num_alus;
41462d5250SArun Ramadoss 	int num_statics;
42462d5250SArun Ramadoss 	int cpu_ports;
43462d5250SArun Ramadoss 	int port_cnt;
446ec23aaaSArun Ramadoss 	const struct ksz_dev_ops *ops;
45462d5250SArun Ramadoss 	bool phy_errata_9477;
46462d5250SArun Ramadoss 	bool ksz87xx_eee_link_erratum;
47a530e6f2SArun Ramadoss 	const struct ksz_mib_names *mib_names;
48a530e6f2SArun Ramadoss 	int mib_cnt;
49a530e6f2SArun Ramadoss 	u8 reg_mib_cnt;
50a02579dfSArun Ramadoss 	const u16 *regs;
51d23a5e18SArun Ramadoss 	const u32 *masks;
5234e48383SArun Ramadoss 	const u8 *shifts;
53e593df51SArun Ramadoss 	int stp_ctrl_reg;
541ca6437fSArun Ramadoss 	int broadcast_ctrl_reg;
550abab9f3SArun Ramadoss 	int multicast_ctrl_reg;
56ad08ac18SArun Ramadoss 	int start_ctrl_reg;
5765ac79e1SArun Ramadoss 	bool supports_mii[KSZ_MAX_NUM_PORTS];
5865ac79e1SArun Ramadoss 	bool supports_rmii[KSZ_MAX_NUM_PORTS];
5965ac79e1SArun Ramadoss 	bool supports_rgmii[KSZ_MAX_NUM_PORTS];
6065ac79e1SArun Ramadoss 	bool internal_phy[KSZ_MAX_NUM_PORTS];
61462d5250SArun Ramadoss };
62462d5250SArun Ramadoss 
636a7abc61SMarek Vasut struct ksz_port {
648f4f58f8SBen Hutchings 	bool remove_tag;		/* Remove Tag flag set, for ksz8795 only */
656a7abc61SMarek Vasut 	int stp_state;
666a7abc61SMarek Vasut 	struct phy_device phydev;
676a7abc61SMarek Vasut 
686a7abc61SMarek Vasut 	u32 on:1;			/* port is not disabled by hardware */
696a7abc61SMarek Vasut 	u32 phy:1;			/* port has a PHY */
706a7abc61SMarek Vasut 	u32 fiber:1;			/* port is fiber */
716a7abc61SMarek Vasut 	u32 sgmii:1;			/* port is SGMII */
726a7abc61SMarek Vasut 	u32 force:1;
736a7abc61SMarek Vasut 	u32 read:1;			/* read MIB counters in background */
746a7abc61SMarek Vasut 	u32 freeze:1;			/* MIB counter freeze is enabled */
756a7abc61SMarek Vasut 
766a7abc61SMarek Vasut 	struct ksz_port_mib mib;
77edecfa98SHelmut Grohne 	phy_interface_t interface;
78e18058eaSOleksij Rempel 	u16 max_frame;
796a7abc61SMarek Vasut };
806a7abc61SMarek Vasut 
816a7abc61SMarek Vasut struct ksz_device {
826a7abc61SMarek Vasut 	struct dsa_switch *ds;
836a7abc61SMarek Vasut 	struct ksz_platform_data *pdata;
84462d5250SArun Ramadoss 	const struct ksz_chip_data *info;
856a7abc61SMarek Vasut 
866a7abc61SMarek Vasut 	struct mutex dev_mutex;		/* device access */
87013572a2SMarek Vasut 	struct mutex regmap_mutex;	/* regmap access */
886a7abc61SMarek Vasut 	struct mutex alu_mutex;		/* ALU access */
896a7abc61SMarek Vasut 	struct mutex vlan_mutex;	/* vlan access */
906a7abc61SMarek Vasut 	const struct ksz_dev_ops *dev_ops;
916a7abc61SMarek Vasut 
926a7abc61SMarek Vasut 	struct device *dev;
936a7abc61SMarek Vasut 	struct regmap *regmap[3];
946a7abc61SMarek Vasut 
956a7abc61SMarek Vasut 	void *priv;
966a7abc61SMarek Vasut 
976a7abc61SMarek Vasut 	struct gpio_desc *reset_gpio;	/* Optional reset GPIO */
986a7abc61SMarek Vasut 
996a7abc61SMarek Vasut 	/* chip specific data */
1006a7abc61SMarek Vasut 	u32 chip_id;
10191a98917SArun Ramadoss 	u8 chip_rev;
1026a7abc61SMarek Vasut 	int cpu_port;			/* port connected to CPU */
1036a7abc61SMarek Vasut 	int phy_port_cnt;
104edecfa98SHelmut Grohne 	phy_interface_t compat_interface;
1056a7abc61SMarek Vasut 	bool synclko_125;
10648bf8b8aSRobert Hancock 	bool synclko_disable;
1076a7abc61SMarek Vasut 
1086a7abc61SMarek Vasut 	struct vlan_table *vlan_cache;
1096a7abc61SMarek Vasut 
1106a7abc61SMarek Vasut 	struct ksz_port *ports;
111469b390eSGeorge McCollister 	struct delayed_work mib_read;
1126a7abc61SMarek Vasut 	unsigned long mib_read_interval;
1136a7abc61SMarek Vasut 	u16 mirror_rx;
1146a7abc61SMarek Vasut 	u16 mirror_tx;
1156a7abc61SMarek Vasut 	u32 features;			/* chip specific features */
1166a7abc61SMarek Vasut 	u16 port_mask;
1176a7abc61SMarek Vasut };
1186a7abc61SMarek Vasut 
119462d5250SArun Ramadoss /* List of supported models */
120462d5250SArun Ramadoss enum ksz_model {
121462d5250SArun Ramadoss 	KSZ8795,
122462d5250SArun Ramadoss 	KSZ8794,
123462d5250SArun Ramadoss 	KSZ8765,
124462d5250SArun Ramadoss 	KSZ8830,
125462d5250SArun Ramadoss 	KSZ9477,
126462d5250SArun Ramadoss 	KSZ9897,
127462d5250SArun Ramadoss 	KSZ9893,
128462d5250SArun Ramadoss 	KSZ9567,
129462d5250SArun Ramadoss 	LAN9370,
130462d5250SArun Ramadoss 	LAN9371,
131462d5250SArun Ramadoss 	LAN9372,
132462d5250SArun Ramadoss 	LAN9373,
133462d5250SArun Ramadoss 	LAN9374,
134462d5250SArun Ramadoss };
135462d5250SArun Ramadoss 
136462d5250SArun Ramadoss enum ksz_chip_id {
137462d5250SArun Ramadoss 	KSZ8795_CHIP_ID = 0x8795,
138462d5250SArun Ramadoss 	KSZ8794_CHIP_ID = 0x8794,
139462d5250SArun Ramadoss 	KSZ8765_CHIP_ID = 0x8765,
140462d5250SArun Ramadoss 	KSZ8830_CHIP_ID = 0x8830,
141462d5250SArun Ramadoss 	KSZ9477_CHIP_ID = 0x00947700,
142462d5250SArun Ramadoss 	KSZ9897_CHIP_ID = 0x00989700,
143462d5250SArun Ramadoss 	KSZ9893_CHIP_ID = 0x00989300,
144462d5250SArun Ramadoss 	KSZ9567_CHIP_ID = 0x00956700,
145462d5250SArun Ramadoss 	LAN9370_CHIP_ID = 0x00937000,
146462d5250SArun Ramadoss 	LAN9371_CHIP_ID = 0x00937100,
147462d5250SArun Ramadoss 	LAN9372_CHIP_ID = 0x00937200,
148462d5250SArun Ramadoss 	LAN9373_CHIP_ID = 0x00937300,
149462d5250SArun Ramadoss 	LAN9374_CHIP_ID = 0x00937400,
150462d5250SArun Ramadoss };
151462d5250SArun Ramadoss 
152486f9ca7SArun Ramadoss enum ksz_regs {
153486f9ca7SArun Ramadoss 	REG_IND_CTRL_0,
154486f9ca7SArun Ramadoss 	REG_IND_DATA_8,
155486f9ca7SArun Ramadoss 	REG_IND_DATA_CHECK,
156486f9ca7SArun Ramadoss 	REG_IND_DATA_HI,
157486f9ca7SArun Ramadoss 	REG_IND_DATA_LO,
158486f9ca7SArun Ramadoss 	REG_IND_MIB_CHECK,
159486f9ca7SArun Ramadoss 	REG_IND_BYTE,
160486f9ca7SArun Ramadoss 	P_FORCE_CTRL,
161486f9ca7SArun Ramadoss 	P_LINK_STATUS,
162486f9ca7SArun Ramadoss 	P_LOCAL_CTRL,
163486f9ca7SArun Ramadoss 	P_NEG_RESTART_CTRL,
164486f9ca7SArun Ramadoss 	P_REMOTE_STATUS,
165486f9ca7SArun Ramadoss 	P_SPEED_STATUS,
166486f9ca7SArun Ramadoss 	S_TAIL_TAG_CTRL,
1676877102fSArun Ramadoss 	P_STP_CTRL,
168*9d95329cSArun Ramadoss 	S_START_CTRL,
169*9d95329cSArun Ramadoss 	S_BROADCAST_CTRL,
170*9d95329cSArun Ramadoss 	S_MULTICAST_CTRL,
171486f9ca7SArun Ramadoss };
172486f9ca7SArun Ramadoss 
173d23a5e18SArun Ramadoss enum ksz_masks {
174d23a5e18SArun Ramadoss 	PORT_802_1P_REMAPPING,
175d23a5e18SArun Ramadoss 	SW_TAIL_TAG_ENABLE,
176d23a5e18SArun Ramadoss 	MIB_COUNTER_OVERFLOW,
177d23a5e18SArun Ramadoss 	MIB_COUNTER_VALID,
178d23a5e18SArun Ramadoss 	VLAN_TABLE_FID,
179d23a5e18SArun Ramadoss 	VLAN_TABLE_MEMBERSHIP,
180d23a5e18SArun Ramadoss 	VLAN_TABLE_VALID,
181d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_VALID,
182d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_USE_FID,
183d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_FID,
184d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_OVERRIDE,
185d23a5e18SArun Ramadoss 	STATIC_MAC_TABLE_FWD_PORTS,
186d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_ENTRIES_H,
187d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_MAC_EMPTY,
188d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_NOT_READY,
189d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_ENTRIES,
190d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_FID,
191d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_SRC_PORT,
192d23a5e18SArun Ramadoss 	DYNAMIC_MAC_TABLE_TIMESTAMP,
193d23a5e18SArun Ramadoss };
194d23a5e18SArun Ramadoss 
19534e48383SArun Ramadoss enum ksz_shifts {
19634e48383SArun Ramadoss 	VLAN_TABLE_MEMBERSHIP_S,
19734e48383SArun Ramadoss 	VLAN_TABLE,
19834e48383SArun Ramadoss 	STATIC_MAC_FWD_PORTS,
19934e48383SArun Ramadoss 	STATIC_MAC_FID,
20034e48383SArun Ramadoss 	DYNAMIC_MAC_ENTRIES_H,
20134e48383SArun Ramadoss 	DYNAMIC_MAC_ENTRIES,
20234e48383SArun Ramadoss 	DYNAMIC_MAC_FID,
20334e48383SArun Ramadoss 	DYNAMIC_MAC_TIMESTAMP,
20434e48383SArun Ramadoss 	DYNAMIC_MAC_SRC_PORT,
20534e48383SArun Ramadoss };
20634e48383SArun Ramadoss 
2076a7abc61SMarek Vasut struct alu_struct {
2086a7abc61SMarek Vasut 	/* entry 1 */
2096a7abc61SMarek Vasut 	u8	is_static:1;
2106a7abc61SMarek Vasut 	u8	is_src_filter:1;
2116a7abc61SMarek Vasut 	u8	is_dst_filter:1;
2126a7abc61SMarek Vasut 	u8	prio_age:3;
2136a7abc61SMarek Vasut 	u32	_reserv_0_1:23;
2146a7abc61SMarek Vasut 	u8	mstp:3;
2156a7abc61SMarek Vasut 	/* entry 2 */
2166a7abc61SMarek Vasut 	u8	is_override:1;
2176a7abc61SMarek Vasut 	u8	is_use_fid:1;
2186a7abc61SMarek Vasut 	u32	_reserv_1_1:23;
2196a7abc61SMarek Vasut 	u8	port_forward:7;
2206a7abc61SMarek Vasut 	/* entry 3 & 4*/
2216a7abc61SMarek Vasut 	u32	_reserv_2_1:9;
2226a7abc61SMarek Vasut 	u8	fid:7;
2236a7abc61SMarek Vasut 	u8	mac[ETH_ALEN];
2246a7abc61SMarek Vasut };
2256a7abc61SMarek Vasut 
2266a7abc61SMarek Vasut struct ksz_dev_ops {
227d2822e68SArun Ramadoss 	int (*setup)(struct dsa_switch *ds);
2286a7abc61SMarek Vasut 	u32 (*get_port_addr)(int port, int offset);
2296a7abc61SMarek Vasut 	void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
2306a7abc61SMarek Vasut 	void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
2316a7abc61SMarek Vasut 	void (*port_cleanup)(struct ksz_device *dev, int port);
2326a7abc61SMarek Vasut 	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
2336a7abc61SMarek Vasut 	void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
2346a7abc61SMarek Vasut 	void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
2356a7abc61SMarek Vasut 	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
2366a7abc61SMarek Vasut 			  u64 *cnt);
2376a7abc61SMarek Vasut 	void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
2386a7abc61SMarek Vasut 			  u64 *dropped, u64 *cnt);
239a7f4f13aSOleksij Rempel 	void (*r_mib_stat64)(struct ksz_device *dev, int port);
240f0d997e3SArun Ramadoss 	int  (*vlan_filtering)(struct ksz_device *dev, int port,
241f0d997e3SArun Ramadoss 			       bool flag, struct netlink_ext_ack *extack);
242f0d997e3SArun Ramadoss 	int  (*vlan_add)(struct ksz_device *dev, int port,
243f0d997e3SArun Ramadoss 			 const struct switchdev_obj_port_vlan *vlan,
244f0d997e3SArun Ramadoss 			 struct netlink_ext_ack *extack);
245f0d997e3SArun Ramadoss 	int  (*vlan_del)(struct ksz_device *dev, int port,
246f0d997e3SArun Ramadoss 			 const struct switchdev_obj_port_vlan *vlan);
24700a298bbSArun Ramadoss 	int (*mirror_add)(struct ksz_device *dev, int port,
24800a298bbSArun Ramadoss 			  struct dsa_mall_mirror_tc_entry *mirror,
24900a298bbSArun Ramadoss 			  bool ingress, struct netlink_ext_ack *extack);
25000a298bbSArun Ramadoss 	void (*mirror_del)(struct ksz_device *dev, int port,
25100a298bbSArun Ramadoss 			   struct dsa_mall_mirror_tc_entry *mirror);
252e587be75SArun Ramadoss 	int (*fdb_add)(struct ksz_device *dev, int port,
253e587be75SArun Ramadoss 		       const unsigned char *addr, u16 vid, struct dsa_db db);
254e587be75SArun Ramadoss 	int (*fdb_del)(struct ksz_device *dev, int port,
255e587be75SArun Ramadoss 		       const unsigned char *addr, u16 vid, struct dsa_db db);
256e587be75SArun Ramadoss 	int (*fdb_dump)(struct ksz_device *dev, int port,
257e587be75SArun Ramadoss 			dsa_fdb_dump_cb_t *cb, void *data);
258980c7d17SArun Ramadoss 	int (*mdb_add)(struct ksz_device *dev, int port,
259980c7d17SArun Ramadoss 		       const struct switchdev_obj_port_mdb *mdb,
260980c7d17SArun Ramadoss 		       struct dsa_db db);
261980c7d17SArun Ramadoss 	int (*mdb_del)(struct ksz_device *dev, int port,
262980c7d17SArun Ramadoss 		       const struct switchdev_obj_port_mdb *mdb,
263980c7d17SArun Ramadoss 		       struct dsa_db db);
2647012033cSArun Ramadoss 	void (*get_caps)(struct ksz_device *dev, int port,
2657012033cSArun Ramadoss 			 struct phylink_config *config);
2661fe94f54SArun Ramadoss 	int (*change_mtu)(struct ksz_device *dev, int port, int mtu);
2671fe94f54SArun Ramadoss 	int (*max_mtu)(struct ksz_device *dev, int port);
2686a7abc61SMarek Vasut 	void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
2696a7abc61SMarek Vasut 	void (*port_init_cnt)(struct ksz_device *dev, int port);
270fb9324beSArun Ramadoss 	void (*config_cpu_port)(struct dsa_switch *ds);
271331d64f7SArun Ramadoss 	int (*enable_stp_addr)(struct ksz_device *dev);
272673b196fSArun Ramadoss 	int (*reset)(struct ksz_device *dev);
2736a7abc61SMarek Vasut 	int (*init)(struct ksz_device *dev);
2746a7abc61SMarek Vasut 	void (*exit)(struct ksz_device *dev);
2756a7abc61SMarek Vasut };
2766a7abc61SMarek Vasut 
2776a7abc61SMarek Vasut struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
2786ec23aaaSArun Ramadoss int ksz_switch_register(struct ksz_device *dev);
2796a7abc61SMarek Vasut void ksz_switch_remove(struct ksz_device *dev);
2806a7abc61SMarek Vasut 
2817c6ff470STristram Ha void ksz_init_mib_timer(struct ksz_device *dev);
282c6101dd7SArun Ramadoss void ksz_r_mib_stats64(struct ksz_device *dev, int port);
283e593df51SArun Ramadoss void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);
2841958eee8SArun Ramadoss extern const struct ksz_chip_data ksz_switch_chips[];
285c2e86691STristram Ha 
286c2e86691STristram Ha /* Common register access functions */
287c2e86691STristram Ha 
288c2e86691STristram Ha static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
289c2e86691STristram Ha {
290ee394feaSMarek Vasut 	unsigned int value;
291ee394feaSMarek Vasut 	int ret = regmap_read(dev->regmap[0], reg, &value);
292c2e86691STristram Ha 
293ee394feaSMarek Vasut 	*val = value;
294c2e86691STristram Ha 	return ret;
295c2e86691STristram Ha }
296c2e86691STristram Ha 
297c2e86691STristram Ha static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
298c2e86691STristram Ha {
299ee394feaSMarek Vasut 	unsigned int value;
300ee394feaSMarek Vasut 	int ret = regmap_read(dev->regmap[1], reg, &value);
301c2e86691STristram Ha 
302ee394feaSMarek Vasut 	*val = value;
303c2e86691STristram Ha 	return ret;
304c2e86691STristram Ha }
305c2e86691STristram Ha 
306c2e86691STristram Ha static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
307c2e86691STristram Ha {
308ee394feaSMarek Vasut 	unsigned int value;
309ee394feaSMarek Vasut 	int ret = regmap_read(dev->regmap[2], reg, &value);
310c2e86691STristram Ha 
311ee394feaSMarek Vasut 	*val = value;
312c2e86691STristram Ha 	return ret;
313c2e86691STristram Ha }
314c2e86691STristram Ha 
315e66f840cSTristram Ha static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
316e66f840cSTristram Ha {
317e66f840cSTristram Ha 	u32 value[2];
318e66f840cSTristram Ha 	int ret;
319e66f840cSTristram Ha 
320e66f840cSTristram Ha 	ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
321c34f674cSBen Hutchings 	if (!ret)
322c34f674cSBen Hutchings 		*val = (u64)value[0] << 32 | value[1];
323e66f840cSTristram Ha 
324e66f840cSTristram Ha 	return ret;
325e66f840cSTristram Ha }
326e66f840cSTristram Ha 
327c2e86691STristram Ha static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
328c2e86691STristram Ha {
329ee394feaSMarek Vasut 	return regmap_write(dev->regmap[0], reg, value);
330c2e86691STristram Ha }
331c2e86691STristram Ha 
332c2e86691STristram Ha static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
333c2e86691STristram Ha {
334ee394feaSMarek Vasut 	return regmap_write(dev->regmap[1], reg, value);
335c2e86691STristram Ha }
336c2e86691STristram Ha 
337c2e86691STristram Ha static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
338c2e86691STristram Ha {
339ee394feaSMarek Vasut 	return regmap_write(dev->regmap[2], reg, value);
340c2e86691STristram Ha }
341c2e86691STristram Ha 
342e66f840cSTristram Ha static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
343e66f840cSTristram Ha {
344e66f840cSTristram Ha 	u32 val[2];
345e66f840cSTristram Ha 
346e66f840cSTristram Ha 	/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
347e66f840cSTristram Ha 	value = swab64(value);
348e66f840cSTristram Ha 	val[0] = swab32(value & 0xffffffffULL);
349e66f840cSTristram Ha 	val[1] = swab32(value >> 32ULL);
350e66f840cSTristram Ha 
351e66f840cSTristram Ha 	return regmap_bulk_write(dev->regmap[2], reg, val, 2);
352e66f840cSTristram Ha }
353e66f840cSTristram Ha 
354c2e86691STristram Ha static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
355c2e86691STristram Ha 			      u8 *data)
356c2e86691STristram Ha {
357c2e86691STristram Ha 	ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
358c2e86691STristram Ha }
359c2e86691STristram Ha 
360c2e86691STristram Ha static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
361c2e86691STristram Ha 			       u16 *data)
362c2e86691STristram Ha {
363c2e86691STristram Ha 	ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
364c2e86691STristram Ha }
365c2e86691STristram Ha 
366c2e86691STristram Ha static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
367c2e86691STristram Ha 			       u32 *data)
368c2e86691STristram Ha {
369c2e86691STristram Ha 	ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
370c2e86691STristram Ha }
371c2e86691STristram Ha 
372c2e86691STristram Ha static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
373c2e86691STristram Ha 			       u8 data)
374c2e86691STristram Ha {
375c2e86691STristram Ha 	ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
376c2e86691STristram Ha }
377c2e86691STristram Ha 
378c2e86691STristram Ha static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
379c2e86691STristram Ha 				u16 data)
380c2e86691STristram Ha {
381c2e86691STristram Ha 	ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
382c2e86691STristram Ha }
383c2e86691STristram Ha 
384c2e86691STristram Ha static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
385c2e86691STristram Ha 				u32 data)
386c2e86691STristram Ha {
387c2e86691STristram Ha 	ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
388c2e86691STristram Ha }
389c2e86691STristram Ha 
390013572a2SMarek Vasut static inline void ksz_regmap_lock(void *__mtx)
391013572a2SMarek Vasut {
392013572a2SMarek Vasut 	struct mutex *mtx = __mtx;
393013572a2SMarek Vasut 	mutex_lock(mtx);
394013572a2SMarek Vasut }
395013572a2SMarek Vasut 
396013572a2SMarek Vasut static inline void ksz_regmap_unlock(void *__mtx)
397013572a2SMarek Vasut {
398013572a2SMarek Vasut 	struct mutex *mtx = __mtx;
399013572a2SMarek Vasut 	mutex_unlock(mtx);
400013572a2SMarek Vasut }
401013572a2SMarek Vasut 
402de6dd626SArun Ramadoss /* STP State Defines */
403de6dd626SArun Ramadoss #define PORT_TX_ENABLE			BIT(2)
404de6dd626SArun Ramadoss #define PORT_RX_ENABLE			BIT(1)
405de6dd626SArun Ramadoss #define PORT_LEARN_DISABLE		BIT(0)
406de6dd626SArun Ramadoss 
40791a98917SArun Ramadoss /* Switch ID Defines */
40891a98917SArun Ramadoss #define REG_CHIP_ID0			0x00
40991a98917SArun Ramadoss 
41091a98917SArun Ramadoss #define SW_FAMILY_ID_M			GENMASK(15, 8)
41191a98917SArun Ramadoss #define KSZ87_FAMILY_ID			0x87
41291a98917SArun Ramadoss #define KSZ88_FAMILY_ID			0x88
41391a98917SArun Ramadoss 
41491a98917SArun Ramadoss #define KSZ8_PORT_STATUS_0		0x08
41591a98917SArun Ramadoss #define KSZ8_PORT_FIBER_MODE		BIT(7)
41691a98917SArun Ramadoss 
41791a98917SArun Ramadoss #define SW_CHIP_ID_M			GENMASK(7, 4)
41891a98917SArun Ramadoss #define KSZ87_CHIP_ID_94		0x6
41991a98917SArun Ramadoss #define KSZ87_CHIP_ID_95		0x9
42091a98917SArun Ramadoss #define KSZ88_CHIP_ID_63		0x3
42191a98917SArun Ramadoss 
42291a98917SArun Ramadoss #define SW_REV_ID_M			GENMASK(7, 4)
42391a98917SArun Ramadoss 
4241ca6437fSArun Ramadoss /* Driver set switch broadcast storm protection at 10% rate. */
4251ca6437fSArun Ramadoss #define BROADCAST_STORM_PROT_RATE	10
4261ca6437fSArun Ramadoss 
4271ca6437fSArun Ramadoss /* 148,800 frames * 67 ms / 100 */
4281ca6437fSArun Ramadoss #define BROADCAST_STORM_VALUE		9969
4291ca6437fSArun Ramadoss 
4301ca6437fSArun Ramadoss #define BROADCAST_STORM_RATE_HI		0x07
4311ca6437fSArun Ramadoss #define BROADCAST_STORM_RATE_LO		0xFF
4321ca6437fSArun Ramadoss #define BROADCAST_STORM_RATE		0x07FF
4331ca6437fSArun Ramadoss 
4340abab9f3SArun Ramadoss #define MULTICAST_STORM_DISABLE		BIT(6)
4350abab9f3SArun Ramadoss 
436ad08ac18SArun Ramadoss #define SW_START			0x01
437ad08ac18SArun Ramadoss 
438255b59adSMarek Vasut /* Regmap tables generation */
439255b59adSMarek Vasut #define KSZ_SPI_OP_RD		3
440255b59adSMarek Vasut #define KSZ_SPI_OP_WR		2
441255b59adSMarek Vasut 
44220e03777STristram Ha #define swabnot_used(x)		0
44320e03777STristram Ha 
444255b59adSMarek Vasut #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad)		\
445255b59adSMarek Vasut 	swab##swp((opcode) << ((regbits) + (regpad)))
446255b59adSMarek Vasut 
447255b59adSMarek Vasut #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign)		\
448255b59adSMarek Vasut 	{								\
4495f81d545SGeorge McCollister 		.name = #width,						\
450255b59adSMarek Vasut 		.val_bits = (width),					\
451a3aa6e65SMarek Vasut 		.reg_stride = 1,					\
452255b59adSMarek Vasut 		.reg_bits = (regbits) + (regalign),			\
453255b59adSMarek Vasut 		.pad_bits = (regpad),					\
454255b59adSMarek Vasut 		.max_register = BIT(regbits) - 1,			\
455255b59adSMarek Vasut 		.cache_type = REGCACHE_NONE,				\
456255b59adSMarek Vasut 		.read_flag_mask =					\
457255b59adSMarek Vasut 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp,	\
458255b59adSMarek Vasut 					     regbits, regpad),		\
459255b59adSMarek Vasut 		.write_flag_mask =					\
460255b59adSMarek Vasut 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\
461255b59adSMarek Vasut 					     regbits, regpad),		\
462013572a2SMarek Vasut 		.lock = ksz_regmap_lock,				\
463013572a2SMarek Vasut 		.unlock = ksz_regmap_unlock,				\
464255b59adSMarek Vasut 		.reg_format_endian = REGMAP_ENDIAN_BIG,			\
465255b59adSMarek Vasut 		.val_format_endian = REGMAP_ENDIAN_BIG			\
466255b59adSMarek Vasut 	}
467255b59adSMarek Vasut 
468255b59adSMarek Vasut #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign)		\
469255b59adSMarek Vasut 	static const struct regmap_config ksz##_regmap_config[] = {	\
470255b59adSMarek Vasut 		KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
471255b59adSMarek Vasut 		KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
472255b59adSMarek Vasut 		KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
473255b59adSMarek Vasut 	}
474255b59adSMarek Vasut 
475c2e86691STristram Ha #endif
476