1aaa7cb26SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 238034518SWolfgang Grandegger /* 338034518SWolfgang Grandegger * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> 4e6d9c80bSStephane Grosjean * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> 538034518SWolfgang Grandegger * 638034518SWolfgang Grandegger * Derived from the PCAN project file driver/src/pcan_pci.c: 738034518SWolfgang Grandegger * 838034518SWolfgang Grandegger * Copyright (C) 2001-2006 PEAK System-Technik GmbH 938034518SWolfgang Grandegger */ 1038034518SWolfgang Grandegger 1138034518SWolfgang Grandegger #include <linux/kernel.h> 1238034518SWolfgang Grandegger #include <linux/module.h> 1338034518SWolfgang Grandegger #include <linux/interrupt.h> 1438034518SWolfgang Grandegger #include <linux/netdevice.h> 1538034518SWolfgang Grandegger #include <linux/delay.h> 1638034518SWolfgang Grandegger #include <linux/pci.h> 1738034518SWolfgang Grandegger #include <linux/io.h> 18e6d9c80bSStephane Grosjean #include <linux/i2c.h> 19e6d9c80bSStephane Grosjean #include <linux/i2c-algo-bit.h> 2038034518SWolfgang Grandegger #include <linux/can.h> 2138034518SWolfgang Grandegger #include <linux/can/dev.h> 2238034518SWolfgang Grandegger 2338034518SWolfgang Grandegger #include "sja1000.h" 2438034518SWolfgang Grandegger 25fc09e367SStephane Grosjean MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); 26e6d9c80bSStephane Grosjean MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); 2738034518SWolfgang Grandegger MODULE_LICENSE("GPL v2"); 2838034518SWolfgang Grandegger 2938034518SWolfgang Grandegger #define DRV_NAME "peak_pci" 3038034518SWolfgang Grandegger 31e6d9c80bSStephane Grosjean struct peak_pciec_card; 3238034518SWolfgang Grandegger struct peak_pci_chan { 3338034518SWolfgang Grandegger void __iomem *cfg_base; /* Common for all channels */ 3429830406SStephane Grosjean struct net_device *prev_dev; /* Chain of network devices */ 3538034518SWolfgang Grandegger u16 icr_mask; /* Interrupt mask for fast ack */ 36e6d9c80bSStephane Grosjean struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */ 3738034518SWolfgang Grandegger }; 3838034518SWolfgang Grandegger 3938034518SWolfgang Grandegger #define PEAK_PCI_CAN_CLOCK (16000000 / 2) 4038034518SWolfgang Grandegger 4138034518SWolfgang Grandegger #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) 4238034518SWolfgang Grandegger #define PEAK_PCI_OCR OCR_TX0_PUSHPULL 4338034518SWolfgang Grandegger 44*9b69aff9SMarc Kleine-Budde /* Important PITA registers */ 4538034518SWolfgang Grandegger #define PITA_ICR 0x00 /* Interrupt control register */ 4638034518SWolfgang Grandegger #define PITA_GPIOICR 0x18 /* GPIO interface control register */ 4738034518SWolfgang Grandegger #define PITA_MISC 0x1C /* Miscellaneous register */ 4838034518SWolfgang Grandegger 4938034518SWolfgang Grandegger #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ 5038034518SWolfgang Grandegger #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ 5138034518SWolfgang Grandegger 5238034518SWolfgang Grandegger #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ 5338034518SWolfgang Grandegger #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ 54e6d9c80bSStephane Grosjean #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */ 55e6d9c80bSStephane Grosjean #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */ 56fc09e367SStephane Grosjean #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */ 57fc09e367SStephane Grosjean #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */ 58fc09e367SStephane Grosjean #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */ 59fc09e367SStephane Grosjean #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */ 60fc09e367SStephane Grosjean #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */ 614be0015cSOliver Hartkopp #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */ 624be0015cSOliver Hartkopp #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */ 6338034518SWolfgang Grandegger 64e6d9c80bSStephane Grosjean #define PEAK_PCI_CHAN_MAX 4 65e6d9c80bSStephane Grosjean 66e6d9c80bSStephane Grosjean static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = { 67e6d9c80bSStephane Grosjean 0x02, 0x01, 0x40, 0x80 68e6d9c80bSStephane Grosjean }; 6938034518SWolfgang Grandegger 709baa3c34SBenoit Taine static const struct pci_device_id peak_pci_tbl[] = { 7138034518SWolfgang Grandegger {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 72e6d9c80bSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 73e6d9c80bSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 74fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 75fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 76fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 77fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 787253054eSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,}, 79e6d9c80bSStephane Grosjean #ifdef CONFIG_CAN_PEAK_PCIEC 80e6d9c80bSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 814be0015cSOliver Hartkopp {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 82e6d9c80bSStephane Grosjean #endif 8338034518SWolfgang Grandegger {0,} 8438034518SWolfgang Grandegger }; 8538034518SWolfgang Grandegger 8638034518SWolfgang Grandegger MODULE_DEVICE_TABLE(pci, peak_pci_tbl); 8738034518SWolfgang Grandegger 88e6d9c80bSStephane Grosjean #ifdef CONFIG_CAN_PEAK_PCIEC 89*9b69aff9SMarc Kleine-Budde /* PCAN-ExpressCard needs I2C bit-banging configuration option. */ 90e6d9c80bSStephane Grosjean 91e6d9c80bSStephane Grosjean /* GPIOICR byte access offsets */ 92e6d9c80bSStephane Grosjean #define PITA_GPOUT 0x18 /* GPx output value */ 93e6d9c80bSStephane Grosjean #define PITA_GPIN 0x19 /* GPx input value */ 9488bfb9a7SMarc Kleine-Budde #define PITA_GPOEN 0x1A /* configure GPx as output pin */ 95e6d9c80bSStephane Grosjean 96e6d9c80bSStephane Grosjean /* I2C GP bits */ 97e6d9c80bSStephane Grosjean #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */ 98e6d9c80bSStephane Grosjean #define PITA_GPIN_SDA 0x04 /* Serial DAta line */ 99e6d9c80bSStephane Grosjean 100e6d9c80bSStephane Grosjean #define PCA9553_1_SLAVEADDR (0xC4 >> 1) 101e6d9c80bSStephane Grosjean 102e6d9c80bSStephane Grosjean /* PCA9553 LS0 fields values */ 103e6d9c80bSStephane Grosjean enum { 104e6d9c80bSStephane Grosjean PCA9553_LOW, 105e6d9c80bSStephane Grosjean PCA9553_HIGHZ, 106e6d9c80bSStephane Grosjean PCA9553_PWM0, 107e6d9c80bSStephane Grosjean PCA9553_PWM1 108e6d9c80bSStephane Grosjean }; 109e6d9c80bSStephane Grosjean 110e6d9c80bSStephane Grosjean /* LEDs control */ 111e6d9c80bSStephane Grosjean #define PCA9553_ON PCA9553_LOW 112e6d9c80bSStephane Grosjean #define PCA9553_OFF PCA9553_HIGHZ 113e6d9c80bSStephane Grosjean #define PCA9553_SLOW PCA9553_PWM0 114e6d9c80bSStephane Grosjean #define PCA9553_FAST PCA9553_PWM1 115e6d9c80bSStephane Grosjean 116e6d9c80bSStephane Grosjean #define PCA9553_LED(c) (1 << (c)) 117e6d9c80bSStephane Grosjean #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1)) 118e6d9c80bSStephane Grosjean 119e6d9c80bSStephane Grosjean #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c) 120e6d9c80bSStephane Grosjean #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c) 121e6d9c80bSStephane Grosjean #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c) 122e6d9c80bSStephane Grosjean #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c) 123e6d9c80bSStephane Grosjean #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c) 124e6d9c80bSStephane Grosjean 125e6d9c80bSStephane Grosjean #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1)) 126e6d9c80bSStephane Grosjean 127e6d9c80bSStephane Grosjean #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */ 128e6d9c80bSStephane Grosjean 129e6d9c80bSStephane Grosjean struct peak_pciec_chan { 130e6d9c80bSStephane Grosjean struct net_device *netdev; 131e6d9c80bSStephane Grosjean unsigned long prev_rx_bytes; 132e6d9c80bSStephane Grosjean unsigned long prev_tx_bytes; 133e6d9c80bSStephane Grosjean }; 134e6d9c80bSStephane Grosjean 135e6d9c80bSStephane Grosjean struct peak_pciec_card { 136e6d9c80bSStephane Grosjean void __iomem *cfg_base; /* Common for all channels */ 137e6d9c80bSStephane Grosjean void __iomem *reg_base; /* first channel base address */ 138e6d9c80bSStephane Grosjean u8 led_cache; /* leds state cache */ 139e6d9c80bSStephane Grosjean 140e6d9c80bSStephane Grosjean /* PCIExpressCard i2c data */ 141e6d9c80bSStephane Grosjean struct i2c_algo_bit_data i2c_bit; 142e6d9c80bSStephane Grosjean struct i2c_adapter led_chip; 143e6d9c80bSStephane Grosjean struct delayed_work led_work; /* led delayed work */ 144e6d9c80bSStephane Grosjean int chan_count; 145e6d9c80bSStephane Grosjean struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX]; 146e6d9c80bSStephane Grosjean }; 147e6d9c80bSStephane Grosjean 148e6d9c80bSStephane Grosjean /* "normal" pci register write callback is overloaded for leds control */ 149e6d9c80bSStephane Grosjean static void peak_pci_write_reg(const struct sja1000_priv *priv, 150e6d9c80bSStephane Grosjean int port, u8 val); 151e6d9c80bSStephane Grosjean 152e6d9c80bSStephane Grosjean static inline void pita_set_scl_highz(struct peak_pciec_card *card) 153e6d9c80bSStephane Grosjean { 154e6d9c80bSStephane Grosjean u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; 155e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 156e6d9c80bSStephane Grosjean } 157e6d9c80bSStephane Grosjean 158e6d9c80bSStephane Grosjean static inline void pita_set_sda_highz(struct peak_pciec_card *card) 159e6d9c80bSStephane Grosjean { 160e6d9c80bSStephane Grosjean u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; 161e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 162e6d9c80bSStephane Grosjean } 163e6d9c80bSStephane Grosjean 164e6d9c80bSStephane Grosjean static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card) 165e6d9c80bSStephane Grosjean { 166e6d9c80bSStephane Grosjean /* raise SCL & SDA GPIOs to high-Z */ 167e6d9c80bSStephane Grosjean pita_set_scl_highz(card); 168e6d9c80bSStephane Grosjean pita_set_sda_highz(card); 169e6d9c80bSStephane Grosjean } 170e6d9c80bSStephane Grosjean 171e6d9c80bSStephane Grosjean static void pita_setsda(void *data, int state) 172e6d9c80bSStephane Grosjean { 173e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 174e6d9c80bSStephane Grosjean u8 gp_out, gp_outen; 175e6d9c80bSStephane Grosjean 176e6d9c80bSStephane Grosjean /* set output sda always to 0 */ 177e6d9c80bSStephane Grosjean gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; 178e6d9c80bSStephane Grosjean writeb(gp_out, card->cfg_base + PITA_GPOUT); 179e6d9c80bSStephane Grosjean 180e6d9c80bSStephane Grosjean /* control output sda with GPOEN */ 181e6d9c80bSStephane Grosjean gp_outen = readb(card->cfg_base + PITA_GPOEN); 182e6d9c80bSStephane Grosjean if (state) 183e6d9c80bSStephane Grosjean gp_outen &= ~PITA_GPIN_SDA; 184e6d9c80bSStephane Grosjean else 185e6d9c80bSStephane Grosjean gp_outen |= PITA_GPIN_SDA; 186e6d9c80bSStephane Grosjean 187e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 188e6d9c80bSStephane Grosjean } 189e6d9c80bSStephane Grosjean 190e6d9c80bSStephane Grosjean static void pita_setscl(void *data, int state) 191e6d9c80bSStephane Grosjean { 192e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 193e6d9c80bSStephane Grosjean u8 gp_out, gp_outen; 194e6d9c80bSStephane Grosjean 195e6d9c80bSStephane Grosjean /* set output scl always to 0 */ 196e6d9c80bSStephane Grosjean gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; 197e6d9c80bSStephane Grosjean writeb(gp_out, card->cfg_base + PITA_GPOUT); 198e6d9c80bSStephane Grosjean 199e6d9c80bSStephane Grosjean /* control output scl with GPOEN */ 200e6d9c80bSStephane Grosjean gp_outen = readb(card->cfg_base + PITA_GPOEN); 201e6d9c80bSStephane Grosjean if (state) 202e6d9c80bSStephane Grosjean gp_outen &= ~PITA_GPIN_SCL; 203e6d9c80bSStephane Grosjean else 204e6d9c80bSStephane Grosjean gp_outen |= PITA_GPIN_SCL; 205e6d9c80bSStephane Grosjean 206e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 207e6d9c80bSStephane Grosjean } 208e6d9c80bSStephane Grosjean 209e6d9c80bSStephane Grosjean static int pita_getsda(void *data) 210e6d9c80bSStephane Grosjean { 211e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 212e6d9c80bSStephane Grosjean 213e6d9c80bSStephane Grosjean /* set tristate */ 214e6d9c80bSStephane Grosjean pita_set_sda_highz(card); 215e6d9c80bSStephane Grosjean 216e6d9c80bSStephane Grosjean return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; 217e6d9c80bSStephane Grosjean } 218e6d9c80bSStephane Grosjean 219e6d9c80bSStephane Grosjean static int pita_getscl(void *data) 220e6d9c80bSStephane Grosjean { 221e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 222e6d9c80bSStephane Grosjean 223e6d9c80bSStephane Grosjean /* set tristate */ 224e6d9c80bSStephane Grosjean pita_set_scl_highz(card); 225e6d9c80bSStephane Grosjean 226e6d9c80bSStephane Grosjean return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; 227e6d9c80bSStephane Grosjean } 228e6d9c80bSStephane Grosjean 229*9b69aff9SMarc Kleine-Budde /* write commands to the LED chip though the I2C-bus of the PCAN-PCIeC */ 230e6d9c80bSStephane Grosjean static int peak_pciec_write_pca9553(struct peak_pciec_card *card, 231e6d9c80bSStephane Grosjean u8 offset, u8 data) 232e6d9c80bSStephane Grosjean { 233e6d9c80bSStephane Grosjean u8 buffer[2] = { 234e6d9c80bSStephane Grosjean offset, 235e6d9c80bSStephane Grosjean data 236e6d9c80bSStephane Grosjean }; 237e6d9c80bSStephane Grosjean struct i2c_msg msg = { 238e6d9c80bSStephane Grosjean .addr = PCA9553_1_SLAVEADDR, 239e6d9c80bSStephane Grosjean .len = 2, 240e6d9c80bSStephane Grosjean .buf = buffer, 241e6d9c80bSStephane Grosjean }; 242e6d9c80bSStephane Grosjean int ret; 243e6d9c80bSStephane Grosjean 244e6d9c80bSStephane Grosjean /* cache led mask */ 245e6d9c80bSStephane Grosjean if ((offset == 5) && (data == card->led_cache)) 246e6d9c80bSStephane Grosjean return 0; 247e6d9c80bSStephane Grosjean 248e6d9c80bSStephane Grosjean ret = i2c_transfer(&card->led_chip, &msg, 1); 249e6d9c80bSStephane Grosjean if (ret < 0) 250e6d9c80bSStephane Grosjean return ret; 251e6d9c80bSStephane Grosjean 252e6d9c80bSStephane Grosjean if (offset == 5) 253e6d9c80bSStephane Grosjean card->led_cache = data; 254e6d9c80bSStephane Grosjean 255e6d9c80bSStephane Grosjean return 0; 256e6d9c80bSStephane Grosjean } 257e6d9c80bSStephane Grosjean 258*9b69aff9SMarc Kleine-Budde /* delayed work callback used to control the LEDs */ 259e6d9c80bSStephane Grosjean static void peak_pciec_led_work(struct work_struct *work) 260e6d9c80bSStephane Grosjean { 261e6d9c80bSStephane Grosjean struct peak_pciec_card *card = 262e6d9c80bSStephane Grosjean container_of(work, struct peak_pciec_card, led_work.work); 263e6d9c80bSStephane Grosjean struct net_device *netdev; 264e6d9c80bSStephane Grosjean u8 new_led = card->led_cache; 265e6d9c80bSStephane Grosjean int i, up_count = 0; 266e6d9c80bSStephane Grosjean 267e6d9c80bSStephane Grosjean /* first check what is to do */ 268e6d9c80bSStephane Grosjean for (i = 0; i < card->chan_count; i++) { 269e6d9c80bSStephane Grosjean /* default is: not configured */ 270e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 271e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_ON(i); 272e6d9c80bSStephane Grosjean 273e6d9c80bSStephane Grosjean netdev = card->channel[i].netdev; 274e6d9c80bSStephane Grosjean if (!netdev || !(netdev->flags & IFF_UP)) 275e6d9c80bSStephane Grosjean continue; 276e6d9c80bSStephane Grosjean 277e6d9c80bSStephane Grosjean up_count++; 278e6d9c80bSStephane Grosjean 279e6d9c80bSStephane Grosjean /* no activity (but configured) */ 280e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 281e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_SLOW(i); 282e6d9c80bSStephane Grosjean 283e6d9c80bSStephane Grosjean /* if bytes counters changed, set fast blinking led */ 284e6d9c80bSStephane Grosjean if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { 285e6d9c80bSStephane Grosjean card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; 286e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 287e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_FAST(i); 288e6d9c80bSStephane Grosjean } 289e6d9c80bSStephane Grosjean if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { 290e6d9c80bSStephane Grosjean card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; 291e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 292e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_FAST(i); 293e6d9c80bSStephane Grosjean } 294e6d9c80bSStephane Grosjean } 295e6d9c80bSStephane Grosjean 296e6d9c80bSStephane Grosjean /* check if LS0 settings changed, only update i2c if so */ 297e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, new_led); 298e6d9c80bSStephane Grosjean 299e6d9c80bSStephane Grosjean /* restart timer (except if no more configured channels) */ 300e6d9c80bSStephane Grosjean if (up_count) 301e6d9c80bSStephane Grosjean schedule_delayed_work(&card->led_work, HZ); 302e6d9c80bSStephane Grosjean } 303e6d9c80bSStephane Grosjean 304*9b69aff9SMarc Kleine-Budde /* set LEDs blinking state */ 305e6d9c80bSStephane Grosjean static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s) 306e6d9c80bSStephane Grosjean { 307e6d9c80bSStephane Grosjean u8 new_led = card->led_cache; 308e6d9c80bSStephane Grosjean int i; 309e6d9c80bSStephane Grosjean 310e6d9c80bSStephane Grosjean /* first check what is to do */ 311e6d9c80bSStephane Grosjean for (i = 0; i < card->chan_count; i++) 312e6d9c80bSStephane Grosjean if (led_mask & PCA9553_LED(i)) { 313e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 314e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_STATE(s, i); 315e6d9c80bSStephane Grosjean } 316e6d9c80bSStephane Grosjean 317e6d9c80bSStephane Grosjean /* check if LS0 settings changed, only update i2c if so */ 318e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, new_led); 319e6d9c80bSStephane Grosjean } 320e6d9c80bSStephane Grosjean 321*9b69aff9SMarc Kleine-Budde /* start one second delayed work to control LEDs */ 322e6d9c80bSStephane Grosjean static void peak_pciec_start_led_work(struct peak_pciec_card *card) 323e6d9c80bSStephane Grosjean { 324e6d9c80bSStephane Grosjean schedule_delayed_work(&card->led_work, HZ); 325e6d9c80bSStephane Grosjean } 326e6d9c80bSStephane Grosjean 327*9b69aff9SMarc Kleine-Budde /* stop LEDs delayed work */ 328e6d9c80bSStephane Grosjean static void peak_pciec_stop_led_work(struct peak_pciec_card *card) 329e6d9c80bSStephane Grosjean { 330e6d9c80bSStephane Grosjean cancel_delayed_work_sync(&card->led_work); 331e6d9c80bSStephane Grosjean } 332e6d9c80bSStephane Grosjean 333*9b69aff9SMarc Kleine-Budde /* initialize the PCA9553 4-bit I2C-bus LED chip */ 334e6d9c80bSStephane Grosjean static int peak_pciec_init_leds(struct peak_pciec_card *card) 335e6d9c80bSStephane Grosjean { 336e6d9c80bSStephane Grosjean int err; 337e6d9c80bSStephane Grosjean 338e6d9c80bSStephane Grosjean /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */ 339e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 1, 44 / 1); 340e6d9c80bSStephane Grosjean if (err) 341e6d9c80bSStephane Grosjean return err; 342e6d9c80bSStephane Grosjean 343e6d9c80bSStephane Grosjean /* duty cycle 0: 50% */ 344e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 2, 0x80); 345e6d9c80bSStephane Grosjean if (err) 346e6d9c80bSStephane Grosjean return err; 347e6d9c80bSStephane Grosjean 348e6d9c80bSStephane Grosjean /* prescaler for frequency 1: "FAST" = 5 Hz */ 349e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 3, 44 / 5); 350e6d9c80bSStephane Grosjean if (err) 351e6d9c80bSStephane Grosjean return err; 352e6d9c80bSStephane Grosjean 353e6d9c80bSStephane Grosjean /* duty cycle 1: 50% */ 354e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 4, 0x80); 355e6d9c80bSStephane Grosjean if (err) 356e6d9c80bSStephane Grosjean return err; 357e6d9c80bSStephane Grosjean 358e6d9c80bSStephane Grosjean /* switch LEDs to initial state */ 359e6d9c80bSStephane Grosjean return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT); 360e6d9c80bSStephane Grosjean } 361e6d9c80bSStephane Grosjean 362*9b69aff9SMarc Kleine-Budde /* restore LEDs state to off peak_pciec_leds_exit */ 363e6d9c80bSStephane Grosjean static void peak_pciec_leds_exit(struct peak_pciec_card *card) 364e6d9c80bSStephane Grosjean { 365e6d9c80bSStephane Grosjean /* switch LEDs to off */ 366e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL); 367e6d9c80bSStephane Grosjean } 368e6d9c80bSStephane Grosjean 369*9b69aff9SMarc Kleine-Budde /* normal write sja1000 register method overloaded to catch when controller 370e6d9c80bSStephane Grosjean * is started or stopped, to control leds 371e6d9c80bSStephane Grosjean */ 372e6d9c80bSStephane Grosjean static void peak_pciec_write_reg(const struct sja1000_priv *priv, 373e6d9c80bSStephane Grosjean int port, u8 val) 374e6d9c80bSStephane Grosjean { 375e6d9c80bSStephane Grosjean struct peak_pci_chan *chan = priv->priv; 376e6d9c80bSStephane Grosjean struct peak_pciec_card *card = chan->pciec_card; 377e6d9c80bSStephane Grosjean int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; 378e6d9c80bSStephane Grosjean 379e6d9c80bSStephane Grosjean /* sja1000 register changes control the leds state */ 38006e1d1d7SOliver Hartkopp if (port == SJA1000_MOD) 381e6d9c80bSStephane Grosjean switch (val) { 382e6d9c80bSStephane Grosjean case MOD_RM: 383e6d9c80bSStephane Grosjean /* Reset Mode: set led on */ 384e6d9c80bSStephane Grosjean peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON); 385e6d9c80bSStephane Grosjean break; 386e6d9c80bSStephane Grosjean case 0x00: 387e6d9c80bSStephane Grosjean /* Normal Mode: led slow blinking and start led timer */ 388e6d9c80bSStephane Grosjean peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW); 389e6d9c80bSStephane Grosjean peak_pciec_start_led_work(card); 390e6d9c80bSStephane Grosjean break; 391e6d9c80bSStephane Grosjean default: 392e6d9c80bSStephane Grosjean break; 393e6d9c80bSStephane Grosjean } 394e6d9c80bSStephane Grosjean 395e6d9c80bSStephane Grosjean /* call base function */ 396e6d9c80bSStephane Grosjean peak_pci_write_reg(priv, port, val); 397e6d9c80bSStephane Grosjean } 398e6d9c80bSStephane Grosjean 3991f0dee39SNishka Dasgupta static const struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = { 400e6d9c80bSStephane Grosjean .setsda = pita_setsda, 401e6d9c80bSStephane Grosjean .setscl = pita_setscl, 402e6d9c80bSStephane Grosjean .getsda = pita_getsda, 403e6d9c80bSStephane Grosjean .getscl = pita_getscl, 404e6d9c80bSStephane Grosjean .udelay = 10, 405e6d9c80bSStephane Grosjean .timeout = HZ, 406e6d9c80bSStephane Grosjean }; 407e6d9c80bSStephane Grosjean 408e6d9c80bSStephane Grosjean static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 409e6d9c80bSStephane Grosjean { 410e6d9c80bSStephane Grosjean struct sja1000_priv *priv = netdev_priv(dev); 411e6d9c80bSStephane Grosjean struct peak_pci_chan *chan = priv->priv; 412e6d9c80bSStephane Grosjean struct peak_pciec_card *card; 413e6d9c80bSStephane Grosjean int err; 414e6d9c80bSStephane Grosjean 415e6d9c80bSStephane Grosjean /* copy i2c object address from 1st channel */ 416e6d9c80bSStephane Grosjean if (chan->prev_dev) { 417e6d9c80bSStephane Grosjean struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev); 418e6d9c80bSStephane Grosjean struct peak_pci_chan *prev_chan = prev_priv->priv; 419e6d9c80bSStephane Grosjean 420e6d9c80bSStephane Grosjean card = prev_chan->pciec_card; 421e6d9c80bSStephane Grosjean if (!card) 422e6d9c80bSStephane Grosjean return -ENODEV; 423e6d9c80bSStephane Grosjean 424e6d9c80bSStephane Grosjean /* channel is the first one: do the init part */ 425e6d9c80bSStephane Grosjean } else { 426e6d9c80bSStephane Grosjean /* create the bit banging I2C adapter structure */ 427e6d9c80bSStephane Grosjean card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL); 42809da6c5fSJoe Perches if (!card) 429e6d9c80bSStephane Grosjean return -ENOMEM; 430e6d9c80bSStephane Grosjean 431e6d9c80bSStephane Grosjean card->cfg_base = chan->cfg_base; 432e6d9c80bSStephane Grosjean card->reg_base = priv->reg_base; 433e6d9c80bSStephane Grosjean 434e6d9c80bSStephane Grosjean card->led_chip.owner = THIS_MODULE; 435e6d9c80bSStephane Grosjean card->led_chip.dev.parent = &pdev->dev; 436e6d9c80bSStephane Grosjean card->led_chip.algo_data = &card->i2c_bit; 437e6d9c80bSStephane Grosjean strncpy(card->led_chip.name, "peak_i2c", 438e6d9c80bSStephane Grosjean sizeof(card->led_chip.name)); 439e6d9c80bSStephane Grosjean 440e6d9c80bSStephane Grosjean card->i2c_bit = peak_pciec_i2c_bit_ops; 441e6d9c80bSStephane Grosjean card->i2c_bit.udelay = 10; 442e6d9c80bSStephane Grosjean card->i2c_bit.timeout = HZ; 443e6d9c80bSStephane Grosjean card->i2c_bit.data = card; 444e6d9c80bSStephane Grosjean 445e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card); 446e6d9c80bSStephane Grosjean 447e6d9c80bSStephane Grosjean err = i2c_bit_add_bus(&card->led_chip); 448e6d9c80bSStephane Grosjean if (err) { 449e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "i2c init failed\n"); 450e6d9c80bSStephane Grosjean goto pciec_init_err_1; 451e6d9c80bSStephane Grosjean } 452e6d9c80bSStephane Grosjean 453e6d9c80bSStephane Grosjean err = peak_pciec_init_leds(card); 454e6d9c80bSStephane Grosjean if (err) { 455e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "leds hardware init failed\n"); 456e6d9c80bSStephane Grosjean goto pciec_init_err_2; 457e6d9c80bSStephane Grosjean } 458e6d9c80bSStephane Grosjean 459e6d9c80bSStephane Grosjean INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work); 460e6d9c80bSStephane Grosjean /* PCAN-ExpressCard needs its own callback for leds */ 461e6d9c80bSStephane Grosjean priv->write_reg = peak_pciec_write_reg; 462e6d9c80bSStephane Grosjean } 463e6d9c80bSStephane Grosjean 464e6d9c80bSStephane Grosjean chan->pciec_card = card; 465e6d9c80bSStephane Grosjean card->channel[card->chan_count++].netdev = dev; 466e6d9c80bSStephane Grosjean 467e6d9c80bSStephane Grosjean return 0; 468e6d9c80bSStephane Grosjean 469e6d9c80bSStephane Grosjean pciec_init_err_2: 470e6d9c80bSStephane Grosjean i2c_del_adapter(&card->led_chip); 471e6d9c80bSStephane Grosjean 472e6d9c80bSStephane Grosjean pciec_init_err_1: 473e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card); 474e6d9c80bSStephane Grosjean kfree(card); 475e6d9c80bSStephane Grosjean 476e6d9c80bSStephane Grosjean return err; 477e6d9c80bSStephane Grosjean } 478e6d9c80bSStephane Grosjean 479e6d9c80bSStephane Grosjean static void peak_pciec_remove(struct peak_pciec_card *card) 480e6d9c80bSStephane Grosjean { 481e6d9c80bSStephane Grosjean peak_pciec_stop_led_work(card); 482e6d9c80bSStephane Grosjean peak_pciec_leds_exit(card); 483e6d9c80bSStephane Grosjean i2c_del_adapter(&card->led_chip); 484e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card); 485e6d9c80bSStephane Grosjean kfree(card); 486e6d9c80bSStephane Grosjean } 487e6d9c80bSStephane Grosjean 488e6d9c80bSStephane Grosjean #else /* CONFIG_CAN_PEAK_PCIEC */ 489e6d9c80bSStephane Grosjean 490*9b69aff9SMarc Kleine-Budde /* Placebo functions when PCAN-ExpressCard support is not selected */ 491e6d9c80bSStephane Grosjean static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 492e6d9c80bSStephane Grosjean { 493e6d9c80bSStephane Grosjean return -ENODEV; 494e6d9c80bSStephane Grosjean } 495e6d9c80bSStephane Grosjean 496e6d9c80bSStephane Grosjean static inline void peak_pciec_remove(struct peak_pciec_card *card) 497e6d9c80bSStephane Grosjean { 498e6d9c80bSStephane Grosjean } 499e6d9c80bSStephane Grosjean #endif /* CONFIG_CAN_PEAK_PCIEC */ 500e6d9c80bSStephane Grosjean 50138034518SWolfgang Grandegger static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) 50238034518SWolfgang Grandegger { 50338034518SWolfgang Grandegger return readb(priv->reg_base + (port << 2)); 50438034518SWolfgang Grandegger } 50538034518SWolfgang Grandegger 50638034518SWolfgang Grandegger static void peak_pci_write_reg(const struct sja1000_priv *priv, 50738034518SWolfgang Grandegger int port, u8 val) 50838034518SWolfgang Grandegger { 50938034518SWolfgang Grandegger writeb(val, priv->reg_base + (port << 2)); 51038034518SWolfgang Grandegger } 51138034518SWolfgang Grandegger 51238034518SWolfgang Grandegger static void peak_pci_post_irq(const struct sja1000_priv *priv) 51338034518SWolfgang Grandegger { 51438034518SWolfgang Grandegger struct peak_pci_chan *chan = priv->priv; 51538034518SWolfgang Grandegger u16 icr; 51638034518SWolfgang Grandegger 51738034518SWolfgang Grandegger /* Select and clear in PITA stored interrupt */ 51838034518SWolfgang Grandegger icr = readw(chan->cfg_base + PITA_ICR); 51938034518SWolfgang Grandegger if (icr & chan->icr_mask) 52038034518SWolfgang Grandegger writew(chan->icr_mask, chan->cfg_base + PITA_ICR); 52138034518SWolfgang Grandegger } 52238034518SWolfgang Grandegger 5231dd06ae8SGreg Kroah-Hartman static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 52438034518SWolfgang Grandegger { 52538034518SWolfgang Grandegger struct sja1000_priv *priv; 52638034518SWolfgang Grandegger struct peak_pci_chan *chan; 5270b5a958cSStephane Grosjean struct net_device *dev, *prev_dev; 52838034518SWolfgang Grandegger void __iomem *cfg_base, *reg_base; 52938034518SWolfgang Grandegger u16 sub_sys_id, icr; 53038034518SWolfgang Grandegger int i, err, channels; 53138034518SWolfgang Grandegger 53238034518SWolfgang Grandegger err = pci_enable_device(pdev); 53338034518SWolfgang Grandegger if (err) 53438034518SWolfgang Grandegger return err; 53538034518SWolfgang Grandegger 53638034518SWolfgang Grandegger err = pci_request_regions(pdev, DRV_NAME); 53738034518SWolfgang Grandegger if (err) 53838034518SWolfgang Grandegger goto failure_disable_pci; 53938034518SWolfgang Grandegger 54038034518SWolfgang Grandegger err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); 54138034518SWolfgang Grandegger if (err) 54238034518SWolfgang Grandegger goto failure_release_regions; 54338034518SWolfgang Grandegger 54438034518SWolfgang Grandegger dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", 54538034518SWolfgang Grandegger pdev->vendor, pdev->device, sub_sys_id); 54638034518SWolfgang Grandegger 54738034518SWolfgang Grandegger err = pci_write_config_word(pdev, 0x44, 0); 54838034518SWolfgang Grandegger if (err) 54938034518SWolfgang Grandegger goto failure_release_regions; 55038034518SWolfgang Grandegger 55138034518SWolfgang Grandegger if (sub_sys_id >= 12) 55238034518SWolfgang Grandegger channels = 4; 55338034518SWolfgang Grandegger else if (sub_sys_id >= 10) 55438034518SWolfgang Grandegger channels = 3; 55538034518SWolfgang Grandegger else if (sub_sys_id >= 4) 55638034518SWolfgang Grandegger channels = 2; 55738034518SWolfgang Grandegger else 55838034518SWolfgang Grandegger channels = 1; 55938034518SWolfgang Grandegger 56038034518SWolfgang Grandegger cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); 56138034518SWolfgang Grandegger if (!cfg_base) { 56238034518SWolfgang Grandegger dev_err(&pdev->dev, "failed to map PCI resource #0\n"); 5634a4bfdcdSPeter Senna Tschudin err = -ENOMEM; 56438034518SWolfgang Grandegger goto failure_release_regions; 56538034518SWolfgang Grandegger } 56638034518SWolfgang Grandegger 56738034518SWolfgang Grandegger reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); 56838034518SWolfgang Grandegger if (!reg_base) { 56938034518SWolfgang Grandegger dev_err(&pdev->dev, "failed to map PCI resource #1\n"); 5704a4bfdcdSPeter Senna Tschudin err = -ENOMEM; 57138034518SWolfgang Grandegger goto failure_unmap_cfg_base; 57238034518SWolfgang Grandegger } 57338034518SWolfgang Grandegger 57438034518SWolfgang Grandegger /* Set GPIO control register */ 57538034518SWolfgang Grandegger writew(0x0005, cfg_base + PITA_GPIOICR + 2); 57638034518SWolfgang Grandegger /* Enable all channels of this card */ 57738034518SWolfgang Grandegger writeb(0x00, cfg_base + PITA_GPIOICR); 57838034518SWolfgang Grandegger /* Toggle reset */ 57938034518SWolfgang Grandegger writeb(0x05, cfg_base + PITA_MISC + 3); 580276b7361SJia-Ju Bai usleep_range(5000, 6000); 58138034518SWolfgang Grandegger /* Leave parport mux mode */ 58238034518SWolfgang Grandegger writeb(0x04, cfg_base + PITA_MISC + 3); 58338034518SWolfgang Grandegger 58438034518SWolfgang Grandegger icr = readw(cfg_base + PITA_ICR + 2); 58538034518SWolfgang Grandegger 58638034518SWolfgang Grandegger for (i = 0; i < channels; i++) { 58738034518SWolfgang Grandegger dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); 58838034518SWolfgang Grandegger if (!dev) { 58938034518SWolfgang Grandegger err = -ENOMEM; 59038034518SWolfgang Grandegger goto failure_remove_channels; 59138034518SWolfgang Grandegger } 59238034518SWolfgang Grandegger 59338034518SWolfgang Grandegger priv = netdev_priv(dev); 59438034518SWolfgang Grandegger chan = priv->priv; 59538034518SWolfgang Grandegger 59638034518SWolfgang Grandegger chan->cfg_base = cfg_base; 59738034518SWolfgang Grandegger priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; 59838034518SWolfgang Grandegger 59938034518SWolfgang Grandegger priv->read_reg = peak_pci_read_reg; 60038034518SWolfgang Grandegger priv->write_reg = peak_pci_write_reg; 60138034518SWolfgang Grandegger priv->post_irq = peak_pci_post_irq; 60238034518SWolfgang Grandegger 60338034518SWolfgang Grandegger priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; 60438034518SWolfgang Grandegger priv->ocr = PEAK_PCI_OCR; 60538034518SWolfgang Grandegger priv->cdr = PEAK_PCI_CDR; 60638034518SWolfgang Grandegger /* Neither a slave nor a single device distributes the clock */ 60738034518SWolfgang Grandegger if (channels == 1 || i > 0) 60838034518SWolfgang Grandegger priv->cdr |= CDR_CLK_OFF; 60938034518SWolfgang Grandegger 61038034518SWolfgang Grandegger /* Setup interrupt handling */ 61138034518SWolfgang Grandegger priv->irq_flags = IRQF_SHARED; 61238034518SWolfgang Grandegger dev->irq = pdev->irq; 61338034518SWolfgang Grandegger 61438034518SWolfgang Grandegger chan->icr_mask = peak_pci_icr_masks[i]; 61538034518SWolfgang Grandegger icr |= chan->icr_mask; 61638034518SWolfgang Grandegger 61738034518SWolfgang Grandegger SET_NETDEV_DEV(dev, &pdev->dev); 6183e66d013SChristopher R. Baker dev->dev_id = i; 61938034518SWolfgang Grandegger 62038034518SWolfgang Grandegger /* Create chain of SJA1000 devices */ 62129830406SStephane Grosjean chan->prev_dev = pci_get_drvdata(pdev); 62229830406SStephane Grosjean pci_set_drvdata(pdev, dev); 62338034518SWolfgang Grandegger 624*9b69aff9SMarc Kleine-Budde /* PCAN-ExpressCard needs some additional i2c init. 625e6d9c80bSStephane Grosjean * This must be done *before* register_sja1000dev() but 626e6d9c80bSStephane Grosjean * *after* devices linkage 627e6d9c80bSStephane Grosjean */ 6284be0015cSOliver Hartkopp if (pdev->device == PEAK_PCIEC_DEVICE_ID || 6294be0015cSOliver Hartkopp pdev->device == PEAK_PCIEC34_DEVICE_ID) { 630e6d9c80bSStephane Grosjean err = peak_pciec_probe(pdev, dev); 631e6d9c80bSStephane Grosjean if (err) { 632e6d9c80bSStephane Grosjean dev_err(&pdev->dev, 633e6d9c80bSStephane Grosjean "failed to probe device (err %d)\n", 634e6d9c80bSStephane Grosjean err); 635e6d9c80bSStephane Grosjean goto failure_free_dev; 636e6d9c80bSStephane Grosjean } 637e6d9c80bSStephane Grosjean } 638e6d9c80bSStephane Grosjean 639e6d9c80bSStephane Grosjean err = register_sja1000dev(dev); 640e6d9c80bSStephane Grosjean if (err) { 641e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "failed to register device\n"); 642e6d9c80bSStephane Grosjean goto failure_free_dev; 643e6d9c80bSStephane Grosjean } 644e6d9c80bSStephane Grosjean 64538034518SWolfgang Grandegger dev_info(&pdev->dev, 64638034518SWolfgang Grandegger "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", 64738034518SWolfgang Grandegger dev->name, priv->reg_base, chan->cfg_base, dev->irq); 64838034518SWolfgang Grandegger } 64938034518SWolfgang Grandegger 65038034518SWolfgang Grandegger /* Enable interrupts */ 65138034518SWolfgang Grandegger writew(icr, cfg_base + PITA_ICR + 2); 65238034518SWolfgang Grandegger 65338034518SWolfgang Grandegger return 0; 65438034518SWolfgang Grandegger 655e6d9c80bSStephane Grosjean failure_free_dev: 656e6d9c80bSStephane Grosjean pci_set_drvdata(pdev, chan->prev_dev); 657e6d9c80bSStephane Grosjean free_sja1000dev(dev); 658e6d9c80bSStephane Grosjean 65938034518SWolfgang Grandegger failure_remove_channels: 66038034518SWolfgang Grandegger /* Disable interrupts */ 66138034518SWolfgang Grandegger writew(0x0, cfg_base + PITA_ICR + 2); 66238034518SWolfgang Grandegger 663e6d9c80bSStephane Grosjean chan = NULL; 6640b5a958cSStephane Grosjean for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) { 66538034518SWolfgang Grandegger priv = netdev_priv(dev); 66638034518SWolfgang Grandegger chan = priv->priv; 6670b5a958cSStephane Grosjean prev_dev = chan->prev_dev; 6680b5a958cSStephane Grosjean 6690b5a958cSStephane Grosjean unregister_sja1000dev(dev); 6700b5a958cSStephane Grosjean free_sja1000dev(dev); 67138034518SWolfgang Grandegger } 67238034518SWolfgang Grandegger 673e6d9c80bSStephane Grosjean /* free any PCIeC resources too */ 674e6d9c80bSStephane Grosjean if (chan && chan->pciec_card) 675e6d9c80bSStephane Grosjean peak_pciec_remove(chan->pciec_card); 676e6d9c80bSStephane Grosjean 67738034518SWolfgang Grandegger pci_iounmap(pdev, reg_base); 67838034518SWolfgang Grandegger 67938034518SWolfgang Grandegger failure_unmap_cfg_base: 68038034518SWolfgang Grandegger pci_iounmap(pdev, cfg_base); 68138034518SWolfgang Grandegger 68238034518SWolfgang Grandegger failure_release_regions: 68338034518SWolfgang Grandegger pci_release_regions(pdev); 68438034518SWolfgang Grandegger 68538034518SWolfgang Grandegger failure_disable_pci: 68638034518SWolfgang Grandegger pci_disable_device(pdev); 68738034518SWolfgang Grandegger 6885c2cb02eSStephane Grosjean /* pci_xxx_config_word() return positive PCIBIOS_xxx error codes while 6895c2cb02eSStephane Grosjean * the probe() function must return a negative errno in case of failure 690*9b69aff9SMarc Kleine-Budde * (err is unchanged if negative) 691*9b69aff9SMarc Kleine-Budde */ 6925c2cb02eSStephane Grosjean return pcibios_err_to_errno(err); 69338034518SWolfgang Grandegger } 69438034518SWolfgang Grandegger 6953c8ac0f2SBill Pemberton static void peak_pci_remove(struct pci_dev *pdev) 69638034518SWolfgang Grandegger { 69729830406SStephane Grosjean struct net_device *dev = pci_get_drvdata(pdev); /* Last device */ 69838034518SWolfgang Grandegger struct sja1000_priv *priv = netdev_priv(dev); 69938034518SWolfgang Grandegger struct peak_pci_chan *chan = priv->priv; 70038034518SWolfgang Grandegger void __iomem *cfg_base = chan->cfg_base; 70138034518SWolfgang Grandegger void __iomem *reg_base = priv->reg_base; 70238034518SWolfgang Grandegger 70338034518SWolfgang Grandegger /* Disable interrupts */ 70438034518SWolfgang Grandegger writew(0x0, cfg_base + PITA_ICR + 2); 70538034518SWolfgang Grandegger 70638034518SWolfgang Grandegger /* Loop over all registered devices */ 70738034518SWolfgang Grandegger while (1) { 7080b5a958cSStephane Grosjean struct net_device *prev_dev = chan->prev_dev; 7090b5a958cSStephane Grosjean 71038034518SWolfgang Grandegger dev_info(&pdev->dev, "removing device %s\n", dev->name); 71138034518SWolfgang Grandegger unregister_sja1000dev(dev); 71238034518SWolfgang Grandegger free_sja1000dev(dev); 7130b5a958cSStephane Grosjean dev = prev_dev; 714e6d9c80bSStephane Grosjean 715e6d9c80bSStephane Grosjean if (!dev) { 716e6d9c80bSStephane Grosjean /* do that only for first channel */ 717e6d9c80bSStephane Grosjean if (chan->pciec_card) 718e6d9c80bSStephane Grosjean peak_pciec_remove(chan->pciec_card); 71938034518SWolfgang Grandegger break; 720e6d9c80bSStephane Grosjean } 72138034518SWolfgang Grandegger priv = netdev_priv(dev); 72238034518SWolfgang Grandegger chan = priv->priv; 72338034518SWolfgang Grandegger } 72438034518SWolfgang Grandegger 72538034518SWolfgang Grandegger pci_iounmap(pdev, reg_base); 72638034518SWolfgang Grandegger pci_iounmap(pdev, cfg_base); 72738034518SWolfgang Grandegger pci_release_regions(pdev); 72838034518SWolfgang Grandegger pci_disable_device(pdev); 72938034518SWolfgang Grandegger } 73038034518SWolfgang Grandegger 73138034518SWolfgang Grandegger static struct pci_driver peak_pci_driver = { 73238034518SWolfgang Grandegger .name = DRV_NAME, 73338034518SWolfgang Grandegger .id_table = peak_pci_tbl, 73438034518SWolfgang Grandegger .probe = peak_pci_probe, 7353c8ac0f2SBill Pemberton .remove = peak_pci_remove, 73638034518SWolfgang Grandegger }; 73738034518SWolfgang Grandegger 738fb7944b3SAxel Lin module_pci_driver(peak_pci_driver); 739