138034518SWolfgang Grandegger /* 238034518SWolfgang Grandegger * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> 3e6d9c80bSStephane Grosjean * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> 438034518SWolfgang Grandegger * 538034518SWolfgang Grandegger * Derived from the PCAN project file driver/src/pcan_pci.c: 638034518SWolfgang Grandegger * 738034518SWolfgang Grandegger * Copyright (C) 2001-2006 PEAK System-Technik GmbH 838034518SWolfgang Grandegger * 938034518SWolfgang Grandegger * This program is free software; you can redistribute it and/or modify 1038034518SWolfgang Grandegger * it under the terms of the version 2 of the GNU General Public License 1138034518SWolfgang Grandegger * as published by the Free Software Foundation 1238034518SWolfgang Grandegger * 1338034518SWolfgang Grandegger * This program is distributed in the hope that it will be useful, 1438034518SWolfgang Grandegger * but WITHOUT ANY WARRANTY; without even the implied warranty of 1538034518SWolfgang Grandegger * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1638034518SWolfgang Grandegger * GNU General Public License for more details. 1738034518SWolfgang Grandegger */ 1838034518SWolfgang Grandegger 1938034518SWolfgang Grandegger #include <linux/kernel.h> 2038034518SWolfgang Grandegger #include <linux/module.h> 2138034518SWolfgang Grandegger #include <linux/interrupt.h> 2238034518SWolfgang Grandegger #include <linux/netdevice.h> 2338034518SWolfgang Grandegger #include <linux/delay.h> 2438034518SWolfgang Grandegger #include <linux/pci.h> 2538034518SWolfgang Grandegger #include <linux/io.h> 26e6d9c80bSStephane Grosjean #include <linux/i2c.h> 27e6d9c80bSStephane Grosjean #include <linux/i2c-algo-bit.h> 2838034518SWolfgang Grandegger #include <linux/can.h> 2938034518SWolfgang Grandegger #include <linux/can/dev.h> 3038034518SWolfgang Grandegger 3138034518SWolfgang Grandegger #include "sja1000.h" 3238034518SWolfgang Grandegger 33fc09e367SStephane Grosjean MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>"); 34e6d9c80bSStephane Grosjean MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); 35e6d9c80bSStephane Grosjean MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards"); 36fc09e367SStephane Grosjean MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards"); 3738034518SWolfgang Grandegger MODULE_LICENSE("GPL v2"); 3838034518SWolfgang Grandegger 3938034518SWolfgang Grandegger #define DRV_NAME "peak_pci" 4038034518SWolfgang Grandegger 41e6d9c80bSStephane Grosjean struct peak_pciec_card; 4238034518SWolfgang Grandegger struct peak_pci_chan { 4338034518SWolfgang Grandegger void __iomem *cfg_base; /* Common for all channels */ 4429830406SStephane Grosjean struct net_device *prev_dev; /* Chain of network devices */ 4538034518SWolfgang Grandegger u16 icr_mask; /* Interrupt mask for fast ack */ 46e6d9c80bSStephane Grosjean struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */ 4738034518SWolfgang Grandegger }; 4838034518SWolfgang Grandegger 4938034518SWolfgang Grandegger #define PEAK_PCI_CAN_CLOCK (16000000 / 2) 5038034518SWolfgang Grandegger 5138034518SWolfgang Grandegger #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) 5238034518SWolfgang Grandegger #define PEAK_PCI_OCR OCR_TX0_PUSHPULL 5338034518SWolfgang Grandegger 5438034518SWolfgang Grandegger /* 5538034518SWolfgang Grandegger * Important PITA registers 5638034518SWolfgang Grandegger */ 5738034518SWolfgang Grandegger #define PITA_ICR 0x00 /* Interrupt control register */ 5838034518SWolfgang Grandegger #define PITA_GPIOICR 0x18 /* GPIO interface control register */ 5938034518SWolfgang Grandegger #define PITA_MISC 0x1C /* Miscellaneous register */ 6038034518SWolfgang Grandegger 6138034518SWolfgang Grandegger #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ 6238034518SWolfgang Grandegger #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ 6338034518SWolfgang Grandegger 6438034518SWolfgang Grandegger #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ 6538034518SWolfgang Grandegger #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ 66e6d9c80bSStephane Grosjean #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */ 67e6d9c80bSStephane Grosjean #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */ 68fc09e367SStephane Grosjean #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */ 69fc09e367SStephane Grosjean #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */ 70fc09e367SStephane Grosjean #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */ 71fc09e367SStephane Grosjean #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */ 72fc09e367SStephane Grosjean #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */ 73*4be0015cSOliver Hartkopp #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */ 74*4be0015cSOliver Hartkopp #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */ 7538034518SWolfgang Grandegger 76e6d9c80bSStephane Grosjean #define PEAK_PCI_CHAN_MAX 4 77e6d9c80bSStephane Grosjean 78e6d9c80bSStephane Grosjean static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = { 79e6d9c80bSStephane Grosjean 0x02, 0x01, 0x40, 0x80 80e6d9c80bSStephane Grosjean }; 8138034518SWolfgang Grandegger 829baa3c34SBenoit Taine static const struct pci_device_id peak_pci_tbl[] = { 8338034518SWolfgang Grandegger {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 84e6d9c80bSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 85e6d9c80bSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 86fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 87fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 88fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 89fc09e367SStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 90e6d9c80bSStephane Grosjean #ifdef CONFIG_CAN_PEAK_PCIEC 91e6d9c80bSStephane Grosjean {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 92*4be0015cSOliver Hartkopp {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, 93e6d9c80bSStephane Grosjean #endif 9438034518SWolfgang Grandegger {0,} 9538034518SWolfgang Grandegger }; 9638034518SWolfgang Grandegger 9738034518SWolfgang Grandegger MODULE_DEVICE_TABLE(pci, peak_pci_tbl); 9838034518SWolfgang Grandegger 99e6d9c80bSStephane Grosjean #ifdef CONFIG_CAN_PEAK_PCIEC 100e6d9c80bSStephane Grosjean /* 101e6d9c80bSStephane Grosjean * PCAN-ExpressCard needs I2C bit-banging configuration option. 102e6d9c80bSStephane Grosjean */ 103e6d9c80bSStephane Grosjean 104e6d9c80bSStephane Grosjean /* GPIOICR byte access offsets */ 105e6d9c80bSStephane Grosjean #define PITA_GPOUT 0x18 /* GPx output value */ 106e6d9c80bSStephane Grosjean #define PITA_GPIN 0x19 /* GPx input value */ 107e6d9c80bSStephane Grosjean #define PITA_GPOEN 0x1A /* configure GPx as ouput pin */ 108e6d9c80bSStephane Grosjean 109e6d9c80bSStephane Grosjean /* I2C GP bits */ 110e6d9c80bSStephane Grosjean #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */ 111e6d9c80bSStephane Grosjean #define PITA_GPIN_SDA 0x04 /* Serial DAta line */ 112e6d9c80bSStephane Grosjean 113e6d9c80bSStephane Grosjean #define PCA9553_1_SLAVEADDR (0xC4 >> 1) 114e6d9c80bSStephane Grosjean 115e6d9c80bSStephane Grosjean /* PCA9553 LS0 fields values */ 116e6d9c80bSStephane Grosjean enum { 117e6d9c80bSStephane Grosjean PCA9553_LOW, 118e6d9c80bSStephane Grosjean PCA9553_HIGHZ, 119e6d9c80bSStephane Grosjean PCA9553_PWM0, 120e6d9c80bSStephane Grosjean PCA9553_PWM1 121e6d9c80bSStephane Grosjean }; 122e6d9c80bSStephane Grosjean 123e6d9c80bSStephane Grosjean /* LEDs control */ 124e6d9c80bSStephane Grosjean #define PCA9553_ON PCA9553_LOW 125e6d9c80bSStephane Grosjean #define PCA9553_OFF PCA9553_HIGHZ 126e6d9c80bSStephane Grosjean #define PCA9553_SLOW PCA9553_PWM0 127e6d9c80bSStephane Grosjean #define PCA9553_FAST PCA9553_PWM1 128e6d9c80bSStephane Grosjean 129e6d9c80bSStephane Grosjean #define PCA9553_LED(c) (1 << (c)) 130e6d9c80bSStephane Grosjean #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1)) 131e6d9c80bSStephane Grosjean 132e6d9c80bSStephane Grosjean #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c) 133e6d9c80bSStephane Grosjean #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c) 134e6d9c80bSStephane Grosjean #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c) 135e6d9c80bSStephane Grosjean #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c) 136e6d9c80bSStephane Grosjean #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c) 137e6d9c80bSStephane Grosjean 138e6d9c80bSStephane Grosjean #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1)) 139e6d9c80bSStephane Grosjean 140e6d9c80bSStephane Grosjean #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */ 141e6d9c80bSStephane Grosjean 142e6d9c80bSStephane Grosjean struct peak_pciec_chan { 143e6d9c80bSStephane Grosjean struct net_device *netdev; 144e6d9c80bSStephane Grosjean unsigned long prev_rx_bytes; 145e6d9c80bSStephane Grosjean unsigned long prev_tx_bytes; 146e6d9c80bSStephane Grosjean }; 147e6d9c80bSStephane Grosjean 148e6d9c80bSStephane Grosjean struct peak_pciec_card { 149e6d9c80bSStephane Grosjean void __iomem *cfg_base; /* Common for all channels */ 150e6d9c80bSStephane Grosjean void __iomem *reg_base; /* first channel base address */ 151e6d9c80bSStephane Grosjean u8 led_cache; /* leds state cache */ 152e6d9c80bSStephane Grosjean 153e6d9c80bSStephane Grosjean /* PCIExpressCard i2c data */ 154e6d9c80bSStephane Grosjean struct i2c_algo_bit_data i2c_bit; 155e6d9c80bSStephane Grosjean struct i2c_adapter led_chip; 156e6d9c80bSStephane Grosjean struct delayed_work led_work; /* led delayed work */ 157e6d9c80bSStephane Grosjean int chan_count; 158e6d9c80bSStephane Grosjean struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX]; 159e6d9c80bSStephane Grosjean }; 160e6d9c80bSStephane Grosjean 161e6d9c80bSStephane Grosjean /* "normal" pci register write callback is overloaded for leds control */ 162e6d9c80bSStephane Grosjean static void peak_pci_write_reg(const struct sja1000_priv *priv, 163e6d9c80bSStephane Grosjean int port, u8 val); 164e6d9c80bSStephane Grosjean 165e6d9c80bSStephane Grosjean static inline void pita_set_scl_highz(struct peak_pciec_card *card) 166e6d9c80bSStephane Grosjean { 167e6d9c80bSStephane Grosjean u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; 168e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 169e6d9c80bSStephane Grosjean } 170e6d9c80bSStephane Grosjean 171e6d9c80bSStephane Grosjean static inline void pita_set_sda_highz(struct peak_pciec_card *card) 172e6d9c80bSStephane Grosjean { 173e6d9c80bSStephane Grosjean u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; 174e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 175e6d9c80bSStephane Grosjean } 176e6d9c80bSStephane Grosjean 177e6d9c80bSStephane Grosjean static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card) 178e6d9c80bSStephane Grosjean { 179e6d9c80bSStephane Grosjean /* raise SCL & SDA GPIOs to high-Z */ 180e6d9c80bSStephane Grosjean pita_set_scl_highz(card); 181e6d9c80bSStephane Grosjean pita_set_sda_highz(card); 182e6d9c80bSStephane Grosjean } 183e6d9c80bSStephane Grosjean 184e6d9c80bSStephane Grosjean static void pita_setsda(void *data, int state) 185e6d9c80bSStephane Grosjean { 186e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 187e6d9c80bSStephane Grosjean u8 gp_out, gp_outen; 188e6d9c80bSStephane Grosjean 189e6d9c80bSStephane Grosjean /* set output sda always to 0 */ 190e6d9c80bSStephane Grosjean gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; 191e6d9c80bSStephane Grosjean writeb(gp_out, card->cfg_base + PITA_GPOUT); 192e6d9c80bSStephane Grosjean 193e6d9c80bSStephane Grosjean /* control output sda with GPOEN */ 194e6d9c80bSStephane Grosjean gp_outen = readb(card->cfg_base + PITA_GPOEN); 195e6d9c80bSStephane Grosjean if (state) 196e6d9c80bSStephane Grosjean gp_outen &= ~PITA_GPIN_SDA; 197e6d9c80bSStephane Grosjean else 198e6d9c80bSStephane Grosjean gp_outen |= PITA_GPIN_SDA; 199e6d9c80bSStephane Grosjean 200e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 201e6d9c80bSStephane Grosjean } 202e6d9c80bSStephane Grosjean 203e6d9c80bSStephane Grosjean static void pita_setscl(void *data, int state) 204e6d9c80bSStephane Grosjean { 205e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 206e6d9c80bSStephane Grosjean u8 gp_out, gp_outen; 207e6d9c80bSStephane Grosjean 208e6d9c80bSStephane Grosjean /* set output scl always to 0 */ 209e6d9c80bSStephane Grosjean gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; 210e6d9c80bSStephane Grosjean writeb(gp_out, card->cfg_base + PITA_GPOUT); 211e6d9c80bSStephane Grosjean 212e6d9c80bSStephane Grosjean /* control output scl with GPOEN */ 213e6d9c80bSStephane Grosjean gp_outen = readb(card->cfg_base + PITA_GPOEN); 214e6d9c80bSStephane Grosjean if (state) 215e6d9c80bSStephane Grosjean gp_outen &= ~PITA_GPIN_SCL; 216e6d9c80bSStephane Grosjean else 217e6d9c80bSStephane Grosjean gp_outen |= PITA_GPIN_SCL; 218e6d9c80bSStephane Grosjean 219e6d9c80bSStephane Grosjean writeb(gp_outen, card->cfg_base + PITA_GPOEN); 220e6d9c80bSStephane Grosjean } 221e6d9c80bSStephane Grosjean 222e6d9c80bSStephane Grosjean static int pita_getsda(void *data) 223e6d9c80bSStephane Grosjean { 224e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 225e6d9c80bSStephane Grosjean 226e6d9c80bSStephane Grosjean /* set tristate */ 227e6d9c80bSStephane Grosjean pita_set_sda_highz(card); 228e6d9c80bSStephane Grosjean 229e6d9c80bSStephane Grosjean return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; 230e6d9c80bSStephane Grosjean } 231e6d9c80bSStephane Grosjean 232e6d9c80bSStephane Grosjean static int pita_getscl(void *data) 233e6d9c80bSStephane Grosjean { 234e6d9c80bSStephane Grosjean struct peak_pciec_card *card = (struct peak_pciec_card *)data; 235e6d9c80bSStephane Grosjean 236e6d9c80bSStephane Grosjean /* set tristate */ 237e6d9c80bSStephane Grosjean pita_set_scl_highz(card); 238e6d9c80bSStephane Grosjean 239e6d9c80bSStephane Grosjean return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; 240e6d9c80bSStephane Grosjean } 241e6d9c80bSStephane Grosjean 242e6d9c80bSStephane Grosjean /* 243e6d9c80bSStephane Grosjean * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC 244e6d9c80bSStephane Grosjean */ 245e6d9c80bSStephane Grosjean static int peak_pciec_write_pca9553(struct peak_pciec_card *card, 246e6d9c80bSStephane Grosjean u8 offset, u8 data) 247e6d9c80bSStephane Grosjean { 248e6d9c80bSStephane Grosjean u8 buffer[2] = { 249e6d9c80bSStephane Grosjean offset, 250e6d9c80bSStephane Grosjean data 251e6d9c80bSStephane Grosjean }; 252e6d9c80bSStephane Grosjean struct i2c_msg msg = { 253e6d9c80bSStephane Grosjean .addr = PCA9553_1_SLAVEADDR, 254e6d9c80bSStephane Grosjean .len = 2, 255e6d9c80bSStephane Grosjean .buf = buffer, 256e6d9c80bSStephane Grosjean }; 257e6d9c80bSStephane Grosjean int ret; 258e6d9c80bSStephane Grosjean 259e6d9c80bSStephane Grosjean /* cache led mask */ 260e6d9c80bSStephane Grosjean if ((offset == 5) && (data == card->led_cache)) 261e6d9c80bSStephane Grosjean return 0; 262e6d9c80bSStephane Grosjean 263e6d9c80bSStephane Grosjean ret = i2c_transfer(&card->led_chip, &msg, 1); 264e6d9c80bSStephane Grosjean if (ret < 0) 265e6d9c80bSStephane Grosjean return ret; 266e6d9c80bSStephane Grosjean 267e6d9c80bSStephane Grosjean if (offset == 5) 268e6d9c80bSStephane Grosjean card->led_cache = data; 269e6d9c80bSStephane Grosjean 270e6d9c80bSStephane Grosjean return 0; 271e6d9c80bSStephane Grosjean } 272e6d9c80bSStephane Grosjean 273e6d9c80bSStephane Grosjean /* 274e6d9c80bSStephane Grosjean * delayed work callback used to control the LEDs 275e6d9c80bSStephane Grosjean */ 276e6d9c80bSStephane Grosjean static void peak_pciec_led_work(struct work_struct *work) 277e6d9c80bSStephane Grosjean { 278e6d9c80bSStephane Grosjean struct peak_pciec_card *card = 279e6d9c80bSStephane Grosjean container_of(work, struct peak_pciec_card, led_work.work); 280e6d9c80bSStephane Grosjean struct net_device *netdev; 281e6d9c80bSStephane Grosjean u8 new_led = card->led_cache; 282e6d9c80bSStephane Grosjean int i, up_count = 0; 283e6d9c80bSStephane Grosjean 284e6d9c80bSStephane Grosjean /* first check what is to do */ 285e6d9c80bSStephane Grosjean for (i = 0; i < card->chan_count; i++) { 286e6d9c80bSStephane Grosjean /* default is: not configured */ 287e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 288e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_ON(i); 289e6d9c80bSStephane Grosjean 290e6d9c80bSStephane Grosjean netdev = card->channel[i].netdev; 291e6d9c80bSStephane Grosjean if (!netdev || !(netdev->flags & IFF_UP)) 292e6d9c80bSStephane Grosjean continue; 293e6d9c80bSStephane Grosjean 294e6d9c80bSStephane Grosjean up_count++; 295e6d9c80bSStephane Grosjean 296e6d9c80bSStephane Grosjean /* no activity (but configured) */ 297e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 298e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_SLOW(i); 299e6d9c80bSStephane Grosjean 300e6d9c80bSStephane Grosjean /* if bytes counters changed, set fast blinking led */ 301e6d9c80bSStephane Grosjean if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { 302e6d9c80bSStephane Grosjean card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; 303e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 304e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_FAST(i); 305e6d9c80bSStephane Grosjean } 306e6d9c80bSStephane Grosjean if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { 307e6d9c80bSStephane Grosjean card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; 308e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 309e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_FAST(i); 310e6d9c80bSStephane Grosjean } 311e6d9c80bSStephane Grosjean } 312e6d9c80bSStephane Grosjean 313e6d9c80bSStephane Grosjean /* check if LS0 settings changed, only update i2c if so */ 314e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, new_led); 315e6d9c80bSStephane Grosjean 316e6d9c80bSStephane Grosjean /* restart timer (except if no more configured channels) */ 317e6d9c80bSStephane Grosjean if (up_count) 318e6d9c80bSStephane Grosjean schedule_delayed_work(&card->led_work, HZ); 319e6d9c80bSStephane Grosjean } 320e6d9c80bSStephane Grosjean 321e6d9c80bSStephane Grosjean /* 322e6d9c80bSStephane Grosjean * set LEDs blinking state 323e6d9c80bSStephane Grosjean */ 324e6d9c80bSStephane Grosjean static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s) 325e6d9c80bSStephane Grosjean { 326e6d9c80bSStephane Grosjean u8 new_led = card->led_cache; 327e6d9c80bSStephane Grosjean int i; 328e6d9c80bSStephane Grosjean 329e6d9c80bSStephane Grosjean /* first check what is to do */ 330e6d9c80bSStephane Grosjean for (i = 0; i < card->chan_count; i++) 331e6d9c80bSStephane Grosjean if (led_mask & PCA9553_LED(i)) { 332e6d9c80bSStephane Grosjean new_led &= ~PCA9553_LED_MASK(i); 333e6d9c80bSStephane Grosjean new_led |= PCA9553_LED_STATE(s, i); 334e6d9c80bSStephane Grosjean } 335e6d9c80bSStephane Grosjean 336e6d9c80bSStephane Grosjean /* check if LS0 settings changed, only update i2c if so */ 337e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, new_led); 338e6d9c80bSStephane Grosjean } 339e6d9c80bSStephane Grosjean 340e6d9c80bSStephane Grosjean /* 341e6d9c80bSStephane Grosjean * start one second delayed work to control LEDs 342e6d9c80bSStephane Grosjean */ 343e6d9c80bSStephane Grosjean static void peak_pciec_start_led_work(struct peak_pciec_card *card) 344e6d9c80bSStephane Grosjean { 345e6d9c80bSStephane Grosjean schedule_delayed_work(&card->led_work, HZ); 346e6d9c80bSStephane Grosjean } 347e6d9c80bSStephane Grosjean 348e6d9c80bSStephane Grosjean /* 349e6d9c80bSStephane Grosjean * stop LEDs delayed work 350e6d9c80bSStephane Grosjean */ 351e6d9c80bSStephane Grosjean static void peak_pciec_stop_led_work(struct peak_pciec_card *card) 352e6d9c80bSStephane Grosjean { 353e6d9c80bSStephane Grosjean cancel_delayed_work_sync(&card->led_work); 354e6d9c80bSStephane Grosjean } 355e6d9c80bSStephane Grosjean 356e6d9c80bSStephane Grosjean /* 357e6d9c80bSStephane Grosjean * initialize the PCA9553 4-bit I2C-bus LED chip 358e6d9c80bSStephane Grosjean */ 359e6d9c80bSStephane Grosjean static int peak_pciec_init_leds(struct peak_pciec_card *card) 360e6d9c80bSStephane Grosjean { 361e6d9c80bSStephane Grosjean int err; 362e6d9c80bSStephane Grosjean 363e6d9c80bSStephane Grosjean /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */ 364e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 1, 44 / 1); 365e6d9c80bSStephane Grosjean if (err) 366e6d9c80bSStephane Grosjean return err; 367e6d9c80bSStephane Grosjean 368e6d9c80bSStephane Grosjean /* duty cycle 0: 50% */ 369e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 2, 0x80); 370e6d9c80bSStephane Grosjean if (err) 371e6d9c80bSStephane Grosjean return err; 372e6d9c80bSStephane Grosjean 373e6d9c80bSStephane Grosjean /* prescaler for frequency 1: "FAST" = 5 Hz */ 374e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 3, 44 / 5); 375e6d9c80bSStephane Grosjean if (err) 376e6d9c80bSStephane Grosjean return err; 377e6d9c80bSStephane Grosjean 378e6d9c80bSStephane Grosjean /* duty cycle 1: 50% */ 379e6d9c80bSStephane Grosjean err = peak_pciec_write_pca9553(card, 4, 0x80); 380e6d9c80bSStephane Grosjean if (err) 381e6d9c80bSStephane Grosjean return err; 382e6d9c80bSStephane Grosjean 383e6d9c80bSStephane Grosjean /* switch LEDs to initial state */ 384e6d9c80bSStephane Grosjean return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT); 385e6d9c80bSStephane Grosjean } 386e6d9c80bSStephane Grosjean 387e6d9c80bSStephane Grosjean /* 388e6d9c80bSStephane Grosjean * restore LEDs state to off peak_pciec_leds_exit 389e6d9c80bSStephane Grosjean */ 390e6d9c80bSStephane Grosjean static void peak_pciec_leds_exit(struct peak_pciec_card *card) 391e6d9c80bSStephane Grosjean { 392e6d9c80bSStephane Grosjean /* switch LEDs to off */ 393e6d9c80bSStephane Grosjean peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL); 394e6d9c80bSStephane Grosjean } 395e6d9c80bSStephane Grosjean 396e6d9c80bSStephane Grosjean /* 397e6d9c80bSStephane Grosjean * normal write sja1000 register method overloaded to catch when controller 398e6d9c80bSStephane Grosjean * is started or stopped, to control leds 399e6d9c80bSStephane Grosjean */ 400e6d9c80bSStephane Grosjean static void peak_pciec_write_reg(const struct sja1000_priv *priv, 401e6d9c80bSStephane Grosjean int port, u8 val) 402e6d9c80bSStephane Grosjean { 403e6d9c80bSStephane Grosjean struct peak_pci_chan *chan = priv->priv; 404e6d9c80bSStephane Grosjean struct peak_pciec_card *card = chan->pciec_card; 405e6d9c80bSStephane Grosjean int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; 406e6d9c80bSStephane Grosjean 407e6d9c80bSStephane Grosjean /* sja1000 register changes control the leds state */ 40806e1d1d7SOliver Hartkopp if (port == SJA1000_MOD) 409e6d9c80bSStephane Grosjean switch (val) { 410e6d9c80bSStephane Grosjean case MOD_RM: 411e6d9c80bSStephane Grosjean /* Reset Mode: set led on */ 412e6d9c80bSStephane Grosjean peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON); 413e6d9c80bSStephane Grosjean break; 414e6d9c80bSStephane Grosjean case 0x00: 415e6d9c80bSStephane Grosjean /* Normal Mode: led slow blinking and start led timer */ 416e6d9c80bSStephane Grosjean peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW); 417e6d9c80bSStephane Grosjean peak_pciec_start_led_work(card); 418e6d9c80bSStephane Grosjean break; 419e6d9c80bSStephane Grosjean default: 420e6d9c80bSStephane Grosjean break; 421e6d9c80bSStephane Grosjean } 422e6d9c80bSStephane Grosjean 423e6d9c80bSStephane Grosjean /* call base function */ 424e6d9c80bSStephane Grosjean peak_pci_write_reg(priv, port, val); 425e6d9c80bSStephane Grosjean } 426e6d9c80bSStephane Grosjean 427e6d9c80bSStephane Grosjean static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = { 428e6d9c80bSStephane Grosjean .setsda = pita_setsda, 429e6d9c80bSStephane Grosjean .setscl = pita_setscl, 430e6d9c80bSStephane Grosjean .getsda = pita_getsda, 431e6d9c80bSStephane Grosjean .getscl = pita_getscl, 432e6d9c80bSStephane Grosjean .udelay = 10, 433e6d9c80bSStephane Grosjean .timeout = HZ, 434e6d9c80bSStephane Grosjean }; 435e6d9c80bSStephane Grosjean 436e6d9c80bSStephane Grosjean static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 437e6d9c80bSStephane Grosjean { 438e6d9c80bSStephane Grosjean struct sja1000_priv *priv = netdev_priv(dev); 439e6d9c80bSStephane Grosjean struct peak_pci_chan *chan = priv->priv; 440e6d9c80bSStephane Grosjean struct peak_pciec_card *card; 441e6d9c80bSStephane Grosjean int err; 442e6d9c80bSStephane Grosjean 443e6d9c80bSStephane Grosjean /* copy i2c object address from 1st channel */ 444e6d9c80bSStephane Grosjean if (chan->prev_dev) { 445e6d9c80bSStephane Grosjean struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev); 446e6d9c80bSStephane Grosjean struct peak_pci_chan *prev_chan = prev_priv->priv; 447e6d9c80bSStephane Grosjean 448e6d9c80bSStephane Grosjean card = prev_chan->pciec_card; 449e6d9c80bSStephane Grosjean if (!card) 450e6d9c80bSStephane Grosjean return -ENODEV; 451e6d9c80bSStephane Grosjean 452e6d9c80bSStephane Grosjean /* channel is the first one: do the init part */ 453e6d9c80bSStephane Grosjean } else { 454e6d9c80bSStephane Grosjean /* create the bit banging I2C adapter structure */ 455e6d9c80bSStephane Grosjean card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL); 45609da6c5fSJoe Perches if (!card) 457e6d9c80bSStephane Grosjean return -ENOMEM; 458e6d9c80bSStephane Grosjean 459e6d9c80bSStephane Grosjean card->cfg_base = chan->cfg_base; 460e6d9c80bSStephane Grosjean card->reg_base = priv->reg_base; 461e6d9c80bSStephane Grosjean 462e6d9c80bSStephane Grosjean card->led_chip.owner = THIS_MODULE; 463e6d9c80bSStephane Grosjean card->led_chip.dev.parent = &pdev->dev; 464e6d9c80bSStephane Grosjean card->led_chip.algo_data = &card->i2c_bit; 465e6d9c80bSStephane Grosjean strncpy(card->led_chip.name, "peak_i2c", 466e6d9c80bSStephane Grosjean sizeof(card->led_chip.name)); 467e6d9c80bSStephane Grosjean 468e6d9c80bSStephane Grosjean card->i2c_bit = peak_pciec_i2c_bit_ops; 469e6d9c80bSStephane Grosjean card->i2c_bit.udelay = 10; 470e6d9c80bSStephane Grosjean card->i2c_bit.timeout = HZ; 471e6d9c80bSStephane Grosjean card->i2c_bit.data = card; 472e6d9c80bSStephane Grosjean 473e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card); 474e6d9c80bSStephane Grosjean 475e6d9c80bSStephane Grosjean err = i2c_bit_add_bus(&card->led_chip); 476e6d9c80bSStephane Grosjean if (err) { 477e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "i2c init failed\n"); 478e6d9c80bSStephane Grosjean goto pciec_init_err_1; 479e6d9c80bSStephane Grosjean } 480e6d9c80bSStephane Grosjean 481e6d9c80bSStephane Grosjean err = peak_pciec_init_leds(card); 482e6d9c80bSStephane Grosjean if (err) { 483e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "leds hardware init failed\n"); 484e6d9c80bSStephane Grosjean goto pciec_init_err_2; 485e6d9c80bSStephane Grosjean } 486e6d9c80bSStephane Grosjean 487e6d9c80bSStephane Grosjean INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work); 488e6d9c80bSStephane Grosjean /* PCAN-ExpressCard needs its own callback for leds */ 489e6d9c80bSStephane Grosjean priv->write_reg = peak_pciec_write_reg; 490e6d9c80bSStephane Grosjean } 491e6d9c80bSStephane Grosjean 492e6d9c80bSStephane Grosjean chan->pciec_card = card; 493e6d9c80bSStephane Grosjean card->channel[card->chan_count++].netdev = dev; 494e6d9c80bSStephane Grosjean 495e6d9c80bSStephane Grosjean return 0; 496e6d9c80bSStephane Grosjean 497e6d9c80bSStephane Grosjean pciec_init_err_2: 498e6d9c80bSStephane Grosjean i2c_del_adapter(&card->led_chip); 499e6d9c80bSStephane Grosjean 500e6d9c80bSStephane Grosjean pciec_init_err_1: 501e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card); 502e6d9c80bSStephane Grosjean kfree(card); 503e6d9c80bSStephane Grosjean 504e6d9c80bSStephane Grosjean return err; 505e6d9c80bSStephane Grosjean } 506e6d9c80bSStephane Grosjean 507e6d9c80bSStephane Grosjean static void peak_pciec_remove(struct peak_pciec_card *card) 508e6d9c80bSStephane Grosjean { 509e6d9c80bSStephane Grosjean peak_pciec_stop_led_work(card); 510e6d9c80bSStephane Grosjean peak_pciec_leds_exit(card); 511e6d9c80bSStephane Grosjean i2c_del_adapter(&card->led_chip); 512e6d9c80bSStephane Grosjean peak_pciec_init_pita_gpio(card); 513e6d9c80bSStephane Grosjean kfree(card); 514e6d9c80bSStephane Grosjean } 515e6d9c80bSStephane Grosjean 516e6d9c80bSStephane Grosjean #else /* CONFIG_CAN_PEAK_PCIEC */ 517e6d9c80bSStephane Grosjean 518e6d9c80bSStephane Grosjean /* 519e6d9c80bSStephane Grosjean * Placebo functions when PCAN-ExpressCard support is not selected 520e6d9c80bSStephane Grosjean */ 521e6d9c80bSStephane Grosjean static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) 522e6d9c80bSStephane Grosjean { 523e6d9c80bSStephane Grosjean return -ENODEV; 524e6d9c80bSStephane Grosjean } 525e6d9c80bSStephane Grosjean 526e6d9c80bSStephane Grosjean static inline void peak_pciec_remove(struct peak_pciec_card *card) 527e6d9c80bSStephane Grosjean { 528e6d9c80bSStephane Grosjean } 529e6d9c80bSStephane Grosjean #endif /* CONFIG_CAN_PEAK_PCIEC */ 530e6d9c80bSStephane Grosjean 53138034518SWolfgang Grandegger static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) 53238034518SWolfgang Grandegger { 53338034518SWolfgang Grandegger return readb(priv->reg_base + (port << 2)); 53438034518SWolfgang Grandegger } 53538034518SWolfgang Grandegger 53638034518SWolfgang Grandegger static void peak_pci_write_reg(const struct sja1000_priv *priv, 53738034518SWolfgang Grandegger int port, u8 val) 53838034518SWolfgang Grandegger { 53938034518SWolfgang Grandegger writeb(val, priv->reg_base + (port << 2)); 54038034518SWolfgang Grandegger } 54138034518SWolfgang Grandegger 54238034518SWolfgang Grandegger static void peak_pci_post_irq(const struct sja1000_priv *priv) 54338034518SWolfgang Grandegger { 54438034518SWolfgang Grandegger struct peak_pci_chan *chan = priv->priv; 54538034518SWolfgang Grandegger u16 icr; 54638034518SWolfgang Grandegger 54738034518SWolfgang Grandegger /* Select and clear in PITA stored interrupt */ 54838034518SWolfgang Grandegger icr = readw(chan->cfg_base + PITA_ICR); 54938034518SWolfgang Grandegger if (icr & chan->icr_mask) 55038034518SWolfgang Grandegger writew(chan->icr_mask, chan->cfg_base + PITA_ICR); 55138034518SWolfgang Grandegger } 55238034518SWolfgang Grandegger 5531dd06ae8SGreg Kroah-Hartman static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 55438034518SWolfgang Grandegger { 55538034518SWolfgang Grandegger struct sja1000_priv *priv; 55638034518SWolfgang Grandegger struct peak_pci_chan *chan; 5570b5a958cSStephane Grosjean struct net_device *dev, *prev_dev; 55838034518SWolfgang Grandegger void __iomem *cfg_base, *reg_base; 55938034518SWolfgang Grandegger u16 sub_sys_id, icr; 56038034518SWolfgang Grandegger int i, err, channels; 56138034518SWolfgang Grandegger 56238034518SWolfgang Grandegger err = pci_enable_device(pdev); 56338034518SWolfgang Grandegger if (err) 56438034518SWolfgang Grandegger return err; 56538034518SWolfgang Grandegger 56638034518SWolfgang Grandegger err = pci_request_regions(pdev, DRV_NAME); 56738034518SWolfgang Grandegger if (err) 56838034518SWolfgang Grandegger goto failure_disable_pci; 56938034518SWolfgang Grandegger 57038034518SWolfgang Grandegger err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); 57138034518SWolfgang Grandegger if (err) 57238034518SWolfgang Grandegger goto failure_release_regions; 57338034518SWolfgang Grandegger 57438034518SWolfgang Grandegger dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", 57538034518SWolfgang Grandegger pdev->vendor, pdev->device, sub_sys_id); 57638034518SWolfgang Grandegger 57738034518SWolfgang Grandegger err = pci_write_config_word(pdev, 0x44, 0); 57838034518SWolfgang Grandegger if (err) 57938034518SWolfgang Grandegger goto failure_release_regions; 58038034518SWolfgang Grandegger 58138034518SWolfgang Grandegger if (sub_sys_id >= 12) 58238034518SWolfgang Grandegger channels = 4; 58338034518SWolfgang Grandegger else if (sub_sys_id >= 10) 58438034518SWolfgang Grandegger channels = 3; 58538034518SWolfgang Grandegger else if (sub_sys_id >= 4) 58638034518SWolfgang Grandegger channels = 2; 58738034518SWolfgang Grandegger else 58838034518SWolfgang Grandegger channels = 1; 58938034518SWolfgang Grandegger 59038034518SWolfgang Grandegger cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); 59138034518SWolfgang Grandegger if (!cfg_base) { 59238034518SWolfgang Grandegger dev_err(&pdev->dev, "failed to map PCI resource #0\n"); 5934a4bfdcdSPeter Senna Tschudin err = -ENOMEM; 59438034518SWolfgang Grandegger goto failure_release_regions; 59538034518SWolfgang Grandegger } 59638034518SWolfgang Grandegger 59738034518SWolfgang Grandegger reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); 59838034518SWolfgang Grandegger if (!reg_base) { 59938034518SWolfgang Grandegger dev_err(&pdev->dev, "failed to map PCI resource #1\n"); 6004a4bfdcdSPeter Senna Tschudin err = -ENOMEM; 60138034518SWolfgang Grandegger goto failure_unmap_cfg_base; 60238034518SWolfgang Grandegger } 60338034518SWolfgang Grandegger 60438034518SWolfgang Grandegger /* Set GPIO control register */ 60538034518SWolfgang Grandegger writew(0x0005, cfg_base + PITA_GPIOICR + 2); 60638034518SWolfgang Grandegger /* Enable all channels of this card */ 60738034518SWolfgang Grandegger writeb(0x00, cfg_base + PITA_GPIOICR); 60838034518SWolfgang Grandegger /* Toggle reset */ 60938034518SWolfgang Grandegger writeb(0x05, cfg_base + PITA_MISC + 3); 61038034518SWolfgang Grandegger mdelay(5); 61138034518SWolfgang Grandegger /* Leave parport mux mode */ 61238034518SWolfgang Grandegger writeb(0x04, cfg_base + PITA_MISC + 3); 61338034518SWolfgang Grandegger 61438034518SWolfgang Grandegger icr = readw(cfg_base + PITA_ICR + 2); 61538034518SWolfgang Grandegger 61638034518SWolfgang Grandegger for (i = 0; i < channels; i++) { 61738034518SWolfgang Grandegger dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); 61838034518SWolfgang Grandegger if (!dev) { 61938034518SWolfgang Grandegger err = -ENOMEM; 62038034518SWolfgang Grandegger goto failure_remove_channels; 62138034518SWolfgang Grandegger } 62238034518SWolfgang Grandegger 62338034518SWolfgang Grandegger priv = netdev_priv(dev); 62438034518SWolfgang Grandegger chan = priv->priv; 62538034518SWolfgang Grandegger 62638034518SWolfgang Grandegger chan->cfg_base = cfg_base; 62738034518SWolfgang Grandegger priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; 62838034518SWolfgang Grandegger 62938034518SWolfgang Grandegger priv->read_reg = peak_pci_read_reg; 63038034518SWolfgang Grandegger priv->write_reg = peak_pci_write_reg; 63138034518SWolfgang Grandegger priv->post_irq = peak_pci_post_irq; 63238034518SWolfgang Grandegger 63338034518SWolfgang Grandegger priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; 63438034518SWolfgang Grandegger priv->ocr = PEAK_PCI_OCR; 63538034518SWolfgang Grandegger priv->cdr = PEAK_PCI_CDR; 63638034518SWolfgang Grandegger /* Neither a slave nor a single device distributes the clock */ 63738034518SWolfgang Grandegger if (channels == 1 || i > 0) 63838034518SWolfgang Grandegger priv->cdr |= CDR_CLK_OFF; 63938034518SWolfgang Grandegger 64038034518SWolfgang Grandegger /* Setup interrupt handling */ 64138034518SWolfgang Grandegger priv->irq_flags = IRQF_SHARED; 64238034518SWolfgang Grandegger dev->irq = pdev->irq; 64338034518SWolfgang Grandegger 64438034518SWolfgang Grandegger chan->icr_mask = peak_pci_icr_masks[i]; 64538034518SWolfgang Grandegger icr |= chan->icr_mask; 64638034518SWolfgang Grandegger 64738034518SWolfgang Grandegger SET_NETDEV_DEV(dev, &pdev->dev); 6483e66d013SChristopher R. Baker dev->dev_id = i; 64938034518SWolfgang Grandegger 65038034518SWolfgang Grandegger /* Create chain of SJA1000 devices */ 65129830406SStephane Grosjean chan->prev_dev = pci_get_drvdata(pdev); 65229830406SStephane Grosjean pci_set_drvdata(pdev, dev); 65338034518SWolfgang Grandegger 654e6d9c80bSStephane Grosjean /* 655e6d9c80bSStephane Grosjean * PCAN-ExpressCard needs some additional i2c init. 656e6d9c80bSStephane Grosjean * This must be done *before* register_sja1000dev() but 657e6d9c80bSStephane Grosjean * *after* devices linkage 658e6d9c80bSStephane Grosjean */ 659*4be0015cSOliver Hartkopp if (pdev->device == PEAK_PCIEC_DEVICE_ID || 660*4be0015cSOliver Hartkopp pdev->device == PEAK_PCIEC34_DEVICE_ID) { 661e6d9c80bSStephane Grosjean err = peak_pciec_probe(pdev, dev); 662e6d9c80bSStephane Grosjean if (err) { 663e6d9c80bSStephane Grosjean dev_err(&pdev->dev, 664e6d9c80bSStephane Grosjean "failed to probe device (err %d)\n", 665e6d9c80bSStephane Grosjean err); 666e6d9c80bSStephane Grosjean goto failure_free_dev; 667e6d9c80bSStephane Grosjean } 668e6d9c80bSStephane Grosjean } 669e6d9c80bSStephane Grosjean 670e6d9c80bSStephane Grosjean err = register_sja1000dev(dev); 671e6d9c80bSStephane Grosjean if (err) { 672e6d9c80bSStephane Grosjean dev_err(&pdev->dev, "failed to register device\n"); 673e6d9c80bSStephane Grosjean goto failure_free_dev; 674e6d9c80bSStephane Grosjean } 675e6d9c80bSStephane Grosjean 67638034518SWolfgang Grandegger dev_info(&pdev->dev, 67738034518SWolfgang Grandegger "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", 67838034518SWolfgang Grandegger dev->name, priv->reg_base, chan->cfg_base, dev->irq); 67938034518SWolfgang Grandegger } 68038034518SWolfgang Grandegger 68138034518SWolfgang Grandegger /* Enable interrupts */ 68238034518SWolfgang Grandegger writew(icr, cfg_base + PITA_ICR + 2); 68338034518SWolfgang Grandegger 68438034518SWolfgang Grandegger return 0; 68538034518SWolfgang Grandegger 686e6d9c80bSStephane Grosjean failure_free_dev: 687e6d9c80bSStephane Grosjean pci_set_drvdata(pdev, chan->prev_dev); 688e6d9c80bSStephane Grosjean free_sja1000dev(dev); 689e6d9c80bSStephane Grosjean 69038034518SWolfgang Grandegger failure_remove_channels: 69138034518SWolfgang Grandegger /* Disable interrupts */ 69238034518SWolfgang Grandegger writew(0x0, cfg_base + PITA_ICR + 2); 69338034518SWolfgang Grandegger 694e6d9c80bSStephane Grosjean chan = NULL; 6950b5a958cSStephane Grosjean for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) { 69638034518SWolfgang Grandegger priv = netdev_priv(dev); 69738034518SWolfgang Grandegger chan = priv->priv; 6980b5a958cSStephane Grosjean prev_dev = chan->prev_dev; 6990b5a958cSStephane Grosjean 7000b5a958cSStephane Grosjean unregister_sja1000dev(dev); 7010b5a958cSStephane Grosjean free_sja1000dev(dev); 70238034518SWolfgang Grandegger } 70338034518SWolfgang Grandegger 704e6d9c80bSStephane Grosjean /* free any PCIeC resources too */ 705e6d9c80bSStephane Grosjean if (chan && chan->pciec_card) 706e6d9c80bSStephane Grosjean peak_pciec_remove(chan->pciec_card); 707e6d9c80bSStephane Grosjean 70838034518SWolfgang Grandegger pci_iounmap(pdev, reg_base); 70938034518SWolfgang Grandegger 71038034518SWolfgang Grandegger failure_unmap_cfg_base: 71138034518SWolfgang Grandegger pci_iounmap(pdev, cfg_base); 71238034518SWolfgang Grandegger 71338034518SWolfgang Grandegger failure_release_regions: 71438034518SWolfgang Grandegger pci_release_regions(pdev); 71538034518SWolfgang Grandegger 71638034518SWolfgang Grandegger failure_disable_pci: 71738034518SWolfgang Grandegger pci_disable_device(pdev); 71838034518SWolfgang Grandegger 71938034518SWolfgang Grandegger return err; 72038034518SWolfgang Grandegger } 72138034518SWolfgang Grandegger 7223c8ac0f2SBill Pemberton static void peak_pci_remove(struct pci_dev *pdev) 72338034518SWolfgang Grandegger { 72429830406SStephane Grosjean struct net_device *dev = pci_get_drvdata(pdev); /* Last device */ 72538034518SWolfgang Grandegger struct sja1000_priv *priv = netdev_priv(dev); 72638034518SWolfgang Grandegger struct peak_pci_chan *chan = priv->priv; 72738034518SWolfgang Grandegger void __iomem *cfg_base = chan->cfg_base; 72838034518SWolfgang Grandegger void __iomem *reg_base = priv->reg_base; 72938034518SWolfgang Grandegger 73038034518SWolfgang Grandegger /* Disable interrupts */ 73138034518SWolfgang Grandegger writew(0x0, cfg_base + PITA_ICR + 2); 73238034518SWolfgang Grandegger 73338034518SWolfgang Grandegger /* Loop over all registered devices */ 73438034518SWolfgang Grandegger while (1) { 7350b5a958cSStephane Grosjean struct net_device *prev_dev = chan->prev_dev; 7360b5a958cSStephane Grosjean 73738034518SWolfgang Grandegger dev_info(&pdev->dev, "removing device %s\n", dev->name); 73838034518SWolfgang Grandegger unregister_sja1000dev(dev); 73938034518SWolfgang Grandegger free_sja1000dev(dev); 7400b5a958cSStephane Grosjean dev = prev_dev; 741e6d9c80bSStephane Grosjean 742e6d9c80bSStephane Grosjean if (!dev) { 743e6d9c80bSStephane Grosjean /* do that only for first channel */ 744e6d9c80bSStephane Grosjean if (chan->pciec_card) 745e6d9c80bSStephane Grosjean peak_pciec_remove(chan->pciec_card); 74638034518SWolfgang Grandegger break; 747e6d9c80bSStephane Grosjean } 74838034518SWolfgang Grandegger priv = netdev_priv(dev); 74938034518SWolfgang Grandegger chan = priv->priv; 75038034518SWolfgang Grandegger } 75138034518SWolfgang Grandegger 75238034518SWolfgang Grandegger pci_iounmap(pdev, reg_base); 75338034518SWolfgang Grandegger pci_iounmap(pdev, cfg_base); 75438034518SWolfgang Grandegger pci_release_regions(pdev); 75538034518SWolfgang Grandegger pci_disable_device(pdev); 75638034518SWolfgang Grandegger } 75738034518SWolfgang Grandegger 75838034518SWolfgang Grandegger static struct pci_driver peak_pci_driver = { 75938034518SWolfgang Grandegger .name = DRV_NAME, 76038034518SWolfgang Grandegger .id_table = peak_pci_tbl, 76138034518SWolfgang Grandegger .probe = peak_pci_probe, 7623c8ac0f2SBill Pemberton .remove = peak_pci_remove, 76338034518SWolfgang Grandegger }; 76438034518SWolfgang Grandegger 765fb7944b3SAxel Lin module_pci_driver(peak_pci_driver); 766