1*35e62ae8SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2afa17a50SWolfram Sang /* 3afa17a50SWolfram Sang * Definitions of consts/structs to drive the Freescale MSCAN. 4afa17a50SWolfram Sang * 5afa17a50SWolfram Sang * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>, 6afa17a50SWolfram Sang * Varma Electronics Oy 7afa17a50SWolfram Sang */ 8afa17a50SWolfram Sang 9afa17a50SWolfram Sang #ifndef __MSCAN_H__ 10afa17a50SWolfram Sang #define __MSCAN_H__ 11afa17a50SWolfram Sang 121149108eSGerhard Sittig #include <linux/clk.h> 13afa17a50SWolfram Sang #include <linux/types.h> 14afa17a50SWolfram Sang 15afa17a50SWolfram Sang /* MSCAN control register 0 (CANCTL0) bits */ 16afa17a50SWolfram Sang #define MSCAN_RXFRM 0x80 17afa17a50SWolfram Sang #define MSCAN_RXACT 0x40 18afa17a50SWolfram Sang #define MSCAN_CSWAI 0x20 19afa17a50SWolfram Sang #define MSCAN_SYNCH 0x10 20afa17a50SWolfram Sang #define MSCAN_TIME 0x08 21afa17a50SWolfram Sang #define MSCAN_WUPE 0x04 22afa17a50SWolfram Sang #define MSCAN_SLPRQ 0x02 23afa17a50SWolfram Sang #define MSCAN_INITRQ 0x01 24afa17a50SWolfram Sang 25afa17a50SWolfram Sang /* MSCAN control register 1 (CANCTL1) bits */ 26afa17a50SWolfram Sang #define MSCAN_CANE 0x80 27afa17a50SWolfram Sang #define MSCAN_CLKSRC 0x40 28afa17a50SWolfram Sang #define MSCAN_LOOPB 0x20 29afa17a50SWolfram Sang #define MSCAN_LISTEN 0x10 30bf3af547SWolfgang Grandegger #define MSCAN_BORM 0x08 31afa17a50SWolfram Sang #define MSCAN_WUPM 0x04 32afa17a50SWolfram Sang #define MSCAN_SLPAK 0x02 33afa17a50SWolfram Sang #define MSCAN_INITAK 0x01 34afa17a50SWolfram Sang 35bf3af547SWolfgang Grandegger /* Use the MPC5XXX MSCAN variant? */ 36afa17a50SWolfram Sang #ifdef CONFIG_PPC 37bf3af547SWolfgang Grandegger #define MSCAN_FOR_MPC5XXX 38afa17a50SWolfram Sang #endif 39afa17a50SWolfram Sang 40bf3af547SWolfgang Grandegger #ifdef MSCAN_FOR_MPC5XXX 41afa17a50SWolfram Sang #define MSCAN_CLKSRC_BUS 0 42afa17a50SWolfram Sang #define MSCAN_CLKSRC_XTAL MSCAN_CLKSRC 43bf3af547SWolfgang Grandegger #define MSCAN_CLKSRC_IPS MSCAN_CLKSRC 44afa17a50SWolfram Sang #else 45afa17a50SWolfram Sang #define MSCAN_CLKSRC_BUS MSCAN_CLKSRC 46afa17a50SWolfram Sang #define MSCAN_CLKSRC_XTAL 0 47afa17a50SWolfram Sang #endif 48afa17a50SWolfram Sang 49afa17a50SWolfram Sang /* MSCAN receiver flag register (CANRFLG) bits */ 50afa17a50SWolfram Sang #define MSCAN_WUPIF 0x80 51afa17a50SWolfram Sang #define MSCAN_CSCIF 0x40 52afa17a50SWolfram Sang #define MSCAN_RSTAT1 0x20 53afa17a50SWolfram Sang #define MSCAN_RSTAT0 0x10 54afa17a50SWolfram Sang #define MSCAN_TSTAT1 0x08 55afa17a50SWolfram Sang #define MSCAN_TSTAT0 0x04 56afa17a50SWolfram Sang #define MSCAN_OVRIF 0x02 57afa17a50SWolfram Sang #define MSCAN_RXF 0x01 58afa17a50SWolfram Sang #define MSCAN_ERR_IF (MSCAN_OVRIF | MSCAN_CSCIF) 59afa17a50SWolfram Sang #define MSCAN_RSTAT_MSK (MSCAN_RSTAT1 | MSCAN_RSTAT0) 60afa17a50SWolfram Sang #define MSCAN_TSTAT_MSK (MSCAN_TSTAT1 | MSCAN_TSTAT0) 61afa17a50SWolfram Sang #define MSCAN_STAT_MSK (MSCAN_RSTAT_MSK | MSCAN_TSTAT_MSK) 62afa17a50SWolfram Sang 63afa17a50SWolfram Sang #define MSCAN_STATE_BUS_OFF (MSCAN_RSTAT1 | MSCAN_RSTAT0 | \ 64afa17a50SWolfram Sang MSCAN_TSTAT1 | MSCAN_TSTAT0) 65afa17a50SWolfram Sang #define MSCAN_STATE_TX(canrflg) (((canrflg)&MSCAN_TSTAT_MSK)>>2) 66afa17a50SWolfram Sang #define MSCAN_STATE_RX(canrflg) (((canrflg)&MSCAN_RSTAT_MSK)>>4) 67afa17a50SWolfram Sang #define MSCAN_STATE_ACTIVE 0 68afa17a50SWolfram Sang #define MSCAN_STATE_WARNING 1 69afa17a50SWolfram Sang #define MSCAN_STATE_PASSIVE 2 70afa17a50SWolfram Sang #define MSCAN_STATE_BUSOFF 3 71afa17a50SWolfram Sang 72afa17a50SWolfram Sang /* MSCAN receiver interrupt enable register (CANRIER) bits */ 73afa17a50SWolfram Sang #define MSCAN_WUPIE 0x80 74afa17a50SWolfram Sang #define MSCAN_CSCIE 0x40 75afa17a50SWolfram Sang #define MSCAN_RSTATE1 0x20 76afa17a50SWolfram Sang #define MSCAN_RSTATE0 0x10 77afa17a50SWolfram Sang #define MSCAN_TSTATE1 0x08 78afa17a50SWolfram Sang #define MSCAN_TSTATE0 0x04 79afa17a50SWolfram Sang #define MSCAN_OVRIE 0x02 80afa17a50SWolfram Sang #define MSCAN_RXFIE 0x01 81afa17a50SWolfram Sang 82afa17a50SWolfram Sang /* MSCAN transmitter flag register (CANTFLG) bits */ 83afa17a50SWolfram Sang #define MSCAN_TXE2 0x04 84afa17a50SWolfram Sang #define MSCAN_TXE1 0x02 85afa17a50SWolfram Sang #define MSCAN_TXE0 0x01 86afa17a50SWolfram Sang #define MSCAN_TXE (MSCAN_TXE2 | MSCAN_TXE1 | MSCAN_TXE0) 87afa17a50SWolfram Sang 88afa17a50SWolfram Sang /* MSCAN transmitter interrupt enable register (CANTIER) bits */ 89afa17a50SWolfram Sang #define MSCAN_TXIE2 0x04 90afa17a50SWolfram Sang #define MSCAN_TXIE1 0x02 91afa17a50SWolfram Sang #define MSCAN_TXIE0 0x01 92afa17a50SWolfram Sang #define MSCAN_TXIE (MSCAN_TXIE2 | MSCAN_TXIE1 | MSCAN_TXIE0) 93afa17a50SWolfram Sang 94afa17a50SWolfram Sang /* MSCAN transmitter message abort request (CANTARQ) bits */ 95afa17a50SWolfram Sang #define MSCAN_ABTRQ2 0x04 96afa17a50SWolfram Sang #define MSCAN_ABTRQ1 0x02 97afa17a50SWolfram Sang #define MSCAN_ABTRQ0 0x01 98afa17a50SWolfram Sang 99afa17a50SWolfram Sang /* MSCAN transmitter message abort ack (CANTAAK) bits */ 100afa17a50SWolfram Sang #define MSCAN_ABTAK2 0x04 101afa17a50SWolfram Sang #define MSCAN_ABTAK1 0x02 102afa17a50SWolfram Sang #define MSCAN_ABTAK0 0x01 103afa17a50SWolfram Sang 104afa17a50SWolfram Sang /* MSCAN transmit buffer selection (CANTBSEL) bits */ 105afa17a50SWolfram Sang #define MSCAN_TX2 0x04 106afa17a50SWolfram Sang #define MSCAN_TX1 0x02 107afa17a50SWolfram Sang #define MSCAN_TX0 0x01 108afa17a50SWolfram Sang 109afa17a50SWolfram Sang /* MSCAN ID acceptance control register (CANIDAC) bits */ 110afa17a50SWolfram Sang #define MSCAN_IDAM1 0x20 111afa17a50SWolfram Sang #define MSCAN_IDAM0 0x10 112afa17a50SWolfram Sang #define MSCAN_IDHIT2 0x04 113afa17a50SWolfram Sang #define MSCAN_IDHIT1 0x02 114afa17a50SWolfram Sang #define MSCAN_IDHIT0 0x01 115afa17a50SWolfram Sang 116afa17a50SWolfram Sang #define MSCAN_AF_32BIT 0x00 117afa17a50SWolfram Sang #define MSCAN_AF_16BIT MSCAN_IDAM0 118afa17a50SWolfram Sang #define MSCAN_AF_8BIT MSCAN_IDAM1 119afa17a50SWolfram Sang #define MSCAN_AF_CLOSED (MSCAN_IDAM0|MSCAN_IDAM1) 120afa17a50SWolfram Sang #define MSCAN_AF_MASK (~(MSCAN_IDAM0|MSCAN_IDAM1)) 121afa17a50SWolfram Sang 122afa17a50SWolfram Sang /* MSCAN Miscellaneous Register (CANMISC) bits */ 123afa17a50SWolfram Sang #define MSCAN_BOHOLD 0x01 124afa17a50SWolfram Sang 12574ff60b2SWolfram Sang /* MSCAN Identifier Register (IDR) bits */ 12674ff60b2SWolfram Sang #define MSCAN_SFF_RTR_SHIFT 4 12774ff60b2SWolfram Sang #define MSCAN_EFF_RTR_SHIFT 0 12874ff60b2SWolfram Sang #define MSCAN_EFF_FLAGS 0x18 /* IDE + SRR */ 12974ff60b2SWolfram Sang 130bf3af547SWolfgang Grandegger #ifdef MSCAN_FOR_MPC5XXX 131afa17a50SWolfram Sang #define _MSCAN_RESERVED_(n, num) u8 _res##n[num] 132afa17a50SWolfram Sang #define _MSCAN_RESERVED_DSR_SIZE 2 133afa17a50SWolfram Sang #else 134afa17a50SWolfram Sang #define _MSCAN_RESERVED_(n, num) 135afa17a50SWolfram Sang #define _MSCAN_RESERVED_DSR_SIZE 0 136afa17a50SWolfram Sang #endif 137afa17a50SWolfram Sang 138afa17a50SWolfram Sang /* Structure of the hardware registers */ 139afa17a50SWolfram Sang struct mscan_regs { 140afa17a50SWolfram Sang /* (see doc S12MSCANV3/D) MPC5200 MSCAN */ 141afa17a50SWolfram Sang u8 canctl0; /* + 0x00 0x00 */ 142afa17a50SWolfram Sang u8 canctl1; /* + 0x01 0x01 */ 143afa17a50SWolfram Sang _MSCAN_RESERVED_(1, 2); /* + 0x02 */ 144afa17a50SWolfram Sang u8 canbtr0; /* + 0x04 0x02 */ 145afa17a50SWolfram Sang u8 canbtr1; /* + 0x05 0x03 */ 146afa17a50SWolfram Sang _MSCAN_RESERVED_(2, 2); /* + 0x06 */ 147afa17a50SWolfram Sang u8 canrflg; /* + 0x08 0x04 */ 148afa17a50SWolfram Sang u8 canrier; /* + 0x09 0x05 */ 149afa17a50SWolfram Sang _MSCAN_RESERVED_(3, 2); /* + 0x0a */ 150afa17a50SWolfram Sang u8 cantflg; /* + 0x0c 0x06 */ 151afa17a50SWolfram Sang u8 cantier; /* + 0x0d 0x07 */ 152afa17a50SWolfram Sang _MSCAN_RESERVED_(4, 2); /* + 0x0e */ 153afa17a50SWolfram Sang u8 cantarq; /* + 0x10 0x08 */ 154afa17a50SWolfram Sang u8 cantaak; /* + 0x11 0x09 */ 155afa17a50SWolfram Sang _MSCAN_RESERVED_(5, 2); /* + 0x12 */ 156afa17a50SWolfram Sang u8 cantbsel; /* + 0x14 0x0a */ 157afa17a50SWolfram Sang u8 canidac; /* + 0x15 0x0b */ 158afa17a50SWolfram Sang u8 reserved; /* + 0x16 0x0c */ 159bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(6, 2); /* + 0x17 */ 160bf3af547SWolfgang Grandegger u8 canmisc; /* + 0x19 0x0d */ 161bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(7, 2); /* + 0x1a */ 162afa17a50SWolfram Sang u8 canrxerr; /* + 0x1c 0x0e */ 163afa17a50SWolfram Sang u8 cantxerr; /* + 0x1d 0x0f */ 164bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(8, 2); /* + 0x1e */ 165afa17a50SWolfram Sang u16 canidar1_0; /* + 0x20 0x10 */ 166bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(9, 2); /* + 0x22 */ 167afa17a50SWolfram Sang u16 canidar3_2; /* + 0x24 0x12 */ 168bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(10, 2); /* + 0x26 */ 169afa17a50SWolfram Sang u16 canidmr1_0; /* + 0x28 0x14 */ 170bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(11, 2); /* + 0x2a */ 171afa17a50SWolfram Sang u16 canidmr3_2; /* + 0x2c 0x16 */ 172bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(12, 2); /* + 0x2e */ 173afa17a50SWolfram Sang u16 canidar5_4; /* + 0x30 0x18 */ 174bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(13, 2); /* + 0x32 */ 175afa17a50SWolfram Sang u16 canidar7_6; /* + 0x34 0x1a */ 176bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(14, 2); /* + 0x36 */ 177afa17a50SWolfram Sang u16 canidmr5_4; /* + 0x38 0x1c */ 178bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(15, 2); /* + 0x3a */ 179afa17a50SWolfram Sang u16 canidmr7_6; /* + 0x3c 0x1e */ 180bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(16, 2); /* + 0x3e */ 181afa17a50SWolfram Sang struct { 182afa17a50SWolfram Sang u16 idr1_0; /* + 0x40 0x20 */ 183bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(17, 2); /* + 0x42 */ 184afa17a50SWolfram Sang u16 idr3_2; /* + 0x44 0x22 */ 185bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(18, 2); /* + 0x46 */ 186afa17a50SWolfram Sang u16 dsr1_0; /* + 0x48 0x24 */ 187bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(19, 2); /* + 0x4a */ 188afa17a50SWolfram Sang u16 dsr3_2; /* + 0x4c 0x26 */ 189bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(20, 2); /* + 0x4e */ 190afa17a50SWolfram Sang u16 dsr5_4; /* + 0x50 0x28 */ 191bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(21, 2); /* + 0x52 */ 192afa17a50SWolfram Sang u16 dsr7_6; /* + 0x54 0x2a */ 193bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(22, 2); /* + 0x56 */ 194afa17a50SWolfram Sang u8 dlr; /* + 0x58 0x2c */ 195bf3af547SWolfgang Grandegger u8 reserved; /* + 0x59 0x2d */ 196bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(23, 2); /* + 0x5a */ 197afa17a50SWolfram Sang u16 time; /* + 0x5c 0x2e */ 198afa17a50SWolfram Sang } rx; 199bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(24, 2); /* + 0x5e */ 200afa17a50SWolfram Sang struct { 201afa17a50SWolfram Sang u16 idr1_0; /* + 0x60 0x30 */ 202bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(25, 2); /* + 0x62 */ 203afa17a50SWolfram Sang u16 idr3_2; /* + 0x64 0x32 */ 204bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(26, 2); /* + 0x66 */ 205afa17a50SWolfram Sang u16 dsr1_0; /* + 0x68 0x34 */ 206bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(27, 2); /* + 0x6a */ 207afa17a50SWolfram Sang u16 dsr3_2; /* + 0x6c 0x36 */ 208bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(28, 2); /* + 0x6e */ 209afa17a50SWolfram Sang u16 dsr5_4; /* + 0x70 0x38 */ 210bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(29, 2); /* + 0x72 */ 211afa17a50SWolfram Sang u16 dsr7_6; /* + 0x74 0x3a */ 212bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(30, 2); /* + 0x76 */ 213afa17a50SWolfram Sang u8 dlr; /* + 0x78 0x3c */ 214afa17a50SWolfram Sang u8 tbpr; /* + 0x79 0x3d */ 215bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(31, 2); /* + 0x7a */ 216afa17a50SWolfram Sang u16 time; /* + 0x7c 0x3e */ 217afa17a50SWolfram Sang } tx; 218bf3af547SWolfgang Grandegger _MSCAN_RESERVED_(32, 2); /* + 0x7e */ 219ba2d3587SEric Dumazet } __packed; 220afa17a50SWolfram Sang 221afa17a50SWolfram Sang #undef _MSCAN_RESERVED_ 222afa17a50SWolfram Sang #define MSCAN_REGION sizeof(struct mscan) 223afa17a50SWolfram Sang 224622ed7e9SWolfram Sang #define MSCAN_NORMAL_MODE 0 225622ed7e9SWolfram Sang #define MSCAN_SLEEP_MODE MSCAN_SLPRQ 226622ed7e9SWolfram Sang #define MSCAN_INIT_MODE (MSCAN_INITRQ | MSCAN_SLPRQ) 227622ed7e9SWolfram Sang #define MSCAN_POWEROFF_MODE (MSCAN_CSWAI | MSCAN_SLPRQ) 228622ed7e9SWolfram Sang #define MSCAN_SET_MODE_RETRIES 255 229622ed7e9SWolfram Sang #define MSCAN_ECHO_SKB_MAX 3 230bf3af547SWolfgang Grandegger #define MSCAN_RX_INTS_ENABLE (MSCAN_OVRIE | MSCAN_RXFIE | MSCAN_CSCIE | \ 231bf3af547SWolfgang Grandegger MSCAN_RSTATE1 | MSCAN_RSTATE0 | \ 232bf3af547SWolfgang Grandegger MSCAN_TSTATE1 | MSCAN_TSTATE0) 233bf3af547SWolfgang Grandegger 234bf3af547SWolfgang Grandegger /* MSCAN type variants */ 235bf3af547SWolfgang Grandegger enum { 236bf3af547SWolfgang Grandegger MSCAN_TYPE_MPC5200, 237bf3af547SWolfgang Grandegger MSCAN_TYPE_MPC5121 238bf3af547SWolfgang Grandegger }; 239622ed7e9SWolfram Sang 240622ed7e9SWolfram Sang #define BTR0_BRP_MASK 0x3f 241622ed7e9SWolfram Sang #define BTR0_SJW_SHIFT 6 242622ed7e9SWolfram Sang #define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT) 243622ed7e9SWolfram Sang 244622ed7e9SWolfram Sang #define BTR1_TSEG1_MASK 0xf 245622ed7e9SWolfram Sang #define BTR1_TSEG2_SHIFT 4 246622ed7e9SWolfram Sang #define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT) 247622ed7e9SWolfram Sang #define BTR1_SAM_SHIFT 7 248622ed7e9SWolfram Sang 249622ed7e9SWolfram Sang #define BTR0_SET_BRP(brp) (((brp) - 1) & BTR0_BRP_MASK) 250622ed7e9SWolfram Sang #define BTR0_SET_SJW(sjw) ((((sjw) - 1) << BTR0_SJW_SHIFT) & \ 251622ed7e9SWolfram Sang BTR0_SJW_MASK) 252622ed7e9SWolfram Sang 253622ed7e9SWolfram Sang #define BTR1_SET_TSEG1(tseg1) (((tseg1) - 1) & BTR1_TSEG1_MASK) 254622ed7e9SWolfram Sang #define BTR1_SET_TSEG2(tseg2) ((((tseg2) - 1) << BTR1_TSEG2_SHIFT) & \ 255622ed7e9SWolfram Sang BTR1_TSEG2_MASK) 256622ed7e9SWolfram Sang #define BTR1_SET_SAM(sam) ((sam) ? 1 << BTR1_SAM_SHIFT : 0) 257622ed7e9SWolfram Sang 258622ed7e9SWolfram Sang #define F_RX_PROGRESS 0 259622ed7e9SWolfram Sang #define F_TX_PROGRESS 1 260622ed7e9SWolfram Sang #define F_TX_WAIT_ALL 2 261622ed7e9SWolfram Sang 262afa17a50SWolfram Sang #define TX_QUEUE_SIZE 3 263afa17a50SWolfram Sang 264afa17a50SWolfram Sang struct tx_queue_entry { 265afa17a50SWolfram Sang struct list_head list; 266afa17a50SWolfram Sang u8 mask; 267afa17a50SWolfram Sang u8 id; 268afa17a50SWolfram Sang }; 269afa17a50SWolfram Sang 270afa17a50SWolfram Sang struct mscan_priv { 271afa17a50SWolfram Sang struct can_priv can; /* must be the first member */ 272bf3af547SWolfgang Grandegger unsigned int type; /* MSCAN type variants */ 273afa17a50SWolfram Sang unsigned long flags; 274afa17a50SWolfram Sang void __iomem *reg_base; /* ioremap'ed address to registers */ 2751149108eSGerhard Sittig struct clk *clk_ipg; /* clock for registers */ 2761149108eSGerhard Sittig struct clk *clk_can; /* clock for bitrates */ 277afa17a50SWolfram Sang u8 shadow_statflg; 278afa17a50SWolfram Sang u8 shadow_canrier; 279afa17a50SWolfram Sang u8 cur_pri; 280afa17a50SWolfram Sang u8 prev_buf_id; 281afa17a50SWolfram Sang u8 tx_active; 282afa17a50SWolfram Sang 283afa17a50SWolfram Sang struct list_head tx_head; 284afa17a50SWolfram Sang struct tx_queue_entry tx_queue[TX_QUEUE_SIZE]; 285afa17a50SWolfram Sang struct napi_struct napi; 286afa17a50SWolfram Sang }; 287afa17a50SWolfram Sang 288405eb0e5SJoe Perches struct net_device *alloc_mscandev(void); 289405eb0e5SJoe Perches int register_mscandev(struct net_device *dev, int mscan_clksrc); 290405eb0e5SJoe Perches void unregister_mscandev(struct net_device *dev); 291afa17a50SWolfram Sang 292afa17a50SWolfram Sang #endif /* __MSCAN_H__ */ 293