193db446aSBoris Brezillon /* 293db446aSBoris Brezillon * NAND Flash Controller Device Driver for DT 393db446aSBoris Brezillon * 493db446aSBoris Brezillon * Copyright © 2011, Picochip. 593db446aSBoris Brezillon * 693db446aSBoris Brezillon * This program is free software; you can redistribute it and/or modify it 793db446aSBoris Brezillon * under the terms and conditions of the GNU General Public License, 893db446aSBoris Brezillon * version 2, as published by the Free Software Foundation. 993db446aSBoris Brezillon * 1093db446aSBoris Brezillon * This program is distributed in the hope it will be useful, but WITHOUT 1193db446aSBoris Brezillon * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1293db446aSBoris Brezillon * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1393db446aSBoris Brezillon * more details. 1493db446aSBoris Brezillon */ 1593db446aSBoris Brezillon 1693db446aSBoris Brezillon #include <linux/clk.h> 1793db446aSBoris Brezillon #include <linux/err.h> 1893db446aSBoris Brezillon #include <linux/io.h> 1993db446aSBoris Brezillon #include <linux/ioport.h> 2093db446aSBoris Brezillon #include <linux/kernel.h> 2193db446aSBoris Brezillon #include <linux/module.h> 2293db446aSBoris Brezillon #include <linux/of.h> 2393db446aSBoris Brezillon #include <linux/of_device.h> 2493db446aSBoris Brezillon #include <linux/platform_device.h> 2593db446aSBoris Brezillon 2693db446aSBoris Brezillon #include "denali.h" 2793db446aSBoris Brezillon 2893db446aSBoris Brezillon struct denali_dt { 2993db446aSBoris Brezillon struct denali_nand_info denali; 3093db446aSBoris Brezillon struct clk *clk; 3193db446aSBoris Brezillon }; 3293db446aSBoris Brezillon 3393db446aSBoris Brezillon struct denali_dt_data { 3493db446aSBoris Brezillon unsigned int revision; 3593db446aSBoris Brezillon unsigned int caps; 3693db446aSBoris Brezillon const struct nand_ecc_caps *ecc_caps; 3793db446aSBoris Brezillon }; 3893db446aSBoris Brezillon 3993db446aSBoris Brezillon NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes, 4093db446aSBoris Brezillon 512, 8, 15); 4193db446aSBoris Brezillon static const struct denali_dt_data denali_socfpga_data = { 4293db446aSBoris Brezillon .caps = DENALI_CAP_HW_ECC_FIXUP, 4393db446aSBoris Brezillon .ecc_caps = &denali_socfpga_ecc_caps, 4493db446aSBoris Brezillon }; 4593db446aSBoris Brezillon 4693db446aSBoris Brezillon NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes, 4793db446aSBoris Brezillon 1024, 8, 16, 24); 4893db446aSBoris Brezillon static const struct denali_dt_data denali_uniphier_v5a_data = { 4993db446aSBoris Brezillon .caps = DENALI_CAP_HW_ECC_FIXUP | 5093db446aSBoris Brezillon DENALI_CAP_DMA_64BIT, 5193db446aSBoris Brezillon .ecc_caps = &denali_uniphier_v5a_ecc_caps, 5293db446aSBoris Brezillon }; 5393db446aSBoris Brezillon 5493db446aSBoris Brezillon NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes, 5593db446aSBoris Brezillon 1024, 8, 16); 5693db446aSBoris Brezillon static const struct denali_dt_data denali_uniphier_v5b_data = { 5793db446aSBoris Brezillon .revision = 0x0501, 5893db446aSBoris Brezillon .caps = DENALI_CAP_HW_ECC_FIXUP | 5993db446aSBoris Brezillon DENALI_CAP_DMA_64BIT, 6093db446aSBoris Brezillon .ecc_caps = &denali_uniphier_v5b_ecc_caps, 6193db446aSBoris Brezillon }; 6293db446aSBoris Brezillon 6393db446aSBoris Brezillon static const struct of_device_id denali_nand_dt_ids[] = { 6493db446aSBoris Brezillon { 6593db446aSBoris Brezillon .compatible = "altr,socfpga-denali-nand", 6693db446aSBoris Brezillon .data = &denali_socfpga_data, 6793db446aSBoris Brezillon }, 6893db446aSBoris Brezillon { 6993db446aSBoris Brezillon .compatible = "socionext,uniphier-denali-nand-v5a", 7093db446aSBoris Brezillon .data = &denali_uniphier_v5a_data, 7193db446aSBoris Brezillon }, 7293db446aSBoris Brezillon { 7393db446aSBoris Brezillon .compatible = "socionext,uniphier-denali-nand-v5b", 7493db446aSBoris Brezillon .data = &denali_uniphier_v5b_data, 7593db446aSBoris Brezillon }, 7693db446aSBoris Brezillon { /* sentinel */ } 7793db446aSBoris Brezillon }; 7893db446aSBoris Brezillon MODULE_DEVICE_TABLE(of, denali_nand_dt_ids); 7993db446aSBoris Brezillon 8093db446aSBoris Brezillon static int denali_dt_probe(struct platform_device *pdev) 8193db446aSBoris Brezillon { 82*cd1beffaSMasahiro Yamada struct device *dev = &pdev->dev; 8393db446aSBoris Brezillon struct resource *res; 8493db446aSBoris Brezillon struct denali_dt *dt; 8593db446aSBoris Brezillon const struct denali_dt_data *data; 8693db446aSBoris Brezillon struct denali_nand_info *denali; 8793db446aSBoris Brezillon int ret; 8893db446aSBoris Brezillon 89*cd1beffaSMasahiro Yamada dt = devm_kzalloc(dev, sizeof(*dt), GFP_KERNEL); 9093db446aSBoris Brezillon if (!dt) 9193db446aSBoris Brezillon return -ENOMEM; 9293db446aSBoris Brezillon denali = &dt->denali; 9393db446aSBoris Brezillon 94*cd1beffaSMasahiro Yamada data = of_device_get_match_data(dev); 9593db446aSBoris Brezillon if (data) { 9693db446aSBoris Brezillon denali->revision = data->revision; 9793db446aSBoris Brezillon denali->caps = data->caps; 9893db446aSBoris Brezillon denali->ecc_caps = data->ecc_caps; 9993db446aSBoris Brezillon } 10093db446aSBoris Brezillon 101*cd1beffaSMasahiro Yamada denali->dev = dev; 10293db446aSBoris Brezillon denali->irq = platform_get_irq(pdev, 0); 10393db446aSBoris Brezillon if (denali->irq < 0) { 104*cd1beffaSMasahiro Yamada dev_err(dev, "no irq defined\n"); 10593db446aSBoris Brezillon return denali->irq; 10693db446aSBoris Brezillon } 10793db446aSBoris Brezillon 10893db446aSBoris Brezillon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "denali_reg"); 109*cd1beffaSMasahiro Yamada denali->reg = devm_ioremap_resource(dev, res); 11093db446aSBoris Brezillon if (IS_ERR(denali->reg)) 11193db446aSBoris Brezillon return PTR_ERR(denali->reg); 11293db446aSBoris Brezillon 11393db446aSBoris Brezillon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data"); 114*cd1beffaSMasahiro Yamada denali->host = devm_ioremap_resource(dev, res); 11593db446aSBoris Brezillon if (IS_ERR(denali->host)) 11693db446aSBoris Brezillon return PTR_ERR(denali->host); 11793db446aSBoris Brezillon 118*cd1beffaSMasahiro Yamada dt->clk = devm_clk_get(dev, NULL); 11993db446aSBoris Brezillon if (IS_ERR(dt->clk)) { 120*cd1beffaSMasahiro Yamada dev_err(dev, "no clk available\n"); 12193db446aSBoris Brezillon return PTR_ERR(dt->clk); 12293db446aSBoris Brezillon } 12393db446aSBoris Brezillon ret = clk_prepare_enable(dt->clk); 12493db446aSBoris Brezillon if (ret) 12593db446aSBoris Brezillon return ret; 12693db446aSBoris Brezillon 1273f6e6986SMasahiro Yamada /* 1283f6e6986SMasahiro Yamada * Hardcode the clock rate for the backward compatibility. 1293f6e6986SMasahiro Yamada * This works for both SOCFPGA and UniPhier. 1303f6e6986SMasahiro Yamada */ 1313f6e6986SMasahiro Yamada denali->clk_x_rate = 200000000; 13293db446aSBoris Brezillon 13393db446aSBoris Brezillon ret = denali_init(denali); 13493db446aSBoris Brezillon if (ret) 13593db446aSBoris Brezillon goto out_disable_clk; 13693db446aSBoris Brezillon 13793db446aSBoris Brezillon platform_set_drvdata(pdev, dt); 13893db446aSBoris Brezillon return 0; 13993db446aSBoris Brezillon 14093db446aSBoris Brezillon out_disable_clk: 14193db446aSBoris Brezillon clk_disable_unprepare(dt->clk); 14293db446aSBoris Brezillon 14393db446aSBoris Brezillon return ret; 14493db446aSBoris Brezillon } 14593db446aSBoris Brezillon 14693db446aSBoris Brezillon static int denali_dt_remove(struct platform_device *pdev) 14793db446aSBoris Brezillon { 14893db446aSBoris Brezillon struct denali_dt *dt = platform_get_drvdata(pdev); 14993db446aSBoris Brezillon 15093db446aSBoris Brezillon denali_remove(&dt->denali); 15193db446aSBoris Brezillon clk_disable_unprepare(dt->clk); 15293db446aSBoris Brezillon 15393db446aSBoris Brezillon return 0; 15493db446aSBoris Brezillon } 15593db446aSBoris Brezillon 15693db446aSBoris Brezillon static struct platform_driver denali_dt_driver = { 15793db446aSBoris Brezillon .probe = denali_dt_probe, 15893db446aSBoris Brezillon .remove = denali_dt_remove, 15993db446aSBoris Brezillon .driver = { 16093db446aSBoris Brezillon .name = "denali-nand-dt", 16193db446aSBoris Brezillon .of_match_table = denali_nand_dt_ids, 16293db446aSBoris Brezillon }, 16393db446aSBoris Brezillon }; 16493db446aSBoris Brezillon module_platform_driver(denali_dt_driver); 16593db446aSBoris Brezillon 16693db446aSBoris Brezillon MODULE_LICENSE("GPL"); 16793db446aSBoris Brezillon MODULE_AUTHOR("Jamie Iles"); 16893db446aSBoris Brezillon MODULE_DESCRIPTION("DT driver for Denali NAND controller"); 169