1f1bf52e8SMasahiro Yamada // SPDX-License-Identifier: GPL-2.0 293db446aSBoris Brezillon /* 393db446aSBoris Brezillon * NAND Flash Controller Device Driver for DT 493db446aSBoris Brezillon * 593db446aSBoris Brezillon * Copyright © 2011, Picochip. 693db446aSBoris Brezillon */ 793db446aSBoris Brezillon 893db446aSBoris Brezillon #include <linux/clk.h> 993db446aSBoris Brezillon #include <linux/err.h> 1093db446aSBoris Brezillon #include <linux/io.h> 1193db446aSBoris Brezillon #include <linux/ioport.h> 1293db446aSBoris Brezillon #include <linux/kernel.h> 1393db446aSBoris Brezillon #include <linux/module.h> 1493db446aSBoris Brezillon #include <linux/of.h> 1593db446aSBoris Brezillon #include <linux/of_device.h> 1693db446aSBoris Brezillon #include <linux/platform_device.h> 1793db446aSBoris Brezillon 1893db446aSBoris Brezillon #include "denali.h" 1993db446aSBoris Brezillon 2093db446aSBoris Brezillon struct denali_dt { 2193db446aSBoris Brezillon struct denali_nand_info denali; 226f1fe97bSMasahiro Yamada struct clk *clk; /* core clock */ 236f1fe97bSMasahiro Yamada struct clk *clk_x; /* bus interface clock */ 246f1fe97bSMasahiro Yamada struct clk *clk_ecc; /* ECC circuit clock */ 2593db446aSBoris Brezillon }; 2693db446aSBoris Brezillon 2793db446aSBoris Brezillon struct denali_dt_data { 2893db446aSBoris Brezillon unsigned int revision; 2993db446aSBoris Brezillon unsigned int caps; 3093db446aSBoris Brezillon const struct nand_ecc_caps *ecc_caps; 3193db446aSBoris Brezillon }; 3293db446aSBoris Brezillon 3393db446aSBoris Brezillon NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes, 3493db446aSBoris Brezillon 512, 8, 15); 3593db446aSBoris Brezillon static const struct denali_dt_data denali_socfpga_data = { 3693db446aSBoris Brezillon .caps = DENALI_CAP_HW_ECC_FIXUP, 3793db446aSBoris Brezillon .ecc_caps = &denali_socfpga_ecc_caps, 3893db446aSBoris Brezillon }; 3993db446aSBoris Brezillon 4093db446aSBoris Brezillon NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes, 4193db446aSBoris Brezillon 1024, 8, 16, 24); 4293db446aSBoris Brezillon static const struct denali_dt_data denali_uniphier_v5a_data = { 4393db446aSBoris Brezillon .caps = DENALI_CAP_HW_ECC_FIXUP | 4493db446aSBoris Brezillon DENALI_CAP_DMA_64BIT, 4593db446aSBoris Brezillon .ecc_caps = &denali_uniphier_v5a_ecc_caps, 4693db446aSBoris Brezillon }; 4793db446aSBoris Brezillon 4893db446aSBoris Brezillon NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes, 4993db446aSBoris Brezillon 1024, 8, 16); 5093db446aSBoris Brezillon static const struct denali_dt_data denali_uniphier_v5b_data = { 5193db446aSBoris Brezillon .revision = 0x0501, 5293db446aSBoris Brezillon .caps = DENALI_CAP_HW_ECC_FIXUP | 5393db446aSBoris Brezillon DENALI_CAP_DMA_64BIT, 5493db446aSBoris Brezillon .ecc_caps = &denali_uniphier_v5b_ecc_caps, 5593db446aSBoris Brezillon }; 5693db446aSBoris Brezillon 5793db446aSBoris Brezillon static const struct of_device_id denali_nand_dt_ids[] = { 5893db446aSBoris Brezillon { 5993db446aSBoris Brezillon .compatible = "altr,socfpga-denali-nand", 6093db446aSBoris Brezillon .data = &denali_socfpga_data, 6193db446aSBoris Brezillon }, 6293db446aSBoris Brezillon { 6393db446aSBoris Brezillon .compatible = "socionext,uniphier-denali-nand-v5a", 6493db446aSBoris Brezillon .data = &denali_uniphier_v5a_data, 6593db446aSBoris Brezillon }, 6693db446aSBoris Brezillon { 6793db446aSBoris Brezillon .compatible = "socionext,uniphier-denali-nand-v5b", 6893db446aSBoris Brezillon .data = &denali_uniphier_v5b_data, 6993db446aSBoris Brezillon }, 7093db446aSBoris Brezillon { /* sentinel */ } 7193db446aSBoris Brezillon }; 7293db446aSBoris Brezillon MODULE_DEVICE_TABLE(of, denali_nand_dt_ids); 7393db446aSBoris Brezillon 7493db446aSBoris Brezillon static int denali_dt_probe(struct platform_device *pdev) 7593db446aSBoris Brezillon { 76cd1beffaSMasahiro Yamada struct device *dev = &pdev->dev; 7793db446aSBoris Brezillon struct resource *res; 7893db446aSBoris Brezillon struct denali_dt *dt; 7993db446aSBoris Brezillon const struct denali_dt_data *data; 8093db446aSBoris Brezillon struct denali_nand_info *denali; 8193db446aSBoris Brezillon int ret; 8293db446aSBoris Brezillon 83cd1beffaSMasahiro Yamada dt = devm_kzalloc(dev, sizeof(*dt), GFP_KERNEL); 8493db446aSBoris Brezillon if (!dt) 8593db446aSBoris Brezillon return -ENOMEM; 8693db446aSBoris Brezillon denali = &dt->denali; 8793db446aSBoris Brezillon 88cd1beffaSMasahiro Yamada data = of_device_get_match_data(dev); 8993db446aSBoris Brezillon if (data) { 9093db446aSBoris Brezillon denali->revision = data->revision; 9193db446aSBoris Brezillon denali->caps = data->caps; 9293db446aSBoris Brezillon denali->ecc_caps = data->ecc_caps; 9393db446aSBoris Brezillon } 9493db446aSBoris Brezillon 95cd1beffaSMasahiro Yamada denali->dev = dev; 9693db446aSBoris Brezillon denali->irq = platform_get_irq(pdev, 0); 9793db446aSBoris Brezillon if (denali->irq < 0) { 98cd1beffaSMasahiro Yamada dev_err(dev, "no irq defined\n"); 9993db446aSBoris Brezillon return denali->irq; 10093db446aSBoris Brezillon } 10193db446aSBoris Brezillon 10293db446aSBoris Brezillon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "denali_reg"); 103cd1beffaSMasahiro Yamada denali->reg = devm_ioremap_resource(dev, res); 10493db446aSBoris Brezillon if (IS_ERR(denali->reg)) 10593db446aSBoris Brezillon return PTR_ERR(denali->reg); 10693db446aSBoris Brezillon 10793db446aSBoris Brezillon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data"); 108cd1beffaSMasahiro Yamada denali->host = devm_ioremap_resource(dev, res); 10993db446aSBoris Brezillon if (IS_ERR(denali->host)) 11093db446aSBoris Brezillon return PTR_ERR(denali->host); 11193db446aSBoris Brezillon 1126f1fe97bSMasahiro Yamada dt->clk = devm_clk_get(dev, "nand"); 1136f1fe97bSMasahiro Yamada if (IS_ERR(dt->clk)) 11493db446aSBoris Brezillon return PTR_ERR(dt->clk); 1156f1fe97bSMasahiro Yamada 1166f1fe97bSMasahiro Yamada dt->clk_x = devm_clk_get(dev, "nand_x"); 1176f1fe97bSMasahiro Yamada if (IS_ERR(dt->clk_x)) 118*53bcbb83SMasahiro Yamada return PTR_ERR(dt->clk_x); 1196f1fe97bSMasahiro Yamada 1206f1fe97bSMasahiro Yamada dt->clk_ecc = devm_clk_get(dev, "ecc"); 1216f1fe97bSMasahiro Yamada if (IS_ERR(dt->clk_ecc)) 122*53bcbb83SMasahiro Yamada return PTR_ERR(dt->clk_ecc); 1236f1fe97bSMasahiro Yamada 12493db446aSBoris Brezillon ret = clk_prepare_enable(dt->clk); 12593db446aSBoris Brezillon if (ret) 12693db446aSBoris Brezillon return ret; 12793db446aSBoris Brezillon 1286f1fe97bSMasahiro Yamada ret = clk_prepare_enable(dt->clk_x); 1296f1fe97bSMasahiro Yamada if (ret) 1306f1fe97bSMasahiro Yamada goto out_disable_clk; 1316f1fe97bSMasahiro Yamada 1326f1fe97bSMasahiro Yamada ret = clk_prepare_enable(dt->clk_ecc); 1336f1fe97bSMasahiro Yamada if (ret) 1346f1fe97bSMasahiro Yamada goto out_disable_clk_x; 1356f1fe97bSMasahiro Yamada 1361dfac31aSMasahiro Yamada denali->clk_rate = clk_get_rate(dt->clk); 1376f1fe97bSMasahiro Yamada denali->clk_x_rate = clk_get_rate(dt->clk_x); 13893db446aSBoris Brezillon 13993db446aSBoris Brezillon ret = denali_init(denali); 14093db446aSBoris Brezillon if (ret) 1416f1fe97bSMasahiro Yamada goto out_disable_clk_ecc; 14293db446aSBoris Brezillon 14393db446aSBoris Brezillon platform_set_drvdata(pdev, dt); 14493db446aSBoris Brezillon return 0; 14593db446aSBoris Brezillon 1466f1fe97bSMasahiro Yamada out_disable_clk_ecc: 1476f1fe97bSMasahiro Yamada clk_disable_unprepare(dt->clk_ecc); 1486f1fe97bSMasahiro Yamada out_disable_clk_x: 1496f1fe97bSMasahiro Yamada clk_disable_unprepare(dt->clk_x); 15093db446aSBoris Brezillon out_disable_clk: 15193db446aSBoris Brezillon clk_disable_unprepare(dt->clk); 15293db446aSBoris Brezillon 15393db446aSBoris Brezillon return ret; 15493db446aSBoris Brezillon } 15593db446aSBoris Brezillon 15693db446aSBoris Brezillon static int denali_dt_remove(struct platform_device *pdev) 15793db446aSBoris Brezillon { 15893db446aSBoris Brezillon struct denali_dt *dt = platform_get_drvdata(pdev); 15993db446aSBoris Brezillon 16093db446aSBoris Brezillon denali_remove(&dt->denali); 1616f1fe97bSMasahiro Yamada clk_disable_unprepare(dt->clk_ecc); 1626f1fe97bSMasahiro Yamada clk_disable_unprepare(dt->clk_x); 16393db446aSBoris Brezillon clk_disable_unprepare(dt->clk); 16493db446aSBoris Brezillon 16593db446aSBoris Brezillon return 0; 16693db446aSBoris Brezillon } 16793db446aSBoris Brezillon 16893db446aSBoris Brezillon static struct platform_driver denali_dt_driver = { 16993db446aSBoris Brezillon .probe = denali_dt_probe, 17093db446aSBoris Brezillon .remove = denali_dt_remove, 17193db446aSBoris Brezillon .driver = { 17293db446aSBoris Brezillon .name = "denali-nand-dt", 17393db446aSBoris Brezillon .of_match_table = denali_nand_dt_ids, 17493db446aSBoris Brezillon }, 17593db446aSBoris Brezillon }; 17693db446aSBoris Brezillon module_platform_driver(denali_dt_driver); 17793db446aSBoris Brezillon 178f1bf52e8SMasahiro Yamada MODULE_LICENSE("GPL v2"); 17993db446aSBoris Brezillon MODULE_AUTHOR("Jamie Iles"); 18093db446aSBoris Brezillon MODULE_DESCRIPTION("DT driver for Denali NAND controller"); 181