xref: /openbmc/linux/drivers/mtd/nand/core.c (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
19c3736a3SBoris Brezillon // SPDX-License-Identifier: GPL-2.0
29c3736a3SBoris Brezillon /*
39c3736a3SBoris Brezillon  * Copyright (c) 2017 Free Electrons
49c3736a3SBoris Brezillon  *
59c3736a3SBoris Brezillon  * Authors:
69c3736a3SBoris Brezillon  *	Boris Brezillon <boris.brezillon@free-electrons.com>
79c3736a3SBoris Brezillon  *	Peter Pan <peterpandong@micron.com>
89c3736a3SBoris Brezillon  */
99c3736a3SBoris Brezillon 
109c3736a3SBoris Brezillon #define pr_fmt(fmt)	"nand: " fmt
119c3736a3SBoris Brezillon 
129c3736a3SBoris Brezillon #include <linux/module.h>
139c3736a3SBoris Brezillon #include <linux/mtd/nand.h>
149c3736a3SBoris Brezillon 
159c3736a3SBoris Brezillon /**
169c3736a3SBoris Brezillon  * nanddev_isbad() - Check if a block is bad
179c3736a3SBoris Brezillon  * @nand: NAND device
189c3736a3SBoris Brezillon  * @pos: position pointing to the block we want to check
199c3736a3SBoris Brezillon  *
209c3736a3SBoris Brezillon  * Return: true if the block is bad, false otherwise.
219c3736a3SBoris Brezillon  */
nanddev_isbad(struct nand_device * nand,const struct nand_pos * pos)229c3736a3SBoris Brezillon bool nanddev_isbad(struct nand_device *nand, const struct nand_pos *pos)
239c3736a3SBoris Brezillon {
24ad5e35f5SMiquel Raynal 	if (mtd_check_expert_analysis_mode())
2567b967ddSMiquel Raynal 		return false;
2667b967ddSMiquel Raynal 
279c3736a3SBoris Brezillon 	if (nanddev_bbt_is_initialized(nand)) {
289c3736a3SBoris Brezillon 		unsigned int entry;
299c3736a3SBoris Brezillon 		int status;
309c3736a3SBoris Brezillon 
319c3736a3SBoris Brezillon 		entry = nanddev_bbt_pos_to_entry(nand, pos);
329c3736a3SBoris Brezillon 		status = nanddev_bbt_get_block_status(nand, entry);
339c3736a3SBoris Brezillon 		/* Lazy block status retrieval */
349c3736a3SBoris Brezillon 		if (status == NAND_BBT_BLOCK_STATUS_UNKNOWN) {
359c3736a3SBoris Brezillon 			if (nand->ops->isbad(nand, pos))
369c3736a3SBoris Brezillon 				status = NAND_BBT_BLOCK_FACTORY_BAD;
379c3736a3SBoris Brezillon 			else
389c3736a3SBoris Brezillon 				status = NAND_BBT_BLOCK_GOOD;
399c3736a3SBoris Brezillon 
409c3736a3SBoris Brezillon 			nanddev_bbt_set_block_status(nand, entry, status);
419c3736a3SBoris Brezillon 		}
429c3736a3SBoris Brezillon 
439c3736a3SBoris Brezillon 		if (status == NAND_BBT_BLOCK_WORN ||
449c3736a3SBoris Brezillon 		    status == NAND_BBT_BLOCK_FACTORY_BAD)
459c3736a3SBoris Brezillon 			return true;
469c3736a3SBoris Brezillon 
479c3736a3SBoris Brezillon 		return false;
489c3736a3SBoris Brezillon 	}
499c3736a3SBoris Brezillon 
509c3736a3SBoris Brezillon 	return nand->ops->isbad(nand, pos);
519c3736a3SBoris Brezillon }
529c3736a3SBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_isbad);
539c3736a3SBoris Brezillon 
549c3736a3SBoris Brezillon /**
559c3736a3SBoris Brezillon  * nanddev_markbad() - Mark a block as bad
569c3736a3SBoris Brezillon  * @nand: NAND device
57097ccca7SXiaolei Li  * @pos: position of the block to mark bad
589c3736a3SBoris Brezillon  *
599c3736a3SBoris Brezillon  * Mark a block bad. This function is updating the BBT if available and
609c3736a3SBoris Brezillon  * calls the low-level markbad hook (nand->ops->markbad()).
619c3736a3SBoris Brezillon  *
629c3736a3SBoris Brezillon  * Return: 0 in case of success, a negative error code otherwise.
639c3736a3SBoris Brezillon  */
nanddev_markbad(struct nand_device * nand,const struct nand_pos * pos)649c3736a3SBoris Brezillon int nanddev_markbad(struct nand_device *nand, const struct nand_pos *pos)
659c3736a3SBoris Brezillon {
669c3736a3SBoris Brezillon 	struct mtd_info *mtd = nanddev_to_mtd(nand);
679c3736a3SBoris Brezillon 	unsigned int entry;
689c3736a3SBoris Brezillon 	int ret = 0;
699c3736a3SBoris Brezillon 
709c3736a3SBoris Brezillon 	if (nanddev_isbad(nand, pos))
719c3736a3SBoris Brezillon 		return 0;
729c3736a3SBoris Brezillon 
739c3736a3SBoris Brezillon 	ret = nand->ops->markbad(nand, pos);
749c3736a3SBoris Brezillon 	if (ret)
759c3736a3SBoris Brezillon 		pr_warn("failed to write BBM to block @%llx (err = %d)\n",
769c3736a3SBoris Brezillon 			nanddev_pos_to_offs(nand, pos), ret);
779c3736a3SBoris Brezillon 
789c3736a3SBoris Brezillon 	if (!nanddev_bbt_is_initialized(nand))
799c3736a3SBoris Brezillon 		goto out;
809c3736a3SBoris Brezillon 
819c3736a3SBoris Brezillon 	entry = nanddev_bbt_pos_to_entry(nand, pos);
829c3736a3SBoris Brezillon 	ret = nanddev_bbt_set_block_status(nand, entry, NAND_BBT_BLOCK_WORN);
839c3736a3SBoris Brezillon 	if (ret)
849c3736a3SBoris Brezillon 		goto out;
859c3736a3SBoris Brezillon 
869c3736a3SBoris Brezillon 	ret = nanddev_bbt_update(nand);
879c3736a3SBoris Brezillon 
889c3736a3SBoris Brezillon out:
899c3736a3SBoris Brezillon 	if (!ret)
909c3736a3SBoris Brezillon 		mtd->ecc_stats.badblocks++;
919c3736a3SBoris Brezillon 
929c3736a3SBoris Brezillon 	return ret;
939c3736a3SBoris Brezillon }
949c3736a3SBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_markbad);
959c3736a3SBoris Brezillon 
969c3736a3SBoris Brezillon /**
979c3736a3SBoris Brezillon  * nanddev_isreserved() - Check whether an eraseblock is reserved or not
989c3736a3SBoris Brezillon  * @nand: NAND device
999c3736a3SBoris Brezillon  * @pos: NAND position to test
1009c3736a3SBoris Brezillon  *
1019c3736a3SBoris Brezillon  * Checks whether the eraseblock pointed by @pos is reserved or not.
1029c3736a3SBoris Brezillon  *
1039c3736a3SBoris Brezillon  * Return: true if the eraseblock is reserved, false otherwise.
1049c3736a3SBoris Brezillon  */
nanddev_isreserved(struct nand_device * nand,const struct nand_pos * pos)1059c3736a3SBoris Brezillon bool nanddev_isreserved(struct nand_device *nand, const struct nand_pos *pos)
1069c3736a3SBoris Brezillon {
1079c3736a3SBoris Brezillon 	unsigned int entry;
1089c3736a3SBoris Brezillon 	int status;
1099c3736a3SBoris Brezillon 
1109c3736a3SBoris Brezillon 	if (!nanddev_bbt_is_initialized(nand))
1119c3736a3SBoris Brezillon 		return false;
1129c3736a3SBoris Brezillon 
1139c3736a3SBoris Brezillon 	/* Return info from the table */
1149c3736a3SBoris Brezillon 	entry = nanddev_bbt_pos_to_entry(nand, pos);
1159c3736a3SBoris Brezillon 	status = nanddev_bbt_get_block_status(nand, entry);
1169c3736a3SBoris Brezillon 	return status == NAND_BBT_BLOCK_RESERVED;
1179c3736a3SBoris Brezillon }
1189c3736a3SBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_isreserved);
1199c3736a3SBoris Brezillon 
1209c3736a3SBoris Brezillon /**
1219c3736a3SBoris Brezillon  * nanddev_erase() - Erase a NAND portion
1229c3736a3SBoris Brezillon  * @nand: NAND device
123097ccca7SXiaolei Li  * @pos: position of the block to erase
1249c3736a3SBoris Brezillon  *
125097ccca7SXiaolei Li  * Erases the block if it's not bad.
1269c3736a3SBoris Brezillon  *
1279c3736a3SBoris Brezillon  * Return: 0 in case of success, a negative error code otherwise.
1289c3736a3SBoris Brezillon  */
nanddev_erase(struct nand_device * nand,const struct nand_pos * pos)129*a50ae8c9SDario Binacchi static int nanddev_erase(struct nand_device *nand, const struct nand_pos *pos)
1309c3736a3SBoris Brezillon {
1319c3736a3SBoris Brezillon 	if (nanddev_isbad(nand, pos) || nanddev_isreserved(nand, pos)) {
1329c3736a3SBoris Brezillon 		pr_warn("attempt to erase a bad/reserved block @%llx\n",
1339c3736a3SBoris Brezillon 			nanddev_pos_to_offs(nand, pos));
1349c3736a3SBoris Brezillon 		return -EIO;
1359c3736a3SBoris Brezillon 	}
1369c3736a3SBoris Brezillon 
1379c3736a3SBoris Brezillon 	return nand->ops->erase(nand, pos);
1389c3736a3SBoris Brezillon }
1399c3736a3SBoris Brezillon 
1409c3736a3SBoris Brezillon /**
1419c3736a3SBoris Brezillon  * nanddev_mtd_erase() - Generic mtd->_erase() implementation for NAND devices
1429c3736a3SBoris Brezillon  * @mtd: MTD device
1439c3736a3SBoris Brezillon  * @einfo: erase request
1449c3736a3SBoris Brezillon  *
1459c3736a3SBoris Brezillon  * This is a simple mtd->_erase() implementation iterating over all blocks
1469c3736a3SBoris Brezillon  * concerned by @einfo and calling nand->ops->erase() on each of them.
1479c3736a3SBoris Brezillon  *
1489c3736a3SBoris Brezillon  * Note that mtd->_erase should not be directly assigned to this helper,
1499c3736a3SBoris Brezillon  * because there's no locking here. NAND specialized layers should instead
1509c3736a3SBoris Brezillon  * implement there own wrapper around nanddev_mtd_erase() taking the
1519c3736a3SBoris Brezillon  * appropriate lock before calling nanddev_mtd_erase().
1529c3736a3SBoris Brezillon  *
1539c3736a3SBoris Brezillon  * Return: 0 in case of success, a negative error code otherwise.
1549c3736a3SBoris Brezillon  */
nanddev_mtd_erase(struct mtd_info * mtd,struct erase_info * einfo)1559c3736a3SBoris Brezillon int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo)
1569c3736a3SBoris Brezillon {
1579c3736a3SBoris Brezillon 	struct nand_device *nand = mtd_to_nanddev(mtd);
1589c3736a3SBoris Brezillon 	struct nand_pos pos, last;
1599c3736a3SBoris Brezillon 	int ret;
1609c3736a3SBoris Brezillon 
1619c3736a3SBoris Brezillon 	nanddev_offs_to_pos(nand, einfo->addr, &pos);
1629c3736a3SBoris Brezillon 	nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last);
1639c3736a3SBoris Brezillon 	while (nanddev_pos_cmp(&pos, &last) <= 0) {
1649c3736a3SBoris Brezillon 		ret = nanddev_erase(nand, &pos);
1659c3736a3SBoris Brezillon 		if (ret) {
1669c3736a3SBoris Brezillon 			einfo->fail_addr = nanddev_pos_to_offs(nand, &pos);
1679c3736a3SBoris Brezillon 
1689c3736a3SBoris Brezillon 			return ret;
1699c3736a3SBoris Brezillon 		}
1709c3736a3SBoris Brezillon 
1719c3736a3SBoris Brezillon 		nanddev_pos_next_eraseblock(nand, &pos);
1729c3736a3SBoris Brezillon 	}
1739c3736a3SBoris Brezillon 
1749c3736a3SBoris Brezillon 	return 0;
1759c3736a3SBoris Brezillon }
1769c3736a3SBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_mtd_erase);
1779c3736a3SBoris Brezillon 
1789c3736a3SBoris Brezillon /**
179377e517bSBoris Brezillon  * nanddev_mtd_max_bad_blocks() - Get the maximum number of bad eraseblock on
180377e517bSBoris Brezillon  *				  a specific region of the NAND device
181377e517bSBoris Brezillon  * @mtd: MTD device
182377e517bSBoris Brezillon  * @offs: offset of the NAND region
183377e517bSBoris Brezillon  * @len: length of the NAND region
184377e517bSBoris Brezillon  *
185377e517bSBoris Brezillon  * Default implementation for mtd->_max_bad_blocks(). Only works if
186377e517bSBoris Brezillon  * nand->memorg.max_bad_eraseblocks_per_lun is > 0.
187377e517bSBoris Brezillon  *
188377e517bSBoris Brezillon  * Return: a positive number encoding the maximum number of eraseblocks on a
189377e517bSBoris Brezillon  * portion of memory, a negative error code otherwise.
190377e517bSBoris Brezillon  */
nanddev_mtd_max_bad_blocks(struct mtd_info * mtd,loff_t offs,size_t len)191377e517bSBoris Brezillon int nanddev_mtd_max_bad_blocks(struct mtd_info *mtd, loff_t offs, size_t len)
192377e517bSBoris Brezillon {
193377e517bSBoris Brezillon 	struct nand_device *nand = mtd_to_nanddev(mtd);
194377e517bSBoris Brezillon 	struct nand_pos pos, end;
195377e517bSBoris Brezillon 	unsigned int max_bb = 0;
196377e517bSBoris Brezillon 
197377e517bSBoris Brezillon 	if (!nand->memorg.max_bad_eraseblocks_per_lun)
198377e517bSBoris Brezillon 		return -ENOTSUPP;
199377e517bSBoris Brezillon 
200377e517bSBoris Brezillon 	nanddev_offs_to_pos(nand, offs, &pos);
201377e517bSBoris Brezillon 	nanddev_offs_to_pos(nand, offs + len, &end);
202377e517bSBoris Brezillon 
203377e517bSBoris Brezillon 	for (nanddev_offs_to_pos(nand, offs, &pos);
204377e517bSBoris Brezillon 	     nanddev_pos_cmp(&pos, &end) < 0;
205377e517bSBoris Brezillon 	     nanddev_pos_next_lun(nand, &pos))
206377e517bSBoris Brezillon 		max_bb += nand->memorg.max_bad_eraseblocks_per_lun;
207377e517bSBoris Brezillon 
208377e517bSBoris Brezillon 	return max_bb;
209377e517bSBoris Brezillon }
210377e517bSBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_mtd_max_bad_blocks);
211377e517bSBoris Brezillon 
212377e517bSBoris Brezillon /**
2136b0c3b84SMiquel Raynal  * nanddev_get_ecc_engine() - Find and get a suitable ECC engine
2146b0c3b84SMiquel Raynal  * @nand: NAND device
2156b0c3b84SMiquel Raynal  */
nanddev_get_ecc_engine(struct nand_device * nand)2166b0c3b84SMiquel Raynal static int nanddev_get_ecc_engine(struct nand_device *nand)
2176b0c3b84SMiquel Raynal {
2186b0c3b84SMiquel Raynal 	int engine_type;
2196b0c3b84SMiquel Raynal 
2206b0c3b84SMiquel Raynal 	/* Read the user desires in terms of ECC engine/configuration */
2216b0c3b84SMiquel Raynal 	of_get_nand_ecc_user_config(nand);
2226b0c3b84SMiquel Raynal 
2236b0c3b84SMiquel Raynal 	engine_type = nand->ecc.user_conf.engine_type;
2246b0c3b84SMiquel Raynal 	if (engine_type == NAND_ECC_ENGINE_TYPE_INVALID)
2256b0c3b84SMiquel Raynal 		engine_type = nand->ecc.defaults.engine_type;
2266b0c3b84SMiquel Raynal 
2276b0c3b84SMiquel Raynal 	switch (engine_type) {
2286b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_NONE:
2296b0c3b84SMiquel Raynal 		return 0;
2306b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_SOFT:
2316b0c3b84SMiquel Raynal 		nand->ecc.engine = nand_ecc_get_sw_engine(nand);
2326b0c3b84SMiquel Raynal 		break;
2336b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_ON_DIE:
2346b0c3b84SMiquel Raynal 		nand->ecc.engine = nand_ecc_get_on_die_hw_engine(nand);
2356b0c3b84SMiquel Raynal 		break;
2366b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_ON_HOST:
23796489c1cSMiquel Raynal 		nand->ecc.engine = nand_ecc_get_on_host_hw_engine(nand);
23896489c1cSMiquel Raynal 		if (PTR_ERR(nand->ecc.engine) == -EPROBE_DEFER)
23996489c1cSMiquel Raynal 			return -EPROBE_DEFER;
2406b0c3b84SMiquel Raynal 		break;
2416b0c3b84SMiquel Raynal 	default:
2426b0c3b84SMiquel Raynal 		pr_err("Missing ECC engine type\n");
2436b0c3b84SMiquel Raynal 	}
2446b0c3b84SMiquel Raynal 
2456b0c3b84SMiquel Raynal 	if (!nand->ecc.engine)
2466b0c3b84SMiquel Raynal 		return  -EINVAL;
2476b0c3b84SMiquel Raynal 
2486b0c3b84SMiquel Raynal 	return 0;
2496b0c3b84SMiquel Raynal }
2506b0c3b84SMiquel Raynal 
2516b0c3b84SMiquel Raynal /**
2526b0c3b84SMiquel Raynal  * nanddev_put_ecc_engine() - Dettach and put the in-use ECC engine
2536b0c3b84SMiquel Raynal  * @nand: NAND device
2546b0c3b84SMiquel Raynal  */
nanddev_put_ecc_engine(struct nand_device * nand)2556b0c3b84SMiquel Raynal static int nanddev_put_ecc_engine(struct nand_device *nand)
2566b0c3b84SMiquel Raynal {
2576b0c3b84SMiquel Raynal 	switch (nand->ecc.ctx.conf.engine_type) {
2586b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_ON_HOST:
25996489c1cSMiquel Raynal 		nand_ecc_put_on_host_hw_engine(nand);
2606b0c3b84SMiquel Raynal 		break;
2616b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_NONE:
2626b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_SOFT:
2636b0c3b84SMiquel Raynal 	case NAND_ECC_ENGINE_TYPE_ON_DIE:
2646b0c3b84SMiquel Raynal 	default:
2656b0c3b84SMiquel Raynal 		break;
2666b0c3b84SMiquel Raynal 	}
2676b0c3b84SMiquel Raynal 
2686b0c3b84SMiquel Raynal 	return 0;
2696b0c3b84SMiquel Raynal }
2706b0c3b84SMiquel Raynal 
2716b0c3b84SMiquel Raynal /**
2726b0c3b84SMiquel Raynal  * nanddev_find_ecc_configuration() - Find a suitable ECC configuration
2736b0c3b84SMiquel Raynal  * @nand: NAND device
2746b0c3b84SMiquel Raynal  */
nanddev_find_ecc_configuration(struct nand_device * nand)2756b0c3b84SMiquel Raynal static int nanddev_find_ecc_configuration(struct nand_device *nand)
2766b0c3b84SMiquel Raynal {
2776b0c3b84SMiquel Raynal 	int ret;
2786b0c3b84SMiquel Raynal 
2796b0c3b84SMiquel Raynal 	if (!nand->ecc.engine)
2806b0c3b84SMiquel Raynal 		return -ENOTSUPP;
2816b0c3b84SMiquel Raynal 
2826b0c3b84SMiquel Raynal 	ret = nand_ecc_init_ctx(nand);
2836b0c3b84SMiquel Raynal 	if (ret)
2846b0c3b84SMiquel Raynal 		return ret;
2856b0c3b84SMiquel Raynal 
2866b0c3b84SMiquel Raynal 	if (!nand_ecc_is_strong_enough(nand))
2876b0c3b84SMiquel Raynal 		pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n",
2886b0c3b84SMiquel Raynal 			nand->mtd.name);
2896b0c3b84SMiquel Raynal 
2906b0c3b84SMiquel Raynal 	return 0;
2916b0c3b84SMiquel Raynal }
2926b0c3b84SMiquel Raynal 
2936b0c3b84SMiquel Raynal /**
2946b0c3b84SMiquel Raynal  * nanddev_ecc_engine_init() - Initialize an ECC engine for the chip
2956b0c3b84SMiquel Raynal  * @nand: NAND device
2966b0c3b84SMiquel Raynal  */
nanddev_ecc_engine_init(struct nand_device * nand)2976b0c3b84SMiquel Raynal int nanddev_ecc_engine_init(struct nand_device *nand)
2986b0c3b84SMiquel Raynal {
2996b0c3b84SMiquel Raynal 	int ret;
3006b0c3b84SMiquel Raynal 
3016b0c3b84SMiquel Raynal 	/* Look for the ECC engine to use */
3026b0c3b84SMiquel Raynal 	ret = nanddev_get_ecc_engine(nand);
3036b0c3b84SMiquel Raynal 	if (ret) {
30496489c1cSMiquel Raynal 		if (ret != -EPROBE_DEFER)
3056b0c3b84SMiquel Raynal 			pr_err("No ECC engine found\n");
30696489c1cSMiquel Raynal 
3076b0c3b84SMiquel Raynal 		return ret;
3086b0c3b84SMiquel Raynal 	}
3096b0c3b84SMiquel Raynal 
3106b0c3b84SMiquel Raynal 	/* No ECC engine requested */
3116b0c3b84SMiquel Raynal 	if (!nand->ecc.engine)
3126b0c3b84SMiquel Raynal 		return 0;
3136b0c3b84SMiquel Raynal 
3146b0c3b84SMiquel Raynal 	/* Configure the engine: balance user input and chip requirements */
3156b0c3b84SMiquel Raynal 	ret = nanddev_find_ecc_configuration(nand);
3166b0c3b84SMiquel Raynal 	if (ret) {
3176b0c3b84SMiquel Raynal 		pr_err("No suitable ECC configuration\n");
3186b0c3b84SMiquel Raynal 		nanddev_put_ecc_engine(nand);
3196b0c3b84SMiquel Raynal 
3206b0c3b84SMiquel Raynal 		return ret;
3216b0c3b84SMiquel Raynal 	}
3226b0c3b84SMiquel Raynal 
3236b0c3b84SMiquel Raynal 	return 0;
3246b0c3b84SMiquel Raynal }
3256b0c3b84SMiquel Raynal EXPORT_SYMBOL_GPL(nanddev_ecc_engine_init);
3266b0c3b84SMiquel Raynal 
3276b0c3b84SMiquel Raynal /**
3286b0c3b84SMiquel Raynal  * nanddev_ecc_engine_cleanup() - Cleanup ECC engine initializations
3296b0c3b84SMiquel Raynal  * @nand: NAND device
3306b0c3b84SMiquel Raynal  */
nanddev_ecc_engine_cleanup(struct nand_device * nand)3316b0c3b84SMiquel Raynal void nanddev_ecc_engine_cleanup(struct nand_device *nand)
3326b0c3b84SMiquel Raynal {
3336b0c3b84SMiquel Raynal 	if (nand->ecc.engine)
3346b0c3b84SMiquel Raynal 		nand_ecc_cleanup_ctx(nand);
3356b0c3b84SMiquel Raynal 
3366b0c3b84SMiquel Raynal 	nanddev_put_ecc_engine(nand);
3376b0c3b84SMiquel Raynal }
3386b0c3b84SMiquel Raynal EXPORT_SYMBOL_GPL(nanddev_ecc_engine_cleanup);
3396b0c3b84SMiquel Raynal 
3406b0c3b84SMiquel Raynal /**
3419c3736a3SBoris Brezillon  * nanddev_init() - Initialize a NAND device
3429c3736a3SBoris Brezillon  * @nand: NAND device
3439c3736a3SBoris Brezillon  * @ops: NAND device operations
344097ccca7SXiaolei Li  * @owner: NAND device owner
3459c3736a3SBoris Brezillon  *
346097ccca7SXiaolei Li  * Initializes a NAND device object. Consistency checks are done on @ops and
347097ccca7SXiaolei Li  * @nand->memorg. Also takes care of initializing the BBT.
3489c3736a3SBoris Brezillon  *
3499c3736a3SBoris Brezillon  * Return: 0 in case of success, a negative error code otherwise.
3509c3736a3SBoris Brezillon  */
nanddev_init(struct nand_device * nand,const struct nand_ops * ops,struct module * owner)3519c3736a3SBoris Brezillon int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
3529c3736a3SBoris Brezillon 		 struct module *owner)
3539c3736a3SBoris Brezillon {
3549c3736a3SBoris Brezillon 	struct mtd_info *mtd = nanddev_to_mtd(nand);
3559c3736a3SBoris Brezillon 	struct nand_memory_organization *memorg = nanddev_get_memorg(nand);
3569c3736a3SBoris Brezillon 
3579c3736a3SBoris Brezillon 	if (!nand || !ops)
3589c3736a3SBoris Brezillon 		return -EINVAL;
3599c3736a3SBoris Brezillon 
3609c3736a3SBoris Brezillon 	if (!ops->erase || !ops->markbad || !ops->isbad)
3619c3736a3SBoris Brezillon 		return -EINVAL;
3629c3736a3SBoris Brezillon 
3639c3736a3SBoris Brezillon 	if (!memorg->bits_per_cell || !memorg->pagesize ||
3649c3736a3SBoris Brezillon 	    !memorg->pages_per_eraseblock || !memorg->eraseblocks_per_lun ||
3659c3736a3SBoris Brezillon 	    !memorg->planes_per_lun || !memorg->luns_per_target ||
3669c3736a3SBoris Brezillon 	    !memorg->ntargets)
3679c3736a3SBoris Brezillon 		return -EINVAL;
3689c3736a3SBoris Brezillon 
3699c3736a3SBoris Brezillon 	nand->rowconv.eraseblock_addr_shift =
3709c3736a3SBoris Brezillon 					fls(memorg->pages_per_eraseblock - 1);
3719c3736a3SBoris Brezillon 	nand->rowconv.lun_addr_shift = fls(memorg->eraseblocks_per_lun - 1) +
3729c3736a3SBoris Brezillon 				       nand->rowconv.eraseblock_addr_shift;
3739c3736a3SBoris Brezillon 
3749c3736a3SBoris Brezillon 	nand->ops = ops;
3759c3736a3SBoris Brezillon 
3769c3736a3SBoris Brezillon 	mtd->type = memorg->bits_per_cell == 1 ?
3779c3736a3SBoris Brezillon 		    MTD_NANDFLASH : MTD_MLCNANDFLASH;
3789c3736a3SBoris Brezillon 	mtd->flags = MTD_CAP_NANDFLASH;
3799c3736a3SBoris Brezillon 	mtd->erasesize = memorg->pagesize * memorg->pages_per_eraseblock;
3809c3736a3SBoris Brezillon 	mtd->writesize = memorg->pagesize;
3819c3736a3SBoris Brezillon 	mtd->writebufsize = memorg->pagesize;
3829c3736a3SBoris Brezillon 	mtd->oobsize = memorg->oobsize;
3839c3736a3SBoris Brezillon 	mtd->size = nanddev_size(nand);
3849c3736a3SBoris Brezillon 	mtd->owner = owner;
3859c3736a3SBoris Brezillon 
3869c3736a3SBoris Brezillon 	return nanddev_bbt_init(nand);
3879c3736a3SBoris Brezillon }
3889c3736a3SBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_init);
3899c3736a3SBoris Brezillon 
3909c3736a3SBoris Brezillon /**
3919c3736a3SBoris Brezillon  * nanddev_cleanup() - Release resources allocated in nanddev_init()
3929c3736a3SBoris Brezillon  * @nand: NAND device
3939c3736a3SBoris Brezillon  *
3949c3736a3SBoris Brezillon  * Basically undoes what has been done in nanddev_init().
3959c3736a3SBoris Brezillon  */
nanddev_cleanup(struct nand_device * nand)3969c3736a3SBoris Brezillon void nanddev_cleanup(struct nand_device *nand)
3979c3736a3SBoris Brezillon {
3989c3736a3SBoris Brezillon 	if (nanddev_bbt_is_initialized(nand))
3999c3736a3SBoris Brezillon 		nanddev_bbt_cleanup(nand);
4009c3736a3SBoris Brezillon }
4019c3736a3SBoris Brezillon EXPORT_SYMBOL_GPL(nanddev_cleanup);
4029c3736a3SBoris Brezillon 
4039c3736a3SBoris Brezillon MODULE_DESCRIPTION("Generic NAND framework");
4049c3736a3SBoris Brezillon MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
4059c3736a3SBoris Brezillon MODULE_LICENSE("GPL v2");
406