1 /* 2 * ST Microelectronics MFD: stmpe's driver 3 * 4 * Copyright (C) ST-Ericsson SA 2010 5 * 6 * License Terms: GNU General Public License, version 2 7 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 8 */ 9 10 #include <linux/gpio.h> 11 #include <linux/kernel.h> 12 #include <linux/interrupt.h> 13 #include <linux/irq.h> 14 #include <linux/pm.h> 15 #include <linux/slab.h> 16 #include <linux/mfd/core.h> 17 #include "stmpe.h" 18 19 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 20 { 21 return stmpe->variant->enable(stmpe, blocks, true); 22 } 23 24 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 25 { 26 return stmpe->variant->enable(stmpe, blocks, false); 27 } 28 29 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) 30 { 31 int ret; 32 33 ret = stmpe->ci->read_byte(stmpe, reg); 34 if (ret < 0) 35 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); 36 37 dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); 38 39 return ret; 40 } 41 42 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 43 { 44 int ret; 45 46 dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); 47 48 ret = stmpe->ci->write_byte(stmpe, reg, val); 49 if (ret < 0) 50 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); 51 52 return ret; 53 } 54 55 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 56 { 57 int ret; 58 59 ret = __stmpe_reg_read(stmpe, reg); 60 if (ret < 0) 61 return ret; 62 63 ret &= ~mask; 64 ret |= val; 65 66 return __stmpe_reg_write(stmpe, reg, ret); 67 } 68 69 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, 70 u8 *values) 71 { 72 int ret; 73 74 ret = stmpe->ci->read_block(stmpe, reg, length, values); 75 if (ret < 0) 76 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); 77 78 dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); 79 stmpe_dump_bytes("stmpe rd: ", values, length); 80 81 return ret; 82 } 83 84 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 85 const u8 *values) 86 { 87 int ret; 88 89 dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); 90 stmpe_dump_bytes("stmpe wr: ", values, length); 91 92 ret = stmpe->ci->write_block(stmpe, reg, length, values); 93 if (ret < 0) 94 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); 95 96 return ret; 97 } 98 99 /** 100 * stmpe_enable - enable blocks on an STMPE device 101 * @stmpe: Device to work on 102 * @blocks: Mask of blocks (enum stmpe_block values) to enable 103 */ 104 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 105 { 106 int ret; 107 108 mutex_lock(&stmpe->lock); 109 ret = __stmpe_enable(stmpe, blocks); 110 mutex_unlock(&stmpe->lock); 111 112 return ret; 113 } 114 EXPORT_SYMBOL_GPL(stmpe_enable); 115 116 /** 117 * stmpe_disable - disable blocks on an STMPE device 118 * @stmpe: Device to work on 119 * @blocks: Mask of blocks (enum stmpe_block values) to enable 120 */ 121 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 122 { 123 int ret; 124 125 mutex_lock(&stmpe->lock); 126 ret = __stmpe_disable(stmpe, blocks); 127 mutex_unlock(&stmpe->lock); 128 129 return ret; 130 } 131 EXPORT_SYMBOL_GPL(stmpe_disable); 132 133 /** 134 * stmpe_reg_read() - read a single STMPE register 135 * @stmpe: Device to read from 136 * @reg: Register to read 137 */ 138 int stmpe_reg_read(struct stmpe *stmpe, u8 reg) 139 { 140 int ret; 141 142 mutex_lock(&stmpe->lock); 143 ret = __stmpe_reg_read(stmpe, reg); 144 mutex_unlock(&stmpe->lock); 145 146 return ret; 147 } 148 EXPORT_SYMBOL_GPL(stmpe_reg_read); 149 150 /** 151 * stmpe_reg_write() - write a single STMPE register 152 * @stmpe: Device to write to 153 * @reg: Register to write 154 * @val: Value to write 155 */ 156 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 157 { 158 int ret; 159 160 mutex_lock(&stmpe->lock); 161 ret = __stmpe_reg_write(stmpe, reg, val); 162 mutex_unlock(&stmpe->lock); 163 164 return ret; 165 } 166 EXPORT_SYMBOL_GPL(stmpe_reg_write); 167 168 /** 169 * stmpe_set_bits() - set the value of a bitfield in a STMPE register 170 * @stmpe: Device to write to 171 * @reg: Register to write 172 * @mask: Mask of bits to set 173 * @val: Value to set 174 */ 175 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 176 { 177 int ret; 178 179 mutex_lock(&stmpe->lock); 180 ret = __stmpe_set_bits(stmpe, reg, mask, val); 181 mutex_unlock(&stmpe->lock); 182 183 return ret; 184 } 185 EXPORT_SYMBOL_GPL(stmpe_set_bits); 186 187 /** 188 * stmpe_block_read() - read multiple STMPE registers 189 * @stmpe: Device to read from 190 * @reg: First register 191 * @length: Number of registers 192 * @values: Buffer to write to 193 */ 194 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) 195 { 196 int ret; 197 198 mutex_lock(&stmpe->lock); 199 ret = __stmpe_block_read(stmpe, reg, length, values); 200 mutex_unlock(&stmpe->lock); 201 202 return ret; 203 } 204 EXPORT_SYMBOL_GPL(stmpe_block_read); 205 206 /** 207 * stmpe_block_write() - write multiple STMPE registers 208 * @stmpe: Device to write to 209 * @reg: First register 210 * @length: Number of registers 211 * @values: Values to write 212 */ 213 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 214 const u8 *values) 215 { 216 int ret; 217 218 mutex_lock(&stmpe->lock); 219 ret = __stmpe_block_write(stmpe, reg, length, values); 220 mutex_unlock(&stmpe->lock); 221 222 return ret; 223 } 224 EXPORT_SYMBOL_GPL(stmpe_block_write); 225 226 /** 227 * stmpe_set_altfunc()- set the alternate function for STMPE pins 228 * @stmpe: Device to configure 229 * @pins: Bitmask of pins to affect 230 * @block: block to enable alternate functions for 231 * 232 * @pins is assumed to have a bit set for each of the bits whose alternate 233 * function is to be changed, numbered according to the GPIOXY numbers. 234 * 235 * If the GPIO module is not enabled, this function automatically enables it in 236 * order to perform the change. 237 */ 238 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) 239 { 240 struct stmpe_variant_info *variant = stmpe->variant; 241 u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; 242 int af_bits = variant->af_bits; 243 int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); 244 int mask = (1 << af_bits) - 1; 245 u8 regs[numregs]; 246 int af, afperreg, ret; 247 248 if (!variant->get_altfunc) 249 return 0; 250 251 afperreg = 8 / af_bits; 252 mutex_lock(&stmpe->lock); 253 254 ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 255 if (ret < 0) 256 goto out; 257 258 ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); 259 if (ret < 0) 260 goto out; 261 262 af = variant->get_altfunc(stmpe, block); 263 264 while (pins) { 265 int pin = __ffs(pins); 266 int regoffset = numregs - (pin / afperreg) - 1; 267 int pos = (pin % afperreg) * (8 / afperreg); 268 269 regs[regoffset] &= ~(mask << pos); 270 regs[regoffset] |= af << pos; 271 272 pins &= ~(1 << pin); 273 } 274 275 ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); 276 277 out: 278 mutex_unlock(&stmpe->lock); 279 return ret; 280 } 281 EXPORT_SYMBOL_GPL(stmpe_set_altfunc); 282 283 /* 284 * GPIO (all variants) 285 */ 286 287 static struct resource stmpe_gpio_resources[] = { 288 /* Start and end filled dynamically */ 289 { 290 .flags = IORESOURCE_IRQ, 291 }, 292 }; 293 294 static struct mfd_cell stmpe_gpio_cell = { 295 .name = "stmpe-gpio", 296 .resources = stmpe_gpio_resources, 297 .num_resources = ARRAY_SIZE(stmpe_gpio_resources), 298 }; 299 300 /* 301 * Keypad (1601, 2401, 2403) 302 */ 303 304 static struct resource stmpe_keypad_resources[] = { 305 { 306 .name = "KEYPAD", 307 .start = 0, 308 .end = 0, 309 .flags = IORESOURCE_IRQ, 310 }, 311 { 312 .name = "KEYPAD_OVER", 313 .start = 1, 314 .end = 1, 315 .flags = IORESOURCE_IRQ, 316 }, 317 }; 318 319 static struct mfd_cell stmpe_keypad_cell = { 320 .name = "stmpe-keypad", 321 .resources = stmpe_keypad_resources, 322 .num_resources = ARRAY_SIZE(stmpe_keypad_resources), 323 }; 324 325 /* 326 * STMPE801 327 */ 328 static const u8 stmpe801_regs[] = { 329 [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, 330 [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, 331 [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, 332 [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, 333 [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, 334 [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, 335 [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, 336 [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, 337 338 }; 339 340 static struct stmpe_variant_block stmpe801_blocks[] = { 341 { 342 .cell = &stmpe_gpio_cell, 343 .irq = 0, 344 .block = STMPE_BLOCK_GPIO, 345 }, 346 }; 347 348 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, 349 bool enable) 350 { 351 if (blocks & STMPE_BLOCK_GPIO) 352 return 0; 353 else 354 return -EINVAL; 355 } 356 357 static struct stmpe_variant_info stmpe801 = { 358 .name = "stmpe801", 359 .id_val = STMPE801_ID, 360 .id_mask = 0xffff, 361 .num_gpios = 8, 362 .regs = stmpe801_regs, 363 .blocks = stmpe801_blocks, 364 .num_blocks = ARRAY_SIZE(stmpe801_blocks), 365 .num_irqs = STMPE801_NR_INTERNAL_IRQS, 366 .enable = stmpe801_enable, 367 }; 368 369 /* 370 * Touchscreen (STMPE811 or STMPE610) 371 */ 372 373 static struct resource stmpe_ts_resources[] = { 374 { 375 .name = "TOUCH_DET", 376 .start = 0, 377 .end = 0, 378 .flags = IORESOURCE_IRQ, 379 }, 380 { 381 .name = "FIFO_TH", 382 .start = 1, 383 .end = 1, 384 .flags = IORESOURCE_IRQ, 385 }, 386 }; 387 388 static struct mfd_cell stmpe_ts_cell = { 389 .name = "stmpe-ts", 390 .resources = stmpe_ts_resources, 391 .num_resources = ARRAY_SIZE(stmpe_ts_resources), 392 }; 393 394 /* 395 * STMPE811 or STMPE610 396 */ 397 398 static const u8 stmpe811_regs[] = { 399 [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, 400 [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, 401 [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, 402 [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, 403 [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, 404 [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, 405 [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, 406 [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, 407 [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, 408 [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, 409 [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, 410 [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, 411 [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, 412 [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, 413 }; 414 415 static struct stmpe_variant_block stmpe811_blocks[] = { 416 { 417 .cell = &stmpe_gpio_cell, 418 .irq = STMPE811_IRQ_GPIOC, 419 .block = STMPE_BLOCK_GPIO, 420 }, 421 { 422 .cell = &stmpe_ts_cell, 423 .irq = STMPE811_IRQ_TOUCH_DET, 424 .block = STMPE_BLOCK_TOUCHSCREEN, 425 }, 426 }; 427 428 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, 429 bool enable) 430 { 431 unsigned int mask = 0; 432 433 if (blocks & STMPE_BLOCK_GPIO) 434 mask |= STMPE811_SYS_CTRL2_GPIO_OFF; 435 436 if (blocks & STMPE_BLOCK_ADC) 437 mask |= STMPE811_SYS_CTRL2_ADC_OFF; 438 439 if (blocks & STMPE_BLOCK_TOUCHSCREEN) 440 mask |= STMPE811_SYS_CTRL2_TSC_OFF; 441 442 return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask, 443 enable ? 0 : mask); 444 } 445 446 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 447 { 448 /* 0 for touchscreen, 1 for GPIO */ 449 return block != STMPE_BLOCK_TOUCHSCREEN; 450 } 451 452 static struct stmpe_variant_info stmpe811 = { 453 .name = "stmpe811", 454 .id_val = 0x0811, 455 .id_mask = 0xffff, 456 .num_gpios = 8, 457 .af_bits = 1, 458 .regs = stmpe811_regs, 459 .blocks = stmpe811_blocks, 460 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 461 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 462 .enable = stmpe811_enable, 463 .get_altfunc = stmpe811_get_altfunc, 464 }; 465 466 /* Similar to 811, except number of gpios */ 467 static struct stmpe_variant_info stmpe610 = { 468 .name = "stmpe610", 469 .id_val = 0x0811, 470 .id_mask = 0xffff, 471 .num_gpios = 6, 472 .af_bits = 1, 473 .regs = stmpe811_regs, 474 .blocks = stmpe811_blocks, 475 .num_blocks = ARRAY_SIZE(stmpe811_blocks), 476 .num_irqs = STMPE811_NR_INTERNAL_IRQS, 477 .enable = stmpe811_enable, 478 .get_altfunc = stmpe811_get_altfunc, 479 }; 480 481 /* 482 * STMPE1601 483 */ 484 485 static const u8 stmpe1601_regs[] = { 486 [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, 487 [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, 488 [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, 489 [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, 490 [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, 491 [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, 492 [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, 493 [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, 494 [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, 495 [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, 496 [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, 497 [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, 498 [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, 499 [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, 500 }; 501 502 static struct stmpe_variant_block stmpe1601_blocks[] = { 503 { 504 .cell = &stmpe_gpio_cell, 505 .irq = STMPE24XX_IRQ_GPIOC, 506 .block = STMPE_BLOCK_GPIO, 507 }, 508 { 509 .cell = &stmpe_keypad_cell, 510 .irq = STMPE24XX_IRQ_KEYPAD, 511 .block = STMPE_BLOCK_KEYPAD, 512 }, 513 }; 514 515 /* supported autosleep timeout delay (in msecs) */ 516 static const int stmpe_autosleep_delay[] = { 517 4, 16, 32, 64, 128, 256, 512, 1024, 518 }; 519 520 static int stmpe_round_timeout(int timeout) 521 { 522 int i; 523 524 for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { 525 if (stmpe_autosleep_delay[i] >= timeout) 526 return i; 527 } 528 529 /* 530 * requests for delays longer than supported should not return the 531 * longest supported delay 532 */ 533 return -EINVAL; 534 } 535 536 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) 537 { 538 int ret; 539 540 if (!stmpe->variant->enable_autosleep) 541 return -ENOSYS; 542 543 mutex_lock(&stmpe->lock); 544 ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); 545 mutex_unlock(&stmpe->lock); 546 547 return ret; 548 } 549 550 /* 551 * Both stmpe 1601/2403 support same layout for autosleep 552 */ 553 static int stmpe1601_autosleep(struct stmpe *stmpe, 554 int autosleep_timeout) 555 { 556 int ret, timeout; 557 558 /* choose the best available timeout */ 559 timeout = stmpe_round_timeout(autosleep_timeout); 560 if (timeout < 0) { 561 dev_err(stmpe->dev, "invalid timeout\n"); 562 return timeout; 563 } 564 565 ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 566 STMPE1601_AUTOSLEEP_TIMEOUT_MASK, 567 timeout); 568 if (ret < 0) 569 return ret; 570 571 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2, 572 STPME1601_AUTOSLEEP_ENABLE, 573 STPME1601_AUTOSLEEP_ENABLE); 574 } 575 576 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, 577 bool enable) 578 { 579 unsigned int mask = 0; 580 581 if (blocks & STMPE_BLOCK_GPIO) 582 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; 583 584 if (blocks & STMPE_BLOCK_KEYPAD) 585 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; 586 587 return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask, 588 enable ? mask : 0); 589 } 590 591 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 592 { 593 switch (block) { 594 case STMPE_BLOCK_PWM: 595 return 2; 596 597 case STMPE_BLOCK_KEYPAD: 598 return 1; 599 600 case STMPE_BLOCK_GPIO: 601 default: 602 return 0; 603 } 604 } 605 606 static struct stmpe_variant_info stmpe1601 = { 607 .name = "stmpe1601", 608 .id_val = 0x0210, 609 .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ 610 .num_gpios = 16, 611 .af_bits = 2, 612 .regs = stmpe1601_regs, 613 .blocks = stmpe1601_blocks, 614 .num_blocks = ARRAY_SIZE(stmpe1601_blocks), 615 .num_irqs = STMPE1601_NR_INTERNAL_IRQS, 616 .enable = stmpe1601_enable, 617 .get_altfunc = stmpe1601_get_altfunc, 618 .enable_autosleep = stmpe1601_autosleep, 619 }; 620 621 /* 622 * STMPE24XX 623 */ 624 625 static const u8 stmpe24xx_regs[] = { 626 [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, 627 [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, 628 [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, 629 [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, 630 [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, 631 [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, 632 [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, 633 [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, 634 [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, 635 [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, 636 [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, 637 [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, 638 [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, 639 [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, 640 }; 641 642 static struct stmpe_variant_block stmpe24xx_blocks[] = { 643 { 644 .cell = &stmpe_gpio_cell, 645 .irq = STMPE24XX_IRQ_GPIOC, 646 .block = STMPE_BLOCK_GPIO, 647 }, 648 { 649 .cell = &stmpe_keypad_cell, 650 .irq = STMPE24XX_IRQ_KEYPAD, 651 .block = STMPE_BLOCK_KEYPAD, 652 }, 653 }; 654 655 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, 656 bool enable) 657 { 658 unsigned int mask = 0; 659 660 if (blocks & STMPE_BLOCK_GPIO) 661 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; 662 663 if (blocks & STMPE_BLOCK_KEYPAD) 664 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; 665 666 return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask, 667 enable ? mask : 0); 668 } 669 670 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 671 { 672 switch (block) { 673 case STMPE_BLOCK_ROTATOR: 674 return 2; 675 676 case STMPE_BLOCK_KEYPAD: 677 return 1; 678 679 case STMPE_BLOCK_GPIO: 680 default: 681 return 0; 682 } 683 } 684 685 static struct stmpe_variant_info stmpe2401 = { 686 .name = "stmpe2401", 687 .id_val = 0x0101, 688 .id_mask = 0xffff, 689 .num_gpios = 24, 690 .af_bits = 2, 691 .regs = stmpe24xx_regs, 692 .blocks = stmpe24xx_blocks, 693 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 694 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 695 .enable = stmpe24xx_enable, 696 .get_altfunc = stmpe24xx_get_altfunc, 697 }; 698 699 static struct stmpe_variant_info stmpe2403 = { 700 .name = "stmpe2403", 701 .id_val = 0x0120, 702 .id_mask = 0xffff, 703 .num_gpios = 24, 704 .af_bits = 2, 705 .regs = stmpe24xx_regs, 706 .blocks = stmpe24xx_blocks, 707 .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 708 .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 709 .enable = stmpe24xx_enable, 710 .get_altfunc = stmpe24xx_get_altfunc, 711 .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ 712 }; 713 714 static struct stmpe_variant_info *stmpe_variant_info[] = { 715 [STMPE610] = &stmpe610, 716 [STMPE801] = &stmpe801, 717 [STMPE811] = &stmpe811, 718 [STMPE1601] = &stmpe1601, 719 [STMPE2401] = &stmpe2401, 720 [STMPE2403] = &stmpe2403, 721 }; 722 723 static irqreturn_t stmpe_irq(int irq, void *data) 724 { 725 struct stmpe *stmpe = data; 726 struct stmpe_variant_info *variant = stmpe->variant; 727 int num = DIV_ROUND_UP(variant->num_irqs, 8); 728 u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; 729 u8 isr[num]; 730 int ret; 731 int i; 732 733 if (variant->id_val == STMPE801_ID) { 734 handle_nested_irq(stmpe->irq_base); 735 return IRQ_HANDLED; 736 } 737 738 ret = stmpe_block_read(stmpe, israddr, num, isr); 739 if (ret < 0) 740 return IRQ_NONE; 741 742 for (i = 0; i < num; i++) { 743 int bank = num - i - 1; 744 u8 status = isr[i]; 745 u8 clear; 746 747 status &= stmpe->ier[bank]; 748 if (!status) 749 continue; 750 751 clear = status; 752 while (status) { 753 int bit = __ffs(status); 754 int line = bank * 8 + bit; 755 756 handle_nested_irq(stmpe->irq_base + line); 757 status &= ~(1 << bit); 758 } 759 760 stmpe_reg_write(stmpe, israddr + i, clear); 761 } 762 763 return IRQ_HANDLED; 764 } 765 766 static void stmpe_irq_lock(struct irq_data *data) 767 { 768 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 769 770 mutex_lock(&stmpe->irq_lock); 771 } 772 773 static void stmpe_irq_sync_unlock(struct irq_data *data) 774 { 775 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 776 struct stmpe_variant_info *variant = stmpe->variant; 777 int num = DIV_ROUND_UP(variant->num_irqs, 8); 778 int i; 779 780 for (i = 0; i < num; i++) { 781 u8 new = stmpe->ier[i]; 782 u8 old = stmpe->oldier[i]; 783 784 if (new == old) 785 continue; 786 787 stmpe->oldier[i] = new; 788 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); 789 } 790 791 mutex_unlock(&stmpe->irq_lock); 792 } 793 794 static void stmpe_irq_mask(struct irq_data *data) 795 { 796 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 797 int offset = data->irq - stmpe->irq_base; 798 int regoffset = offset / 8; 799 int mask = 1 << (offset % 8); 800 801 stmpe->ier[regoffset] &= ~mask; 802 } 803 804 static void stmpe_irq_unmask(struct irq_data *data) 805 { 806 struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 807 int offset = data->irq - stmpe->irq_base; 808 int regoffset = offset / 8; 809 int mask = 1 << (offset % 8); 810 811 stmpe->ier[regoffset] |= mask; 812 } 813 814 static struct irq_chip stmpe_irq_chip = { 815 .name = "stmpe", 816 .irq_bus_lock = stmpe_irq_lock, 817 .irq_bus_sync_unlock = stmpe_irq_sync_unlock, 818 .irq_mask = stmpe_irq_mask, 819 .irq_unmask = stmpe_irq_unmask, 820 }; 821 822 static int __devinit stmpe_irq_init(struct stmpe *stmpe) 823 { 824 struct irq_chip *chip = NULL; 825 int num_irqs = stmpe->variant->num_irqs; 826 int base = stmpe->irq_base; 827 int irq; 828 829 if (stmpe->variant->id_val != STMPE801_ID) 830 chip = &stmpe_irq_chip; 831 832 for (irq = base; irq < base + num_irqs; irq++) { 833 irq_set_chip_data(irq, stmpe); 834 irq_set_chip_and_handler(irq, chip, handle_edge_irq); 835 irq_set_nested_thread(irq, 1); 836 #ifdef CONFIG_ARM 837 set_irq_flags(irq, IRQF_VALID); 838 #else 839 irq_set_noprobe(irq); 840 #endif 841 } 842 843 return 0; 844 } 845 846 static void stmpe_irq_remove(struct stmpe *stmpe) 847 { 848 int num_irqs = stmpe->variant->num_irqs; 849 int base = stmpe->irq_base; 850 int irq; 851 852 for (irq = base; irq < base + num_irqs; irq++) { 853 #ifdef CONFIG_ARM 854 set_irq_flags(irq, 0); 855 #endif 856 irq_set_chip_and_handler(irq, NULL, NULL); 857 irq_set_chip_data(irq, NULL); 858 } 859 } 860 861 static int __devinit stmpe_chip_init(struct stmpe *stmpe) 862 { 863 unsigned int irq_trigger = stmpe->pdata->irq_trigger; 864 int autosleep_timeout = stmpe->pdata->autosleep_timeout; 865 struct stmpe_variant_info *variant = stmpe->variant; 866 u8 icr; 867 unsigned int id; 868 u8 data[2]; 869 int ret; 870 871 ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], 872 ARRAY_SIZE(data), data); 873 if (ret < 0) 874 return ret; 875 876 id = (data[0] << 8) | data[1]; 877 if ((id & variant->id_mask) != variant->id_val) { 878 dev_err(stmpe->dev, "unknown chip id: %#x\n", id); 879 return -EINVAL; 880 } 881 882 dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); 883 884 /* Disable all modules -- subdrivers should enable what they need. */ 885 ret = stmpe_disable(stmpe, ~0); 886 if (ret) 887 return ret; 888 889 if (id == STMPE801_ID) 890 icr = STMPE801_REG_SYS_CTRL_INT_EN; 891 else 892 icr = STMPE_ICR_LSB_GIM; 893 894 /* STMPE801 doesn't support Edge interrupts */ 895 if (id != STMPE801_ID) { 896 if (irq_trigger == IRQF_TRIGGER_FALLING || 897 irq_trigger == IRQF_TRIGGER_RISING) 898 icr |= STMPE_ICR_LSB_EDGE; 899 } 900 901 if (irq_trigger == IRQF_TRIGGER_RISING || 902 irq_trigger == IRQF_TRIGGER_HIGH) { 903 if (id == STMPE801_ID) 904 icr |= STMPE801_REG_SYS_CTRL_INT_HI; 905 else 906 icr |= STMPE_ICR_LSB_HIGH; 907 } 908 909 if (stmpe->pdata->irq_invert_polarity) { 910 if (id == STMPE801_ID) 911 icr ^= STMPE801_REG_SYS_CTRL_INT_HI; 912 else 913 icr ^= STMPE_ICR_LSB_HIGH; 914 } 915 916 if (stmpe->pdata->autosleep) { 917 ret = stmpe_autosleep(stmpe, autosleep_timeout); 918 if (ret) 919 return ret; 920 } 921 922 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); 923 } 924 925 static int __devinit stmpe_add_device(struct stmpe *stmpe, 926 struct mfd_cell *cell, int irq) 927 { 928 return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, 929 NULL, stmpe->irq_base + irq); 930 } 931 932 static int __devinit stmpe_devices_init(struct stmpe *stmpe) 933 { 934 struct stmpe_variant_info *variant = stmpe->variant; 935 unsigned int platform_blocks = stmpe->pdata->blocks; 936 int ret = -EINVAL; 937 int i; 938 939 for (i = 0; i < variant->num_blocks; i++) { 940 struct stmpe_variant_block *block = &variant->blocks[i]; 941 942 if (!(platform_blocks & block->block)) 943 continue; 944 945 platform_blocks &= ~block->block; 946 ret = stmpe_add_device(stmpe, block->cell, block->irq); 947 if (ret) 948 return ret; 949 } 950 951 if (platform_blocks) 952 dev_warn(stmpe->dev, 953 "platform wants blocks (%#x) not present on variant", 954 platform_blocks); 955 956 return ret; 957 } 958 959 /* Called from client specific probe routines */ 960 int stmpe_probe(struct stmpe_client_info *ci, int partnum) 961 { 962 struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev); 963 struct stmpe *stmpe; 964 int ret; 965 966 if (!pdata) 967 return -EINVAL; 968 969 stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL); 970 if (!stmpe) 971 return -ENOMEM; 972 973 mutex_init(&stmpe->irq_lock); 974 mutex_init(&stmpe->lock); 975 976 stmpe->dev = ci->dev; 977 stmpe->client = ci->client; 978 stmpe->pdata = pdata; 979 stmpe->irq_base = pdata->irq_base; 980 stmpe->ci = ci; 981 stmpe->partnum = partnum; 982 stmpe->variant = stmpe_variant_info[partnum]; 983 stmpe->regs = stmpe->variant->regs; 984 stmpe->num_gpios = stmpe->variant->num_gpios; 985 dev_set_drvdata(stmpe->dev, stmpe); 986 987 if (ci->init) 988 ci->init(stmpe); 989 990 if (pdata->irq_over_gpio) { 991 ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe"); 992 if (ret) { 993 dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", 994 ret); 995 goto out_free; 996 } 997 998 stmpe->irq = gpio_to_irq(pdata->irq_gpio); 999 } else { 1000 stmpe->irq = ci->irq; 1001 } 1002 1003 ret = stmpe_chip_init(stmpe); 1004 if (ret) 1005 goto free_gpio; 1006 1007 ret = stmpe_irq_init(stmpe); 1008 if (ret) 1009 goto free_gpio; 1010 1011 ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq, 1012 pdata->irq_trigger | IRQF_ONESHOT, "stmpe", stmpe); 1013 if (ret) { 1014 dev_err(stmpe->dev, "failed to request IRQ: %d\n", ret); 1015 goto out_removeirq; 1016 } 1017 1018 ret = stmpe_devices_init(stmpe); 1019 if (ret) { 1020 dev_err(stmpe->dev, "failed to add children\n"); 1021 goto out_removedevs; 1022 } 1023 1024 return 0; 1025 1026 out_removedevs: 1027 mfd_remove_devices(stmpe->dev); 1028 free_irq(stmpe->irq, stmpe); 1029 out_removeirq: 1030 stmpe_irq_remove(stmpe); 1031 free_gpio: 1032 if (pdata->irq_over_gpio) 1033 gpio_free(pdata->irq_gpio); 1034 out_free: 1035 kfree(stmpe); 1036 return ret; 1037 } 1038 1039 int stmpe_remove(struct stmpe *stmpe) 1040 { 1041 mfd_remove_devices(stmpe->dev); 1042 1043 free_irq(stmpe->irq, stmpe); 1044 stmpe_irq_remove(stmpe); 1045 1046 if (stmpe->pdata->irq_over_gpio) 1047 gpio_free(stmpe->pdata->irq_gpio); 1048 1049 kfree(stmpe); 1050 1051 return 0; 1052 } 1053 1054 #ifdef CONFIG_PM 1055 static int stmpe_suspend(struct device *dev) 1056 { 1057 struct stmpe *stmpe = dev_get_drvdata(dev); 1058 1059 if (device_may_wakeup(dev)) 1060 enable_irq_wake(stmpe->irq); 1061 1062 return 0; 1063 } 1064 1065 static int stmpe_resume(struct device *dev) 1066 { 1067 struct stmpe *stmpe = dev_get_drvdata(dev); 1068 1069 if (device_may_wakeup(dev)) 1070 disable_irq_wake(stmpe->irq); 1071 1072 return 0; 1073 } 1074 1075 const struct dev_pm_ops stmpe_dev_pm_ops = { 1076 .suspend = stmpe_suspend, 1077 .resume = stmpe_resume, 1078 }; 1079 #endif 1080