1bfb26be7SYoshihiro Shimoda // SPDX-License-Identifier: GPL-2.0-only 2d3ea2127SMarek Vasut /* 3d3ea2127SMarek Vasut * ROHM BD9571MWV-M MFD driver 4d3ea2127SMarek Vasut * 5d3ea2127SMarek Vasut * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com> 6*f16e1fd1SKhiem Nguyen * Copyright (C) 2020 Renesas Electronics Corporation 7d3ea2127SMarek Vasut * 8d3ea2127SMarek Vasut * Based on the TPS65086 driver 9d3ea2127SMarek Vasut */ 10d3ea2127SMarek Vasut 11d3ea2127SMarek Vasut #include <linux/i2c.h> 12d3ea2127SMarek Vasut #include <linux/interrupt.h> 13d3ea2127SMarek Vasut #include <linux/mfd/core.h> 14d3ea2127SMarek Vasut #include <linux/module.h> 15d3ea2127SMarek Vasut 16d3ea2127SMarek Vasut #include <linux/mfd/bd9571mwv.h> 17d3ea2127SMarek Vasut 18d3ea2127SMarek Vasut static const struct mfd_cell bd9571mwv_cells[] = { 19d3ea2127SMarek Vasut { .name = "bd9571mwv-regulator", }, 20d3ea2127SMarek Vasut { .name = "bd9571mwv-gpio", }, 21d3ea2127SMarek Vasut }; 22d3ea2127SMarek Vasut 23d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_readable_yes_ranges[] = { 24d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION), 257b569bcbSGeert Uytterhoeven regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT), 26d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)), 27d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID), 28d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT), 29d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_DVFS_SETVMAX, BD9571MWV_DVFS_MONIVDAC), 30d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN), 31d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK), 32d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK), 33d3ea2127SMarek Vasut }; 34d3ea2127SMarek Vasut 35d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_readable_table = { 36d3ea2127SMarek Vasut .yes_ranges = bd9571mwv_readable_yes_ranges, 37d3ea2127SMarek Vasut .n_yes_ranges = ARRAY_SIZE(bd9571mwv_readable_yes_ranges), 38d3ea2127SMarek Vasut }; 39d3ea2127SMarek Vasut 40d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_writable_yes_ranges[] = { 417b569bcbSGeert Uytterhoeven regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT), 42d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)), 43d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID), 44d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT), 45d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK), 46d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK), 47d3ea2127SMarek Vasut }; 48d3ea2127SMarek Vasut 49d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_writable_table = { 50d3ea2127SMarek Vasut .yes_ranges = bd9571mwv_writable_yes_ranges, 51d3ea2127SMarek Vasut .n_yes_ranges = ARRAY_SIZE(bd9571mwv_writable_yes_ranges), 52d3ea2127SMarek Vasut }; 53d3ea2127SMarek Vasut 54d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_volatile_yes_ranges[] = { 55b0aff01eSDien Pham regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC), 56d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN), 57d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT), 58d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ), 59d3ea2127SMarek Vasut }; 60d3ea2127SMarek Vasut 61d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_volatile_table = { 62d3ea2127SMarek Vasut .yes_ranges = bd9571mwv_volatile_yes_ranges, 63d3ea2127SMarek Vasut .n_yes_ranges = ARRAY_SIZE(bd9571mwv_volatile_yes_ranges), 64d3ea2127SMarek Vasut }; 65d3ea2127SMarek Vasut 66d3ea2127SMarek Vasut static const struct regmap_config bd9571mwv_regmap_config = { 67d3ea2127SMarek Vasut .reg_bits = 8, 68d3ea2127SMarek Vasut .val_bits = 8, 69d3ea2127SMarek Vasut .cache_type = REGCACHE_RBTREE, 70d3ea2127SMarek Vasut .rd_table = &bd9571mwv_readable_table, 71d3ea2127SMarek Vasut .wr_table = &bd9571mwv_writable_table, 72d3ea2127SMarek Vasut .volatile_table = &bd9571mwv_volatile_table, 73d3ea2127SMarek Vasut .max_register = 0xff, 74d3ea2127SMarek Vasut }; 75d3ea2127SMarek Vasut 76d3ea2127SMarek Vasut static const struct regmap_irq bd9571mwv_irqs[] = { 77d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_MD1, 0, 78d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_MD1_INT), 79d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E1, 0, 80d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_MD2_E1_INT), 81d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E2, 0, 82d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_MD2_E2_INT), 83d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_PROT_ERR, 0, 84d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_PROT_ERR_INT), 85d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_GP, 0, 86d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_GP_INT), 87d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_128H_OF, 0, 88d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_128H_OF_INT), 89d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_WDT_OF, 0, 90d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_WDT_OF_INT), 91d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_BKUP_TRG, 0, 92d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_BKUP_TRG_INT), 93d3ea2127SMarek Vasut }; 94d3ea2127SMarek Vasut 95d3ea2127SMarek Vasut static struct regmap_irq_chip bd9571mwv_irq_chip = { 96d3ea2127SMarek Vasut .name = "bd9571mwv", 97d3ea2127SMarek Vasut .status_base = BD9571MWV_INT_INTREQ, 98d3ea2127SMarek Vasut .mask_base = BD9571MWV_INT_INTMASK, 99d3ea2127SMarek Vasut .ack_base = BD9571MWV_INT_INTREQ, 100d3ea2127SMarek Vasut .init_ack_masked = true, 101d3ea2127SMarek Vasut .num_regs = 1, 102d3ea2127SMarek Vasut .irqs = bd9571mwv_irqs, 103d3ea2127SMarek Vasut .num_irqs = ARRAY_SIZE(bd9571mwv_irqs), 104d3ea2127SMarek Vasut }; 105d3ea2127SMarek Vasut 106*f16e1fd1SKhiem Nguyen static int bd957x_identify(struct device *dev, struct regmap *regmap) 107d3ea2127SMarek Vasut { 108d3ea2127SMarek Vasut unsigned int value; 109d3ea2127SMarek Vasut int ret; 110d3ea2127SMarek Vasut 111*f16e1fd1SKhiem Nguyen ret = regmap_read(regmap, BD9571MWV_VENDOR_CODE, &value); 112d3ea2127SMarek Vasut if (ret) { 113d3ea2127SMarek Vasut dev_err(dev, "Failed to read vendor code register (ret=%i)\n", 114d3ea2127SMarek Vasut ret); 115d3ea2127SMarek Vasut return ret; 116d3ea2127SMarek Vasut } 117d3ea2127SMarek Vasut 118d3ea2127SMarek Vasut if (value != BD9571MWV_VENDOR_CODE_VAL) { 119d3ea2127SMarek Vasut dev_err(dev, "Invalid vendor code ID %02x (expected %02x)\n", 120d3ea2127SMarek Vasut value, BD9571MWV_VENDOR_CODE_VAL); 121d3ea2127SMarek Vasut return -EINVAL; 122d3ea2127SMarek Vasut } 123d3ea2127SMarek Vasut 124*f16e1fd1SKhiem Nguyen ret = regmap_read(regmap, BD9571MWV_PRODUCT_CODE, &value); 125d3ea2127SMarek Vasut if (ret) { 126d3ea2127SMarek Vasut dev_err(dev, "Failed to read product code register (ret=%i)\n", 127d3ea2127SMarek Vasut ret); 128d3ea2127SMarek Vasut return ret; 129d3ea2127SMarek Vasut } 130*f16e1fd1SKhiem Nguyen ret = regmap_read(regmap, BD9571MWV_PRODUCT_REVISION, &value); 131d3ea2127SMarek Vasut if (ret) { 132d3ea2127SMarek Vasut dev_err(dev, "Failed to read revision register (ret=%i)\n", 133d3ea2127SMarek Vasut ret); 134d3ea2127SMarek Vasut return ret; 135d3ea2127SMarek Vasut } 136d3ea2127SMarek Vasut 137d3ea2127SMarek Vasut return 0; 138d3ea2127SMarek Vasut } 139d3ea2127SMarek Vasut 140d3ea2127SMarek Vasut static int bd9571mwv_probe(struct i2c_client *client, 141d3ea2127SMarek Vasut const struct i2c_device_id *ids) 142d3ea2127SMarek Vasut { 143*f16e1fd1SKhiem Nguyen const struct regmap_config *regmap_config; 144*f16e1fd1SKhiem Nguyen const struct regmap_irq_chip *irq_chip; 145*f16e1fd1SKhiem Nguyen const struct mfd_cell *cells; 146*f16e1fd1SKhiem Nguyen struct device *dev = &client->dev; 147*f16e1fd1SKhiem Nguyen struct regmap *regmap; 148*f16e1fd1SKhiem Nguyen struct regmap_irq_chip_data *irq_data; 149*f16e1fd1SKhiem Nguyen int ret, num_cells, irq = client->irq; 150d3ea2127SMarek Vasut 151*f16e1fd1SKhiem Nguyen /* Read the PMIC product code */ 152*f16e1fd1SKhiem Nguyen ret = i2c_smbus_read_byte_data(client, BD9571MWV_PRODUCT_CODE); 153*f16e1fd1SKhiem Nguyen if (ret < 0) { 154*f16e1fd1SKhiem Nguyen dev_err(dev, "Failed to read product code\n"); 155*f16e1fd1SKhiem Nguyen return ret; 156d3ea2127SMarek Vasut } 157d3ea2127SMarek Vasut 158*f16e1fd1SKhiem Nguyen switch (ret) { 159*f16e1fd1SKhiem Nguyen case BD9571MWV_PRODUCT_CODE_BD9571MWV: 160*f16e1fd1SKhiem Nguyen regmap_config = &bd9571mwv_regmap_config; 161*f16e1fd1SKhiem Nguyen irq_chip = &bd9571mwv_irq_chip; 162*f16e1fd1SKhiem Nguyen cells = bd9571mwv_cells; 163*f16e1fd1SKhiem Nguyen num_cells = ARRAY_SIZE(bd9571mwv_cells); 164*f16e1fd1SKhiem Nguyen break; 165*f16e1fd1SKhiem Nguyen default: 166*f16e1fd1SKhiem Nguyen dev_err(dev, "Unsupported device 0x%x\n", ret); 167*f16e1fd1SKhiem Nguyen return -ENODEV; 168*f16e1fd1SKhiem Nguyen } 169*f16e1fd1SKhiem Nguyen 170*f16e1fd1SKhiem Nguyen regmap = devm_regmap_init_i2c(client, regmap_config); 171*f16e1fd1SKhiem Nguyen if (IS_ERR(regmap)) { 172*f16e1fd1SKhiem Nguyen dev_err(dev, "Failed to initialize register map\n"); 173*f16e1fd1SKhiem Nguyen return PTR_ERR(regmap); 174*f16e1fd1SKhiem Nguyen } 175*f16e1fd1SKhiem Nguyen 176*f16e1fd1SKhiem Nguyen ret = bd957x_identify(dev, regmap); 177d3ea2127SMarek Vasut if (ret) 178d3ea2127SMarek Vasut return ret; 179d3ea2127SMarek Vasut 180*f16e1fd1SKhiem Nguyen ret = devm_regmap_add_irq_chip(dev, regmap, irq, IRQF_ONESHOT, 0, 181*f16e1fd1SKhiem Nguyen irq_chip, &irq_data); 182d3ea2127SMarek Vasut if (ret) { 183*f16e1fd1SKhiem Nguyen dev_err(dev, "Failed to register IRQ chip\n"); 184d3ea2127SMarek Vasut return ret; 185d3ea2127SMarek Vasut } 186d3ea2127SMarek Vasut 187*f16e1fd1SKhiem Nguyen return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, num_cells, 188*f16e1fd1SKhiem Nguyen NULL, 0, regmap_irq_get_domain(irq_data)); 189d3ea2127SMarek Vasut } 190d3ea2127SMarek Vasut 191d3ea2127SMarek Vasut static const struct of_device_id bd9571mwv_of_match_table[] = { 192d3ea2127SMarek Vasut { .compatible = "rohm,bd9571mwv", }, 193d3ea2127SMarek Vasut { /* sentinel */ } 194d3ea2127SMarek Vasut }; 195d3ea2127SMarek Vasut MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table); 196d3ea2127SMarek Vasut 197d3ea2127SMarek Vasut static const struct i2c_device_id bd9571mwv_id_table[] = { 198d3ea2127SMarek Vasut { "bd9571mwv", 0 }, 199d3ea2127SMarek Vasut { /* sentinel */ } 200d3ea2127SMarek Vasut }; 201d3ea2127SMarek Vasut MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table); 202d3ea2127SMarek Vasut 203d3ea2127SMarek Vasut static struct i2c_driver bd9571mwv_driver = { 204d3ea2127SMarek Vasut .driver = { 205d3ea2127SMarek Vasut .name = "bd9571mwv", 206d3ea2127SMarek Vasut .of_match_table = bd9571mwv_of_match_table, 207d3ea2127SMarek Vasut }, 208d3ea2127SMarek Vasut .probe = bd9571mwv_probe, 209d3ea2127SMarek Vasut .id_table = bd9571mwv_id_table, 210d3ea2127SMarek Vasut }; 211d3ea2127SMarek Vasut module_i2c_driver(bd9571mwv_driver); 212d3ea2127SMarek Vasut 213d3ea2127SMarek Vasut MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>"); 214d3ea2127SMarek Vasut MODULE_DESCRIPTION("BD9571MWV PMIC Driver"); 215d3ea2127SMarek Vasut MODULE_LICENSE("GPL v2"); 216