1d3ea2127SMarek Vasut /* 2d3ea2127SMarek Vasut * ROHM BD9571MWV-M MFD driver 3d3ea2127SMarek Vasut * 4d3ea2127SMarek Vasut * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com> 5d3ea2127SMarek Vasut * 6d3ea2127SMarek Vasut * This program is free software; you can redistribute it and/or 7d3ea2127SMarek Vasut * modify it under the terms of the GNU General Public License version 2 as 8d3ea2127SMarek Vasut * published by the Free Software Foundation. 9d3ea2127SMarek Vasut * 10d3ea2127SMarek Vasut * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11d3ea2127SMarek Vasut * kind, whether expressed or implied; without even the implied warranty 12d3ea2127SMarek Vasut * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13d3ea2127SMarek Vasut * GNU General Public License version 2 for more details. 14d3ea2127SMarek Vasut * 15d3ea2127SMarek Vasut * Based on the TPS65086 driver 16d3ea2127SMarek Vasut */ 17d3ea2127SMarek Vasut 18d3ea2127SMarek Vasut #include <linux/i2c.h> 19d3ea2127SMarek Vasut #include <linux/interrupt.h> 20d3ea2127SMarek Vasut #include <linux/mfd/core.h> 21d3ea2127SMarek Vasut #include <linux/module.h> 22d3ea2127SMarek Vasut 23d3ea2127SMarek Vasut #include <linux/mfd/bd9571mwv.h> 24d3ea2127SMarek Vasut 25d3ea2127SMarek Vasut static const struct mfd_cell bd9571mwv_cells[] = { 26d3ea2127SMarek Vasut { .name = "bd9571mwv-regulator", }, 27d3ea2127SMarek Vasut { .name = "bd9571mwv-gpio", }, 28d3ea2127SMarek Vasut }; 29d3ea2127SMarek Vasut 30d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_readable_yes_ranges[] = { 31d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION), 327b569bcbSGeert Uytterhoeven regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT), 33d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)), 34d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID), 35d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT), 36d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_DVFS_SETVMAX, BD9571MWV_DVFS_MONIVDAC), 37d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN), 38d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INTMASK), 39d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK), 40d3ea2127SMarek Vasut }; 41d3ea2127SMarek Vasut 42d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_readable_table = { 43d3ea2127SMarek Vasut .yes_ranges = bd9571mwv_readable_yes_ranges, 44d3ea2127SMarek Vasut .n_yes_ranges = ARRAY_SIZE(bd9571mwv_readable_yes_ranges), 45d3ea2127SMarek Vasut }; 46d3ea2127SMarek Vasut 47d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_writable_yes_ranges[] = { 487b569bcbSGeert Uytterhoeven regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT), 49d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)), 50d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID), 51d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT), 52d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_INT_SET, BD9571MWV_GPIO_INTMASK), 53d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTMASK), 54d3ea2127SMarek Vasut }; 55d3ea2127SMarek Vasut 56d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_writable_table = { 57d3ea2127SMarek Vasut .yes_ranges = bd9571mwv_writable_yes_ranges, 58d3ea2127SMarek Vasut .n_yes_ranges = ARRAY_SIZE(bd9571mwv_writable_yes_ranges), 59d3ea2127SMarek Vasut }; 60d3ea2127SMarek Vasut 61d3ea2127SMarek Vasut static const struct regmap_range bd9571mwv_volatile_yes_ranges[] = { 62*b0aff01eSDien Pham regmap_reg_range(BD9571MWV_DVFS_MONIVDAC, BD9571MWV_DVFS_MONIVDAC), 63d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_IN, BD9571MWV_GPIO_IN), 64d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_GPIO_INT, BD9571MWV_GPIO_INT), 65d3ea2127SMarek Vasut regmap_reg_range(BD9571MWV_INT_INTREQ, BD9571MWV_INT_INTREQ), 66d3ea2127SMarek Vasut }; 67d3ea2127SMarek Vasut 68d3ea2127SMarek Vasut static const struct regmap_access_table bd9571mwv_volatile_table = { 69d3ea2127SMarek Vasut .yes_ranges = bd9571mwv_volatile_yes_ranges, 70d3ea2127SMarek Vasut .n_yes_ranges = ARRAY_SIZE(bd9571mwv_volatile_yes_ranges), 71d3ea2127SMarek Vasut }; 72d3ea2127SMarek Vasut 73d3ea2127SMarek Vasut static const struct regmap_config bd9571mwv_regmap_config = { 74d3ea2127SMarek Vasut .reg_bits = 8, 75d3ea2127SMarek Vasut .val_bits = 8, 76d3ea2127SMarek Vasut .cache_type = REGCACHE_RBTREE, 77d3ea2127SMarek Vasut .rd_table = &bd9571mwv_readable_table, 78d3ea2127SMarek Vasut .wr_table = &bd9571mwv_writable_table, 79d3ea2127SMarek Vasut .volatile_table = &bd9571mwv_volatile_table, 80d3ea2127SMarek Vasut .max_register = 0xff, 81d3ea2127SMarek Vasut }; 82d3ea2127SMarek Vasut 83d3ea2127SMarek Vasut static const struct regmap_irq bd9571mwv_irqs[] = { 84d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_MD1, 0, 85d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_MD1_INT), 86d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E1, 0, 87d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_MD2_E1_INT), 88d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_MD2_E2, 0, 89d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_MD2_E2_INT), 90d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_PROT_ERR, 0, 91d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_PROT_ERR_INT), 92d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_GP, 0, 93d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_GP_INT), 94d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_128H_OF, 0, 95d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_128H_OF_INT), 96d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_WDT_OF, 0, 97d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_WDT_OF_INT), 98d3ea2127SMarek Vasut REGMAP_IRQ_REG(BD9571MWV_IRQ_BKUP_TRG, 0, 99d3ea2127SMarek Vasut BD9571MWV_INT_INTREQ_BKUP_TRG_INT), 100d3ea2127SMarek Vasut }; 101d3ea2127SMarek Vasut 102d3ea2127SMarek Vasut static struct regmap_irq_chip bd9571mwv_irq_chip = { 103d3ea2127SMarek Vasut .name = "bd9571mwv", 104d3ea2127SMarek Vasut .status_base = BD9571MWV_INT_INTREQ, 105d3ea2127SMarek Vasut .mask_base = BD9571MWV_INT_INTMASK, 106d3ea2127SMarek Vasut .ack_base = BD9571MWV_INT_INTREQ, 107d3ea2127SMarek Vasut .init_ack_masked = true, 108d3ea2127SMarek Vasut .num_regs = 1, 109d3ea2127SMarek Vasut .irqs = bd9571mwv_irqs, 110d3ea2127SMarek Vasut .num_irqs = ARRAY_SIZE(bd9571mwv_irqs), 111d3ea2127SMarek Vasut }; 112d3ea2127SMarek Vasut 113d3ea2127SMarek Vasut static int bd9571mwv_identify(struct bd9571mwv *bd) 114d3ea2127SMarek Vasut { 115d3ea2127SMarek Vasut struct device *dev = bd->dev; 116d3ea2127SMarek Vasut unsigned int value; 117d3ea2127SMarek Vasut int ret; 118d3ea2127SMarek Vasut 119d3ea2127SMarek Vasut ret = regmap_read(bd->regmap, BD9571MWV_VENDOR_CODE, &value); 120d3ea2127SMarek Vasut if (ret) { 121d3ea2127SMarek Vasut dev_err(dev, "Failed to read vendor code register (ret=%i)\n", 122d3ea2127SMarek Vasut ret); 123d3ea2127SMarek Vasut return ret; 124d3ea2127SMarek Vasut } 125d3ea2127SMarek Vasut 126d3ea2127SMarek Vasut if (value != BD9571MWV_VENDOR_CODE_VAL) { 127d3ea2127SMarek Vasut dev_err(dev, "Invalid vendor code ID %02x (expected %02x)\n", 128d3ea2127SMarek Vasut value, BD9571MWV_VENDOR_CODE_VAL); 129d3ea2127SMarek Vasut return -EINVAL; 130d3ea2127SMarek Vasut } 131d3ea2127SMarek Vasut 132d3ea2127SMarek Vasut ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_CODE, &value); 133d3ea2127SMarek Vasut if (ret) { 134d3ea2127SMarek Vasut dev_err(dev, "Failed to read product code register (ret=%i)\n", 135d3ea2127SMarek Vasut ret); 136d3ea2127SMarek Vasut return ret; 137d3ea2127SMarek Vasut } 138d3ea2127SMarek Vasut 139d3ea2127SMarek Vasut if (value != BD9571MWV_PRODUCT_CODE_VAL) { 140d3ea2127SMarek Vasut dev_err(dev, "Invalid product code ID %02x (expected %02x)\n", 141d3ea2127SMarek Vasut value, BD9571MWV_PRODUCT_CODE_VAL); 142d3ea2127SMarek Vasut return -EINVAL; 143d3ea2127SMarek Vasut } 144d3ea2127SMarek Vasut 145d3ea2127SMarek Vasut ret = regmap_read(bd->regmap, BD9571MWV_PRODUCT_REVISION, &value); 146d3ea2127SMarek Vasut if (ret) { 147d3ea2127SMarek Vasut dev_err(dev, "Failed to read revision register (ret=%i)\n", 148d3ea2127SMarek Vasut ret); 149d3ea2127SMarek Vasut return ret; 150d3ea2127SMarek Vasut } 151d3ea2127SMarek Vasut 152d3ea2127SMarek Vasut dev_info(dev, "Device: BD9571MWV rev. %d\n", value & 0xff); 153d3ea2127SMarek Vasut 154d3ea2127SMarek Vasut return 0; 155d3ea2127SMarek Vasut } 156d3ea2127SMarek Vasut 157d3ea2127SMarek Vasut static int bd9571mwv_probe(struct i2c_client *client, 158d3ea2127SMarek Vasut const struct i2c_device_id *ids) 159d3ea2127SMarek Vasut { 160d3ea2127SMarek Vasut struct bd9571mwv *bd; 161d3ea2127SMarek Vasut int ret; 162d3ea2127SMarek Vasut 163d3ea2127SMarek Vasut bd = devm_kzalloc(&client->dev, sizeof(*bd), GFP_KERNEL); 164d3ea2127SMarek Vasut if (!bd) 165d3ea2127SMarek Vasut return -ENOMEM; 166d3ea2127SMarek Vasut 167d3ea2127SMarek Vasut i2c_set_clientdata(client, bd); 168d3ea2127SMarek Vasut bd->dev = &client->dev; 169d3ea2127SMarek Vasut bd->irq = client->irq; 170d3ea2127SMarek Vasut 171d3ea2127SMarek Vasut bd->regmap = devm_regmap_init_i2c(client, &bd9571mwv_regmap_config); 172d3ea2127SMarek Vasut if (IS_ERR(bd->regmap)) { 173d3ea2127SMarek Vasut dev_err(bd->dev, "Failed to initialize register map\n"); 174d3ea2127SMarek Vasut return PTR_ERR(bd->regmap); 175d3ea2127SMarek Vasut } 176d3ea2127SMarek Vasut 177d3ea2127SMarek Vasut ret = bd9571mwv_identify(bd); 178d3ea2127SMarek Vasut if (ret) 179d3ea2127SMarek Vasut return ret; 180d3ea2127SMarek Vasut 181d3ea2127SMarek Vasut ret = regmap_add_irq_chip(bd->regmap, bd->irq, IRQF_ONESHOT, 0, 182d3ea2127SMarek Vasut &bd9571mwv_irq_chip, &bd->irq_data); 183d3ea2127SMarek Vasut if (ret) { 184d3ea2127SMarek Vasut dev_err(bd->dev, "Failed to register IRQ chip\n"); 185d3ea2127SMarek Vasut return ret; 186d3ea2127SMarek Vasut } 187d3ea2127SMarek Vasut 188d3ea2127SMarek Vasut ret = mfd_add_devices(bd->dev, PLATFORM_DEVID_AUTO, bd9571mwv_cells, 189d3ea2127SMarek Vasut ARRAY_SIZE(bd9571mwv_cells), NULL, 0, 190d3ea2127SMarek Vasut regmap_irq_get_domain(bd->irq_data)); 191d3ea2127SMarek Vasut if (ret) { 192d3ea2127SMarek Vasut regmap_del_irq_chip(bd->irq, bd->irq_data); 193d3ea2127SMarek Vasut return ret; 194d3ea2127SMarek Vasut } 195d3ea2127SMarek Vasut 196d3ea2127SMarek Vasut return 0; 197d3ea2127SMarek Vasut } 198d3ea2127SMarek Vasut 199d3ea2127SMarek Vasut static int bd9571mwv_remove(struct i2c_client *client) 200d3ea2127SMarek Vasut { 201d3ea2127SMarek Vasut struct bd9571mwv *bd = i2c_get_clientdata(client); 202d3ea2127SMarek Vasut 203d3ea2127SMarek Vasut regmap_del_irq_chip(bd->irq, bd->irq_data); 204d3ea2127SMarek Vasut 205d3ea2127SMarek Vasut return 0; 206d3ea2127SMarek Vasut } 207d3ea2127SMarek Vasut 208d3ea2127SMarek Vasut static const struct of_device_id bd9571mwv_of_match_table[] = { 209d3ea2127SMarek Vasut { .compatible = "rohm,bd9571mwv", }, 210d3ea2127SMarek Vasut { /* sentinel */ } 211d3ea2127SMarek Vasut }; 212d3ea2127SMarek Vasut MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table); 213d3ea2127SMarek Vasut 214d3ea2127SMarek Vasut static const struct i2c_device_id bd9571mwv_id_table[] = { 215d3ea2127SMarek Vasut { "bd9571mwv", 0 }, 216d3ea2127SMarek Vasut { /* sentinel */ } 217d3ea2127SMarek Vasut }; 218d3ea2127SMarek Vasut MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table); 219d3ea2127SMarek Vasut 220d3ea2127SMarek Vasut static struct i2c_driver bd9571mwv_driver = { 221d3ea2127SMarek Vasut .driver = { 222d3ea2127SMarek Vasut .name = "bd9571mwv", 223d3ea2127SMarek Vasut .of_match_table = bd9571mwv_of_match_table, 224d3ea2127SMarek Vasut }, 225d3ea2127SMarek Vasut .probe = bd9571mwv_probe, 226d3ea2127SMarek Vasut .remove = bd9571mwv_remove, 227d3ea2127SMarek Vasut .id_table = bd9571mwv_id_table, 228d3ea2127SMarek Vasut }; 229d3ea2127SMarek Vasut module_i2c_driver(bd9571mwv_driver); 230d3ea2127SMarek Vasut 231d3ea2127SMarek Vasut MODULE_AUTHOR("Marek Vasut <marek.vasut+renesas@gmail.com>"); 232d3ea2127SMarek Vasut MODULE_DESCRIPTION("BD9571MWV PMIC Driver"); 233d3ea2127SMarek Vasut MODULE_LICENSE("GPL v2"); 234