1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2cfb61a41SCarlo Caione /* 34fd41151SChen-Yu Tsai * MFD core driver for the X-Powers' Power Management ICs 4cfb61a41SCarlo Caione * 5af7e9069SJacob Pan * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC 6af7e9069SJacob Pan * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature 7af7e9069SJacob Pan * as well as configurable GPIOs. 8cfb61a41SCarlo Caione * 94fd41151SChen-Yu Tsai * This file contains the interface independent core functions. 104fd41151SChen-Yu Tsai * 11e740235dSChen-Yu Tsai * Copyright (C) 2014 Carlo Caione 12e740235dSChen-Yu Tsai * 13cfb61a41SCarlo Caione * Author: Carlo Caione <carlo@caione.org> 14cfb61a41SCarlo Caione */ 15cfb61a41SCarlo Caione 16dcea4d5cSOlliver Schinagl #include <linux/acpi.h> 17dcea4d5cSOlliver Schinagl #include <linux/bitops.h> 18179dc63dSHans de Goede #include <linux/delay.h> 19dcea4d5cSOlliver Schinagl #include <linux/err.h> 20cfb61a41SCarlo Caione #include <linux/interrupt.h> 21cfb61a41SCarlo Caione #include <linux/kernel.h> 22dcea4d5cSOlliver Schinagl #include <linux/mfd/axp20x.h> 23dcea4d5cSOlliver Schinagl #include <linux/mfd/core.h> 24cfb61a41SCarlo Caione #include <linux/module.h> 25dcea4d5cSOlliver Schinagl #include <linux/of_device.h> 261b1305e9SSamuel Holland #include <linux/reboot.h> 27cfb61a41SCarlo Caione #include <linux/regmap.h> 28cfb61a41SCarlo Caione #include <linux/regulator/consumer.h> 29cfb61a41SCarlo Caione 3082b4d997SOlliver Schinagl #define AXP20X_OFF BIT(7) 31cfb61a41SCarlo Caione 32c0369698SRask Ingemann Lambertsen #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 33696f0b3fSChen-Yu Tsai #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4) 34696f0b3fSChen-Yu Tsai 35c31e858bSKrzysztof Kozlowski static const char * const axp20x_model_names[] = { 36d8d79f8fSMichal Suchanek "AXP152", 37*63eeabbcSAidan MacDonald "AXP192", 38af7e9069SJacob Pan "AXP202", 39af7e9069SJacob Pan "AXP209", 40f05be589SBoris BREZILLON "AXP221", 4102071f0fSChen-Yu Tsai "AXP223", 42af7e9069SJacob Pan "AXP288", 4375c8cb2fSMartin Botka "AXP313a", 441578353eSIcenowy Zheng "AXP803", 458824ee85SChen-Yu Tsai "AXP806", 4620147f0dSChen-Yu Tsai "AXP809", 477303733aSChen-Yu Tsai "AXP813", 48e0f8ad2aSShengyu Qu "AXP15060", 49af7e9069SJacob Pan }; 50af7e9069SJacob Pan 51d8d79f8fSMichal Suchanek static const struct regmap_range axp152_writeable_ranges[] = { 52d8d79f8fSMichal Suchanek regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE), 53d8d79f8fSMichal Suchanek regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE), 54d8d79f8fSMichal Suchanek }; 55d8d79f8fSMichal Suchanek 56d8d79f8fSMichal Suchanek static const struct regmap_range axp152_volatile_ranges[] = { 57d8d79f8fSMichal Suchanek regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE), 58d8d79f8fSMichal Suchanek regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE), 59d8d79f8fSMichal Suchanek regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT), 60d8d79f8fSMichal Suchanek }; 61d8d79f8fSMichal Suchanek 62d8d79f8fSMichal Suchanek static const struct regmap_access_table axp152_writeable_table = { 63d8d79f8fSMichal Suchanek .yes_ranges = axp152_writeable_ranges, 64d8d79f8fSMichal Suchanek .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges), 65d8d79f8fSMichal Suchanek }; 66d8d79f8fSMichal Suchanek 67d8d79f8fSMichal Suchanek static const struct regmap_access_table axp152_volatile_table = { 68d8d79f8fSMichal Suchanek .yes_ranges = axp152_volatile_ranges, 69d8d79f8fSMichal Suchanek .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges), 70d8d79f8fSMichal Suchanek }; 71d8d79f8fSMichal Suchanek 72cfb61a41SCarlo Caione static const struct regmap_range axp20x_writeable_ranges[] = { 73cfb61a41SCarlo Caione regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 7497602370SQuentin Schulz regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 75cfb61a41SCarlo Caione regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), 76553ed4b5SBruno Prémont regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), 77cfb61a41SCarlo Caione }; 78cfb61a41SCarlo Caione 79cfb61a41SCarlo Caione static const struct regmap_range axp20x_volatile_ranges[] = { 80553ed4b5SBruno Prémont regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS), 81553ed4b5SBruno Prémont regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), 82cfb61a41SCarlo Caione regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 83553ed4b5SBruno Prémont regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 84553ed4b5SBruno Prémont regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL), 85553ed4b5SBruno Prémont regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L), 86cfb61a41SCarlo Caione }; 87cfb61a41SCarlo Caione 88cfb61a41SCarlo Caione static const struct regmap_access_table axp20x_writeable_table = { 89cfb61a41SCarlo Caione .yes_ranges = axp20x_writeable_ranges, 90cfb61a41SCarlo Caione .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges), 91cfb61a41SCarlo Caione }; 92cfb61a41SCarlo Caione 93cfb61a41SCarlo Caione static const struct regmap_access_table axp20x_volatile_table = { 94cfb61a41SCarlo Caione .yes_ranges = axp20x_volatile_ranges, 95cfb61a41SCarlo Caione .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges), 96cfb61a41SCarlo Caione }; 97cfb61a41SCarlo Caione 98*63eeabbcSAidan MacDonald static const struct regmap_range axp192_writeable_ranges[] = { 99*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)), 100*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE), 101*63eeabbcSAidan MacDonald regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL), 102*63eeabbcSAidan MacDonald regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL), 103*63eeabbcSAidan MacDonald }; 104*63eeabbcSAidan MacDonald 105*63eeabbcSAidan MacDonald static const struct regmap_range axp192_volatile_ranges[] = { 106*63eeabbcSAidan MacDonald regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS), 107*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE), 108*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE), 109*63eeabbcSAidan MacDonald regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L), 110*63eeabbcSAidan MacDonald regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 111*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE), 112*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE), 113*63eeabbcSAidan MacDonald regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL), 114*63eeabbcSAidan MacDonald regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL), 115*63eeabbcSAidan MacDonald }; 116*63eeabbcSAidan MacDonald 117*63eeabbcSAidan MacDonald static const struct regmap_access_table axp192_writeable_table = { 118*63eeabbcSAidan MacDonald .yes_ranges = axp192_writeable_ranges, 119*63eeabbcSAidan MacDonald .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges), 120*63eeabbcSAidan MacDonald }; 121*63eeabbcSAidan MacDonald 122*63eeabbcSAidan MacDonald static const struct regmap_access_table axp192_volatile_table = { 123*63eeabbcSAidan MacDonald .yes_ranges = axp192_volatile_ranges, 124*63eeabbcSAidan MacDonald .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges), 125*63eeabbcSAidan MacDonald }; 126*63eeabbcSAidan MacDonald 12720147f0dSChen-Yu Tsai /* AXP22x ranges are shared with the AXP809, as they cover the same range */ 128f05be589SBoris BREZILLON static const struct regmap_range axp22x_writeable_ranges[] = { 129f05be589SBoris BREZILLON regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), 13097602370SQuentin Schulz regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), 131f05be589SBoris BREZILLON regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), 132f05be589SBoris BREZILLON }; 133f05be589SBoris BREZILLON 134f05be589SBoris BREZILLON static const struct regmap_range axp22x_volatile_ranges[] = { 13515093250SHans de Goede regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE), 136f05be589SBoris BREZILLON regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE), 13715093250SHans de Goede regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE), 138ed7311f0SQuentin Schulz regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L), 13915093250SHans de Goede regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES), 140f05be589SBoris BREZILLON }; 141f05be589SBoris BREZILLON 142f05be589SBoris BREZILLON static const struct regmap_access_table axp22x_writeable_table = { 143f05be589SBoris BREZILLON .yes_ranges = axp22x_writeable_ranges, 144f05be589SBoris BREZILLON .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges), 145f05be589SBoris BREZILLON }; 146f05be589SBoris BREZILLON 147f05be589SBoris BREZILLON static const struct regmap_access_table axp22x_volatile_table = { 148f05be589SBoris BREZILLON .yes_ranges = axp22x_volatile_ranges, 149f05be589SBoris BREZILLON .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges), 150f05be589SBoris BREZILLON }; 151f05be589SBoris BREZILLON 1521578353eSIcenowy Zheng /* AXP288 ranges are shared with the AXP803, as they cover the same range */ 153af7e9069SJacob Pan static const struct regmap_range axp288_writeable_ranges[] = { 1542405fbfbSHans de Goede regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON), 155af7e9069SJacob Pan regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE), 156af7e9069SJacob Pan regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5), 157af7e9069SJacob Pan }; 158af7e9069SJacob Pan 159af7e9069SJacob Pan static const struct regmap_range axp288_volatile_ranges[] = { 160cd532166SHans de Goede regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON), 161f949a9ebSHans de Goede regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT), 162cd532166SHans de Goede regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL), 163dc91c3b6SSamuel Holland regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT), 1640c384fc8SHans de Goede regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL), 165af7e9069SJacob Pan regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L), 166cd532166SHans de Goede regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL), 167f949a9ebSHans de Goede regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE), 168cd532166SHans de Goede regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L), 169cd532166SHans de Goede regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG), 170af7e9069SJacob Pan }; 171af7e9069SJacob Pan 172af7e9069SJacob Pan static const struct regmap_access_table axp288_writeable_table = { 173af7e9069SJacob Pan .yes_ranges = axp288_writeable_ranges, 174af7e9069SJacob Pan .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges), 175af7e9069SJacob Pan }; 176af7e9069SJacob Pan 177af7e9069SJacob Pan static const struct regmap_access_table axp288_volatile_table = { 178af7e9069SJacob Pan .yes_ranges = axp288_volatile_ranges, 179af7e9069SJacob Pan .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges), 180af7e9069SJacob Pan }; 181af7e9069SJacob Pan 1828824ee85SChen-Yu Tsai static const struct regmap_range axp806_writeable_ranges[] = { 1838824ee85SChen-Yu Tsai regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)), 1848824ee85SChen-Yu Tsai regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL), 1858824ee85SChen-Yu Tsai regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN), 1868824ee85SChen-Yu Tsai regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 18734d9030bSChen-Yu Tsai regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT), 1888824ee85SChen-Yu Tsai }; 1898824ee85SChen-Yu Tsai 19075c8cb2fSMartin Botka static const struct regmap_range axp313a_writeable_ranges[] = { 19175c8cb2fSMartin Botka regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE), 19275c8cb2fSMartin Botka }; 19375c8cb2fSMartin Botka 19475c8cb2fSMartin Botka static const struct regmap_range axp313a_volatile_ranges[] = { 19575c8cb2fSMartin Botka regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL), 19675c8cb2fSMartin Botka regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE), 19775c8cb2fSMartin Botka }; 19875c8cb2fSMartin Botka 19975c8cb2fSMartin Botka static const struct regmap_access_table axp313a_writeable_table = { 20075c8cb2fSMartin Botka .yes_ranges = axp313a_writeable_ranges, 20175c8cb2fSMartin Botka .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges), 20275c8cb2fSMartin Botka }; 20375c8cb2fSMartin Botka 20475c8cb2fSMartin Botka static const struct regmap_access_table axp313a_volatile_table = { 20575c8cb2fSMartin Botka .yes_ranges = axp313a_volatile_ranges, 20675c8cb2fSMartin Botka .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges), 20775c8cb2fSMartin Botka }; 20875c8cb2fSMartin Botka 2098824ee85SChen-Yu Tsai static const struct regmap_range axp806_volatile_ranges[] = { 2108824ee85SChen-Yu Tsai regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE), 2118824ee85SChen-Yu Tsai }; 2128824ee85SChen-Yu Tsai 2138824ee85SChen-Yu Tsai static const struct regmap_access_table axp806_writeable_table = { 2148824ee85SChen-Yu Tsai .yes_ranges = axp806_writeable_ranges, 2158824ee85SChen-Yu Tsai .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges), 2168824ee85SChen-Yu Tsai }; 2178824ee85SChen-Yu Tsai 2188824ee85SChen-Yu Tsai static const struct regmap_access_table axp806_volatile_table = { 2198824ee85SChen-Yu Tsai .yes_ranges = axp806_volatile_ranges, 2208824ee85SChen-Yu Tsai .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges), 2218824ee85SChen-Yu Tsai }; 2228824ee85SChen-Yu Tsai 223e0f8ad2aSShengyu Qu static const struct regmap_range axp15060_writeable_ranges[] = { 224e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2), 225e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL), 226e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 227e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY), 228e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN), 229e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 230e0f8ad2aSShengyu Qu }; 231e0f8ad2aSShengyu Qu 232e0f8ad2aSShengyu Qu static const struct regmap_range axp15060_volatile_ranges[] = { 233e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC), 234e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ), 235e0f8ad2aSShengyu Qu regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE), 236e0f8ad2aSShengyu Qu }; 237e0f8ad2aSShengyu Qu 238e0f8ad2aSShengyu Qu static const struct regmap_access_table axp15060_writeable_table = { 239e0f8ad2aSShengyu Qu .yes_ranges = axp15060_writeable_ranges, 240e0f8ad2aSShengyu Qu .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges), 241e0f8ad2aSShengyu Qu }; 242e0f8ad2aSShengyu Qu 243e0f8ad2aSShengyu Qu static const struct regmap_access_table axp15060_volatile_table = { 244e0f8ad2aSShengyu Qu .yes_ranges = axp15060_volatile_ranges, 245e0f8ad2aSShengyu Qu .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges), 246e0f8ad2aSShengyu Qu }; 247e0f8ad2aSShengyu Qu 248531a469eSChen-Yu Tsai static const struct resource axp152_pek_resources[] = { 249d8d79f8fSMichal Suchanek DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 250d8d79f8fSMichal Suchanek DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 251d8d79f8fSMichal Suchanek }; 252d8d79f8fSMichal Suchanek 253*63eeabbcSAidan MacDonald static const struct resource axp192_ac_power_supply_resources[] = { 254*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 255*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 256*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 257*63eeabbcSAidan MacDonald }; 258*63eeabbcSAidan MacDonald 259*63eeabbcSAidan MacDonald static const struct resource axp192_usb_power_supply_resources[] = { 260*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 261*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 262*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"), 263*63eeabbcSAidan MacDonald DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 264*63eeabbcSAidan MacDonald }; 265*63eeabbcSAidan MacDonald 266531a469eSChen-Yu Tsai static const struct resource axp20x_ac_power_supply_resources[] = { 267cd7cf27bSMichael Haas DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"), 268cd7cf27bSMichael Haas DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"), 269cd7cf27bSMichael Haas DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"), 270cd7cf27bSMichael Haas }; 271cd7cf27bSMichael Haas 272531a469eSChen-Yu Tsai static const struct resource axp20x_pek_resources[] = { 273e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 274e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 275cfb61a41SCarlo Caione }; 276cfb61a41SCarlo Caione 277531a469eSChen-Yu Tsai static const struct resource axp20x_usb_power_supply_resources[] = { 2788de4efdaSHans de Goede DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 2798de4efdaSHans de Goede DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 2808de4efdaSHans de Goede DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"), 2818de4efdaSHans de Goede DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"), 2828de4efdaSHans de Goede }; 2838de4efdaSHans de Goede 284531a469eSChen-Yu Tsai static const struct resource axp22x_usb_power_supply_resources[] = { 285ecd98cceSHans de Goede DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 286ecd98cceSHans de Goede DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 287ecd98cceSHans de Goede }; 288ecd98cceSHans de Goede 289129fc677SQuentin Schulz /* AXP803 and AXP813/AXP818 share the same interrupts */ 290129fc677SQuentin Schulz static const struct resource axp803_usb_power_supply_resources[] = { 291129fc677SQuentin Schulz DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"), 292129fc677SQuentin Schulz DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"), 293129fc677SQuentin Schulz }; 294129fc677SQuentin Schulz 295531a469eSChen-Yu Tsai static const struct resource axp22x_pek_resources[] = { 296e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 297e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 298f05be589SBoris BREZILLON }; 299f05be589SBoris BREZILLON 300531a469eSChen-Yu Tsai static const struct resource axp288_power_button_resources[] = { 301e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"), 302e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"), 303e56e5ad6SBorun Fu }; 304e56e5ad6SBorun Fu 305531a469eSChen-Yu Tsai static const struct resource axp288_fuel_gauge_resources[] = { 306e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_QWBTU), 307e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_WBTU), 308e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_QWBTO), 309e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_WBTO), 310e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_WL2), 311e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_WL1), 312af7e9069SJacob Pan }; 313af7e9069SJacob Pan 31475c8cb2fSMartin Botka static const struct resource axp313a_pek_resources[] = { 31575c8cb2fSMartin Botka DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 31675c8cb2fSMartin Botka DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 31775c8cb2fSMartin Botka }; 31875c8cb2fSMartin Botka 319531a469eSChen-Yu Tsai static const struct resource axp803_pek_resources[] = { 320e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 321e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 3221578353eSIcenowy Zheng }; 3231578353eSIcenowy Zheng 32406f49010SChen-Yu Tsai static const struct resource axp806_pek_resources[] = { 32506f49010SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), 32606f49010SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), 32706f49010SChen-Yu Tsai }; 32806f49010SChen-Yu Tsai 329531a469eSChen-Yu Tsai static const struct resource axp809_pek_resources[] = { 330e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 331e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 33220147f0dSChen-Yu Tsai }; 33320147f0dSChen-Yu Tsai 334e0f8ad2aSShengyu Qu static const struct resource axp15060_pek_resources[] = { 335e0f8ad2aSShengyu Qu DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"), 336e0f8ad2aSShengyu Qu DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"), 337e0f8ad2aSShengyu Qu }; 338e0f8ad2aSShengyu Qu 339d8d79f8fSMichal Suchanek static const struct regmap_config axp152_regmap_config = { 340d8d79f8fSMichal Suchanek .reg_bits = 8, 341d8d79f8fSMichal Suchanek .val_bits = 8, 342d8d79f8fSMichal Suchanek .wr_table = &axp152_writeable_table, 343d8d79f8fSMichal Suchanek .volatile_table = &axp152_volatile_table, 344d8d79f8fSMichal Suchanek .max_register = AXP152_PWM1_DUTY_CYCLE, 345d8d79f8fSMichal Suchanek .cache_type = REGCACHE_RBTREE, 346d8d79f8fSMichal Suchanek }; 347d8d79f8fSMichal Suchanek 348*63eeabbcSAidan MacDonald static const struct regmap_config axp192_regmap_config = { 349*63eeabbcSAidan MacDonald .reg_bits = 8, 350*63eeabbcSAidan MacDonald .val_bits = 8, 351*63eeabbcSAidan MacDonald .wr_table = &axp192_writeable_table, 352*63eeabbcSAidan MacDonald .volatile_table = &axp192_volatile_table, 353*63eeabbcSAidan MacDonald .max_register = AXP20X_CC_CTRL, 354*63eeabbcSAidan MacDonald .cache_type = REGCACHE_RBTREE, 355*63eeabbcSAidan MacDonald }; 356*63eeabbcSAidan MacDonald 357cfb61a41SCarlo Caione static const struct regmap_config axp20x_regmap_config = { 358cfb61a41SCarlo Caione .reg_bits = 8, 359cfb61a41SCarlo Caione .val_bits = 8, 360cfb61a41SCarlo Caione .wr_table = &axp20x_writeable_table, 361cfb61a41SCarlo Caione .volatile_table = &axp20x_volatile_table, 362553ed4b5SBruno Prémont .max_register = AXP20X_OCV(AXP20X_OCV_MAX), 363cfb61a41SCarlo Caione .cache_type = REGCACHE_RBTREE, 364cfb61a41SCarlo Caione }; 365cfb61a41SCarlo Caione 366f05be589SBoris BREZILLON static const struct regmap_config axp22x_regmap_config = { 367f05be589SBoris BREZILLON .reg_bits = 8, 368f05be589SBoris BREZILLON .val_bits = 8, 369f05be589SBoris BREZILLON .wr_table = &axp22x_writeable_table, 370f05be589SBoris BREZILLON .volatile_table = &axp22x_volatile_table, 371f05be589SBoris BREZILLON .max_register = AXP22X_BATLOW_THRES1, 372f05be589SBoris BREZILLON .cache_type = REGCACHE_RBTREE, 373f05be589SBoris BREZILLON }; 374f05be589SBoris BREZILLON 375af7e9069SJacob Pan static const struct regmap_config axp288_regmap_config = { 376af7e9069SJacob Pan .reg_bits = 8, 377af7e9069SJacob Pan .val_bits = 8, 378af7e9069SJacob Pan .wr_table = &axp288_writeable_table, 379af7e9069SJacob Pan .volatile_table = &axp288_volatile_table, 380af7e9069SJacob Pan .max_register = AXP288_FG_TUNE5, 381af7e9069SJacob Pan .cache_type = REGCACHE_RBTREE, 382af7e9069SJacob Pan }; 383af7e9069SJacob Pan 38475c8cb2fSMartin Botka static const struct regmap_config axp313a_regmap_config = { 38575c8cb2fSMartin Botka .reg_bits = 8, 38675c8cb2fSMartin Botka .val_bits = 8, 38775c8cb2fSMartin Botka .wr_table = &axp313a_writeable_table, 38875c8cb2fSMartin Botka .volatile_table = &axp313a_volatile_table, 38975c8cb2fSMartin Botka .max_register = AXP313A_IRQ_STATE, 39075c8cb2fSMartin Botka .cache_type = REGCACHE_RBTREE, 39175c8cb2fSMartin Botka }; 39275c8cb2fSMartin Botka 3938824ee85SChen-Yu Tsai static const struct regmap_config axp806_regmap_config = { 3948824ee85SChen-Yu Tsai .reg_bits = 8, 3958824ee85SChen-Yu Tsai .val_bits = 8, 3968824ee85SChen-Yu Tsai .wr_table = &axp806_writeable_table, 3978824ee85SChen-Yu Tsai .volatile_table = &axp806_volatile_table, 39834d9030bSChen-Yu Tsai .max_register = AXP806_REG_ADDR_EXT, 3998824ee85SChen-Yu Tsai .cache_type = REGCACHE_RBTREE, 4008824ee85SChen-Yu Tsai }; 4018824ee85SChen-Yu Tsai 402e0f8ad2aSShengyu Qu static const struct regmap_config axp15060_regmap_config = { 403e0f8ad2aSShengyu Qu .reg_bits = 8, 404e0f8ad2aSShengyu Qu .val_bits = 8, 405e0f8ad2aSShengyu Qu .wr_table = &axp15060_writeable_table, 406e0f8ad2aSShengyu Qu .volatile_table = &axp15060_volatile_table, 407e0f8ad2aSShengyu Qu .max_register = AXP15060_IRQ2_STATE, 408e0f8ad2aSShengyu Qu .cache_type = REGCACHE_RBTREE, 409e0f8ad2aSShengyu Qu }; 410e0f8ad2aSShengyu Qu 411af7e9069SJacob Pan #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ 412af7e9069SJacob Pan [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) } 413cfb61a41SCarlo Caione 414d8d79f8fSMichal Suchanek static const struct regmap_irq axp152_regmap_irqs[] = { 415d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6), 416d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5), 417d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3), 418d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2), 419d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5), 420d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4), 421d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3), 422d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2), 423d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1), 424d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0), 425d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7), 426d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6), 427d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5), 428d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3), 429d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2), 430d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1), 431d8d79f8fSMichal Suchanek INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0), 432d8d79f8fSMichal Suchanek }; 433d8d79f8fSMichal Suchanek 434*63eeabbcSAidan MacDonald static const struct regmap_irq axp192_regmap_irqs[] = { 435*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7), 436*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6), 437*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5), 438*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4), 439*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3), 440*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2), 441*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1), 442*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7), 443*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6), 444*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5), 445*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4), 446*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3), 447*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2), 448*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1), 449*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0), 450*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7), 451*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6), 452*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5), 453*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4), 454*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3), 455*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1), 456*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0), 457*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7), 458*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6), 459*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5), 460*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4), 461*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3), 462*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2), 463*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0), 464*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7), 465*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2), 466*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1), 467*63eeabbcSAidan MacDonald INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0), 468*63eeabbcSAidan MacDonald }; 469*63eeabbcSAidan MacDonald 470cfb61a41SCarlo Caione static const struct regmap_irq axp20x_regmap_irqs[] = { 471af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7), 472af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6), 473af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5), 474af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4), 475af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3), 476af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2), 477af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1), 478af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7), 479af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6), 480af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5), 481af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4), 482af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3), 483af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2), 484af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1), 485af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0), 486af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7), 487af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6), 488af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5), 489af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4), 490af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3), 491af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1), 492af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0), 493af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7), 494af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6), 495af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5), 496af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4), 497af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3), 498af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2), 499af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1), 500af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0), 501af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7), 502af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6), 503af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5), 504af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3), 505af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2), 506af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1), 507af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0), 508af7e9069SJacob Pan }; 509af7e9069SJacob Pan 510f05be589SBoris BREZILLON static const struct regmap_irq axp22x_regmap_irqs[] = { 511f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7), 512f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6), 513f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5), 514f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4), 515f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3), 516f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2), 517f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1), 518f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7), 519f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6), 520f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5), 521f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4), 522f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3), 523f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2), 524f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1), 525f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0), 526f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7), 527f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1), 528f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0), 529f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1), 530f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0), 531f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7), 532f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6), 533f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5), 534f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1), 535f05be589SBoris BREZILLON INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0), 536f05be589SBoris BREZILLON }; 537f05be589SBoris BREZILLON 538af7e9069SJacob Pan /* some IRQs are compatible with axp20x models */ 539af7e9069SJacob Pan static const struct regmap_irq axp288_regmap_irqs[] = { 540ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2), 541ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3), 542ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, OV, 0, 4), 5438b44e678SHans de Goede INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5), 5448b44e678SHans de Goede INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6), 5458b44e678SHans de Goede INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7), 546af7e9069SJacob Pan 547ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, DONE, 1, 2), 548ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3), 549af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4), 550af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5), 551ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6), 552ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7), 553af7e9069SJacob Pan 554af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0), 555af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1), 556af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2), 557ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3), 558af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4), 559af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5), 560af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6), 561af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7), 562af7e9069SJacob Pan 563af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, WL2, 3, 0), 564af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, WL1, 3, 1), 565af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2), 566af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, OT, 3, 7), 567af7e9069SJacob Pan 568af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0), 569af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1), 570af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, POKO, 4, 2), 571af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, POKL, 4, 3), 572af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, POKS, 4, 4), 573af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, POKN, 4, 5), 574af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, POKP, 4, 6), 575ff3bbc5cSJacob Pan INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7), 576af7e9069SJacob Pan 577af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0), 578af7e9069SJacob Pan INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1), 579cfb61a41SCarlo Caione }; 580cfb61a41SCarlo Caione 58175c8cb2fSMartin Botka static const struct regmap_irq axp313a_regmap_irqs[] = { 58275c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7), 58375c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6), 58475c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5), 58575c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4), 58675c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3), 58775c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2), 58875c8cb2fSMartin Botka INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0), 58975c8cb2fSMartin Botka }; 59075c8cb2fSMartin Botka 5911578353eSIcenowy Zheng static const struct regmap_irq axp803_regmap_irqs[] = { 5921578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7), 5931578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6), 5941578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5), 5951578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4), 5961578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3), 5971578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2), 5981578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7), 5991578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6), 6001578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5), 6011578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4), 6021578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3), 6031578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2), 6041578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7), 6051578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6), 6061578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5), 6071578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4), 6081578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3), 6091578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2), 6101578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1), 6111578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0), 6121578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7), 6131578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2), 6141578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1), 6151578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0), 6161578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7), 6171578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6), 6181578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5), 6191578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4), 6201578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3), 6211578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2), 6221578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1), 6231578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0), 6241578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1), 6251578353eSIcenowy Zheng INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0), 6261578353eSIcenowy Zheng }; 6271578353eSIcenowy Zheng 6288824ee85SChen-Yu Tsai static const struct regmap_irq axp806_regmap_irqs[] = { 6298824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0), 6308824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1), 6318824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3), 6328824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4), 6338824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5), 6348824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6), 6358824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7), 636eef2b53aSChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0), 637eef2b53aSChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1), 6388824ee85SChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4), 639eef2b53aSChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5), 640eef2b53aSChen-Yu Tsai INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6), 6418824ee85SChen-Yu Tsai }; 6428824ee85SChen-Yu Tsai 64320147f0dSChen-Yu Tsai static const struct regmap_irq axp809_regmap_irqs[] = { 64420147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7), 64520147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6), 64620147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5), 64720147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4), 64820147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3), 64920147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2), 65020147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1), 65120147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7), 65220147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6), 65320147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5), 65420147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4), 65520147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3), 65620147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2), 65720147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7), 65820147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6), 65920147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5), 66020147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4), 66120147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3), 66220147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2), 66320147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1), 66420147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0), 66520147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7), 66620147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1), 66720147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0), 66820147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7), 66920147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6), 67020147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5), 67120147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4), 67220147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3), 67320147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2), 67420147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1), 67520147f0dSChen-Yu Tsai INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0), 67620147f0dSChen-Yu Tsai }; 67720147f0dSChen-Yu Tsai 678e0f8ad2aSShengyu Qu static const struct regmap_irq axp15060_regmap_irqs[] = { 679e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0), 680e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1), 681e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2), 682e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3), 683e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4), 684e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5), 685e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6), 686e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7), 687e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0), 688e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1), 689e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2), 690e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3), 691e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4), 692e0f8ad2aSShengyu Qu INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5), 693e0f8ad2aSShengyu Qu }; 694e0f8ad2aSShengyu Qu 695d8d79f8fSMichal Suchanek static const struct regmap_irq_chip axp152_regmap_irq_chip = { 696d8d79f8fSMichal Suchanek .name = "axp152_irq_chip", 697d8d79f8fSMichal Suchanek .status_base = AXP152_IRQ1_STATE, 698d8d79f8fSMichal Suchanek .ack_base = AXP152_IRQ1_STATE, 699acc247b2SAidan MacDonald .unmask_base = AXP152_IRQ1_EN, 700d8d79f8fSMichal Suchanek .init_ack_masked = true, 701d8d79f8fSMichal Suchanek .irqs = axp152_regmap_irqs, 702d8d79f8fSMichal Suchanek .num_irqs = ARRAY_SIZE(axp152_regmap_irqs), 703d8d79f8fSMichal Suchanek .num_regs = 3, 704d8d79f8fSMichal Suchanek }; 705d8d79f8fSMichal Suchanek 706*63eeabbcSAidan MacDonald static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data, 707*63eeabbcSAidan MacDonald unsigned int base, int index) 708*63eeabbcSAidan MacDonald { 709*63eeabbcSAidan MacDonald /* linear mapping for IRQ1 to IRQ4 */ 710*63eeabbcSAidan MacDonald if (index < 4) 711*63eeabbcSAidan MacDonald return base + index; 712*63eeabbcSAidan MacDonald 713*63eeabbcSAidan MacDonald /* handle IRQ5 separately */ 714*63eeabbcSAidan MacDonald if (base == AXP192_IRQ1_EN) 715*63eeabbcSAidan MacDonald return AXP192_IRQ5_EN; 716*63eeabbcSAidan MacDonald 717*63eeabbcSAidan MacDonald return AXP192_IRQ5_STATE; 718*63eeabbcSAidan MacDonald } 719*63eeabbcSAidan MacDonald 720*63eeabbcSAidan MacDonald static const struct regmap_irq_chip axp192_regmap_irq_chip = { 721*63eeabbcSAidan MacDonald .name = "axp192_irq_chip", 722*63eeabbcSAidan MacDonald .status_base = AXP192_IRQ1_STATE, 723*63eeabbcSAidan MacDonald .ack_base = AXP192_IRQ1_STATE, 724*63eeabbcSAidan MacDonald .unmask_base = AXP192_IRQ1_EN, 725*63eeabbcSAidan MacDonald .init_ack_masked = true, 726*63eeabbcSAidan MacDonald .irqs = axp192_regmap_irqs, 727*63eeabbcSAidan MacDonald .num_irqs = ARRAY_SIZE(axp192_regmap_irqs), 728*63eeabbcSAidan MacDonald .num_regs = 5, 729*63eeabbcSAidan MacDonald .get_irq_reg = axp192_get_irq_reg, 730*63eeabbcSAidan MacDonald }; 731*63eeabbcSAidan MacDonald 732cfb61a41SCarlo Caione static const struct regmap_irq_chip axp20x_regmap_irq_chip = { 733cfb61a41SCarlo Caione .name = "axp20x_irq_chip", 734cfb61a41SCarlo Caione .status_base = AXP20X_IRQ1_STATE, 735cfb61a41SCarlo Caione .ack_base = AXP20X_IRQ1_STATE, 736acc247b2SAidan MacDonald .unmask_base = AXP20X_IRQ1_EN, 737cfb61a41SCarlo Caione .init_ack_masked = true, 738af7e9069SJacob Pan .irqs = axp20x_regmap_irqs, 739af7e9069SJacob Pan .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs), 740af7e9069SJacob Pan .num_regs = 5, 741af7e9069SJacob Pan 742af7e9069SJacob Pan }; 743af7e9069SJacob Pan 744f05be589SBoris BREZILLON static const struct regmap_irq_chip axp22x_regmap_irq_chip = { 745f05be589SBoris BREZILLON .name = "axp22x_irq_chip", 746f05be589SBoris BREZILLON .status_base = AXP20X_IRQ1_STATE, 747f05be589SBoris BREZILLON .ack_base = AXP20X_IRQ1_STATE, 748acc247b2SAidan MacDonald .unmask_base = AXP20X_IRQ1_EN, 749f05be589SBoris BREZILLON .init_ack_masked = true, 750f05be589SBoris BREZILLON .irqs = axp22x_regmap_irqs, 751f05be589SBoris BREZILLON .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs), 752f05be589SBoris BREZILLON .num_regs = 5, 753f05be589SBoris BREZILLON }; 754f05be589SBoris BREZILLON 755af7e9069SJacob Pan static const struct regmap_irq_chip axp288_regmap_irq_chip = { 756af7e9069SJacob Pan .name = "axp288_irq_chip", 757af7e9069SJacob Pan .status_base = AXP20X_IRQ1_STATE, 758af7e9069SJacob Pan .ack_base = AXP20X_IRQ1_STATE, 759acc247b2SAidan MacDonald .unmask_base = AXP20X_IRQ1_EN, 760af7e9069SJacob Pan .init_ack_masked = true, 761af7e9069SJacob Pan .irqs = axp288_regmap_irqs, 762af7e9069SJacob Pan .num_irqs = ARRAY_SIZE(axp288_regmap_irqs), 763af7e9069SJacob Pan .num_regs = 6, 764af7e9069SJacob Pan 765cfb61a41SCarlo Caione }; 766cfb61a41SCarlo Caione 76775c8cb2fSMartin Botka static const struct regmap_irq_chip axp313a_regmap_irq_chip = { 76875c8cb2fSMartin Botka .name = "axp313a_irq_chip", 76975c8cb2fSMartin Botka .status_base = AXP313A_IRQ_STATE, 77075c8cb2fSMartin Botka .ack_base = AXP313A_IRQ_STATE, 77175c8cb2fSMartin Botka .unmask_base = AXP313A_IRQ_EN, 77275c8cb2fSMartin Botka .init_ack_masked = true, 77375c8cb2fSMartin Botka .irqs = axp313a_regmap_irqs, 77475c8cb2fSMartin Botka .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs), 77575c8cb2fSMartin Botka .num_regs = 1, 77675c8cb2fSMartin Botka }; 77775c8cb2fSMartin Botka 7781578353eSIcenowy Zheng static const struct regmap_irq_chip axp803_regmap_irq_chip = { 7791578353eSIcenowy Zheng .name = "axp803", 7801578353eSIcenowy Zheng .status_base = AXP20X_IRQ1_STATE, 7811578353eSIcenowy Zheng .ack_base = AXP20X_IRQ1_STATE, 782acc247b2SAidan MacDonald .unmask_base = AXP20X_IRQ1_EN, 7831578353eSIcenowy Zheng .init_ack_masked = true, 7841578353eSIcenowy Zheng .irqs = axp803_regmap_irqs, 7851578353eSIcenowy Zheng .num_irqs = ARRAY_SIZE(axp803_regmap_irqs), 7861578353eSIcenowy Zheng .num_regs = 6, 7871578353eSIcenowy Zheng }; 7881578353eSIcenowy Zheng 7898824ee85SChen-Yu Tsai static const struct regmap_irq_chip axp806_regmap_irq_chip = { 7908824ee85SChen-Yu Tsai .name = "axp806", 7918824ee85SChen-Yu Tsai .status_base = AXP20X_IRQ1_STATE, 7928824ee85SChen-Yu Tsai .ack_base = AXP20X_IRQ1_STATE, 793acc247b2SAidan MacDonald .unmask_base = AXP20X_IRQ1_EN, 7948824ee85SChen-Yu Tsai .init_ack_masked = true, 7958824ee85SChen-Yu Tsai .irqs = axp806_regmap_irqs, 7968824ee85SChen-Yu Tsai .num_irqs = ARRAY_SIZE(axp806_regmap_irqs), 7978824ee85SChen-Yu Tsai .num_regs = 2, 7988824ee85SChen-Yu Tsai }; 7998824ee85SChen-Yu Tsai 80020147f0dSChen-Yu Tsai static const struct regmap_irq_chip axp809_regmap_irq_chip = { 80120147f0dSChen-Yu Tsai .name = "axp809", 80220147f0dSChen-Yu Tsai .status_base = AXP20X_IRQ1_STATE, 80320147f0dSChen-Yu Tsai .ack_base = AXP20X_IRQ1_STATE, 804acc247b2SAidan MacDonald .unmask_base = AXP20X_IRQ1_EN, 80520147f0dSChen-Yu Tsai .init_ack_masked = true, 80620147f0dSChen-Yu Tsai .irqs = axp809_regmap_irqs, 80720147f0dSChen-Yu Tsai .num_irqs = ARRAY_SIZE(axp809_regmap_irqs), 80820147f0dSChen-Yu Tsai .num_regs = 5, 80920147f0dSChen-Yu Tsai }; 81020147f0dSChen-Yu Tsai 811e0f8ad2aSShengyu Qu static const struct regmap_irq_chip axp15060_regmap_irq_chip = { 812e0f8ad2aSShengyu Qu .name = "axp15060", 813e0f8ad2aSShengyu Qu .status_base = AXP15060_IRQ1_STATE, 814e0f8ad2aSShengyu Qu .ack_base = AXP15060_IRQ1_STATE, 815e0f8ad2aSShengyu Qu .unmask_base = AXP15060_IRQ1_EN, 816e0f8ad2aSShengyu Qu .init_ack_masked = true, 817e0f8ad2aSShengyu Qu .irqs = axp15060_regmap_irqs, 818e0f8ad2aSShengyu Qu .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs), 819e0f8ad2aSShengyu Qu .num_regs = 2, 820e0f8ad2aSShengyu Qu }; 821e0f8ad2aSShengyu Qu 822*63eeabbcSAidan MacDonald static const struct mfd_cell axp192_cells[] = { 823*63eeabbcSAidan MacDonald { 824*63eeabbcSAidan MacDonald .name = "axp192-adc", 825*63eeabbcSAidan MacDonald .of_compatible = "x-powers,axp192-adc", 826*63eeabbcSAidan MacDonald }, { 827*63eeabbcSAidan MacDonald .name = "axp20x-battery-power-supply", 828*63eeabbcSAidan MacDonald .of_compatible = "x-powers,axp192-battery-power-supply", 829*63eeabbcSAidan MacDonald }, { 830*63eeabbcSAidan MacDonald .name = "axp20x-ac-power-supply", 831*63eeabbcSAidan MacDonald .of_compatible = "x-powers,axp202-ac-power-supply", 832*63eeabbcSAidan MacDonald .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources), 833*63eeabbcSAidan MacDonald .resources = axp192_ac_power_supply_resources, 834*63eeabbcSAidan MacDonald }, { 835*63eeabbcSAidan MacDonald .name = "axp20x-usb-power-supply", 836*63eeabbcSAidan MacDonald .of_compatible = "x-powers,axp192-usb-power-supply", 837*63eeabbcSAidan MacDonald .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources), 838*63eeabbcSAidan MacDonald .resources = axp192_usb_power_supply_resources, 839*63eeabbcSAidan MacDonald }, 840*63eeabbcSAidan MacDonald { .name = "axp20x-regulator" }, 841*63eeabbcSAidan MacDonald }; 842*63eeabbcSAidan MacDonald 843531a469eSChen-Yu Tsai static const struct mfd_cell axp20x_cells[] = { 844cfb61a41SCarlo Caione { 845b419c16bSMaxime Ripard .name = "axp20x-gpio", 846b419c16bSMaxime Ripard .of_compatible = "x-powers,axp209-gpio", 847b419c16bSMaxime Ripard }, { 848cfb61a41SCarlo Caione .name = "axp20x-pek", 849cfb61a41SCarlo Caione .num_resources = ARRAY_SIZE(axp20x_pek_resources), 850cfb61a41SCarlo Caione .resources = axp20x_pek_resources, 851cfb61a41SCarlo Caione }, { 852cfb61a41SCarlo Caione .name = "axp20x-regulator", 8538de4efdaSHans de Goede }, { 8544d5e5c34SQuentin Schulz .name = "axp20x-adc", 855034c3c95SQuentin Schulz .of_compatible = "x-powers,axp209-adc", 8564d5e5c34SQuentin Schulz }, { 857b4aeceb6SQuentin Schulz .name = "axp20x-battery-power-supply", 858b4aeceb6SQuentin Schulz .of_compatible = "x-powers,axp209-battery-power-supply", 859b4aeceb6SQuentin Schulz }, { 860cd7cf27bSMichael Haas .name = "axp20x-ac-power-supply", 861cd7cf27bSMichael Haas .of_compatible = "x-powers,axp202-ac-power-supply", 862cd7cf27bSMichael Haas .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 863cd7cf27bSMichael Haas .resources = axp20x_ac_power_supply_resources, 864cd7cf27bSMichael Haas }, { 8658de4efdaSHans de Goede .name = "axp20x-usb-power-supply", 8668de4efdaSHans de Goede .of_compatible = "x-powers,axp202-usb-power-supply", 8678de4efdaSHans de Goede .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources), 8688de4efdaSHans de Goede .resources = axp20x_usb_power_supply_resources, 869cfb61a41SCarlo Caione }, 870cfb61a41SCarlo Caione }; 871cfb61a41SCarlo Caione 872531a469eSChen-Yu Tsai static const struct mfd_cell axp221_cells[] = { 873f05be589SBoris BREZILLON { 874371a9fcaSSamuel Holland .name = "axp20x-gpio", 875371a9fcaSSamuel Holland .of_compatible = "x-powers,axp221-gpio", 876371a9fcaSSamuel Holland }, { 877f4463633SQuentin Schulz .name = "axp221-pek", 878f05be589SBoris BREZILLON .num_resources = ARRAY_SIZE(axp22x_pek_resources), 879f05be589SBoris BREZILLON .resources = axp22x_pek_resources, 8806d4fa89dSChen-Yu Tsai }, { 8816d4fa89dSChen-Yu Tsai .name = "axp20x-regulator", 882ecd98cceSHans de Goede }, { 883034c3c95SQuentin Schulz .name = "axp22x-adc", 884034c3c95SQuentin Schulz .of_compatible = "x-powers,axp221-adc", 8854d5e5c34SQuentin Schulz }, { 88695c4f531SQuentin Schulz .name = "axp20x-ac-power-supply", 88795c4f531SQuentin Schulz .of_compatible = "x-powers,axp221-ac-power-supply", 88895c4f531SQuentin Schulz .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 88995c4f531SQuentin Schulz .resources = axp20x_ac_power_supply_resources, 89095c4f531SQuentin Schulz }, { 891b4aeceb6SQuentin Schulz .name = "axp20x-battery-power-supply", 892b4aeceb6SQuentin Schulz .of_compatible = "x-powers,axp221-battery-power-supply", 893b4aeceb6SQuentin Schulz }, { 894ecd98cceSHans de Goede .name = "axp20x-usb-power-supply", 895ecd98cceSHans de Goede .of_compatible = "x-powers,axp221-usb-power-supply", 896ecd98cceSHans de Goede .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 897ecd98cceSHans de Goede .resources = axp22x_usb_power_supply_resources, 898f05be589SBoris BREZILLON }, 899f05be589SBoris BREZILLON }; 900f05be589SBoris BREZILLON 901531a469eSChen-Yu Tsai static const struct mfd_cell axp223_cells[] = { 9024c650561SQuentin Schulz { 903371a9fcaSSamuel Holland .name = "axp20x-gpio", 904371a9fcaSSamuel Holland .of_compatible = "x-powers,axp221-gpio", 905371a9fcaSSamuel Holland }, { 906f4463633SQuentin Schulz .name = "axp221-pek", 9074c650561SQuentin Schulz .num_resources = ARRAY_SIZE(axp22x_pek_resources), 9084c650561SQuentin Schulz .resources = axp22x_pek_resources, 9094c650561SQuentin Schulz }, { 9104d5e5c34SQuentin Schulz .name = "axp22x-adc", 911034c3c95SQuentin Schulz .of_compatible = "x-powers,axp221-adc", 9124d5e5c34SQuentin Schulz }, { 913b4aeceb6SQuentin Schulz .name = "axp20x-battery-power-supply", 914b4aeceb6SQuentin Schulz .of_compatible = "x-powers,axp221-battery-power-supply", 915b4aeceb6SQuentin Schulz }, { 9164c650561SQuentin Schulz .name = "axp20x-regulator", 9174c650561SQuentin Schulz }, { 91895c4f531SQuentin Schulz .name = "axp20x-ac-power-supply", 91995c4f531SQuentin Schulz .of_compatible = "x-powers,axp221-ac-power-supply", 92095c4f531SQuentin Schulz .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 92195c4f531SQuentin Schulz .resources = axp20x_ac_power_supply_resources, 92295c4f531SQuentin Schulz }, { 9234c650561SQuentin Schulz .name = "axp20x-usb-power-supply", 9244c650561SQuentin Schulz .of_compatible = "x-powers,axp223-usb-power-supply", 9254c650561SQuentin Schulz .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources), 9264c650561SQuentin Schulz .resources = axp22x_usb_power_supply_resources, 9274c650561SQuentin Schulz }, 9284c650561SQuentin Schulz }; 9294c650561SQuentin Schulz 930531a469eSChen-Yu Tsai static const struct mfd_cell axp152_cells[] = { 931d8d79f8fSMichal Suchanek { 932d8d79f8fSMichal Suchanek .name = "axp20x-pek", 933d8d79f8fSMichal Suchanek .num_resources = ARRAY_SIZE(axp152_pek_resources), 934d8d79f8fSMichal Suchanek .resources = axp152_pek_resources, 935d8d79f8fSMichal Suchanek }, 936d8d79f8fSMichal Suchanek }; 937d8d79f8fSMichal Suchanek 93875c8cb2fSMartin Botka static struct mfd_cell axp313a_cells[] = { 93975c8cb2fSMartin Botka MFD_CELL_NAME("axp20x-regulator"), 94075c8cb2fSMartin Botka MFD_CELL_RES("axp313a-pek", axp313a_pek_resources), 94175c8cb2fSMartin Botka }; 94275c8cb2fSMartin Botka 943531a469eSChen-Yu Tsai static const struct resource axp288_adc_resources[] = { 944e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"), 945af7e9069SJacob Pan }; 946af7e9069SJacob Pan 947531a469eSChen-Yu Tsai static const struct resource axp288_extcon_resources[] = { 948e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL), 949e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE), 950e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG), 951e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG), 952bdb01f78SRamakrishna Pallala }; 953bdb01f78SRamakrishna Pallala 954531a469eSChen-Yu Tsai static const struct resource axp288_charger_resources[] = { 955e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_OV), 956e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_DONE), 957e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_CHARGING), 958e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT), 959e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER), 960e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_QCBTU), 961e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_CBTU), 962e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_QCBTO), 963e26f87e5SChen-Yu Tsai DEFINE_RES_IRQ(AXP288_IRQ_CBTO), 964af7e9069SJacob Pan }; 965af7e9069SJacob Pan 96632679a7aSHans de Goede static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" }; 96732679a7aSHans de Goede 96832679a7aSHans de Goede static const struct property_entry axp288_fuel_gauge_properties[] = { 96932679a7aSHans de Goede PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers), 97032679a7aSHans de Goede { } 97132679a7aSHans de Goede }; 97232679a7aSHans de Goede 97332679a7aSHans de Goede static const struct software_node axp288_fuel_gauge_sw_node = { 97432679a7aSHans de Goede .name = "axp288_fuel_gauge", 97532679a7aSHans de Goede .properties = axp288_fuel_gauge_properties, 97632679a7aSHans de Goede }; 97732679a7aSHans de Goede 978531a469eSChen-Yu Tsai static const struct mfd_cell axp288_cells[] = { 979af7e9069SJacob Pan { 980af7e9069SJacob Pan .name = "axp288_adc", 981af7e9069SJacob Pan .num_resources = ARRAY_SIZE(axp288_adc_resources), 982af7e9069SJacob Pan .resources = axp288_adc_resources, 983753a8d08SChen-Yu Tsai }, { 984bdb01f78SRamakrishna Pallala .name = "axp288_extcon", 985bdb01f78SRamakrishna Pallala .num_resources = ARRAY_SIZE(axp288_extcon_resources), 986bdb01f78SRamakrishna Pallala .resources = axp288_extcon_resources, 987753a8d08SChen-Yu Tsai }, { 988af7e9069SJacob Pan .name = "axp288_charger", 989af7e9069SJacob Pan .num_resources = ARRAY_SIZE(axp288_charger_resources), 990af7e9069SJacob Pan .resources = axp288_charger_resources, 991753a8d08SChen-Yu Tsai }, { 992d6387874STodd Brandt .name = "axp288_fuel_gauge", 993d6387874STodd Brandt .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources), 994d6387874STodd Brandt .resources = axp288_fuel_gauge_resources, 99532679a7aSHans de Goede .swnode = &axp288_fuel_gauge_sw_node, 996753a8d08SChen-Yu Tsai }, { 997f4463633SQuentin Schulz .name = "axp221-pek", 998e56e5ad6SBorun Fu .num_resources = ARRAY_SIZE(axp288_power_button_resources), 999e56e5ad6SBorun Fu .resources = axp288_power_button_resources, 1000753a8d08SChen-Yu Tsai }, { 1001d8139f63SAaron Lu .name = "axp288_pmic_acpi", 1002d8139f63SAaron Lu }, 1003af7e9069SJacob Pan }; 1004af7e9069SJacob Pan 1005531a469eSChen-Yu Tsai static const struct mfd_cell axp803_cells[] = { 10061578353eSIcenowy Zheng { 1007f4463633SQuentin Schulz .name = "axp221-pek", 10081578353eSIcenowy Zheng .num_resources = ARRAY_SIZE(axp803_pek_resources), 10091578353eSIcenowy Zheng .resources = axp803_pek_resources, 1010ea90e7b4SOskari Lemmela }, { 1011ea90e7b4SOskari Lemmela .name = "axp20x-gpio", 1012ea90e7b4SOskari Lemmela .of_compatible = "x-powers,axp813-gpio", 1013ea90e7b4SOskari Lemmela }, { 1014ea90e7b4SOskari Lemmela .name = "axp813-adc", 1015ea90e7b4SOskari Lemmela .of_compatible = "x-powers,axp813-adc", 1016ea90e7b4SOskari Lemmela }, { 1017ea90e7b4SOskari Lemmela .name = "axp20x-battery-power-supply", 1018ea90e7b4SOskari Lemmela .of_compatible = "x-powers,axp813-battery-power-supply", 1019ea90e7b4SOskari Lemmela }, { 1020ea90e7b4SOskari Lemmela .name = "axp20x-ac-power-supply", 1021ea90e7b4SOskari Lemmela .of_compatible = "x-powers,axp813-ac-power-supply", 1022ea90e7b4SOskari Lemmela .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 1023ea90e7b4SOskari Lemmela .resources = axp20x_ac_power_supply_resources, 1024e7037d75SChen-Yu Tsai }, { 1025e7037d75SChen-Yu Tsai .name = "axp20x-usb-power-supply", 1026e7037d75SChen-Yu Tsai .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1027e7037d75SChen-Yu Tsai .resources = axp803_usb_power_supply_resources, 1028e7037d75SChen-Yu Tsai .of_compatible = "x-powers,axp813-usb-power-supply", 10299b79ff10SIcenowy Zheng }, 10309b79ff10SIcenowy Zheng { .name = "axp20x-regulator" }, 10311578353eSIcenowy Zheng }; 10321578353eSIcenowy Zheng 103306f49010SChen-Yu Tsai static const struct mfd_cell axp806_self_working_cells[] = { 103406f49010SChen-Yu Tsai { 103506f49010SChen-Yu Tsai .name = "axp221-pek", 103606f49010SChen-Yu Tsai .num_resources = ARRAY_SIZE(axp806_pek_resources), 103706f49010SChen-Yu Tsai .resources = axp806_pek_resources, 103806f49010SChen-Yu Tsai }, 103906f49010SChen-Yu Tsai { .name = "axp20x-regulator" }, 104006f49010SChen-Yu Tsai }; 104106f49010SChen-Yu Tsai 1042531a469eSChen-Yu Tsai static const struct mfd_cell axp806_cells[] = { 10438824ee85SChen-Yu Tsai { 10448824ee85SChen-Yu Tsai .id = 2, 10458824ee85SChen-Yu Tsai .name = "axp20x-regulator", 10468824ee85SChen-Yu Tsai }, 10478824ee85SChen-Yu Tsai }; 10488824ee85SChen-Yu Tsai 1049531a469eSChen-Yu Tsai static const struct mfd_cell axp809_cells[] = { 105020147f0dSChen-Yu Tsai { 1051371a9fcaSSamuel Holland .name = "axp20x-gpio", 1052371a9fcaSSamuel Holland .of_compatible = "x-powers,axp221-gpio", 1053371a9fcaSSamuel Holland }, { 1054f4463633SQuentin Schulz .name = "axp221-pek", 105520147f0dSChen-Yu Tsai .num_resources = ARRAY_SIZE(axp809_pek_resources), 105620147f0dSChen-Yu Tsai .resources = axp809_pek_resources, 105720147f0dSChen-Yu Tsai }, { 10588824ee85SChen-Yu Tsai .id = 1, 105920147f0dSChen-Yu Tsai .name = "axp20x-regulator", 106020147f0dSChen-Yu Tsai }, 106120147f0dSChen-Yu Tsai }; 106220147f0dSChen-Yu Tsai 1063531a469eSChen-Yu Tsai static const struct mfd_cell axp813_cells[] = { 10647303733aSChen-Yu Tsai { 1065f4463633SQuentin Schulz .name = "axp221-pek", 10667303733aSChen-Yu Tsai .num_resources = ARRAY_SIZE(axp803_pek_resources), 10677303733aSChen-Yu Tsai .resources = axp803_pek_resources, 10689a43206bSChen-Yu Tsai }, { 10699a43206bSChen-Yu Tsai .name = "axp20x-regulator", 10702bb3253cSQuentin Schulz }, { 10712bb3253cSQuentin Schulz .name = "axp20x-gpio", 10722bb3253cSQuentin Schulz .of_compatible = "x-powers,axp813-gpio", 1073e5d590faSQuentin Schulz }, { 1074e5d590faSQuentin Schulz .name = "axp813-adc", 1075e5d590faSQuentin Schulz .of_compatible = "x-powers,axp813-adc", 10766720328fSQuentin Schulz }, { 10776720328fSQuentin Schulz .name = "axp20x-battery-power-supply", 10786720328fSQuentin Schulz .of_compatible = "x-powers,axp813-battery-power-supply", 10794a19f9a6SOskari Lemmela }, { 10804a19f9a6SOskari Lemmela .name = "axp20x-ac-power-supply", 10814a19f9a6SOskari Lemmela .of_compatible = "x-powers,axp813-ac-power-supply", 10824a19f9a6SOskari Lemmela .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources), 10834a19f9a6SOskari Lemmela .resources = axp20x_ac_power_supply_resources, 1084129fc677SQuentin Schulz }, { 1085129fc677SQuentin Schulz .name = "axp20x-usb-power-supply", 1086129fc677SQuentin Schulz .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources), 1087129fc677SQuentin Schulz .resources = axp803_usb_power_supply_resources, 1088129fc677SQuentin Schulz .of_compatible = "x-powers,axp813-usb-power-supply", 1089e5d590faSQuentin Schulz }, 10907303733aSChen-Yu Tsai }; 10917303733aSChen-Yu Tsai 1092e0f8ad2aSShengyu Qu static const struct mfd_cell axp15060_cells[] = { 1093e0f8ad2aSShengyu Qu { 1094e0f8ad2aSShengyu Qu .name = "axp221-pek", 1095e0f8ad2aSShengyu Qu .num_resources = ARRAY_SIZE(axp15060_pek_resources), 1096e0f8ad2aSShengyu Qu .resources = axp15060_pek_resources, 1097e0f8ad2aSShengyu Qu }, { 1098e0f8ad2aSShengyu Qu .name = "axp20x-regulator", 1099e0f8ad2aSShengyu Qu }, 1100e0f8ad2aSShengyu Qu }; 1101e0f8ad2aSShengyu Qu 1102e0f8ad2aSShengyu Qu /* For boards that don't have IRQ line connected to SOC. */ 1103e0f8ad2aSShengyu Qu static const struct mfd_cell axp_regulator_only_cells[] = { 1104e0f8ad2aSShengyu Qu { 1105e0f8ad2aSShengyu Qu .name = "axp20x-regulator", 1106e0f8ad2aSShengyu Qu }, 1107e0f8ad2aSShengyu Qu }; 1108e0f8ad2aSShengyu Qu 11091b1305e9SSamuel Holland static int axp20x_power_off(struct sys_off_data *data) 1110cfb61a41SCarlo Caione { 11111b1305e9SSamuel Holland struct axp20x_dev *axp20x = data->cb_data; 111275c8cb2fSMartin Botka unsigned int shutdown_reg; 1113af7e9069SJacob Pan 111475c8cb2fSMartin Botka switch (axp20x->variant) { 111575c8cb2fSMartin Botka case AXP313A_ID: 111675c8cb2fSMartin Botka shutdown_reg = AXP313A_SHUTDOWN_CTRL; 111775c8cb2fSMartin Botka break; 111875c8cb2fSMartin Botka default: 111975c8cb2fSMartin Botka shutdown_reg = AXP20X_OFF_CTRL; 112075c8cb2fSMartin Botka break; 112175c8cb2fSMartin Botka } 112275c8cb2fSMartin Botka 112375c8cb2fSMartin Botka regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF); 1124179dc63dSHans de Goede 1125179dc63dSHans de Goede /* Give capacitors etc. time to drain to avoid kernel panic msg. */ 11263f37d4f6SSamuel Holland mdelay(500); 11271b1305e9SSamuel Holland 11281b1305e9SSamuel Holland return NOTIFY_DONE; 1129cfb61a41SCarlo Caione } 1130cfb61a41SCarlo Caione 11314fd41151SChen-Yu Tsai int axp20x_match_device(struct axp20x_dev *axp20x) 1132af7e9069SJacob Pan { 1133e47a3cf7SChen-Yu Tsai struct device *dev = axp20x->dev; 1134af7e9069SJacob Pan const struct acpi_device_id *acpi_id; 1135af7e9069SJacob Pan const struct of_device_id *of_id; 1136af7e9069SJacob Pan 1137af7e9069SJacob Pan if (dev->of_node) { 1138af7acc3dSChen-Yu Tsai of_id = of_match_device(dev->driver->of_match_table, dev); 1139af7e9069SJacob Pan if (!of_id) { 1140af7e9069SJacob Pan dev_err(dev, "Unable to match OF ID\n"); 1141af7e9069SJacob Pan return -ENODEV; 1142af7e9069SJacob Pan } 1143af7e9069SJacob Pan axp20x->variant = (long)of_id->data; 1144af7e9069SJacob Pan } else { 1145af7e9069SJacob Pan acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); 1146af7e9069SJacob Pan if (!acpi_id || !acpi_id->driver_data) { 1147af7e9069SJacob Pan dev_err(dev, "Unable to match ACPI ID and data\n"); 1148af7e9069SJacob Pan return -ENODEV; 1149af7e9069SJacob Pan } 1150af7e9069SJacob Pan axp20x->variant = (long)acpi_id->driver_data; 1151af7e9069SJacob Pan } 1152af7e9069SJacob Pan 1153af7e9069SJacob Pan switch (axp20x->variant) { 1154d8d79f8fSMichal Suchanek case AXP152_ID: 1155d8d79f8fSMichal Suchanek axp20x->nr_cells = ARRAY_SIZE(axp152_cells); 1156d8d79f8fSMichal Suchanek axp20x->cells = axp152_cells; 1157d8d79f8fSMichal Suchanek axp20x->regmap_cfg = &axp152_regmap_config; 1158d8d79f8fSMichal Suchanek axp20x->regmap_irq_chip = &axp152_regmap_irq_chip; 1159d8d79f8fSMichal Suchanek break; 1160*63eeabbcSAidan MacDonald case AXP192_ID: 1161*63eeabbcSAidan MacDonald axp20x->nr_cells = ARRAY_SIZE(axp192_cells); 1162*63eeabbcSAidan MacDonald axp20x->cells = axp192_cells; 1163*63eeabbcSAidan MacDonald axp20x->regmap_cfg = &axp192_regmap_config; 1164*63eeabbcSAidan MacDonald axp20x->regmap_irq_chip = &axp192_regmap_irq_chip; 1165*63eeabbcSAidan MacDonald break; 1166af7e9069SJacob Pan case AXP202_ID: 1167af7e9069SJacob Pan case AXP209_ID: 1168af7e9069SJacob Pan axp20x->nr_cells = ARRAY_SIZE(axp20x_cells); 1169af7e9069SJacob Pan axp20x->cells = axp20x_cells; 1170af7e9069SJacob Pan axp20x->regmap_cfg = &axp20x_regmap_config; 1171af7e9069SJacob Pan axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip; 1172af7e9069SJacob Pan break; 1173f05be589SBoris BREZILLON case AXP221_ID: 11744c650561SQuentin Schulz axp20x->nr_cells = ARRAY_SIZE(axp221_cells); 11754c650561SQuentin Schulz axp20x->cells = axp221_cells; 11764c650561SQuentin Schulz axp20x->regmap_cfg = &axp22x_regmap_config; 11774c650561SQuentin Schulz axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 11784c650561SQuentin Schulz break; 117902071f0fSChen-Yu Tsai case AXP223_ID: 11804c650561SQuentin Schulz axp20x->nr_cells = ARRAY_SIZE(axp223_cells); 11814c650561SQuentin Schulz axp20x->cells = axp223_cells; 1182f05be589SBoris BREZILLON axp20x->regmap_cfg = &axp22x_regmap_config; 1183f05be589SBoris BREZILLON axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip; 1184f05be589SBoris BREZILLON break; 1185af7e9069SJacob Pan case AXP288_ID: 1186af7e9069SJacob Pan axp20x->cells = axp288_cells; 1187af7e9069SJacob Pan axp20x->nr_cells = ARRAY_SIZE(axp288_cells); 1188af7e9069SJacob Pan axp20x->regmap_cfg = &axp288_regmap_config; 1189af7e9069SJacob Pan axp20x->regmap_irq_chip = &axp288_regmap_irq_chip; 11900a5454c9SHans de Goede axp20x->irq_flags = IRQF_TRIGGER_LOW; 1191af7e9069SJacob Pan break; 119275c8cb2fSMartin Botka case AXP313A_ID: 119375c8cb2fSMartin Botka axp20x->nr_cells = ARRAY_SIZE(axp313a_cells); 119475c8cb2fSMartin Botka axp20x->cells = axp313a_cells; 119575c8cb2fSMartin Botka axp20x->regmap_cfg = &axp313a_regmap_config; 119675c8cb2fSMartin Botka axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip; 119775c8cb2fSMartin Botka break; 11981578353eSIcenowy Zheng case AXP803_ID: 11991578353eSIcenowy Zheng axp20x->nr_cells = ARRAY_SIZE(axp803_cells); 12001578353eSIcenowy Zheng axp20x->cells = axp803_cells; 12011578353eSIcenowy Zheng axp20x->regmap_cfg = &axp288_regmap_config; 12021578353eSIcenowy Zheng axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 12031578353eSIcenowy Zheng break; 12048824ee85SChen-Yu Tsai case AXP806_ID: 12053efc465fSAndre Przywara /* 12063efc465fSAndre Przywara * Don't register the power key part if in slave mode or 12073efc465fSAndre Przywara * if there is no interrupt line. 12083efc465fSAndre Przywara */ 120906f49010SChen-Yu Tsai if (of_property_read_bool(axp20x->dev->of_node, 12103efc465fSAndre Przywara "x-powers,self-working-mode") && 12113efc465fSAndre Przywara axp20x->irq > 0) { 121206f49010SChen-Yu Tsai axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); 121306f49010SChen-Yu Tsai axp20x->cells = axp806_self_working_cells; 121406f49010SChen-Yu Tsai } else { 12158824ee85SChen-Yu Tsai axp20x->nr_cells = ARRAY_SIZE(axp806_cells); 12168824ee85SChen-Yu Tsai axp20x->cells = axp806_cells; 121706f49010SChen-Yu Tsai } 12188824ee85SChen-Yu Tsai axp20x->regmap_cfg = &axp806_regmap_config; 12198824ee85SChen-Yu Tsai axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; 12208824ee85SChen-Yu Tsai break; 122120147f0dSChen-Yu Tsai case AXP809_ID: 122220147f0dSChen-Yu Tsai axp20x->nr_cells = ARRAY_SIZE(axp809_cells); 122320147f0dSChen-Yu Tsai axp20x->cells = axp809_cells; 122420147f0dSChen-Yu Tsai axp20x->regmap_cfg = &axp22x_regmap_config; 122520147f0dSChen-Yu Tsai axp20x->regmap_irq_chip = &axp809_regmap_irq_chip; 122620147f0dSChen-Yu Tsai break; 12277303733aSChen-Yu Tsai case AXP813_ID: 12287303733aSChen-Yu Tsai axp20x->nr_cells = ARRAY_SIZE(axp813_cells); 12297303733aSChen-Yu Tsai axp20x->cells = axp813_cells; 12307303733aSChen-Yu Tsai axp20x->regmap_cfg = &axp288_regmap_config; 12317303733aSChen-Yu Tsai /* 12327303733aSChen-Yu Tsai * The IRQ table given in the datasheet is incorrect. 12337303733aSChen-Yu Tsai * In IRQ enable/status registers 1, there are separate 12347303733aSChen-Yu Tsai * IRQs for ACIN and VBUS, instead of bits [7:5] being 12357303733aSChen-Yu Tsai * the same as bits [4:2]. So it shares the same IRQs 12367303733aSChen-Yu Tsai * as the AXP803, rather than the AXP288. 12377303733aSChen-Yu Tsai */ 12387303733aSChen-Yu Tsai axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; 12397303733aSChen-Yu Tsai break; 1240e0f8ad2aSShengyu Qu case AXP15060_ID: 1241e0f8ad2aSShengyu Qu /* 1242e0f8ad2aSShengyu Qu * Don't register the power key part if there is no interrupt 1243e0f8ad2aSShengyu Qu * line. 1244e0f8ad2aSShengyu Qu * 1245e0f8ad2aSShengyu Qu * Since most use cases of AXP PMICs are Allwinner SOCs, board 1246e0f8ad2aSShengyu Qu * designers follow Allwinner's reference design and connects 1247e0f8ad2aSShengyu Qu * IRQ line to SOC, there's no need for those variants to deal 1248e0f8ad2aSShengyu Qu * with cases that IRQ isn't connected. However, AXP15660 is 1249e0f8ad2aSShengyu Qu * used by some other vendors' SOCs that didn't connect IRQ 1250e0f8ad2aSShengyu Qu * line, we need to deal with this case. 1251e0f8ad2aSShengyu Qu */ 1252e0f8ad2aSShengyu Qu if (axp20x->irq > 0) { 1253e0f8ad2aSShengyu Qu axp20x->nr_cells = ARRAY_SIZE(axp15060_cells); 1254e0f8ad2aSShengyu Qu axp20x->cells = axp15060_cells; 1255e0f8ad2aSShengyu Qu } else { 1256e0f8ad2aSShengyu Qu axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells); 1257e0f8ad2aSShengyu Qu axp20x->cells = axp_regulator_only_cells; 1258e0f8ad2aSShengyu Qu } 1259e0f8ad2aSShengyu Qu axp20x->regmap_cfg = &axp15060_regmap_config; 1260e0f8ad2aSShengyu Qu axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip; 1261e0f8ad2aSShengyu Qu break; 1262af7e9069SJacob Pan default: 1263af7e9069SJacob Pan dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant); 1264af7e9069SJacob Pan return -EINVAL; 1265af7e9069SJacob Pan } 1266af7e9069SJacob Pan dev_info(dev, "AXP20x variant %s found\n", 1267af7e9069SJacob Pan axp20x_model_names[axp20x->variant]); 1268af7e9069SJacob Pan 1269af7e9069SJacob Pan return 0; 1270af7e9069SJacob Pan } 12714fd41151SChen-Yu Tsai EXPORT_SYMBOL(axp20x_match_device); 1272af7e9069SJacob Pan 12734fd41151SChen-Yu Tsai int axp20x_device_probe(struct axp20x_dev *axp20x) 1274cfb61a41SCarlo Caione { 1275cfb61a41SCarlo Caione int ret; 1276cfb61a41SCarlo Caione 1277696f0b3fSChen-Yu Tsai /* 1278696f0b3fSChen-Yu Tsai * The AXP806 supports either master/standalone or slave mode. 1279696f0b3fSChen-Yu Tsai * Slave mode allows sharing the serial bus, even with multiple 1280696f0b3fSChen-Yu Tsai * AXP806 which all have the same hardware address. 1281696f0b3fSChen-Yu Tsai * 1282696f0b3fSChen-Yu Tsai * This is done with extra "serial interface address extension", 1283696f0b3fSChen-Yu Tsai * or AXP806_BUS_ADDR_EXT, and "register address extension", or 1284696f0b3fSChen-Yu Tsai * AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1285696f0b3fSChen-Yu Tsai * 1 bit customizable at the factory, and 1 bit depending on the 1286696f0b3fSChen-Yu Tsai * state of an external pin. The latter is writable. The device 1287696f0b3fSChen-Yu Tsai * will only respond to operations to its other registers when 1288696f0b3fSChen-Yu Tsai * the these device addressing bits (in the upper 4 bits of the 1289696f0b3fSChen-Yu Tsai * registers) match. 1290696f0b3fSChen-Yu Tsai * 1291c0369698SRask Ingemann Lambertsen * By default we support an AXP806 chained to an AXP809 in slave 1292c0369698SRask Ingemann Lambertsen * mode. Boards which use an AXP806 in master mode can set the 1293c0369698SRask Ingemann Lambertsen * property "x-powers,master-mode" to override the default. 1294696f0b3fSChen-Yu Tsai */ 1295c0369698SRask Ingemann Lambertsen if (axp20x->variant == AXP806_ID) { 1296c0369698SRask Ingemann Lambertsen if (of_property_read_bool(axp20x->dev->of_node, 129706f49010SChen-Yu Tsai "x-powers,master-mode") || 129806f49010SChen-Yu Tsai of_property_read_bool(axp20x->dev->of_node, 129906f49010SChen-Yu Tsai "x-powers,self-working-mode")) 1300c0369698SRask Ingemann Lambertsen regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1301c0369698SRask Ingemann Lambertsen AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); 1302c0369698SRask Ingemann Lambertsen else 1303696f0b3fSChen-Yu Tsai regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, 1304696f0b3fSChen-Yu Tsai AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); 1305c0369698SRask Ingemann Lambertsen } 1306696f0b3fSChen-Yu Tsai 13073efc465fSAndre Przywara /* Only if there is an interrupt line connected towards the CPU. */ 13083efc465fSAndre Przywara if (axp20x->irq > 0) { 13094fd41151SChen-Yu Tsai ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq, 13100a5454c9SHans de Goede IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags, 13113efc465fSAndre Przywara -1, axp20x->regmap_irq_chip, 13123efc465fSAndre Przywara &axp20x->regmap_irqc); 1313cfb61a41SCarlo Caione if (ret) { 13143efc465fSAndre Przywara dev_err(axp20x->dev, "failed to add irq chip: %d\n", 13153efc465fSAndre Przywara ret); 1316cfb61a41SCarlo Caione return ret; 1317cfb61a41SCarlo Caione } 13183efc465fSAndre Przywara } 1319cfb61a41SCarlo Caione 1320af7e9069SJacob Pan ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells, 1321af7e9069SJacob Pan axp20x->nr_cells, NULL, 0, NULL); 1322cfb61a41SCarlo Caione 1323cfb61a41SCarlo Caione if (ret) { 13244fd41151SChen-Yu Tsai dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret); 13254fd41151SChen-Yu Tsai regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1326cfb61a41SCarlo Caione return ret; 1327cfb61a41SCarlo Caione } 1328cfb61a41SCarlo Caione 13291b1305e9SSamuel Holland if (axp20x->variant != AXP288_ID) 13301b1305e9SSamuel Holland devm_register_sys_off_handler(axp20x->dev, 13311b1305e9SSamuel Holland SYS_OFF_MODE_POWER_OFF, 13321b1305e9SSamuel Holland SYS_OFF_PRIO_DEFAULT, 13331b1305e9SSamuel Holland axp20x_power_off, axp20x); 1334cfb61a41SCarlo Caione 13354fd41151SChen-Yu Tsai dev_info(axp20x->dev, "AXP20X driver loaded\n"); 1336cfb61a41SCarlo Caione 1337cfb61a41SCarlo Caione return 0; 1338cfb61a41SCarlo Caione } 13394fd41151SChen-Yu Tsai EXPORT_SYMBOL(axp20x_device_probe); 1340cfb61a41SCarlo Caione 13413c15e00eSUwe Kleine-König void axp20x_device_remove(struct axp20x_dev *axp20x) 1342cfb61a41SCarlo Caione { 1343cfb61a41SCarlo Caione mfd_remove_devices(axp20x->dev); 13444fd41151SChen-Yu Tsai regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc); 1345cfb61a41SCarlo Caione } 13464fd41151SChen-Yu Tsai EXPORT_SYMBOL(axp20x_device_remove); 1347cfb61a41SCarlo Caione 1348cfb61a41SCarlo Caione MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X"); 1349cfb61a41SCarlo Caione MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); 1350cfb61a41SCarlo Caione MODULE_LICENSE("GPL"); 1351