xref: /openbmc/linux/drivers/mfd/ab8500-core.c (revision ee66e653ca7425bc8ffca4e00f19a8057cd14e4d)
162579266SRabin Vincent /*
262579266SRabin Vincent  * Copyright (C) ST-Ericsson SA 2010
362579266SRabin Vincent  *
462579266SRabin Vincent  * License Terms: GNU General Public License v2
562579266SRabin Vincent  * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
662579266SRabin Vincent  * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7adceed62SMattias Wallin  * Author: Mattias Wallin <mattias.wallin@stericsson.com>
862579266SRabin Vincent  */
962579266SRabin Vincent 
1062579266SRabin Vincent #include <linux/kernel.h>
1162579266SRabin Vincent #include <linux/slab.h>
1262579266SRabin Vincent #include <linux/init.h>
1362579266SRabin Vincent #include <linux/irq.h>
1462579266SRabin Vincent #include <linux/delay.h>
1562579266SRabin Vincent #include <linux/interrupt.h>
1662579266SRabin Vincent #include <linux/module.h>
1762579266SRabin Vincent #include <linux/platform_device.h>
1862579266SRabin Vincent #include <linux/mfd/core.h>
1947c16975SMattias Wallin #include <linux/mfd/abx500.h>
20*ee66e653SLinus Walleij #include <linux/mfd/abx500/ab8500.h>
21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h>
2262579266SRabin Vincent 
2362579266SRabin Vincent /*
2462579266SRabin Vincent  * Interrupt register offsets
2562579266SRabin Vincent  * Bank : 0x0E
2662579266SRabin Vincent  */
2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG		0x00
2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG		0x01
2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG		0x02
3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG		0x03
3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG		0x04
3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG		0x05
3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG		0x06
3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG		0x07
3547c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG		0x12
3647c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG		0x13
3747c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG		0x14
3847c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG		0x15
3947c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG		0x16
4047c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG		0x17
4162579266SRabin Vincent 
4262579266SRabin Vincent /*
4362579266SRabin Vincent  * latch registers
4462579266SRabin Vincent  */
4547c16975SMattias Wallin #define AB8500_IT_LATCH1_REG		0x20
4647c16975SMattias Wallin #define AB8500_IT_LATCH2_REG		0x21
4747c16975SMattias Wallin #define AB8500_IT_LATCH3_REG		0x22
4847c16975SMattias Wallin #define AB8500_IT_LATCH4_REG		0x23
4947c16975SMattias Wallin #define AB8500_IT_LATCH5_REG		0x24
5047c16975SMattias Wallin #define AB8500_IT_LATCH6_REG		0x25
5147c16975SMattias Wallin #define AB8500_IT_LATCH7_REG		0x26
5247c16975SMattias Wallin #define AB8500_IT_LATCH8_REG		0x27
5347c16975SMattias Wallin #define AB8500_IT_LATCH9_REG		0x28
5447c16975SMattias Wallin #define AB8500_IT_LATCH10_REG		0x29
5592d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG		0x2B
5647c16975SMattias Wallin #define AB8500_IT_LATCH19_REG		0x32
5747c16975SMattias Wallin #define AB8500_IT_LATCH20_REG		0x33
5847c16975SMattias Wallin #define AB8500_IT_LATCH21_REG		0x34
5947c16975SMattias Wallin #define AB8500_IT_LATCH22_REG		0x35
6047c16975SMattias Wallin #define AB8500_IT_LATCH23_REG		0x36
6147c16975SMattias Wallin #define AB8500_IT_LATCH24_REG		0x37
6262579266SRabin Vincent 
6362579266SRabin Vincent /*
6462579266SRabin Vincent  * mask registers
6562579266SRabin Vincent  */
6662579266SRabin Vincent 
6747c16975SMattias Wallin #define AB8500_IT_MASK1_REG		0x40
6847c16975SMattias Wallin #define AB8500_IT_MASK2_REG		0x41
6947c16975SMattias Wallin #define AB8500_IT_MASK3_REG		0x42
7047c16975SMattias Wallin #define AB8500_IT_MASK4_REG		0x43
7147c16975SMattias Wallin #define AB8500_IT_MASK5_REG		0x44
7247c16975SMattias Wallin #define AB8500_IT_MASK6_REG		0x45
7347c16975SMattias Wallin #define AB8500_IT_MASK7_REG		0x46
7447c16975SMattias Wallin #define AB8500_IT_MASK8_REG		0x47
7547c16975SMattias Wallin #define AB8500_IT_MASK9_REG		0x48
7647c16975SMattias Wallin #define AB8500_IT_MASK10_REG		0x49
7747c16975SMattias Wallin #define AB8500_IT_MASK11_REG		0x4A
7847c16975SMattias Wallin #define AB8500_IT_MASK12_REG		0x4B
7947c16975SMattias Wallin #define AB8500_IT_MASK13_REG		0x4C
8047c16975SMattias Wallin #define AB8500_IT_MASK14_REG		0x4D
8147c16975SMattias Wallin #define AB8500_IT_MASK15_REG		0x4E
8247c16975SMattias Wallin #define AB8500_IT_MASK16_REG		0x4F
8347c16975SMattias Wallin #define AB8500_IT_MASK17_REG		0x50
8447c16975SMattias Wallin #define AB8500_IT_MASK18_REG		0x51
8547c16975SMattias Wallin #define AB8500_IT_MASK19_REG		0x52
8647c16975SMattias Wallin #define AB8500_IT_MASK20_REG		0x53
8747c16975SMattias Wallin #define AB8500_IT_MASK21_REG		0x54
8847c16975SMattias Wallin #define AB8500_IT_MASK22_REG		0x55
8947c16975SMattias Wallin #define AB8500_IT_MASK23_REG		0x56
9047c16975SMattias Wallin #define AB8500_IT_MASK24_REG		0x57
9162579266SRabin Vincent 
9247c16975SMattias Wallin #define AB8500_REV_REG			0x80
93e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS	0x00
9462579266SRabin Vincent 
95b4a31037SAndrew Lynn #define AB8500_TURN_ON_STATUS		0x00
96b4a31037SAndrew Lynn 
9762579266SRabin Vincent /*
9862579266SRabin Vincent  * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
9962579266SRabin Vincent  * numbers are indexed into this array with (num / 8).
10062579266SRabin Vincent  *
10162579266SRabin Vincent  * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
10262579266SRabin Vincent  * offset 0.
10362579266SRabin Vincent  */
10462579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
10592d50a41SMattias Wallin 	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
10662579266SRabin Vincent };
10762579266SRabin Vincent 
10847c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev)
10947c16975SMattias Wallin {
1106bce7bf1SMattias Wallin 	struct ab8500 *ab8500;
1116bce7bf1SMattias Wallin 
1126bce7bf1SMattias Wallin 	if (!dev)
1136bce7bf1SMattias Wallin 		return -EINVAL;
1146bce7bf1SMattias Wallin 	ab8500 = dev_get_drvdata(dev->parent);
1156bce7bf1SMattias Wallin 	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
11647c16975SMattias Wallin }
11747c16975SMattias Wallin 
11847c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
11947c16975SMattias Wallin 	u8 reg, u8 data)
12062579266SRabin Vincent {
12162579266SRabin Vincent 	int ret;
12247c16975SMattias Wallin 	/*
12347c16975SMattias Wallin 	 * Put the u8 bank and u8 register together into a an u16.
12447c16975SMattias Wallin 	 * The bank on higher 8 bits and register in lower 8 bits.
12547c16975SMattias Wallin 	 * */
12647c16975SMattias Wallin 	u16 addr = ((u16)bank) << 8 | reg;
12762579266SRabin Vincent 
12862579266SRabin Vincent 	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
12962579266SRabin Vincent 
13047c16975SMattias Wallin 	ret = mutex_lock_interruptible(&ab8500->lock);
13147c16975SMattias Wallin 	if (ret)
13247c16975SMattias Wallin 		return ret;
13347c16975SMattias Wallin 
13447c16975SMattias Wallin 	ret = ab8500->write(ab8500, addr, data);
13547c16975SMattias Wallin 	if (ret < 0)
13647c16975SMattias Wallin 		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
13747c16975SMattias Wallin 			addr, ret);
13847c16975SMattias Wallin 	mutex_unlock(&ab8500->lock);
13947c16975SMattias Wallin 
14047c16975SMattias Wallin 	return ret;
14147c16975SMattias Wallin }
14247c16975SMattias Wallin 
14347c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank,
14447c16975SMattias Wallin 	u8 reg, u8 value)
14547c16975SMattias Wallin {
14647c16975SMattias Wallin 	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
14747c16975SMattias Wallin 
14847c16975SMattias Wallin 	return set_register_interruptible(ab8500, bank, reg, value);
14947c16975SMattias Wallin }
15047c16975SMattias Wallin 
15147c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
15247c16975SMattias Wallin 	u8 reg, u8 *value)
15347c16975SMattias Wallin {
15447c16975SMattias Wallin 	int ret;
15547c16975SMattias Wallin 	/* put the u8 bank and u8 reg together into a an u16.
15647c16975SMattias Wallin 	 * bank on higher 8 bits and reg in lower */
15747c16975SMattias Wallin 	u16 addr = ((u16)bank) << 8 | reg;
15847c16975SMattias Wallin 
15947c16975SMattias Wallin 	ret = mutex_lock_interruptible(&ab8500->lock);
16047c16975SMattias Wallin 	if (ret)
16147c16975SMattias Wallin 		return ret;
16247c16975SMattias Wallin 
16347c16975SMattias Wallin 	ret = ab8500->read(ab8500, addr);
16447c16975SMattias Wallin 	if (ret < 0)
16547c16975SMattias Wallin 		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
16647c16975SMattias Wallin 			addr, ret);
16747c16975SMattias Wallin 	else
16847c16975SMattias Wallin 		*value = ret;
16947c16975SMattias Wallin 
17047c16975SMattias Wallin 	mutex_unlock(&ab8500->lock);
17147c16975SMattias Wallin 	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
17247c16975SMattias Wallin 
17347c16975SMattias Wallin 	return ret;
17447c16975SMattias Wallin }
17547c16975SMattias Wallin 
17647c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank,
17747c16975SMattias Wallin 	u8 reg, u8 *value)
17847c16975SMattias Wallin {
17947c16975SMattias Wallin 	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
18047c16975SMattias Wallin 
18147c16975SMattias Wallin 	return get_register_interruptible(ab8500, bank, reg, value);
18247c16975SMattias Wallin }
18347c16975SMattias Wallin 
18447c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
18547c16975SMattias Wallin 	u8 reg, u8 bitmask, u8 bitvalues)
18647c16975SMattias Wallin {
18747c16975SMattias Wallin 	int ret;
18847c16975SMattias Wallin 	u8 data;
18947c16975SMattias Wallin 	/* put the u8 bank and u8 reg together into a an u16.
19047c16975SMattias Wallin 	 * bank on higher 8 bits and reg in lower */
19147c16975SMattias Wallin 	u16 addr = ((u16)bank) << 8 | reg;
19247c16975SMattias Wallin 
19347c16975SMattias Wallin 	ret = mutex_lock_interruptible(&ab8500->lock);
19447c16975SMattias Wallin 	if (ret)
19547c16975SMattias Wallin 		return ret;
19647c16975SMattias Wallin 
19747c16975SMattias Wallin 	ret = ab8500->read(ab8500, addr);
19847c16975SMattias Wallin 	if (ret < 0) {
19947c16975SMattias Wallin 		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
20047c16975SMattias Wallin 			addr, ret);
20147c16975SMattias Wallin 		goto out;
20247c16975SMattias Wallin 	}
20347c16975SMattias Wallin 
20447c16975SMattias Wallin 	data = (u8)ret;
20547c16975SMattias Wallin 	data = (~bitmask & data) | (bitmask & bitvalues);
20647c16975SMattias Wallin 
20762579266SRabin Vincent 	ret = ab8500->write(ab8500, addr, data);
20862579266SRabin Vincent 	if (ret < 0)
20962579266SRabin Vincent 		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
21062579266SRabin Vincent 			addr, ret);
21162579266SRabin Vincent 
21247c16975SMattias Wallin 	dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
21362579266SRabin Vincent out:
21462579266SRabin Vincent 	mutex_unlock(&ab8500->lock);
21562579266SRabin Vincent 	return ret;
21662579266SRabin Vincent }
21747c16975SMattias Wallin 
21847c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev,
21947c16975SMattias Wallin 	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
22047c16975SMattias Wallin {
22147c16975SMattias Wallin 	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
22247c16975SMattias Wallin 
22347c16975SMattias Wallin 	return mask_and_set_register_interruptible(ab8500, bank, reg,
22447c16975SMattias Wallin 		bitmask, bitvalues);
22547c16975SMattias Wallin 
22647c16975SMattias Wallin }
22747c16975SMattias Wallin 
22847c16975SMattias Wallin static struct abx500_ops ab8500_ops = {
22947c16975SMattias Wallin 	.get_chip_id = ab8500_get_chip_id,
23047c16975SMattias Wallin 	.get_register = ab8500_get_register,
23147c16975SMattias Wallin 	.set_register = ab8500_set_register,
23247c16975SMattias Wallin 	.get_register_page = NULL,
23347c16975SMattias Wallin 	.set_register_page = NULL,
23447c16975SMattias Wallin 	.mask_and_set_register = ab8500_mask_and_set_register,
23547c16975SMattias Wallin 	.event_registers_startup_state_get = NULL,
23647c16975SMattias Wallin 	.startup_irq_enabled = NULL,
23747c16975SMattias Wallin };
23862579266SRabin Vincent 
2399505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data)
24062579266SRabin Vincent {
2419505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
24262579266SRabin Vincent 
24362579266SRabin Vincent 	mutex_lock(&ab8500->irq_lock);
24462579266SRabin Vincent }
24562579266SRabin Vincent 
2469505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data)
24762579266SRabin Vincent {
2489505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
24962579266SRabin Vincent 	int i;
25062579266SRabin Vincent 
25162579266SRabin Vincent 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
25262579266SRabin Vincent 		u8 old = ab8500->oldmask[i];
25362579266SRabin Vincent 		u8 new = ab8500->mask[i];
25462579266SRabin Vincent 		int reg;
25562579266SRabin Vincent 
25662579266SRabin Vincent 		if (new == old)
25762579266SRabin Vincent 			continue;
25862579266SRabin Vincent 
259863dde5bSLinus Walleij 		/* Interrupt register 12 doesn't exist prior to version 2.0 */
260863dde5bSLinus Walleij 		if (ab8500_irq_regoffset[i] == 11 &&
261863dde5bSLinus Walleij 			ab8500->chip_id < AB8500_CUT2P0)
26292d50a41SMattias Wallin 			continue;
26392d50a41SMattias Wallin 
26462579266SRabin Vincent 		ab8500->oldmask[i] = new;
26562579266SRabin Vincent 
26662579266SRabin Vincent 		reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
26747c16975SMattias Wallin 		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
26862579266SRabin Vincent 	}
26962579266SRabin Vincent 
27062579266SRabin Vincent 	mutex_unlock(&ab8500->irq_lock);
27162579266SRabin Vincent }
27262579266SRabin Vincent 
2739505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data)
27462579266SRabin Vincent {
2759505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
2769505a0a0SMark Brown 	int offset = data->irq - ab8500->irq_base;
27762579266SRabin Vincent 	int index = offset / 8;
27862579266SRabin Vincent 	int mask = 1 << (offset % 8);
27962579266SRabin Vincent 
28062579266SRabin Vincent 	ab8500->mask[index] |= mask;
28162579266SRabin Vincent }
28262579266SRabin Vincent 
2839505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data)
28462579266SRabin Vincent {
2859505a0a0SMark Brown 	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
2869505a0a0SMark Brown 	int offset = data->irq - ab8500->irq_base;
28762579266SRabin Vincent 	int index = offset / 8;
28862579266SRabin Vincent 	int mask = 1 << (offset % 8);
28962579266SRabin Vincent 
29062579266SRabin Vincent 	ab8500->mask[index] &= ~mask;
29162579266SRabin Vincent }
29262579266SRabin Vincent 
29362579266SRabin Vincent static struct irq_chip ab8500_irq_chip = {
29462579266SRabin Vincent 	.name			= "ab8500",
2959505a0a0SMark Brown 	.irq_bus_lock		= ab8500_irq_lock,
2969505a0a0SMark Brown 	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
2979505a0a0SMark Brown 	.irq_mask		= ab8500_irq_mask,
298e6f9306eSVirupax Sadashivpetimath 	.irq_disable		= ab8500_irq_mask,
2999505a0a0SMark Brown 	.irq_unmask		= ab8500_irq_unmask,
30062579266SRabin Vincent };
30162579266SRabin Vincent 
30262579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev)
30362579266SRabin Vincent {
30462579266SRabin Vincent 	struct ab8500 *ab8500 = dev;
30562579266SRabin Vincent 	int i;
30662579266SRabin Vincent 
30762579266SRabin Vincent 	dev_vdbg(ab8500->dev, "interrupt\n");
30862579266SRabin Vincent 
30962579266SRabin Vincent 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
31062579266SRabin Vincent 		int regoffset = ab8500_irq_regoffset[i];
31162579266SRabin Vincent 		int status;
31247c16975SMattias Wallin 		u8 value;
31362579266SRabin Vincent 
314863dde5bSLinus Walleij 		/* Interrupt register 12 doesn't exist prior to version 2.0 */
315863dde5bSLinus Walleij 		if (regoffset == 11 && ab8500->chip_id < AB8500_CUT2P0)
31692d50a41SMattias Wallin 			continue;
31792d50a41SMattias Wallin 
31847c16975SMattias Wallin 		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
31947c16975SMattias Wallin 			AB8500_IT_LATCH1_REG + regoffset, &value);
32047c16975SMattias Wallin 		if (status < 0 || value == 0)
32162579266SRabin Vincent 			continue;
32262579266SRabin Vincent 
32362579266SRabin Vincent 		do {
32488aec4f7SMattias Wallin 			int bit = __ffs(value);
32562579266SRabin Vincent 			int line = i * 8 + bit;
32662579266SRabin Vincent 
32762579266SRabin Vincent 			handle_nested_irq(ab8500->irq_base + line);
32847c16975SMattias Wallin 			value &= ~(1 << bit);
32947c16975SMattias Wallin 		} while (value);
33062579266SRabin Vincent 	}
33162579266SRabin Vincent 
33262579266SRabin Vincent 	return IRQ_HANDLED;
33362579266SRabin Vincent }
33462579266SRabin Vincent 
33562579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500)
33662579266SRabin Vincent {
33762579266SRabin Vincent 	int base = ab8500->irq_base;
33862579266SRabin Vincent 	int irq;
33962579266SRabin Vincent 
34062579266SRabin Vincent 	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
341d5bb1221SThomas Gleixner 		irq_set_chip_data(irq, ab8500);
342d5bb1221SThomas Gleixner 		irq_set_chip_and_handler(irq, &ab8500_irq_chip,
34362579266SRabin Vincent 					 handle_simple_irq);
344d5bb1221SThomas Gleixner 		irq_set_nested_thread(irq, 1);
34562579266SRabin Vincent #ifdef CONFIG_ARM
34662579266SRabin Vincent 		set_irq_flags(irq, IRQF_VALID);
34762579266SRabin Vincent #else
348d5bb1221SThomas Gleixner 		irq_set_noprobe(irq);
34962579266SRabin Vincent #endif
35062579266SRabin Vincent 	}
35162579266SRabin Vincent 
35262579266SRabin Vincent 	return 0;
35362579266SRabin Vincent }
35462579266SRabin Vincent 
35562579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500)
35662579266SRabin Vincent {
35762579266SRabin Vincent 	int base = ab8500->irq_base;
35862579266SRabin Vincent 	int irq;
35962579266SRabin Vincent 
36062579266SRabin Vincent 	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
36162579266SRabin Vincent #ifdef CONFIG_ARM
36262579266SRabin Vincent 		set_irq_flags(irq, 0);
36362579266SRabin Vincent #endif
364d5bb1221SThomas Gleixner 		irq_set_chip_and_handler(irq, NULL, NULL);
365d5bb1221SThomas Gleixner 		irq_set_chip_data(irq, NULL);
36662579266SRabin Vincent 	}
36762579266SRabin Vincent }
36862579266SRabin Vincent 
3695cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = {
3700cb3fcd7SBibek Basu 	{
3710cb3fcd7SBibek Basu 		.name	= "GPIO_INT6",
3720cb3fcd7SBibek Basu 		.start	= AB8500_INT_GPIO6R,
3730cb3fcd7SBibek Basu 		.end	= AB8500_INT_GPIO41F,
3740cb3fcd7SBibek Basu 		.flags	= IORESOURCE_IRQ,
3750cb3fcd7SBibek Basu 	}
3760cb3fcd7SBibek Basu };
3770cb3fcd7SBibek Basu 
3785cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = {
37962579266SRabin Vincent 	{
38062579266SRabin Vincent 		.name	= "HW_CONV_END",
38162579266SRabin Vincent 		.start	= AB8500_INT_GP_HW_ADC_CONV_END,
38262579266SRabin Vincent 		.end	= AB8500_INT_GP_HW_ADC_CONV_END,
38362579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
38462579266SRabin Vincent 	},
38562579266SRabin Vincent 	{
38662579266SRabin Vincent 		.name	= "SW_CONV_END",
38762579266SRabin Vincent 		.start	= AB8500_INT_GP_SW_ADC_CONV_END,
38862579266SRabin Vincent 		.end	= AB8500_INT_GP_SW_ADC_CONV_END,
38962579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
39062579266SRabin Vincent 	},
39162579266SRabin Vincent };
39262579266SRabin Vincent 
3935cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = {
39462579266SRabin Vincent 	{
39562579266SRabin Vincent 		.name	= "60S",
39662579266SRabin Vincent 		.start	= AB8500_INT_RTC_60S,
39762579266SRabin Vincent 		.end	= AB8500_INT_RTC_60S,
39862579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
39962579266SRabin Vincent 	},
40062579266SRabin Vincent 	{
40162579266SRabin Vincent 		.name	= "ALARM",
40262579266SRabin Vincent 		.start	= AB8500_INT_RTC_ALARM,
40362579266SRabin Vincent 		.end	= AB8500_INT_RTC_ALARM,
40462579266SRabin Vincent 		.flags	= IORESOURCE_IRQ,
40562579266SRabin Vincent 	},
40662579266SRabin Vincent };
40762579266SRabin Vincent 
4085cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
40977686517SSundar R Iyer 	{
41077686517SSundar R Iyer 		.name	= "ONKEY_DBF",
41177686517SSundar R Iyer 		.start	= AB8500_INT_PON_KEY1DB_F,
41277686517SSundar R Iyer 		.end	= AB8500_INT_PON_KEY1DB_F,
41377686517SSundar R Iyer 		.flags	= IORESOURCE_IRQ,
41477686517SSundar R Iyer 	},
41577686517SSundar R Iyer 	{
41677686517SSundar R Iyer 		.name	= "ONKEY_DBR",
41777686517SSundar R Iyer 		.start	= AB8500_INT_PON_KEY1DB_R,
41877686517SSundar R Iyer 		.end	= AB8500_INT_PON_KEY1DB_R,
41977686517SSundar R Iyer 		.flags	= IORESOURCE_IRQ,
42077686517SSundar R Iyer 	},
42177686517SSundar R Iyer };
42277686517SSundar R Iyer 
4236af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
424e098adedSMattias Wallin 	{
4256af75ecdSLinus Walleij 	       .name = "ACC_DETECT_1DB_F",
4266af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_1DB_F,
4276af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_1DB_F,
428e098adedSMattias Wallin 	       .flags = IORESOURCE_IRQ,
429e098adedSMattias Wallin 	},
430e098adedSMattias Wallin 	{
4316af75ecdSLinus Walleij 	       .name = "ACC_DETECT_1DB_R",
4326af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_1DB_R,
4336af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_1DB_R,
434e098adedSMattias Wallin 	       .flags = IORESOURCE_IRQ,
435e098adedSMattias Wallin 	},
436e098adedSMattias Wallin 	{
4376af75ecdSLinus Walleij 	       .name = "ACC_DETECT_21DB_F",
4386af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_21DB_F,
4396af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_21DB_F,
4406af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4416af75ecdSLinus Walleij 	},
4426af75ecdSLinus Walleij 	{
4436af75ecdSLinus Walleij 	       .name = "ACC_DETECT_21DB_R",
4446af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_21DB_R,
4456af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_21DB_R,
4466af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4476af75ecdSLinus Walleij 	},
4486af75ecdSLinus Walleij 	{
4496af75ecdSLinus Walleij 	       .name = "ACC_DETECT_22DB_F",
4506af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_22DB_F,
4516af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_22DB_F,
4526af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4536af75ecdSLinus Walleij 	},
4546af75ecdSLinus Walleij 	{
4556af75ecdSLinus Walleij 	       .name = "ACC_DETECT_22DB_R",
4566af75ecdSLinus Walleij 	       .start = AB8500_INT_ACC_DETECT_22DB_R,
4576af75ecdSLinus Walleij 	       .end = AB8500_INT_ACC_DETECT_22DB_R,
4586af75ecdSLinus Walleij 	       .flags = IORESOURCE_IRQ,
4596af75ecdSLinus Walleij 	},
4606af75ecdSLinus Walleij };
4616af75ecdSLinus Walleij 
4626af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = {
4636af75ecdSLinus Walleij 	{
464e098adedSMattias Wallin 		.name = "MAIN_CH_UNPLUG_DET",
465e098adedSMattias Wallin 		.start = AB8500_INT_MAIN_CH_UNPLUG_DET,
466e098adedSMattias Wallin 		.end = AB8500_INT_MAIN_CH_UNPLUG_DET,
467e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
468e098adedSMattias Wallin 	},
469e098adedSMattias Wallin 	{
470e098adedSMattias Wallin 		.name = "MAIN_CHARGE_PLUG_DET",
471e098adedSMattias Wallin 		.start = AB8500_INT_MAIN_CH_PLUG_DET,
472e098adedSMattias Wallin 		.end = AB8500_INT_MAIN_CH_PLUG_DET,
473e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
474e098adedSMattias Wallin 	},
475e098adedSMattias Wallin 	{
476e098adedSMattias Wallin 		.name = "VBUS_DET_R",
477e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_DET_R,
478e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_DET_R,
479e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
480e098adedSMattias Wallin 	},
481e098adedSMattias Wallin 	{
4826af75ecdSLinus Walleij 		.name = "VBUS_DET_F",
4836af75ecdSLinus Walleij 		.start = AB8500_INT_VBUS_DET_F,
4846af75ecdSLinus Walleij 		.end = AB8500_INT_VBUS_DET_F,
485e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
486e098adedSMattias Wallin 	},
487e098adedSMattias Wallin 	{
4886af75ecdSLinus Walleij 		.name = "USB_LINK_STATUS",
4896af75ecdSLinus Walleij 		.start = AB8500_INT_USB_LINK_STATUS,
4906af75ecdSLinus Walleij 		.end = AB8500_INT_USB_LINK_STATUS,
4916af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
4926af75ecdSLinus Walleij 	},
4936af75ecdSLinus Walleij 	{
4946af75ecdSLinus Walleij 		.name = "USB_CHARGE_DET_DONE",
4956af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CHG_DET_DONE,
4966af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CHG_DET_DONE,
497e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
498e098adedSMattias Wallin 	},
499e098adedSMattias Wallin 	{
500e098adedSMattias Wallin 		.name = "VBUS_OVV",
501e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_OVV,
502e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_OVV,
503e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
504e098adedSMattias Wallin 	},
505e098adedSMattias Wallin 	{
5066af75ecdSLinus Walleij 		.name = "USB_CH_TH_PROT_R",
5076af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CH_TH_PROT_R,
5086af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CH_TH_PROT_R,
509e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
510e098adedSMattias Wallin 	},
511e098adedSMattias Wallin 	{
5126af75ecdSLinus Walleij 		.name = "USB_CH_TH_PROT_F",
5136af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CH_TH_PROT_F,
5146af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CH_TH_PROT_F,
515e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
516e098adedSMattias Wallin 	},
517e098adedSMattias Wallin 	{
5186af75ecdSLinus Walleij 		.name = "MAIN_EXT_CH_NOT_OK",
5196af75ecdSLinus Walleij 		.start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
5206af75ecdSLinus Walleij 		.end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
5216af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5226af75ecdSLinus Walleij 	},
5236af75ecdSLinus Walleij 	{
5246af75ecdSLinus Walleij 		.name = "MAIN_CH_TH_PROT_R",
5256af75ecdSLinus Walleij 		.start = AB8500_INT_MAIN_CH_TH_PROT_R,
5266af75ecdSLinus Walleij 		.end = AB8500_INT_MAIN_CH_TH_PROT_R,
5276af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5286af75ecdSLinus Walleij 	},
5296af75ecdSLinus Walleij 	{
5306af75ecdSLinus Walleij 		.name = "MAIN_CH_TH_PROT_F",
5316af75ecdSLinus Walleij 		.start = AB8500_INT_MAIN_CH_TH_PROT_F,
5326af75ecdSLinus Walleij 		.end = AB8500_INT_MAIN_CH_TH_PROT_F,
5336af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5346af75ecdSLinus Walleij 	},
5356af75ecdSLinus Walleij 	{
5366af75ecdSLinus Walleij 		.name = "USB_CHARGER_NOT_OKR",
5376af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CHARGER_NOT_OK,
5386af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CHARGER_NOT_OK,
5396af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5406af75ecdSLinus Walleij 	},
5416af75ecdSLinus Walleij 	{
5426af75ecdSLinus Walleij 		.name = "USB_CHARGER_NOT_OKF",
5436af75ecdSLinus Walleij 		.start = AB8500_INT_USB_CHARGER_NOT_OKF,
5446af75ecdSLinus Walleij 		.end = AB8500_INT_USB_CHARGER_NOT_OKF,
5456af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5466af75ecdSLinus Walleij 	},
5476af75ecdSLinus Walleij 	{
5486af75ecdSLinus Walleij 		.name = "CH_WD_EXP",
5496af75ecdSLinus Walleij 		.start = AB8500_INT_CH_WD_EXP,
5506af75ecdSLinus Walleij 		.end = AB8500_INT_CH_WD_EXP,
5516af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5526af75ecdSLinus Walleij 	},
5536af75ecdSLinus Walleij };
5546af75ecdSLinus Walleij 
5556af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = {
5566af75ecdSLinus Walleij 	{
5576af75ecdSLinus Walleij 		.name = "BAT_CTRL_INDB",
5586af75ecdSLinus Walleij 		.start = AB8500_INT_BAT_CTRL_INDB,
5596af75ecdSLinus Walleij 		.end = AB8500_INT_BAT_CTRL_INDB,
560e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
561e098adedSMattias Wallin 	},
562e098adedSMattias Wallin 	{
563e098adedSMattias Wallin 		.name = "BTEMP_LOW",
564e098adedSMattias Wallin 		.start = AB8500_INT_BTEMP_LOW,
565e098adedSMattias Wallin 		.end = AB8500_INT_BTEMP_LOW,
566e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
567e098adedSMattias Wallin 	},
568e098adedSMattias Wallin 	{
569e098adedSMattias Wallin 		.name = "BTEMP_HIGH",
570e098adedSMattias Wallin 		.start = AB8500_INT_BTEMP_HIGH,
571e098adedSMattias Wallin 		.end = AB8500_INT_BTEMP_HIGH,
572e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
573e098adedSMattias Wallin 	},
574e098adedSMattias Wallin 	{
5756af75ecdSLinus Walleij 		.name = "BTEMP_LOW_MEDIUM",
5766af75ecdSLinus Walleij 		.start = AB8500_INT_BTEMP_LOW_MEDIUM,
5776af75ecdSLinus Walleij 		.end = AB8500_INT_BTEMP_LOW_MEDIUM,
578e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
579e098adedSMattias Wallin 	},
580e098adedSMattias Wallin 	{
5816af75ecdSLinus Walleij 		.name = "BTEMP_MEDIUM_HIGH",
5826af75ecdSLinus Walleij 		.start = AB8500_INT_BTEMP_MEDIUM_HIGH,
5836af75ecdSLinus Walleij 		.end = AB8500_INT_BTEMP_MEDIUM_HIGH,
584e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
585e098adedSMattias Wallin 	},
586e098adedSMattias Wallin };
587e098adedSMattias Wallin 
5886af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = {
5896af75ecdSLinus Walleij 	{
5906af75ecdSLinus Walleij 		.name = "NCONV_ACCU",
5916af75ecdSLinus Walleij 		.start = AB8500_INT_CCN_CONV_ACC,
5926af75ecdSLinus Walleij 		.end = AB8500_INT_CCN_CONV_ACC,
5936af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
5946af75ecdSLinus Walleij 	},
5956af75ecdSLinus Walleij 	{
5966af75ecdSLinus Walleij 		.name = "BATT_OVV",
5976af75ecdSLinus Walleij 		.start = AB8500_INT_BATT_OVV,
5986af75ecdSLinus Walleij 		.end = AB8500_INT_BATT_OVV,
5996af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6006af75ecdSLinus Walleij 	},
6016af75ecdSLinus Walleij 	{
6026af75ecdSLinus Walleij 		.name = "LOW_BAT_F",
6036af75ecdSLinus Walleij 		.start = AB8500_INT_LOW_BAT_F,
6046af75ecdSLinus Walleij 		.end = AB8500_INT_LOW_BAT_F,
6056af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6066af75ecdSLinus Walleij 	},
6076af75ecdSLinus Walleij 	{
6086af75ecdSLinus Walleij 		.name = "LOW_BAT_R",
6096af75ecdSLinus Walleij 		.start = AB8500_INT_LOW_BAT_R,
6106af75ecdSLinus Walleij 		.end = AB8500_INT_LOW_BAT_R,
6116af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6126af75ecdSLinus Walleij 	},
6136af75ecdSLinus Walleij 	{
6146af75ecdSLinus Walleij 		.name = "CC_INT_CALIB",
6156af75ecdSLinus Walleij 		.start = AB8500_INT_CC_INT_CALIB,
6166af75ecdSLinus Walleij 		.end = AB8500_INT_CC_INT_CALIB,
6176af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6186af75ecdSLinus Walleij 	},
6196af75ecdSLinus Walleij };
6206af75ecdSLinus Walleij 
6216af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {};
6226af75ecdSLinus Walleij 
623df720647SAxel Lin #ifdef CONFIG_DEBUG_FS
6245cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = {
625e098adedSMattias Wallin 	{
626e098adedSMattias Wallin 		.name	= "IRQ_FIRST",
627e098adedSMattias Wallin 		.start	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
628e098adedSMattias Wallin 		.end	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
629e098adedSMattias Wallin 		.flags	= IORESOURCE_IRQ,
630e098adedSMattias Wallin 	},
631e098adedSMattias Wallin 	{
632e098adedSMattias Wallin 		.name	= "IRQ_LAST",
633e098adedSMattias Wallin 		.start	= AB8500_INT_USB_CHARGER_NOT_OKF,
634e098adedSMattias Wallin 		.end	= AB8500_INT_USB_CHARGER_NOT_OKF,
635e098adedSMattias Wallin 		.flags	= IORESOURCE_IRQ,
636e098adedSMattias Wallin 	},
637e098adedSMattias Wallin };
638df720647SAxel Lin #endif
639e098adedSMattias Wallin 
6405cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = {
641e098adedSMattias Wallin 	{
642e098adedSMattias Wallin 		.name = "ID_WAKEUP_R",
643e098adedSMattias Wallin 		.start = AB8500_INT_ID_WAKEUP_R,
644e098adedSMattias Wallin 		.end = AB8500_INT_ID_WAKEUP_R,
645e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
646e098adedSMattias Wallin 	},
647e098adedSMattias Wallin 	{
648e098adedSMattias Wallin 		.name = "ID_WAKEUP_F",
649e098adedSMattias Wallin 		.start = AB8500_INT_ID_WAKEUP_F,
650e098adedSMattias Wallin 		.end = AB8500_INT_ID_WAKEUP_F,
651e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
652e098adedSMattias Wallin 	},
653e098adedSMattias Wallin 	{
654e098adedSMattias Wallin 		.name = "VBUS_DET_F",
655e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_DET_F,
656e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_DET_F,
657e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
658e098adedSMattias Wallin 	},
659e098adedSMattias Wallin 	{
660e098adedSMattias Wallin 		.name = "VBUS_DET_R",
661e098adedSMattias Wallin 		.start = AB8500_INT_VBUS_DET_R,
662e098adedSMattias Wallin 		.end = AB8500_INT_VBUS_DET_R,
663e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
664e098adedSMattias Wallin 	},
66592d50a41SMattias Wallin 	{
66692d50a41SMattias Wallin 		.name = "USB_LINK_STATUS",
66792d50a41SMattias Wallin 		.start = AB8500_INT_USB_LINK_STATUS,
66892d50a41SMattias Wallin 		.end = AB8500_INT_USB_LINK_STATUS,
66992d50a41SMattias Wallin 		.flags = IORESOURCE_IRQ,
67092d50a41SMattias Wallin 	},
6716af75ecdSLinus Walleij 	{
6726af75ecdSLinus Walleij 		.name = "USB_ADP_PROBE_PLUG",
6736af75ecdSLinus Walleij 		.start = AB8500_INT_ADP_PROBE_PLUG,
6746af75ecdSLinus Walleij 		.end = AB8500_INT_ADP_PROBE_PLUG,
6756af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6766af75ecdSLinus Walleij 	},
6776af75ecdSLinus Walleij 	{
6786af75ecdSLinus Walleij 		.name = "USB_ADP_PROBE_UNPLUG",
6796af75ecdSLinus Walleij 		.start = AB8500_INT_ADP_PROBE_UNPLUG,
6806af75ecdSLinus Walleij 		.end = AB8500_INT_ADP_PROBE_UNPLUG,
6816af75ecdSLinus Walleij 		.flags = IORESOURCE_IRQ,
6826af75ecdSLinus Walleij 	},
683e098adedSMattias Wallin };
684e098adedSMattias Wallin 
6855cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = {
686e098adedSMattias Wallin 	{
687e098adedSMattias Wallin 		.name  = "AB8500_TEMP_WARM",
688e098adedSMattias Wallin 		.start = AB8500_INT_TEMP_WARM,
689e098adedSMattias Wallin 		.end   = AB8500_INT_TEMP_WARM,
690e098adedSMattias Wallin 		.flags = IORESOURCE_IRQ,
691e098adedSMattias Wallin 	},
692e098adedSMattias Wallin };
693e098adedSMattias Wallin 
6945cef8df5SRobert Rosengren static struct mfd_cell __devinitdata ab8500_devs[] = {
6955814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS
6965814fc35SMattias Wallin 	{
6975814fc35SMattias Wallin 		.name = "ab8500-debug",
698e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_debug_resources),
699e098adedSMattias Wallin 		.resources = ab8500_debug_resources,
7005814fc35SMattias Wallin 	},
7015814fc35SMattias Wallin #endif
70262579266SRabin Vincent 	{
703e098adedSMattias Wallin 		.name = "ab8500-sysctrl",
704e098adedSMattias Wallin 	},
705e098adedSMattias Wallin 	{
706e098adedSMattias Wallin 		.name = "ab8500-regulator",
707e098adedSMattias Wallin 	},
708e098adedSMattias Wallin 	{
7090cb3fcd7SBibek Basu 		.name = "ab8500-gpio",
7100cb3fcd7SBibek Basu 		.num_resources = ARRAY_SIZE(ab8500_gpio_resources),
7110cb3fcd7SBibek Basu 		.resources = ab8500_gpio_resources,
7120cb3fcd7SBibek Basu 	},
7130cb3fcd7SBibek Basu 	{
71462579266SRabin Vincent 		.name = "ab8500-gpadc",
71562579266SRabin Vincent 		.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
71662579266SRabin Vincent 		.resources = ab8500_gpadc_resources,
71762579266SRabin Vincent 	},
71862579266SRabin Vincent 	{
71962579266SRabin Vincent 		.name = "ab8500-rtc",
72062579266SRabin Vincent 		.num_resources = ARRAY_SIZE(ab8500_rtc_resources),
72162579266SRabin Vincent 		.resources = ab8500_rtc_resources,
72262579266SRabin Vincent 	},
723f0f05b1cSArun Murthy 	{
7246af75ecdSLinus Walleij 		.name = "ab8500-charger",
7256af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_charger_resources),
7266af75ecdSLinus Walleij 		.resources = ab8500_charger_resources,
727e098adedSMattias Wallin 	},
7286af75ecdSLinus Walleij 	{
7296af75ecdSLinus Walleij 		.name = "ab8500-btemp",
7306af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_btemp_resources),
7316af75ecdSLinus Walleij 		.resources = ab8500_btemp_resources,
7326af75ecdSLinus Walleij 	},
7336af75ecdSLinus Walleij 	{
7346af75ecdSLinus Walleij 		.name = "ab8500-fg",
7356af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_fg_resources),
7366af75ecdSLinus Walleij 		.resources = ab8500_fg_resources,
7376af75ecdSLinus Walleij 	},
7386af75ecdSLinus Walleij 	{
7396af75ecdSLinus Walleij 		.name = "ab8500-chargalg",
7406af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
7416af75ecdSLinus Walleij 		.resources = ab8500_chargalg_resources,
7426af75ecdSLinus Walleij 	},
7436af75ecdSLinus Walleij 	{
7446af75ecdSLinus Walleij 		.name = "ab8500-acc-det",
7456af75ecdSLinus Walleij 		.num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
7466af75ecdSLinus Walleij 		.resources = ab8500_av_acc_detect_resources,
7476af75ecdSLinus Walleij 	},
7486af75ecdSLinus Walleij 	{
7496af75ecdSLinus Walleij 		.name = "ab8500-codec",
7506af75ecdSLinus Walleij 	},
751e098adedSMattias Wallin 	{
752e098adedSMattias Wallin 		.name = "ab8500-usb",
753e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_usb_resources),
754e098adedSMattias Wallin 		.resources = ab8500_usb_resources,
755e098adedSMattias Wallin 	},
756e098adedSMattias Wallin 	{
757e098adedSMattias Wallin 		.name = "ab8500-poweron-key",
758e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
759e098adedSMattias Wallin 		.resources = ab8500_poweronkey_db_resources,
760e098adedSMattias Wallin 	},
761e098adedSMattias Wallin 	{
762f0f05b1cSArun Murthy 		.name = "ab8500-pwm",
763f0f05b1cSArun Murthy 		.id = 1,
764f0f05b1cSArun Murthy 	},
765f0f05b1cSArun Murthy 	{
766f0f05b1cSArun Murthy 		.name = "ab8500-pwm",
767f0f05b1cSArun Murthy 		.id = 2,
768f0f05b1cSArun Murthy 	},
769f0f05b1cSArun Murthy 	{
770f0f05b1cSArun Murthy 		.name = "ab8500-pwm",
771f0f05b1cSArun Murthy 		.id = 3,
772f0f05b1cSArun Murthy 	},
773e098adedSMattias Wallin 	{ .name = "ab8500-leds", },
77477686517SSundar R Iyer 	{
775e098adedSMattias Wallin 		.name = "ab8500-denc",
776e098adedSMattias Wallin 	},
777e098adedSMattias Wallin 	{
778e098adedSMattias Wallin 		.name = "ab8500-temp",
779e098adedSMattias Wallin 		.num_resources = ARRAY_SIZE(ab8500_temp_resources),
780e098adedSMattias Wallin 		.resources = ab8500_temp_resources,
78177686517SSundar R Iyer 	},
78262579266SRabin Vincent };
78362579266SRabin Vincent 
784cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev,
785cca69b67SMattias Wallin 				struct device_attribute *attr, char *buf)
786cca69b67SMattias Wallin {
787cca69b67SMattias Wallin 	struct ab8500 *ab8500;
788cca69b67SMattias Wallin 
789cca69b67SMattias Wallin 	ab8500 = dev_get_drvdata(dev);
790cca69b67SMattias Wallin 	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
791cca69b67SMattias Wallin }
792cca69b67SMattias Wallin 
793e5c238c3SMattias Wallin /*
794e5c238c3SMattias Wallin  * ab8500 has switched off due to (SWITCH_OFF_STATUS):
795e5c238c3SMattias Wallin  * 0x01 Swoff bit programming
796e5c238c3SMattias Wallin  * 0x02 Thermal protection activation
797e5c238c3SMattias Wallin  * 0x04 Vbat lower then BattOk falling threshold
798e5c238c3SMattias Wallin  * 0x08 Watchdog expired
799e5c238c3SMattias Wallin  * 0x10 Non presence of 32kHz clock
800e5c238c3SMattias Wallin  * 0x20 Battery level lower than power on reset threshold
801e5c238c3SMattias Wallin  * 0x40 Power on key 1 pressed longer than 10 seconds
802e5c238c3SMattias Wallin  * 0x80 DB8500 thermal shutdown
803e5c238c3SMattias Wallin  */
804e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev,
805e5c238c3SMattias Wallin 				struct device_attribute *attr, char *buf)
806e5c238c3SMattias Wallin {
807e5c238c3SMattias Wallin 	int ret;
808e5c238c3SMattias Wallin 	u8 value;
809e5c238c3SMattias Wallin 	struct ab8500 *ab8500;
810e5c238c3SMattias Wallin 
811e5c238c3SMattias Wallin 	ab8500 = dev_get_drvdata(dev);
812e5c238c3SMattias Wallin 	ret = get_register_interruptible(ab8500, AB8500_RTC,
813e5c238c3SMattias Wallin 		AB8500_SWITCH_OFF_STATUS, &value);
814e5c238c3SMattias Wallin 	if (ret < 0)
815e5c238c3SMattias Wallin 		return ret;
816e5c238c3SMattias Wallin 	return sprintf(buf, "%#x\n", value);
817e5c238c3SMattias Wallin }
818e5c238c3SMattias Wallin 
819b4a31037SAndrew Lynn /*
820b4a31037SAndrew Lynn  * ab8500 has turned on due to (TURN_ON_STATUS):
821b4a31037SAndrew Lynn  * 0x01 PORnVbat
822b4a31037SAndrew Lynn  * 0x02 PonKey1dbF
823b4a31037SAndrew Lynn  * 0x04 PonKey2dbF
824b4a31037SAndrew Lynn  * 0x08 RTCAlarm
825b4a31037SAndrew Lynn  * 0x10 MainChDet
826b4a31037SAndrew Lynn  * 0x20 VbusDet
827b4a31037SAndrew Lynn  * 0x40 UsbIDDetect
828b4a31037SAndrew Lynn  * 0x80 Reserved
829b4a31037SAndrew Lynn  */
830b4a31037SAndrew Lynn static ssize_t show_turn_on_status(struct device *dev,
831b4a31037SAndrew Lynn 				struct device_attribute *attr, char *buf)
832b4a31037SAndrew Lynn {
833b4a31037SAndrew Lynn 	int ret;
834b4a31037SAndrew Lynn 	u8 value;
835b4a31037SAndrew Lynn 	struct ab8500 *ab8500;
836b4a31037SAndrew Lynn 
837b4a31037SAndrew Lynn 	ab8500 = dev_get_drvdata(dev);
838b4a31037SAndrew Lynn 	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
839b4a31037SAndrew Lynn 		AB8500_TURN_ON_STATUS, &value);
840b4a31037SAndrew Lynn 	if (ret < 0)
841b4a31037SAndrew Lynn 		return ret;
842b4a31037SAndrew Lynn 	return sprintf(buf, "%#x\n", value);
843b4a31037SAndrew Lynn }
844b4a31037SAndrew Lynn 
845cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
846e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
847b4a31037SAndrew Lynn static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
848cca69b67SMattias Wallin 
849cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = {
850cca69b67SMattias Wallin 	&dev_attr_chip_id.attr,
851e5c238c3SMattias Wallin 	&dev_attr_switch_off_status.attr,
852b4a31037SAndrew Lynn 	&dev_attr_turn_on_status.attr,
853cca69b67SMattias Wallin 	NULL,
854cca69b67SMattias Wallin };
855cca69b67SMattias Wallin 
856cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = {
857cca69b67SMattias Wallin 	.attrs	= ab8500_sysfs_entries,
858cca69b67SMattias Wallin };
859cca69b67SMattias Wallin 
86062579266SRabin Vincent int __devinit ab8500_init(struct ab8500 *ab8500)
86162579266SRabin Vincent {
86262579266SRabin Vincent 	struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
86362579266SRabin Vincent 	int ret;
86462579266SRabin Vincent 	int i;
86547c16975SMattias Wallin 	u8 value;
86662579266SRabin Vincent 
86762579266SRabin Vincent 	if (plat)
86862579266SRabin Vincent 		ab8500->irq_base = plat->irq_base;
86962579266SRabin Vincent 
87062579266SRabin Vincent 	mutex_init(&ab8500->lock);
87162579266SRabin Vincent 	mutex_init(&ab8500->irq_lock);
87262579266SRabin Vincent 
87347c16975SMattias Wallin 	ret = get_register_interruptible(ab8500, AB8500_MISC,
87447c16975SMattias Wallin 		AB8500_REV_REG, &value);
87562579266SRabin Vincent 	if (ret < 0)
87662579266SRabin Vincent 		return ret;
87762579266SRabin Vincent 
878863dde5bSLinus Walleij 	switch (value) {
879863dde5bSLinus Walleij 	case AB8500_CUT1P0:
880863dde5bSLinus Walleij 	case AB8500_CUT1P1:
881863dde5bSLinus Walleij 	case AB8500_CUT2P0:
882863dde5bSLinus Walleij 	case AB8500_CUT3P0:
8830e9049ecSMattias Wallin 	case AB8500_CUT3P3:
88447c16975SMattias Wallin 		dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
885863dde5bSLinus Walleij 		break;
886863dde5bSLinus Walleij 	default:
88747c16975SMattias Wallin 		dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
88862579266SRabin Vincent 		return -EINVAL;
88962579266SRabin Vincent 	}
89047c16975SMattias Wallin 	ab8500->chip_id = value;
89162579266SRabin Vincent 
892e5c238c3SMattias Wallin 	/*
893e5c238c3SMattias Wallin 	 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
894e5c238c3SMattias Wallin 	 * 0x01 Swoff bit programming
895e5c238c3SMattias Wallin 	 * 0x02 Thermal protection activation
896e5c238c3SMattias Wallin 	 * 0x04 Vbat lower then BattOk falling threshold
897e5c238c3SMattias Wallin 	 * 0x08 Watchdog expired
898e5c238c3SMattias Wallin 	 * 0x10 Non presence of 32kHz clock
899e5c238c3SMattias Wallin 	 * 0x20 Battery level lower than power on reset threshold
900e5c238c3SMattias Wallin 	 * 0x40 Power on key 1 pressed longer than 10 seconds
901e5c238c3SMattias Wallin 	 * 0x80 DB8500 thermal shutdown
902e5c238c3SMattias Wallin 	 */
903e5c238c3SMattias Wallin 
904e5c238c3SMattias Wallin 	ret = get_register_interruptible(ab8500, AB8500_RTC,
905e5c238c3SMattias Wallin 		AB8500_SWITCH_OFF_STATUS, &value);
906e5c238c3SMattias Wallin 	if (ret < 0)
907e5c238c3SMattias Wallin 		return ret;
908e5c238c3SMattias Wallin 	dev_info(ab8500->dev, "switch off status: %#x", value);
909e5c238c3SMattias Wallin 
91062579266SRabin Vincent 	if (plat && plat->init)
91162579266SRabin Vincent 		plat->init(ab8500);
91262579266SRabin Vincent 
91362579266SRabin Vincent 	/* Clear and mask all interrupts */
91492d50a41SMattias Wallin 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
915863dde5bSLinus Walleij 		/* Interrupt register 12 doesn't exist prior to version 2.0 */
916863dde5bSLinus Walleij 		if (ab8500_irq_regoffset[i] == 11 &&
917863dde5bSLinus Walleij 			ab8500->chip_id < AB8500_CUT2P0)
91892d50a41SMattias Wallin 			continue;
91962579266SRabin Vincent 
92047c16975SMattias Wallin 		get_register_interruptible(ab8500, AB8500_INTERRUPT,
92192d50a41SMattias Wallin 			AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i],
92292d50a41SMattias Wallin 			&value);
92347c16975SMattias Wallin 		set_register_interruptible(ab8500, AB8500_INTERRUPT,
92492d50a41SMattias Wallin 			AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff);
92562579266SRabin Vincent 	}
92662579266SRabin Vincent 
92747c16975SMattias Wallin 	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
92847c16975SMattias Wallin 	if (ret)
92947c16975SMattias Wallin 		return ret;
93047c16975SMattias Wallin 
93162579266SRabin Vincent 	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
93262579266SRabin Vincent 		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
93362579266SRabin Vincent 
93462579266SRabin Vincent 	if (ab8500->irq_base) {
93562579266SRabin Vincent 		ret = ab8500_irq_init(ab8500);
93662579266SRabin Vincent 		if (ret)
93762579266SRabin Vincent 			return ret;
93862579266SRabin Vincent 
93962579266SRabin Vincent 		ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
9404f079985SMattias Wallin 					   IRQF_ONESHOT | IRQF_NO_SUSPEND,
9414f079985SMattias Wallin 					   "ab8500", ab8500);
94262579266SRabin Vincent 		if (ret)
94362579266SRabin Vincent 			goto out_removeirq;
94462579266SRabin Vincent 	}
94562579266SRabin Vincent 
946549931f9SSundar R Iyer 	ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
94762579266SRabin Vincent 			      ARRAY_SIZE(ab8500_devs), NULL,
94862579266SRabin Vincent 			      ab8500->irq_base);
94962579266SRabin Vincent 	if (ret)
95062579266SRabin Vincent 		goto out_freeirq;
95162579266SRabin Vincent 
952cca69b67SMattias Wallin 	ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
953cca69b67SMattias Wallin 	if (ret)
954cca69b67SMattias Wallin 		dev_err(ab8500->dev, "error creating sysfs entries\n");
955cca69b67SMattias Wallin 
95662579266SRabin Vincent 	return ret;
95762579266SRabin Vincent 
95862579266SRabin Vincent out_freeirq:
95962579266SRabin Vincent 	if (ab8500->irq_base) {
96062579266SRabin Vincent 		free_irq(ab8500->irq, ab8500);
96162579266SRabin Vincent out_removeirq:
96262579266SRabin Vincent 		ab8500_irq_remove(ab8500);
96362579266SRabin Vincent 	}
96462579266SRabin Vincent 	return ret;
96562579266SRabin Vincent }
96662579266SRabin Vincent 
96762579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500)
96862579266SRabin Vincent {
969cca69b67SMattias Wallin 	sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
97062579266SRabin Vincent 	mfd_remove_devices(ab8500->dev);
97162579266SRabin Vincent 	if (ab8500->irq_base) {
97262579266SRabin Vincent 		free_irq(ab8500->irq, ab8500);
97362579266SRabin Vincent 		ab8500_irq_remove(ab8500);
97462579266SRabin Vincent 	}
97562579266SRabin Vincent 
97662579266SRabin Vincent 	return 0;
97762579266SRabin Vincent }
97862579266SRabin Vincent 
979adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
98062579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core");
98162579266SRabin Vincent MODULE_LICENSE("GPL v2");
982