162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 2062579266SRabin Vincent #include <linux/mfd/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 3547c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3647c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3747c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3847c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 3947c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4047c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4162579266SRabin Vincent 4262579266SRabin Vincent /* 4362579266SRabin Vincent * latch registers 4462579266SRabin Vincent */ 4547c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4647c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4747c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4847c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 4947c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5047c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5147c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5247c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5347c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5447c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5592d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 5647c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5747c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 5847c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 5947c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6047c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6147c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6262579266SRabin Vincent 6362579266SRabin Vincent /* 6462579266SRabin Vincent * mask registers 6562579266SRabin Vincent */ 6662579266SRabin Vincent 6747c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 6847c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 6947c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7047c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7147c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7247c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7347c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7447c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7547c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7647c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7747c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 7847c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 7947c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8047c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8147c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8247c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8347c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8447c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8547c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8647c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8747c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 8847c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 8947c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9047c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9162579266SRabin Vincent 9247c16975SMattias Wallin #define AB8500_REV_REG 0x80 93*e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 9462579266SRabin Vincent 9562579266SRabin Vincent /* 9662579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 9762579266SRabin Vincent * numbers are indexed into this array with (num / 8). 9862579266SRabin Vincent * 9962579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 10062579266SRabin Vincent * offset 0. 10162579266SRabin Vincent */ 10262579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 10392d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 10462579266SRabin Vincent }; 10562579266SRabin Vincent 10647c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 10747c16975SMattias Wallin { 1086bce7bf1SMattias Wallin struct ab8500 *ab8500; 1096bce7bf1SMattias Wallin 1106bce7bf1SMattias Wallin if (!dev) 1116bce7bf1SMattias Wallin return -EINVAL; 1126bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1136bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 11447c16975SMattias Wallin } 11547c16975SMattias Wallin 11647c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 11747c16975SMattias Wallin u8 reg, u8 data) 11862579266SRabin Vincent { 11962579266SRabin Vincent int ret; 12047c16975SMattias Wallin /* 12147c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 12247c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 12347c16975SMattias Wallin * */ 12447c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 12562579266SRabin Vincent 12662579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 12762579266SRabin Vincent 12847c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 12947c16975SMattias Wallin if (ret) 13047c16975SMattias Wallin return ret; 13147c16975SMattias Wallin 13247c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 13347c16975SMattias Wallin if (ret < 0) 13447c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 13547c16975SMattias Wallin addr, ret); 13647c16975SMattias Wallin mutex_unlock(&ab8500->lock); 13747c16975SMattias Wallin 13847c16975SMattias Wallin return ret; 13947c16975SMattias Wallin } 14047c16975SMattias Wallin 14147c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 14247c16975SMattias Wallin u8 reg, u8 value) 14347c16975SMattias Wallin { 14447c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 14547c16975SMattias Wallin 14647c16975SMattias Wallin return set_register_interruptible(ab8500, bank, reg, value); 14747c16975SMattias Wallin } 14847c16975SMattias Wallin 14947c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 15047c16975SMattias Wallin u8 reg, u8 *value) 15147c16975SMattias Wallin { 15247c16975SMattias Wallin int ret; 15347c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 15447c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 15547c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 15647c16975SMattias Wallin 15747c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 15847c16975SMattias Wallin if (ret) 15947c16975SMattias Wallin return ret; 16047c16975SMattias Wallin 16147c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 16247c16975SMattias Wallin if (ret < 0) 16347c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 16447c16975SMattias Wallin addr, ret); 16547c16975SMattias Wallin else 16647c16975SMattias Wallin *value = ret; 16747c16975SMattias Wallin 16847c16975SMattias Wallin mutex_unlock(&ab8500->lock); 16947c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 17047c16975SMattias Wallin 17147c16975SMattias Wallin return ret; 17247c16975SMattias Wallin } 17347c16975SMattias Wallin 17447c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 17547c16975SMattias Wallin u8 reg, u8 *value) 17647c16975SMattias Wallin { 17747c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 17847c16975SMattias Wallin 17947c16975SMattias Wallin return get_register_interruptible(ab8500, bank, reg, value); 18047c16975SMattias Wallin } 18147c16975SMattias Wallin 18247c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 18347c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 18447c16975SMattias Wallin { 18547c16975SMattias Wallin int ret; 18647c16975SMattias Wallin u8 data; 18747c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 18847c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 18947c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 19047c16975SMattias Wallin 19147c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 19247c16975SMattias Wallin if (ret) 19347c16975SMattias Wallin return ret; 19447c16975SMattias Wallin 19547c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 19647c16975SMattias Wallin if (ret < 0) { 19747c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 19847c16975SMattias Wallin addr, ret); 19947c16975SMattias Wallin goto out; 20047c16975SMattias Wallin } 20147c16975SMattias Wallin 20247c16975SMattias Wallin data = (u8)ret; 20347c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 20447c16975SMattias Wallin 20562579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 20662579266SRabin Vincent if (ret < 0) 20762579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 20862579266SRabin Vincent addr, ret); 20962579266SRabin Vincent 21047c16975SMattias Wallin dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); 21162579266SRabin Vincent out: 21262579266SRabin Vincent mutex_unlock(&ab8500->lock); 21362579266SRabin Vincent return ret; 21462579266SRabin Vincent } 21547c16975SMattias Wallin 21647c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 21747c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 21847c16975SMattias Wallin { 21947c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 22047c16975SMattias Wallin 22147c16975SMattias Wallin return mask_and_set_register_interruptible(ab8500, bank, reg, 22247c16975SMattias Wallin bitmask, bitvalues); 22347c16975SMattias Wallin 22447c16975SMattias Wallin } 22547c16975SMattias Wallin 22647c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 22747c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 22847c16975SMattias Wallin .get_register = ab8500_get_register, 22947c16975SMattias Wallin .set_register = ab8500_set_register, 23047c16975SMattias Wallin .get_register_page = NULL, 23147c16975SMattias Wallin .set_register_page = NULL, 23247c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 23347c16975SMattias Wallin .event_registers_startup_state_get = NULL, 23447c16975SMattias Wallin .startup_irq_enabled = NULL, 23547c16975SMattias Wallin }; 23662579266SRabin Vincent 2379505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 23862579266SRabin Vincent { 2399505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 24062579266SRabin Vincent 24162579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 24262579266SRabin Vincent } 24362579266SRabin Vincent 2449505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 24562579266SRabin Vincent { 2469505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 24762579266SRabin Vincent int i; 24862579266SRabin Vincent 24962579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 25062579266SRabin Vincent u8 old = ab8500->oldmask[i]; 25162579266SRabin Vincent u8 new = ab8500->mask[i]; 25262579266SRabin Vincent int reg; 25362579266SRabin Vincent 25462579266SRabin Vincent if (new == old) 25562579266SRabin Vincent continue; 25662579266SRabin Vincent 25792d50a41SMattias Wallin /* Interrupt register 12 does'nt exist prior to version 0x20 */ 25892d50a41SMattias Wallin if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20) 25992d50a41SMattias Wallin continue; 26092d50a41SMattias Wallin 26162579266SRabin Vincent ab8500->oldmask[i] = new; 26262579266SRabin Vincent 26362579266SRabin Vincent reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; 26447c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 26562579266SRabin Vincent } 26662579266SRabin Vincent 26762579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 26862579266SRabin Vincent } 26962579266SRabin Vincent 2709505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 27162579266SRabin Vincent { 2729505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 2739505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 27462579266SRabin Vincent int index = offset / 8; 27562579266SRabin Vincent int mask = 1 << (offset % 8); 27662579266SRabin Vincent 27762579266SRabin Vincent ab8500->mask[index] |= mask; 27862579266SRabin Vincent } 27962579266SRabin Vincent 2809505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 28162579266SRabin Vincent { 2829505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 2839505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 28462579266SRabin Vincent int index = offset / 8; 28562579266SRabin Vincent int mask = 1 << (offset % 8); 28662579266SRabin Vincent 28762579266SRabin Vincent ab8500->mask[index] &= ~mask; 28862579266SRabin Vincent } 28962579266SRabin Vincent 29062579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 29162579266SRabin Vincent .name = "ab8500", 2929505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 2939505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 2949505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 2959505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 29662579266SRabin Vincent }; 29762579266SRabin Vincent 29862579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 29962579266SRabin Vincent { 30062579266SRabin Vincent struct ab8500 *ab8500 = dev; 30162579266SRabin Vincent int i; 30262579266SRabin Vincent 30362579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 30462579266SRabin Vincent 30562579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 30662579266SRabin Vincent int regoffset = ab8500_irq_regoffset[i]; 30762579266SRabin Vincent int status; 30847c16975SMattias Wallin u8 value; 30962579266SRabin Vincent 31092d50a41SMattias Wallin /* Interrupt register 12 does'nt exist prior to version 0x20 */ 31192d50a41SMattias Wallin if (regoffset == 11 && ab8500->chip_id < 0x20) 31292d50a41SMattias Wallin continue; 31392d50a41SMattias Wallin 31447c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 31547c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 31647c16975SMattias Wallin if (status < 0 || value == 0) 31762579266SRabin Vincent continue; 31862579266SRabin Vincent 31962579266SRabin Vincent do { 32088aec4f7SMattias Wallin int bit = __ffs(value); 32162579266SRabin Vincent int line = i * 8 + bit; 32262579266SRabin Vincent 32362579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 32447c16975SMattias Wallin value &= ~(1 << bit); 32547c16975SMattias Wallin } while (value); 32662579266SRabin Vincent } 32762579266SRabin Vincent 32862579266SRabin Vincent return IRQ_HANDLED; 32962579266SRabin Vincent } 33062579266SRabin Vincent 33162579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 33262579266SRabin Vincent { 33362579266SRabin Vincent int base = ab8500->irq_base; 33462579266SRabin Vincent int irq; 33562579266SRabin Vincent 33662579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 33762579266SRabin Vincent set_irq_chip_data(irq, ab8500); 33862579266SRabin Vincent set_irq_chip_and_handler(irq, &ab8500_irq_chip, 33962579266SRabin Vincent handle_simple_irq); 34062579266SRabin Vincent set_irq_nested_thread(irq, 1); 34162579266SRabin Vincent #ifdef CONFIG_ARM 34262579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 34362579266SRabin Vincent #else 34462579266SRabin Vincent set_irq_noprobe(irq); 34562579266SRabin Vincent #endif 34662579266SRabin Vincent } 34762579266SRabin Vincent 34862579266SRabin Vincent return 0; 34962579266SRabin Vincent } 35062579266SRabin Vincent 35162579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 35262579266SRabin Vincent { 35362579266SRabin Vincent int base = ab8500->irq_base; 35462579266SRabin Vincent int irq; 35562579266SRabin Vincent 35662579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 35762579266SRabin Vincent #ifdef CONFIG_ARM 35862579266SRabin Vincent set_irq_flags(irq, 0); 35962579266SRabin Vincent #endif 36062579266SRabin Vincent set_irq_chip_and_handler(irq, NULL, NULL); 36162579266SRabin Vincent set_irq_chip_data(irq, NULL); 36262579266SRabin Vincent } 36362579266SRabin Vincent } 36462579266SRabin Vincent 36562579266SRabin Vincent static struct resource ab8500_gpadc_resources[] = { 36662579266SRabin Vincent { 36762579266SRabin Vincent .name = "HW_CONV_END", 36862579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 36962579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 37062579266SRabin Vincent .flags = IORESOURCE_IRQ, 37162579266SRabin Vincent }, 37262579266SRabin Vincent { 37362579266SRabin Vincent .name = "SW_CONV_END", 37462579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 37562579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 37662579266SRabin Vincent .flags = IORESOURCE_IRQ, 37762579266SRabin Vincent }, 37862579266SRabin Vincent }; 37962579266SRabin Vincent 38062579266SRabin Vincent static struct resource ab8500_rtc_resources[] = { 38162579266SRabin Vincent { 38262579266SRabin Vincent .name = "60S", 38362579266SRabin Vincent .start = AB8500_INT_RTC_60S, 38462579266SRabin Vincent .end = AB8500_INT_RTC_60S, 38562579266SRabin Vincent .flags = IORESOURCE_IRQ, 38662579266SRabin Vincent }, 38762579266SRabin Vincent { 38862579266SRabin Vincent .name = "ALARM", 38962579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 39062579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 39162579266SRabin Vincent .flags = IORESOURCE_IRQ, 39262579266SRabin Vincent }, 39362579266SRabin Vincent }; 39462579266SRabin Vincent 39577686517SSundar R Iyer static struct resource ab8500_poweronkey_db_resources[] = { 39677686517SSundar R Iyer { 39777686517SSundar R Iyer .name = "ONKEY_DBF", 39877686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 39977686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 40077686517SSundar R Iyer .flags = IORESOURCE_IRQ, 40177686517SSundar R Iyer }, 40277686517SSundar R Iyer { 40377686517SSundar R Iyer .name = "ONKEY_DBR", 40477686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 40577686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 40677686517SSundar R Iyer .flags = IORESOURCE_IRQ, 40777686517SSundar R Iyer }, 40877686517SSundar R Iyer }; 40977686517SSundar R Iyer 410e098adedSMattias Wallin static struct resource ab8500_bm_resources[] = { 411e098adedSMattias Wallin { 412e098adedSMattias Wallin .name = "MAIN_EXT_CH_NOT_OK", 413e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 414e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 415e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 416e098adedSMattias Wallin }, 417e098adedSMattias Wallin { 418e098adedSMattias Wallin .name = "BATT_OVV", 419e098adedSMattias Wallin .start = AB8500_INT_BATT_OVV, 420e098adedSMattias Wallin .end = AB8500_INT_BATT_OVV, 421e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 422e098adedSMattias Wallin }, 423e098adedSMattias Wallin { 424e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 425e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 426e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 427e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 428e098adedSMattias Wallin }, 429e098adedSMattias Wallin { 430e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 431e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 432e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 433e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 434e098adedSMattias Wallin }, 435e098adedSMattias Wallin { 436e098adedSMattias Wallin .name = "VBUS_DET_F", 437e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 438e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 439e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 440e098adedSMattias Wallin }, 441e098adedSMattias Wallin { 442e098adedSMattias Wallin .name = "VBUS_DET_R", 443e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 444e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 445e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 446e098adedSMattias Wallin }, 447e098adedSMattias Wallin { 448e098adedSMattias Wallin .name = "BAT_CTRL_INDB", 449e098adedSMattias Wallin .start = AB8500_INT_BAT_CTRL_INDB, 450e098adedSMattias Wallin .end = AB8500_INT_BAT_CTRL_INDB, 451e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 452e098adedSMattias Wallin }, 453e098adedSMattias Wallin { 454e098adedSMattias Wallin .name = "CH_WD_EXP", 455e098adedSMattias Wallin .start = AB8500_INT_CH_WD_EXP, 456e098adedSMattias Wallin .end = AB8500_INT_CH_WD_EXP, 457e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 458e098adedSMattias Wallin }, 459e098adedSMattias Wallin { 460e098adedSMattias Wallin .name = "VBUS_OVV", 461e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 462e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 463e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 464e098adedSMattias Wallin }, 465e098adedSMattias Wallin { 466e098adedSMattias Wallin .name = "NCONV_ACCU", 467e098adedSMattias Wallin .start = AB8500_INT_CCN_CONV_ACC, 468e098adedSMattias Wallin .end = AB8500_INT_CCN_CONV_ACC, 469e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 470e098adedSMattias Wallin }, 471e098adedSMattias Wallin { 472e098adedSMattias Wallin .name = "LOW_BAT_F", 473e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_F, 474e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_F, 475e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 476e098adedSMattias Wallin }, 477e098adedSMattias Wallin { 478e098adedSMattias Wallin .name = "LOW_BAT_R", 479e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_R, 480e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_R, 481e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 482e098adedSMattias Wallin }, 483e098adedSMattias Wallin { 484e098adedSMattias Wallin .name = "BTEMP_LOW", 485e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 486e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 487e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 488e098adedSMattias Wallin }, 489e098adedSMattias Wallin { 490e098adedSMattias Wallin .name = "BTEMP_HIGH", 491e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 492e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 493e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 494e098adedSMattias Wallin }, 495e098adedSMattias Wallin { 496e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKR", 497e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OK, 498e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OK, 499e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 500e098adedSMattias Wallin }, 501e098adedSMattias Wallin { 502e098adedSMattias Wallin .name = "USB_CHARGE_DET_DONE", 503e098adedSMattias Wallin .start = AB8500_INT_USB_CHG_DET_DONE, 504e098adedSMattias Wallin .end = AB8500_INT_USB_CHG_DET_DONE, 505e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 506e098adedSMattias Wallin }, 507e098adedSMattias Wallin { 508e098adedSMattias Wallin .name = "USB_CH_TH_PROT_R", 509e098adedSMattias Wallin .start = AB8500_INT_USB_CH_TH_PROT_R, 510e098adedSMattias Wallin .end = AB8500_INT_USB_CH_TH_PROT_R, 511e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 512e098adedSMattias Wallin }, 513e098adedSMattias Wallin { 514e098adedSMattias Wallin .name = "MAIN_CH_TH_PROT_R", 515e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_TH_PROT_R, 516e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_TH_PROT_R, 517e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 518e098adedSMattias Wallin }, 519e098adedSMattias Wallin { 520e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKF", 521e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 522e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 523e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 524e098adedSMattias Wallin }, 525e098adedSMattias Wallin }; 526e098adedSMattias Wallin 527e098adedSMattias Wallin static struct resource ab8500_debug_resources[] = { 528e098adedSMattias Wallin { 529e098adedSMattias Wallin .name = "IRQ_FIRST", 530e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 531e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 532e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 533e098adedSMattias Wallin }, 534e098adedSMattias Wallin { 535e098adedSMattias Wallin .name = "IRQ_LAST", 536e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 537e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 538e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 539e098adedSMattias Wallin }, 540e098adedSMattias Wallin }; 541e098adedSMattias Wallin 542e098adedSMattias Wallin static struct resource ab8500_usb_resources[] = { 543e098adedSMattias Wallin { 544e098adedSMattias Wallin .name = "ID_WAKEUP_R", 545e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 546e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 547e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 548e098adedSMattias Wallin }, 549e098adedSMattias Wallin { 550e098adedSMattias Wallin .name = "ID_WAKEUP_F", 551e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 552e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 553e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 554e098adedSMattias Wallin }, 555e098adedSMattias Wallin { 556e098adedSMattias Wallin .name = "VBUS_DET_F", 557e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 558e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 559e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 560e098adedSMattias Wallin }, 561e098adedSMattias Wallin { 562e098adedSMattias Wallin .name = "VBUS_DET_R", 563e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 564e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 565e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 566e098adedSMattias Wallin }, 56792d50a41SMattias Wallin { 56892d50a41SMattias Wallin .name = "USB_LINK_STATUS", 56992d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 57092d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 57192d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 57292d50a41SMattias Wallin }, 573e098adedSMattias Wallin }; 574e098adedSMattias Wallin 575e098adedSMattias Wallin static struct resource ab8500_temp_resources[] = { 576e098adedSMattias Wallin { 577e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 578e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 579e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 580e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 581e098adedSMattias Wallin }, 582e098adedSMattias Wallin }; 583e098adedSMattias Wallin 58462579266SRabin Vincent static struct mfd_cell ab8500_devs[] = { 5855814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 5865814fc35SMattias Wallin { 5875814fc35SMattias Wallin .name = "ab8500-debug", 588e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 589e098adedSMattias Wallin .resources = ab8500_debug_resources, 5905814fc35SMattias Wallin }, 5915814fc35SMattias Wallin #endif 59262579266SRabin Vincent { 593e098adedSMattias Wallin .name = "ab8500-sysctrl", 594e098adedSMattias Wallin }, 595e098adedSMattias Wallin { 596e098adedSMattias Wallin .name = "ab8500-regulator", 597e098adedSMattias Wallin }, 598e098adedSMattias Wallin { 59962579266SRabin Vincent .name = "ab8500-gpadc", 60062579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 60162579266SRabin Vincent .resources = ab8500_gpadc_resources, 60262579266SRabin Vincent }, 60362579266SRabin Vincent { 60462579266SRabin Vincent .name = "ab8500-rtc", 60562579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 60662579266SRabin Vincent .resources = ab8500_rtc_resources, 60762579266SRabin Vincent }, 608f0f05b1cSArun Murthy { 609e098adedSMattias Wallin .name = "ab8500-bm", 610e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_bm_resources), 611e098adedSMattias Wallin .resources = ab8500_bm_resources, 612e098adedSMattias Wallin }, 613e098adedSMattias Wallin { .name = "ab8500-codec", }, 614e098adedSMattias Wallin { 615e098adedSMattias Wallin .name = "ab8500-usb", 616e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_usb_resources), 617e098adedSMattias Wallin .resources = ab8500_usb_resources, 618e098adedSMattias Wallin }, 619e098adedSMattias Wallin { 620e098adedSMattias Wallin .name = "ab8500-poweron-key", 621e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 622e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 623e098adedSMattias Wallin }, 624e098adedSMattias Wallin { 625f0f05b1cSArun Murthy .name = "ab8500-pwm", 626f0f05b1cSArun Murthy .id = 1, 627f0f05b1cSArun Murthy }, 628f0f05b1cSArun Murthy { 629f0f05b1cSArun Murthy .name = "ab8500-pwm", 630f0f05b1cSArun Murthy .id = 2, 631f0f05b1cSArun Murthy }, 632f0f05b1cSArun Murthy { 633f0f05b1cSArun Murthy .name = "ab8500-pwm", 634f0f05b1cSArun Murthy .id = 3, 635f0f05b1cSArun Murthy }, 636e098adedSMattias Wallin { .name = "ab8500-leds", }, 63777686517SSundar R Iyer { 638e098adedSMattias Wallin .name = "ab8500-denc", 639e098adedSMattias Wallin }, 640e098adedSMattias Wallin { 641e098adedSMattias Wallin .name = "ab8500-temp", 642e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 643e098adedSMattias Wallin .resources = ab8500_temp_resources, 64477686517SSundar R Iyer }, 64562579266SRabin Vincent }; 64662579266SRabin Vincent 647cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 648cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 649cca69b67SMattias Wallin { 650cca69b67SMattias Wallin struct ab8500 *ab8500; 651cca69b67SMattias Wallin 652cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 653cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 654cca69b67SMattias Wallin } 655cca69b67SMattias Wallin 656*e5c238c3SMattias Wallin /* 657*e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 658*e5c238c3SMattias Wallin * 0x01 Swoff bit programming 659*e5c238c3SMattias Wallin * 0x02 Thermal protection activation 660*e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 661*e5c238c3SMattias Wallin * 0x08 Watchdog expired 662*e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 663*e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 664*e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 665*e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 666*e5c238c3SMattias Wallin */ 667*e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 668*e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 669*e5c238c3SMattias Wallin { 670*e5c238c3SMattias Wallin int ret; 671*e5c238c3SMattias Wallin u8 value; 672*e5c238c3SMattias Wallin struct ab8500 *ab8500; 673*e5c238c3SMattias Wallin 674*e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 675*e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 676*e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 677*e5c238c3SMattias Wallin if (ret < 0) 678*e5c238c3SMattias Wallin return ret; 679*e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 680*e5c238c3SMattias Wallin } 681*e5c238c3SMattias Wallin 682cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 683*e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 684cca69b67SMattias Wallin 685cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 686cca69b67SMattias Wallin &dev_attr_chip_id.attr, 687*e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 688cca69b67SMattias Wallin NULL, 689cca69b67SMattias Wallin }; 690cca69b67SMattias Wallin 691cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 692cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 693cca69b67SMattias Wallin }; 694cca69b67SMattias Wallin 69562579266SRabin Vincent int __devinit ab8500_init(struct ab8500 *ab8500) 69662579266SRabin Vincent { 69762579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 69862579266SRabin Vincent int ret; 69962579266SRabin Vincent int i; 70047c16975SMattias Wallin u8 value; 70162579266SRabin Vincent 70262579266SRabin Vincent if (plat) 70362579266SRabin Vincent ab8500->irq_base = plat->irq_base; 70462579266SRabin Vincent 70562579266SRabin Vincent mutex_init(&ab8500->lock); 70662579266SRabin Vincent mutex_init(&ab8500->irq_lock); 70762579266SRabin Vincent 70847c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 70947c16975SMattias Wallin AB8500_REV_REG, &value); 71062579266SRabin Vincent if (ret < 0) 71162579266SRabin Vincent return ret; 71262579266SRabin Vincent 71362579266SRabin Vincent /* 71462579266SRabin Vincent * 0x0 - Early Drop 71562579266SRabin Vincent * 0x10 - Cut 1.0 71662579266SRabin Vincent * 0x11 - Cut 1.1 71792d50a41SMattias Wallin * 0x20 - Cut 2.0 718adceed62SMattias Wallin * 0x30 - Cut 3.0 71962579266SRabin Vincent */ 720adceed62SMattias Wallin if (value == 0x0 || value == 0x10 || value == 0x11 || value == 0x20 || 721adceed62SMattias Wallin value == 0x30) { 72247c16975SMattias Wallin dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); 72362579266SRabin Vincent } else { 72447c16975SMattias Wallin dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); 72562579266SRabin Vincent return -EINVAL; 72662579266SRabin Vincent } 72747c16975SMattias Wallin ab8500->chip_id = value; 72862579266SRabin Vincent 729*e5c238c3SMattias Wallin /* 730*e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 731*e5c238c3SMattias Wallin * 0x01 Swoff bit programming 732*e5c238c3SMattias Wallin * 0x02 Thermal protection activation 733*e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 734*e5c238c3SMattias Wallin * 0x08 Watchdog expired 735*e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 736*e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 737*e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 738*e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 739*e5c238c3SMattias Wallin */ 740*e5c238c3SMattias Wallin 741*e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 742*e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 743*e5c238c3SMattias Wallin if (ret < 0) 744*e5c238c3SMattias Wallin return ret; 745*e5c238c3SMattias Wallin dev_info(ab8500->dev, "switch off status: %#x", value); 746*e5c238c3SMattias Wallin 74762579266SRabin Vincent if (plat && plat->init) 74862579266SRabin Vincent plat->init(ab8500); 74962579266SRabin Vincent 75062579266SRabin Vincent /* Clear and mask all interrupts */ 75192d50a41SMattias Wallin for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 75292d50a41SMattias Wallin /* Interrupt register 12 does'nt exist prior to version 0x20 */ 75392d50a41SMattias Wallin if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20) 75492d50a41SMattias Wallin continue; 75562579266SRabin Vincent 75647c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 75792d50a41SMattias Wallin AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i], 75892d50a41SMattias Wallin &value); 75947c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 76092d50a41SMattias Wallin AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff); 76162579266SRabin Vincent } 76262579266SRabin Vincent 76347c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 76447c16975SMattias Wallin if (ret) 76547c16975SMattias Wallin return ret; 76647c16975SMattias Wallin 76762579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) 76862579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 76962579266SRabin Vincent 77062579266SRabin Vincent if (ab8500->irq_base) { 77162579266SRabin Vincent ret = ab8500_irq_init(ab8500); 77262579266SRabin Vincent if (ret) 77362579266SRabin Vincent return ret; 77462579266SRabin Vincent 77562579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 7764f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 7774f079985SMattias Wallin "ab8500", ab8500); 77862579266SRabin Vincent if (ret) 77962579266SRabin Vincent goto out_removeirq; 78062579266SRabin Vincent } 78162579266SRabin Vincent 782549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 78362579266SRabin Vincent ARRAY_SIZE(ab8500_devs), NULL, 78462579266SRabin Vincent ab8500->irq_base); 78562579266SRabin Vincent if (ret) 78662579266SRabin Vincent goto out_freeirq; 78762579266SRabin Vincent 788cca69b67SMattias Wallin ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group); 789cca69b67SMattias Wallin if (ret) 790cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 791cca69b67SMattias Wallin 79262579266SRabin Vincent return ret; 79362579266SRabin Vincent 79462579266SRabin Vincent out_freeirq: 79562579266SRabin Vincent if (ab8500->irq_base) { 79662579266SRabin Vincent free_irq(ab8500->irq, ab8500); 79762579266SRabin Vincent out_removeirq: 79862579266SRabin Vincent ab8500_irq_remove(ab8500); 79962579266SRabin Vincent } 80062579266SRabin Vincent return ret; 80162579266SRabin Vincent } 80262579266SRabin Vincent 80362579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 80462579266SRabin Vincent { 805cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 80662579266SRabin Vincent mfd_remove_devices(ab8500->dev); 80762579266SRabin Vincent if (ab8500->irq_base) { 80862579266SRabin Vincent free_irq(ab8500->irq, ab8500); 80962579266SRabin Vincent ab8500_irq_remove(ab8500); 81062579266SRabin Vincent } 81162579266SRabin Vincent 81262579266SRabin Vincent return 0; 81362579266SRabin Vincent } 81462579266SRabin Vincent 815adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 81662579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 81762579266SRabin Vincent MODULE_LICENSE("GPL v2"); 818