162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 20ee66e653SLinus Walleij #include <linux/mfd/abx500/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 35d6255529SLinus Walleij #define AB9540_IT_SOURCE13_REG 0x0C 3647c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3747c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3847c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3947c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 4047c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4147c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4262579266SRabin Vincent 4362579266SRabin Vincent /* 4462579266SRabin Vincent * latch registers 4562579266SRabin Vincent */ 4647c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4747c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4847c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4947c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 5047c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5147c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5247c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5347c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5447c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5547c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5692d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 57d6255529SLinus Walleij #define AB9540_IT_LATCH13_REG 0x2C 5847c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5947c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 6047c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 6147c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6247c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6347c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6462579266SRabin Vincent 6562579266SRabin Vincent /* 6662579266SRabin Vincent * mask registers 6762579266SRabin Vincent */ 6862579266SRabin Vincent 6947c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 7047c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 7147c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7247c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7347c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7447c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7547c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7647c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7747c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7847c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7947c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 8047c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 8147c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8247c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8347c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8447c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8547c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8647c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8747c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8847c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8947c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 9047c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 9147c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9247c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9362579266SRabin Vincent 9447c16975SMattias Wallin #define AB8500_REV_REG 0x80 950f620837SLinus Walleij #define AB8500_IC_NAME_REG 0x82 96e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 9762579266SRabin Vincent 98b4a31037SAndrew Lynn #define AB8500_TURN_ON_STATUS 0x00 99b4a31037SAndrew Lynn 100d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_REG 0x23 101d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 102d6255529SLinus Walleij 10362579266SRabin Vincent /* 10462579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 1052ced445eSLinus Walleij * numbers are indexed into this array with (num / 8). The interupts are 1062ced445eSLinus Walleij * defined in linux/mfd/ab8500.h 10762579266SRabin Vincent * 10862579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 10962579266SRabin Vincent * offset 0. 11062579266SRabin Vincent */ 1112ced445eSLinus Walleij /* AB8500 support */ 11262579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 11392d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 11462579266SRabin Vincent }; 11562579266SRabin Vincent 116d6255529SLinus Walleij /* AB9540 support */ 117d6255529SLinus Walleij static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 118d6255529SLinus Walleij 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 119d6255529SLinus Walleij }; 120d6255529SLinus Walleij 1210f620837SLinus Walleij static const char ab8500_version_str[][7] = { 1220f620837SLinus Walleij [AB8500_VERSION_AB8500] = "AB8500", 1230f620837SLinus Walleij [AB8500_VERSION_AB8505] = "AB8505", 1240f620837SLinus Walleij [AB8500_VERSION_AB9540] = "AB9540", 1250f620837SLinus Walleij [AB8500_VERSION_AB8540] = "AB8540", 1260f620837SLinus Walleij }; 1270f620837SLinus Walleij 12847c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 12947c16975SMattias Wallin { 1306bce7bf1SMattias Wallin struct ab8500 *ab8500; 1316bce7bf1SMattias Wallin 1326bce7bf1SMattias Wallin if (!dev) 1336bce7bf1SMattias Wallin return -EINVAL; 1346bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1356bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 13647c16975SMattias Wallin } 13747c16975SMattias Wallin 13847c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 13947c16975SMattias Wallin u8 reg, u8 data) 14062579266SRabin Vincent { 14162579266SRabin Vincent int ret; 14247c16975SMattias Wallin /* 14347c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 14447c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 14547c16975SMattias Wallin * */ 14647c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 14762579266SRabin Vincent 14862579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 14962579266SRabin Vincent 150392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 15147c16975SMattias Wallin 15247c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 15347c16975SMattias Wallin if (ret < 0) 15447c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 15547c16975SMattias Wallin addr, ret); 15647c16975SMattias Wallin mutex_unlock(&ab8500->lock); 15747c16975SMattias Wallin 15847c16975SMattias Wallin return ret; 15947c16975SMattias Wallin } 16047c16975SMattias Wallin 16147c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 16247c16975SMattias Wallin u8 reg, u8 value) 16347c16975SMattias Wallin { 16447c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 16547c16975SMattias Wallin 16647c16975SMattias Wallin return set_register_interruptible(ab8500, bank, reg, value); 16747c16975SMattias Wallin } 16847c16975SMattias Wallin 16947c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 17047c16975SMattias Wallin u8 reg, u8 *value) 17147c16975SMattias Wallin { 17247c16975SMattias Wallin int ret; 17347c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 17447c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 17547c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 17647c16975SMattias Wallin 177392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 17847c16975SMattias Wallin 17947c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 18047c16975SMattias Wallin if (ret < 0) 18147c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 18247c16975SMattias Wallin addr, ret); 18347c16975SMattias Wallin else 18447c16975SMattias Wallin *value = ret; 18547c16975SMattias Wallin 18647c16975SMattias Wallin mutex_unlock(&ab8500->lock); 18747c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 18847c16975SMattias Wallin 18947c16975SMattias Wallin return ret; 19047c16975SMattias Wallin } 19147c16975SMattias Wallin 19247c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 19347c16975SMattias Wallin u8 reg, u8 *value) 19447c16975SMattias Wallin { 19547c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 19647c16975SMattias Wallin 19747c16975SMattias Wallin return get_register_interruptible(ab8500, bank, reg, value); 19847c16975SMattias Wallin } 19947c16975SMattias Wallin 20047c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 20147c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 20247c16975SMattias Wallin { 20347c16975SMattias Wallin int ret; 20447c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 20547c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 20647c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 20747c16975SMattias Wallin 208392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 20947c16975SMattias Wallin 210*bc628fd1SMattias Nilsson if (ab8500->write_masked == NULL) { 211*bc628fd1SMattias Nilsson u8 data; 212*bc628fd1SMattias Nilsson 21347c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 21447c16975SMattias Wallin if (ret < 0) { 21547c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 21647c16975SMattias Wallin addr, ret); 21747c16975SMattias Wallin goto out; 21847c16975SMattias Wallin } 21947c16975SMattias Wallin 22047c16975SMattias Wallin data = (u8)ret; 22147c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 22247c16975SMattias Wallin 22362579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 22462579266SRabin Vincent if (ret < 0) 22562579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 22662579266SRabin Vincent addr, ret); 22762579266SRabin Vincent 228*bc628fd1SMattias Nilsson dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 229*bc628fd1SMattias Nilsson data); 230*bc628fd1SMattias Nilsson goto out; 231*bc628fd1SMattias Nilsson } 232*bc628fd1SMattias Nilsson ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 233*bc628fd1SMattias Nilsson if (ret < 0) 234*bc628fd1SMattias Nilsson dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 235*bc628fd1SMattias Nilsson ret); 23662579266SRabin Vincent out: 23762579266SRabin Vincent mutex_unlock(&ab8500->lock); 23862579266SRabin Vincent return ret; 23962579266SRabin Vincent } 24047c16975SMattias Wallin 24147c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 24247c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 24347c16975SMattias Wallin { 24447c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 24547c16975SMattias Wallin 24647c16975SMattias Wallin return mask_and_set_register_interruptible(ab8500, bank, reg, 24747c16975SMattias Wallin bitmask, bitvalues); 24847c16975SMattias Wallin 24947c16975SMattias Wallin } 25047c16975SMattias Wallin 25147c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 25247c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 25347c16975SMattias Wallin .get_register = ab8500_get_register, 25447c16975SMattias Wallin .set_register = ab8500_set_register, 25547c16975SMattias Wallin .get_register_page = NULL, 25647c16975SMattias Wallin .set_register_page = NULL, 25747c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 25847c16975SMattias Wallin .event_registers_startup_state_get = NULL, 25947c16975SMattias Wallin .startup_irq_enabled = NULL, 26047c16975SMattias Wallin }; 26162579266SRabin Vincent 2629505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 26362579266SRabin Vincent { 2649505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 26562579266SRabin Vincent 26662579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 26762579266SRabin Vincent } 26862579266SRabin Vincent 2699505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 27062579266SRabin Vincent { 2719505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 27262579266SRabin Vincent int i; 27362579266SRabin Vincent 2742ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 27562579266SRabin Vincent u8 old = ab8500->oldmask[i]; 27662579266SRabin Vincent u8 new = ab8500->mask[i]; 27762579266SRabin Vincent int reg; 27862579266SRabin Vincent 27962579266SRabin Vincent if (new == old) 28062579266SRabin Vincent continue; 28162579266SRabin Vincent 2820f620837SLinus Walleij /* 2830f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 2840f620837SLinus Walleij * 2.0 2850f620837SLinus Walleij */ 2860f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 2870f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 28892d50a41SMattias Wallin continue; 28992d50a41SMattias Wallin 29062579266SRabin Vincent ab8500->oldmask[i] = new; 29162579266SRabin Vincent 2922ced445eSLinus Walleij reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 29347c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 29462579266SRabin Vincent } 29562579266SRabin Vincent 29662579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 29762579266SRabin Vincent } 29862579266SRabin Vincent 2999505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 30062579266SRabin Vincent { 3019505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3029505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 30362579266SRabin Vincent int index = offset / 8; 30462579266SRabin Vincent int mask = 1 << (offset % 8); 30562579266SRabin Vincent 30662579266SRabin Vincent ab8500->mask[index] |= mask; 30762579266SRabin Vincent } 30862579266SRabin Vincent 3099505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 31062579266SRabin Vincent { 3119505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3129505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 31362579266SRabin Vincent int index = offset / 8; 31462579266SRabin Vincent int mask = 1 << (offset % 8); 31562579266SRabin Vincent 31662579266SRabin Vincent ab8500->mask[index] &= ~mask; 31762579266SRabin Vincent } 31862579266SRabin Vincent 31962579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 32062579266SRabin Vincent .name = "ab8500", 3219505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 3229505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 3239505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 324e6f9306eSVirupax Sadashivpetimath .irq_disable = ab8500_irq_mask, 3259505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 32662579266SRabin Vincent }; 32762579266SRabin Vincent 32862579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 32962579266SRabin Vincent { 33062579266SRabin Vincent struct ab8500 *ab8500 = dev; 33162579266SRabin Vincent int i; 33262579266SRabin Vincent 33362579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 33462579266SRabin Vincent 3352ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 3362ced445eSLinus Walleij int regoffset = ab8500->irq_reg_offset[i]; 33762579266SRabin Vincent int status; 33847c16975SMattias Wallin u8 value; 33962579266SRabin Vincent 3400f620837SLinus Walleij /* 3410f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 3420f620837SLinus Walleij * 2.0 3430f620837SLinus Walleij */ 3440f620837SLinus Walleij if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) 34592d50a41SMattias Wallin continue; 34692d50a41SMattias Wallin 34747c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 34847c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 34947c16975SMattias Wallin if (status < 0 || value == 0) 35062579266SRabin Vincent continue; 35162579266SRabin Vincent 35262579266SRabin Vincent do { 35388aec4f7SMattias Wallin int bit = __ffs(value); 35462579266SRabin Vincent int line = i * 8 + bit; 35562579266SRabin Vincent 35662579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 35747c16975SMattias Wallin value &= ~(1 << bit); 35847c16975SMattias Wallin } while (value); 35962579266SRabin Vincent } 36062579266SRabin Vincent 36162579266SRabin Vincent return IRQ_HANDLED; 36262579266SRabin Vincent } 36362579266SRabin Vincent 36462579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 36562579266SRabin Vincent { 36662579266SRabin Vincent int base = ab8500->irq_base; 36762579266SRabin Vincent int irq; 3682ced445eSLinus Walleij int num_irqs; 36962579266SRabin Vincent 370d6255529SLinus Walleij if (is_ab9540(ab8500)) 371d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 372a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 373a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 374d6255529SLinus Walleij else 3752ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 3762ced445eSLinus Walleij 3772ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 378d5bb1221SThomas Gleixner irq_set_chip_data(irq, ab8500); 379d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, &ab8500_irq_chip, 38062579266SRabin Vincent handle_simple_irq); 381d5bb1221SThomas Gleixner irq_set_nested_thread(irq, 1); 38262579266SRabin Vincent #ifdef CONFIG_ARM 38362579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 38462579266SRabin Vincent #else 385d5bb1221SThomas Gleixner irq_set_noprobe(irq); 38662579266SRabin Vincent #endif 38762579266SRabin Vincent } 38862579266SRabin Vincent 38962579266SRabin Vincent return 0; 39062579266SRabin Vincent } 39162579266SRabin Vincent 39262579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 39362579266SRabin Vincent { 39462579266SRabin Vincent int base = ab8500->irq_base; 39562579266SRabin Vincent int irq; 3962ced445eSLinus Walleij int num_irqs; 39762579266SRabin Vincent 398d6255529SLinus Walleij if (is_ab9540(ab8500)) 399d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 400a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 401a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 402d6255529SLinus Walleij else 4032ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 4042ced445eSLinus Walleij 4052ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 40662579266SRabin Vincent #ifdef CONFIG_ARM 40762579266SRabin Vincent set_irq_flags(irq, 0); 40862579266SRabin Vincent #endif 409d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, NULL, NULL); 410d5bb1221SThomas Gleixner irq_set_chip_data(irq, NULL); 41162579266SRabin Vincent } 41262579266SRabin Vincent } 41362579266SRabin Vincent 414d6255529SLinus Walleij /* AB8500 GPIO Resources */ 4155cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = { 4160cb3fcd7SBibek Basu { 4170cb3fcd7SBibek Basu .name = "GPIO_INT6", 4180cb3fcd7SBibek Basu .start = AB8500_INT_GPIO6R, 4190cb3fcd7SBibek Basu .end = AB8500_INT_GPIO41F, 4200cb3fcd7SBibek Basu .flags = IORESOURCE_IRQ, 4210cb3fcd7SBibek Basu } 4220cb3fcd7SBibek Basu }; 4230cb3fcd7SBibek Basu 424d6255529SLinus Walleij /* AB9540 GPIO Resources */ 425d6255529SLinus Walleij static struct resource __devinitdata ab9540_gpio_resources[] = { 426d6255529SLinus Walleij { 427d6255529SLinus Walleij .name = "GPIO_INT6", 428d6255529SLinus Walleij .start = AB8500_INT_GPIO6R, 429d6255529SLinus Walleij .end = AB8500_INT_GPIO41F, 430d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 431d6255529SLinus Walleij }, 432d6255529SLinus Walleij { 433d6255529SLinus Walleij .name = "GPIO_INT14", 434d6255529SLinus Walleij .start = AB9540_INT_GPIO50R, 435d6255529SLinus Walleij .end = AB9540_INT_GPIO54R, 436d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 437d6255529SLinus Walleij }, 438d6255529SLinus Walleij { 439d6255529SLinus Walleij .name = "GPIO_INT15", 440d6255529SLinus Walleij .start = AB9540_INT_GPIO50F, 441d6255529SLinus Walleij .end = AB9540_INT_GPIO54F, 442d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 443d6255529SLinus Walleij } 444d6255529SLinus Walleij }; 445d6255529SLinus Walleij 4465cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = { 44762579266SRabin Vincent { 44862579266SRabin Vincent .name = "HW_CONV_END", 44962579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 45062579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 45162579266SRabin Vincent .flags = IORESOURCE_IRQ, 45262579266SRabin Vincent }, 45362579266SRabin Vincent { 45462579266SRabin Vincent .name = "SW_CONV_END", 45562579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 45662579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 45762579266SRabin Vincent .flags = IORESOURCE_IRQ, 45862579266SRabin Vincent }, 45962579266SRabin Vincent }; 46062579266SRabin Vincent 4615cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = { 46262579266SRabin Vincent { 46362579266SRabin Vincent .name = "60S", 46462579266SRabin Vincent .start = AB8500_INT_RTC_60S, 46562579266SRabin Vincent .end = AB8500_INT_RTC_60S, 46662579266SRabin Vincent .flags = IORESOURCE_IRQ, 46762579266SRabin Vincent }, 46862579266SRabin Vincent { 46962579266SRabin Vincent .name = "ALARM", 47062579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 47162579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 47262579266SRabin Vincent .flags = IORESOURCE_IRQ, 47362579266SRabin Vincent }, 47462579266SRabin Vincent }; 47562579266SRabin Vincent 4765cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { 47777686517SSundar R Iyer { 47877686517SSundar R Iyer .name = "ONKEY_DBF", 47977686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 48077686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 48177686517SSundar R Iyer .flags = IORESOURCE_IRQ, 48277686517SSundar R Iyer }, 48377686517SSundar R Iyer { 48477686517SSundar R Iyer .name = "ONKEY_DBR", 48577686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 48677686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 48777686517SSundar R Iyer .flags = IORESOURCE_IRQ, 48877686517SSundar R Iyer }, 48977686517SSundar R Iyer }; 49077686517SSundar R Iyer 4916af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { 492e098adedSMattias Wallin { 4936af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_F", 4946af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_F, 4956af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_F, 496e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 497e098adedSMattias Wallin }, 498e098adedSMattias Wallin { 4996af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_R", 5006af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_R, 5016af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_R, 502e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 503e098adedSMattias Wallin }, 504e098adedSMattias Wallin { 5056af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_F", 5066af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_F, 5076af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_F, 5086af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5096af75ecdSLinus Walleij }, 5106af75ecdSLinus Walleij { 5116af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_R", 5126af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_R, 5136af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_R, 5146af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5156af75ecdSLinus Walleij }, 5166af75ecdSLinus Walleij { 5176af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_F", 5186af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_F, 5196af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_F, 5206af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5216af75ecdSLinus Walleij }, 5226af75ecdSLinus Walleij { 5236af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_R", 5246af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_R, 5256af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_R, 5266af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5276af75ecdSLinus Walleij }, 5286af75ecdSLinus Walleij }; 5296af75ecdSLinus Walleij 5306af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = { 5316af75ecdSLinus Walleij { 532e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 533e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 534e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 535e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 536e098adedSMattias Wallin }, 537e098adedSMattias Wallin { 538e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 539e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 540e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 541e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 542e098adedSMattias Wallin }, 543e098adedSMattias Wallin { 544e098adedSMattias Wallin .name = "VBUS_DET_R", 545e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 546e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 547e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 548e098adedSMattias Wallin }, 549e098adedSMattias Wallin { 5506af75ecdSLinus Walleij .name = "VBUS_DET_F", 5516af75ecdSLinus Walleij .start = AB8500_INT_VBUS_DET_F, 5526af75ecdSLinus Walleij .end = AB8500_INT_VBUS_DET_F, 553e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 554e098adedSMattias Wallin }, 555e098adedSMattias Wallin { 5566af75ecdSLinus Walleij .name = "USB_LINK_STATUS", 5576af75ecdSLinus Walleij .start = AB8500_INT_USB_LINK_STATUS, 5586af75ecdSLinus Walleij .end = AB8500_INT_USB_LINK_STATUS, 5596af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5606af75ecdSLinus Walleij }, 5616af75ecdSLinus Walleij { 562e098adedSMattias Wallin .name = "VBUS_OVV", 563e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 564e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 565e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 566e098adedSMattias Wallin }, 567e098adedSMattias Wallin { 5686af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_R", 5696af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_R, 5706af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_R, 571e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 572e098adedSMattias Wallin }, 573e098adedSMattias Wallin { 5746af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_F", 5756af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_F, 5766af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_F, 577e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 578e098adedSMattias Wallin }, 579e098adedSMattias Wallin { 5806af75ecdSLinus Walleij .name = "MAIN_EXT_CH_NOT_OK", 5816af75ecdSLinus Walleij .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 5826af75ecdSLinus Walleij .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 5836af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5846af75ecdSLinus Walleij }, 5856af75ecdSLinus Walleij { 5866af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_R", 5876af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_R, 5886af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_R, 5896af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5906af75ecdSLinus Walleij }, 5916af75ecdSLinus Walleij { 5926af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_F", 5936af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_F, 5946af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_F, 5956af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5966af75ecdSLinus Walleij }, 5976af75ecdSLinus Walleij { 5986af75ecdSLinus Walleij .name = "USB_CHARGER_NOT_OKR", 599a982362cSBengt Jonsson .start = AB8500_INT_USB_CHARGER_NOT_OKR, 600a982362cSBengt Jonsson .end = AB8500_INT_USB_CHARGER_NOT_OKR, 6016af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6026af75ecdSLinus Walleij }, 6036af75ecdSLinus Walleij { 6046af75ecdSLinus Walleij .name = "CH_WD_EXP", 6056af75ecdSLinus Walleij .start = AB8500_INT_CH_WD_EXP, 6066af75ecdSLinus Walleij .end = AB8500_INT_CH_WD_EXP, 6076af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6086af75ecdSLinus Walleij }, 6096af75ecdSLinus Walleij }; 6106af75ecdSLinus Walleij 6116af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = { 6126af75ecdSLinus Walleij { 6136af75ecdSLinus Walleij .name = "BAT_CTRL_INDB", 6146af75ecdSLinus Walleij .start = AB8500_INT_BAT_CTRL_INDB, 6156af75ecdSLinus Walleij .end = AB8500_INT_BAT_CTRL_INDB, 616e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 617e098adedSMattias Wallin }, 618e098adedSMattias Wallin { 619e098adedSMattias Wallin .name = "BTEMP_LOW", 620e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 621e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 622e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 623e098adedSMattias Wallin }, 624e098adedSMattias Wallin { 625e098adedSMattias Wallin .name = "BTEMP_HIGH", 626e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 627e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 628e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 629e098adedSMattias Wallin }, 630e098adedSMattias Wallin { 6316af75ecdSLinus Walleij .name = "BTEMP_LOW_MEDIUM", 6326af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_LOW_MEDIUM, 6336af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_LOW_MEDIUM, 634e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 635e098adedSMattias Wallin }, 636e098adedSMattias Wallin { 6376af75ecdSLinus Walleij .name = "BTEMP_MEDIUM_HIGH", 6386af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 6396af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 640e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 641e098adedSMattias Wallin }, 642e098adedSMattias Wallin }; 643e098adedSMattias Wallin 6446af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = { 6456af75ecdSLinus Walleij { 6466af75ecdSLinus Walleij .name = "NCONV_ACCU", 6476af75ecdSLinus Walleij .start = AB8500_INT_CCN_CONV_ACC, 6486af75ecdSLinus Walleij .end = AB8500_INT_CCN_CONV_ACC, 6496af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6506af75ecdSLinus Walleij }, 6516af75ecdSLinus Walleij { 6526af75ecdSLinus Walleij .name = "BATT_OVV", 6536af75ecdSLinus Walleij .start = AB8500_INT_BATT_OVV, 6546af75ecdSLinus Walleij .end = AB8500_INT_BATT_OVV, 6556af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6566af75ecdSLinus Walleij }, 6576af75ecdSLinus Walleij { 6586af75ecdSLinus Walleij .name = "LOW_BAT_F", 6596af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_F, 6606af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_F, 6616af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6626af75ecdSLinus Walleij }, 6636af75ecdSLinus Walleij { 6646af75ecdSLinus Walleij .name = "LOW_BAT_R", 6656af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_R, 6666af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_R, 6676af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6686af75ecdSLinus Walleij }, 6696af75ecdSLinus Walleij { 6706af75ecdSLinus Walleij .name = "CC_INT_CALIB", 6716af75ecdSLinus Walleij .start = AB8500_INT_CC_INT_CALIB, 6726af75ecdSLinus Walleij .end = AB8500_INT_CC_INT_CALIB, 6736af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6746af75ecdSLinus Walleij }, 675a982362cSBengt Jonsson { 676a982362cSBengt Jonsson .name = "CCEOC", 677a982362cSBengt Jonsson .start = AB8500_INT_CCEOC, 678a982362cSBengt Jonsson .end = AB8500_INT_CCEOC, 679a982362cSBengt Jonsson .flags = IORESOURCE_IRQ, 680a982362cSBengt Jonsson }, 6816af75ecdSLinus Walleij }; 6826af75ecdSLinus Walleij 6836af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {}; 6846af75ecdSLinus Walleij 685df720647SAxel Lin #ifdef CONFIG_DEBUG_FS 6865cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = { 687e098adedSMattias Wallin { 688e098adedSMattias Wallin .name = "IRQ_FIRST", 689e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 690e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 691e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 692e098adedSMattias Wallin }, 693e098adedSMattias Wallin { 694e098adedSMattias Wallin .name = "IRQ_LAST", 695a982362cSBengt Jonsson .start = AB8500_INT_XTAL32K_KO, 696a982362cSBengt Jonsson .end = AB8500_INT_XTAL32K_KO, 697e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 698e098adedSMattias Wallin }, 699e098adedSMattias Wallin }; 700df720647SAxel Lin #endif 701e098adedSMattias Wallin 7025cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = { 703e098adedSMattias Wallin { 704e098adedSMattias Wallin .name = "ID_WAKEUP_R", 705e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 706e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 707e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 708e098adedSMattias Wallin }, 709e098adedSMattias Wallin { 710e098adedSMattias Wallin .name = "ID_WAKEUP_F", 711e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 712e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 713e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 714e098adedSMattias Wallin }, 715e098adedSMattias Wallin { 716e098adedSMattias Wallin .name = "VBUS_DET_F", 717e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 718e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 719e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 720e098adedSMattias Wallin }, 721e098adedSMattias Wallin { 722e098adedSMattias Wallin .name = "VBUS_DET_R", 723e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 724e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 725e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 726e098adedSMattias Wallin }, 72792d50a41SMattias Wallin { 72892d50a41SMattias Wallin .name = "USB_LINK_STATUS", 72992d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 73092d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 73192d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 73292d50a41SMattias Wallin }, 7336af75ecdSLinus Walleij { 7346af75ecdSLinus Walleij .name = "USB_ADP_PROBE_PLUG", 7356af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_PLUG, 7366af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_PLUG, 7376af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7386af75ecdSLinus Walleij }, 7396af75ecdSLinus Walleij { 7406af75ecdSLinus Walleij .name = "USB_ADP_PROBE_UNPLUG", 7416af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_UNPLUG, 7426af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_UNPLUG, 7436af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7446af75ecdSLinus Walleij }, 745e098adedSMattias Wallin }; 746e098adedSMattias Wallin 7475cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = { 748e098adedSMattias Wallin { 749e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 750e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 751e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 752e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 753e098adedSMattias Wallin }, 754e098adedSMattias Wallin }; 755e098adedSMattias Wallin 756d6255529SLinus Walleij static struct mfd_cell __devinitdata abx500_common_devs[] = { 7575814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 7585814fc35SMattias Wallin { 7595814fc35SMattias Wallin .name = "ab8500-debug", 760e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 761e098adedSMattias Wallin .resources = ab8500_debug_resources, 7625814fc35SMattias Wallin }, 7635814fc35SMattias Wallin #endif 76462579266SRabin Vincent { 765e098adedSMattias Wallin .name = "ab8500-sysctrl", 766e098adedSMattias Wallin }, 767e098adedSMattias Wallin { 768e098adedSMattias Wallin .name = "ab8500-regulator", 769e098adedSMattias Wallin }, 770e098adedSMattias Wallin { 77162579266SRabin Vincent .name = "ab8500-gpadc", 77262579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 77362579266SRabin Vincent .resources = ab8500_gpadc_resources, 77462579266SRabin Vincent }, 77562579266SRabin Vincent { 77662579266SRabin Vincent .name = "ab8500-rtc", 77762579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 77862579266SRabin Vincent .resources = ab8500_rtc_resources, 77962579266SRabin Vincent }, 780f0f05b1cSArun Murthy { 7816af75ecdSLinus Walleij .name = "ab8500-charger", 7826af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_charger_resources), 7836af75ecdSLinus Walleij .resources = ab8500_charger_resources, 784e098adedSMattias Wallin }, 7856af75ecdSLinus Walleij { 7866af75ecdSLinus Walleij .name = "ab8500-btemp", 7876af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 7886af75ecdSLinus Walleij .resources = ab8500_btemp_resources, 7896af75ecdSLinus Walleij }, 7906af75ecdSLinus Walleij { 7916af75ecdSLinus Walleij .name = "ab8500-fg", 7926af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_fg_resources), 7936af75ecdSLinus Walleij .resources = ab8500_fg_resources, 7946af75ecdSLinus Walleij }, 7956af75ecdSLinus Walleij { 7966af75ecdSLinus Walleij .name = "ab8500-chargalg", 7976af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 7986af75ecdSLinus Walleij .resources = ab8500_chargalg_resources, 7996af75ecdSLinus Walleij }, 8006af75ecdSLinus Walleij { 8016af75ecdSLinus Walleij .name = "ab8500-acc-det", 8026af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 8036af75ecdSLinus Walleij .resources = ab8500_av_acc_detect_resources, 8046af75ecdSLinus Walleij }, 8056af75ecdSLinus Walleij { 8066af75ecdSLinus Walleij .name = "ab8500-codec", 8076af75ecdSLinus Walleij }, 808d6255529SLinus Walleij 809e098adedSMattias Wallin { 810e098adedSMattias Wallin .name = "ab8500-poweron-key", 811e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 812e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 813e098adedSMattias Wallin }, 814e098adedSMattias Wallin { 815f0f05b1cSArun Murthy .name = "ab8500-pwm", 816f0f05b1cSArun Murthy .id = 1, 817f0f05b1cSArun Murthy }, 818f0f05b1cSArun Murthy { 819f0f05b1cSArun Murthy .name = "ab8500-pwm", 820f0f05b1cSArun Murthy .id = 2, 821f0f05b1cSArun Murthy }, 822f0f05b1cSArun Murthy { 823f0f05b1cSArun Murthy .name = "ab8500-pwm", 824f0f05b1cSArun Murthy .id = 3, 825f0f05b1cSArun Murthy }, 826e098adedSMattias Wallin { .name = "ab8500-leds", }, 82777686517SSundar R Iyer { 828e098adedSMattias Wallin .name = "ab8500-denc", 829e098adedSMattias Wallin }, 830e098adedSMattias Wallin { 831e098adedSMattias Wallin .name = "ab8500-temp", 832e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 833e098adedSMattias Wallin .resources = ab8500_temp_resources, 83477686517SSundar R Iyer }, 83562579266SRabin Vincent }; 83662579266SRabin Vincent 837d6255529SLinus Walleij static struct mfd_cell __devinitdata ab8500_devs[] = { 838d6255529SLinus Walleij { 839d6255529SLinus Walleij .name = "ab8500-gpio", 840d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_gpio_resources), 841d6255529SLinus Walleij .resources = ab8500_gpio_resources, 842d6255529SLinus Walleij }, 843d6255529SLinus Walleij { 844d6255529SLinus Walleij .name = "ab8500-usb", 845d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 846d6255529SLinus Walleij .resources = ab8500_usb_resources, 847d6255529SLinus Walleij }, 848d6255529SLinus Walleij }; 849d6255529SLinus Walleij 850d6255529SLinus Walleij static struct mfd_cell __devinitdata ab9540_devs[] = { 851d6255529SLinus Walleij { 852d6255529SLinus Walleij .name = "ab8500-gpio", 853d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab9540_gpio_resources), 854d6255529SLinus Walleij .resources = ab9540_gpio_resources, 855d6255529SLinus Walleij }, 856d6255529SLinus Walleij { 857d6255529SLinus Walleij .name = "ab9540-usb", 858d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 859d6255529SLinus Walleij .resources = ab8500_usb_resources, 860d6255529SLinus Walleij }, 861d6255529SLinus Walleij }; 862d6255529SLinus Walleij 863cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 864cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 865cca69b67SMattias Wallin { 866cca69b67SMattias Wallin struct ab8500 *ab8500; 867cca69b67SMattias Wallin 868cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 869cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 870cca69b67SMattias Wallin } 871cca69b67SMattias Wallin 872e5c238c3SMattias Wallin /* 873e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 874e5c238c3SMattias Wallin * 0x01 Swoff bit programming 875e5c238c3SMattias Wallin * 0x02 Thermal protection activation 876e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 877e5c238c3SMattias Wallin * 0x08 Watchdog expired 878e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 879e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 880e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 881e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 882e5c238c3SMattias Wallin */ 883e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 884e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 885e5c238c3SMattias Wallin { 886e5c238c3SMattias Wallin int ret; 887e5c238c3SMattias Wallin u8 value; 888e5c238c3SMattias Wallin struct ab8500 *ab8500; 889e5c238c3SMattias Wallin 890e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 891e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 892e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 893e5c238c3SMattias Wallin if (ret < 0) 894e5c238c3SMattias Wallin return ret; 895e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 896e5c238c3SMattias Wallin } 897e5c238c3SMattias Wallin 898b4a31037SAndrew Lynn /* 899b4a31037SAndrew Lynn * ab8500 has turned on due to (TURN_ON_STATUS): 900b4a31037SAndrew Lynn * 0x01 PORnVbat 901b4a31037SAndrew Lynn * 0x02 PonKey1dbF 902b4a31037SAndrew Lynn * 0x04 PonKey2dbF 903b4a31037SAndrew Lynn * 0x08 RTCAlarm 904b4a31037SAndrew Lynn * 0x10 MainChDet 905b4a31037SAndrew Lynn * 0x20 VbusDet 906b4a31037SAndrew Lynn * 0x40 UsbIDDetect 907b4a31037SAndrew Lynn * 0x80 Reserved 908b4a31037SAndrew Lynn */ 909b4a31037SAndrew Lynn static ssize_t show_turn_on_status(struct device *dev, 910b4a31037SAndrew Lynn struct device_attribute *attr, char *buf) 911b4a31037SAndrew Lynn { 912b4a31037SAndrew Lynn int ret; 913b4a31037SAndrew Lynn u8 value; 914b4a31037SAndrew Lynn struct ab8500 *ab8500; 915b4a31037SAndrew Lynn 916b4a31037SAndrew Lynn ab8500 = dev_get_drvdata(dev); 917b4a31037SAndrew Lynn ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 918b4a31037SAndrew Lynn AB8500_TURN_ON_STATUS, &value); 919b4a31037SAndrew Lynn if (ret < 0) 920b4a31037SAndrew Lynn return ret; 921b4a31037SAndrew Lynn return sprintf(buf, "%#x\n", value); 922b4a31037SAndrew Lynn } 923b4a31037SAndrew Lynn 924d6255529SLinus Walleij static ssize_t show_ab9540_dbbrstn(struct device *dev, 925d6255529SLinus Walleij struct device_attribute *attr, char *buf) 926d6255529SLinus Walleij { 927d6255529SLinus Walleij struct ab8500 *ab8500; 928d6255529SLinus Walleij int ret; 929d6255529SLinus Walleij u8 value; 930d6255529SLinus Walleij 931d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 932d6255529SLinus Walleij 933d6255529SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 934d6255529SLinus Walleij AB9540_MODEM_CTRL2_REG, &value); 935d6255529SLinus Walleij if (ret < 0) 936d6255529SLinus Walleij return ret; 937d6255529SLinus Walleij 938d6255529SLinus Walleij return sprintf(buf, "%d\n", 939d6255529SLinus Walleij (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 940d6255529SLinus Walleij } 941d6255529SLinus Walleij 942d6255529SLinus Walleij static ssize_t store_ab9540_dbbrstn(struct device *dev, 943d6255529SLinus Walleij struct device_attribute *attr, const char *buf, size_t count) 944d6255529SLinus Walleij { 945d6255529SLinus Walleij struct ab8500 *ab8500; 946d6255529SLinus Walleij int ret = count; 947d6255529SLinus Walleij int err; 948d6255529SLinus Walleij u8 bitvalues; 949d6255529SLinus Walleij 950d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 951d6255529SLinus Walleij 952d6255529SLinus Walleij if (count > 0) { 953d6255529SLinus Walleij switch (buf[0]) { 954d6255529SLinus Walleij case '0': 955d6255529SLinus Walleij bitvalues = 0; 956d6255529SLinus Walleij break; 957d6255529SLinus Walleij case '1': 958d6255529SLinus Walleij bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 959d6255529SLinus Walleij break; 960d6255529SLinus Walleij default: 961d6255529SLinus Walleij goto exit; 962d6255529SLinus Walleij } 963d6255529SLinus Walleij 964d6255529SLinus Walleij err = mask_and_set_register_interruptible(ab8500, 965d6255529SLinus Walleij AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 966d6255529SLinus Walleij AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 967d6255529SLinus Walleij if (err) 968d6255529SLinus Walleij dev_info(ab8500->dev, 969d6255529SLinus Walleij "Failed to set DBBRSTN %c, err %#x\n", 970d6255529SLinus Walleij buf[0], err); 971d6255529SLinus Walleij } 972d6255529SLinus Walleij 973d6255529SLinus Walleij exit: 974d6255529SLinus Walleij return ret; 975d6255529SLinus Walleij } 976d6255529SLinus Walleij 977cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 978e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 979b4a31037SAndrew Lynn static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 980d6255529SLinus Walleij static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 981d6255529SLinus Walleij show_ab9540_dbbrstn, store_ab9540_dbbrstn); 982cca69b67SMattias Wallin 983cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 984cca69b67SMattias Wallin &dev_attr_chip_id.attr, 985e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 986b4a31037SAndrew Lynn &dev_attr_turn_on_status.attr, 987cca69b67SMattias Wallin NULL, 988cca69b67SMattias Wallin }; 989cca69b67SMattias Wallin 990d6255529SLinus Walleij static struct attribute *ab9540_sysfs_entries[] = { 991d6255529SLinus Walleij &dev_attr_chip_id.attr, 992d6255529SLinus Walleij &dev_attr_switch_off_status.attr, 993d6255529SLinus Walleij &dev_attr_turn_on_status.attr, 994d6255529SLinus Walleij &dev_attr_dbbrstn.attr, 995d6255529SLinus Walleij NULL, 996d6255529SLinus Walleij }; 997d6255529SLinus Walleij 998cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 999cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 1000cca69b67SMattias Wallin }; 1001cca69b67SMattias Wallin 1002d6255529SLinus Walleij static struct attribute_group ab9540_attr_group = { 1003d6255529SLinus Walleij .attrs = ab9540_sysfs_entries, 1004d6255529SLinus Walleij }; 1005d6255529SLinus Walleij 10060f620837SLinus Walleij int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) 100762579266SRabin Vincent { 100862579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 100962579266SRabin Vincent int ret; 101062579266SRabin Vincent int i; 101147c16975SMattias Wallin u8 value; 101262579266SRabin Vincent 101362579266SRabin Vincent if (plat) 101462579266SRabin Vincent ab8500->irq_base = plat->irq_base; 101562579266SRabin Vincent 101662579266SRabin Vincent mutex_init(&ab8500->lock); 101762579266SRabin Vincent mutex_init(&ab8500->irq_lock); 101862579266SRabin Vincent 10190f620837SLinus Walleij if (version != AB8500_VERSION_UNDEFINED) 10200f620837SLinus Walleij ab8500->version = version; 10210f620837SLinus Walleij else { 10220f620837SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_MISC, 10230f620837SLinus Walleij AB8500_IC_NAME_REG, &value); 10240f620837SLinus Walleij if (ret < 0) 10250f620837SLinus Walleij return ret; 10260f620837SLinus Walleij 10270f620837SLinus Walleij ab8500->version = value; 10280f620837SLinus Walleij } 10290f620837SLinus Walleij 103047c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 103147c16975SMattias Wallin AB8500_REV_REG, &value); 103262579266SRabin Vincent if (ret < 0) 103362579266SRabin Vincent return ret; 103462579266SRabin Vincent 103547c16975SMattias Wallin ab8500->chip_id = value; 103662579266SRabin Vincent 10370f620837SLinus Walleij dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 10380f620837SLinus Walleij ab8500_version_str[ab8500->version], 10390f620837SLinus Walleij ab8500->chip_id >> 4, 10400f620837SLinus Walleij ab8500->chip_id & 0x0F); 10410f620837SLinus Walleij 1042d6255529SLinus Walleij /* Configure AB8500 or AB9540 IRQ */ 1043a982362cSBengt Jonsson if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1044d6255529SLinus Walleij ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1045d6255529SLinus Walleij ab8500->irq_reg_offset = ab9540_irq_regoffset; 1046d6255529SLinus Walleij } else { 10472ced445eSLinus Walleij ab8500->mask_size = AB8500_NUM_IRQ_REGS; 10482ced445eSLinus Walleij ab8500->irq_reg_offset = ab8500_irq_regoffset; 1049d6255529SLinus Walleij } 10502ced445eSLinus Walleij ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); 10512ced445eSLinus Walleij if (!ab8500->mask) 10522ced445eSLinus Walleij return -ENOMEM; 10532ced445eSLinus Walleij ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); 10542ced445eSLinus Walleij if (!ab8500->oldmask) { 10552ced445eSLinus Walleij ret = -ENOMEM; 10562ced445eSLinus Walleij goto out_freemask; 10572ced445eSLinus Walleij } 1058e5c238c3SMattias Wallin /* 1059e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1060e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1061e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1062e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1063e5c238c3SMattias Wallin * 0x08 Watchdog expired 1064e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1065e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1066e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1067e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1068e5c238c3SMattias Wallin */ 1069e5c238c3SMattias Wallin 1070e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1071e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1072e5c238c3SMattias Wallin if (ret < 0) 1073e5c238c3SMattias Wallin return ret; 1074e5c238c3SMattias Wallin dev_info(ab8500->dev, "switch off status: %#x", value); 1075e5c238c3SMattias Wallin 107662579266SRabin Vincent if (plat && plat->init) 107762579266SRabin Vincent plat->init(ab8500); 107862579266SRabin Vincent 107962579266SRabin Vincent /* Clear and mask all interrupts */ 10802ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 10810f620837SLinus Walleij /* 10820f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 10830f620837SLinus Walleij * 2.0 10840f620837SLinus Walleij */ 10850f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 10860f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 108792d50a41SMattias Wallin continue; 108862579266SRabin Vincent 108947c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 10902ced445eSLinus Walleij AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 109192d50a41SMattias Wallin &value); 109247c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 10932ced445eSLinus Walleij AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 109462579266SRabin Vincent } 109562579266SRabin Vincent 109647c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 109747c16975SMattias Wallin if (ret) 10982ced445eSLinus Walleij goto out_freeoldmask; 109947c16975SMattias Wallin 11002ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) 110162579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 110262579266SRabin Vincent 110362579266SRabin Vincent if (ab8500->irq_base) { 110462579266SRabin Vincent ret = ab8500_irq_init(ab8500); 110562579266SRabin Vincent if (ret) 11062ced445eSLinus Walleij goto out_freeoldmask; 110762579266SRabin Vincent 110862579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 11094f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 11104f079985SMattias Wallin "ab8500", ab8500); 111162579266SRabin Vincent if (ret) 111262579266SRabin Vincent goto out_removeirq; 111362579266SRabin Vincent } 111462579266SRabin Vincent 1115d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, 1116d6255529SLinus Walleij ARRAY_SIZE(abx500_common_devs), NULL, 1117d6255529SLinus Walleij ab8500->irq_base); 1118d6255529SLinus Walleij 1119d6255529SLinus Walleij if (ret) 1120d6255529SLinus Walleij goto out_freeirq; 1121d6255529SLinus Walleij 1122d6255529SLinus Walleij if (is_ab9540(ab8500)) 1123d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1124d6255529SLinus Walleij ARRAY_SIZE(ab9540_devs), NULL, 1125d6255529SLinus Walleij ab8500->irq_base); 1126d6255529SLinus Walleij else 1127549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 1128d6255529SLinus Walleij ARRAY_SIZE(ab9540_devs), NULL, 112962579266SRabin Vincent ab8500->irq_base); 113062579266SRabin Vincent if (ret) 113162579266SRabin Vincent goto out_freeirq; 113262579266SRabin Vincent 1133d6255529SLinus Walleij if (is_ab9540(ab8500)) 1134d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1135d6255529SLinus Walleij &ab9540_attr_group); 1136d6255529SLinus Walleij else 1137d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1138d6255529SLinus Walleij &ab8500_attr_group); 1139cca69b67SMattias Wallin if (ret) 1140cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 1141d6255529SLinus Walleij else 114262579266SRabin Vincent return ret; 114362579266SRabin Vincent 114462579266SRabin Vincent out_freeirq: 11456d95b7fdSLinus Walleij if (ab8500->irq_base) 114662579266SRabin Vincent free_irq(ab8500->irq, ab8500); 114762579266SRabin Vincent out_removeirq: 11486d95b7fdSLinus Walleij if (ab8500->irq_base) 114962579266SRabin Vincent ab8500_irq_remove(ab8500); 11502ced445eSLinus Walleij out_freeoldmask: 11512ced445eSLinus Walleij kfree(ab8500->oldmask); 11522ced445eSLinus Walleij out_freemask: 11532ced445eSLinus Walleij kfree(ab8500->mask); 11546d95b7fdSLinus Walleij 115562579266SRabin Vincent return ret; 115662579266SRabin Vincent } 115762579266SRabin Vincent 115862579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 115962579266SRabin Vincent { 1160d6255529SLinus Walleij if (is_ab9540(ab8500)) 1161d6255529SLinus Walleij sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1162d6255529SLinus Walleij else 1163cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 116462579266SRabin Vincent mfd_remove_devices(ab8500->dev); 116562579266SRabin Vincent if (ab8500->irq_base) { 116662579266SRabin Vincent free_irq(ab8500->irq, ab8500); 116762579266SRabin Vincent ab8500_irq_remove(ab8500); 116862579266SRabin Vincent } 11692ced445eSLinus Walleij kfree(ab8500->oldmask); 11702ced445eSLinus Walleij kfree(ab8500->mask); 117162579266SRabin Vincent 117262579266SRabin Vincent return 0; 117362579266SRabin Vincent } 117462579266SRabin Vincent 1175adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 117662579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 117762579266SRabin Vincent MODULE_LICENSE("GPL v2"); 1178