162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7*adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 2062579266SRabin Vincent #include <linux/mfd/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 3547c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3647c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3747c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3847c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 3947c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4047c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4162579266SRabin Vincent 4262579266SRabin Vincent /* 4362579266SRabin Vincent * latch registers 4462579266SRabin Vincent */ 4547c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4647c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4747c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4847c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 4947c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5047c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5147c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5247c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5347c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5447c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5592d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 5647c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5747c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 5847c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 5947c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6047c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6147c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6262579266SRabin Vincent 6362579266SRabin Vincent /* 6462579266SRabin Vincent * mask registers 6562579266SRabin Vincent */ 6662579266SRabin Vincent 6747c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 6847c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 6947c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7047c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7147c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7247c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7347c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7447c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7547c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7647c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7747c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 7847c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 7947c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8047c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8147c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8247c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8347c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8447c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8547c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8647c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8747c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 8847c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 8947c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9047c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9162579266SRabin Vincent 9247c16975SMattias Wallin #define AB8500_REV_REG 0x80 9362579266SRabin Vincent 9462579266SRabin Vincent /* 9562579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 9662579266SRabin Vincent * numbers are indexed into this array with (num / 8). 9762579266SRabin Vincent * 9862579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 9962579266SRabin Vincent * offset 0. 10062579266SRabin Vincent */ 10162579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 10292d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 10362579266SRabin Vincent }; 10462579266SRabin Vincent 10547c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 10647c16975SMattias Wallin { 1076bce7bf1SMattias Wallin struct ab8500 *ab8500; 1086bce7bf1SMattias Wallin 1096bce7bf1SMattias Wallin if (!dev) 1106bce7bf1SMattias Wallin return -EINVAL; 1116bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1126bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 11347c16975SMattias Wallin } 11447c16975SMattias Wallin 11547c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 11647c16975SMattias Wallin u8 reg, u8 data) 11762579266SRabin Vincent { 11862579266SRabin Vincent int ret; 11947c16975SMattias Wallin /* 12047c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 12147c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 12247c16975SMattias Wallin * */ 12347c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 12462579266SRabin Vincent 12562579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 12662579266SRabin Vincent 12747c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 12847c16975SMattias Wallin if (ret) 12947c16975SMattias Wallin return ret; 13047c16975SMattias Wallin 13147c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 13247c16975SMattias Wallin if (ret < 0) 13347c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 13447c16975SMattias Wallin addr, ret); 13547c16975SMattias Wallin mutex_unlock(&ab8500->lock); 13647c16975SMattias Wallin 13747c16975SMattias Wallin return ret; 13847c16975SMattias Wallin } 13947c16975SMattias Wallin 14047c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 14147c16975SMattias Wallin u8 reg, u8 value) 14247c16975SMattias Wallin { 14347c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 14447c16975SMattias Wallin 14547c16975SMattias Wallin return set_register_interruptible(ab8500, bank, reg, value); 14647c16975SMattias Wallin } 14747c16975SMattias Wallin 14847c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 14947c16975SMattias Wallin u8 reg, u8 *value) 15047c16975SMattias Wallin { 15147c16975SMattias Wallin int ret; 15247c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 15347c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 15447c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 15547c16975SMattias Wallin 15647c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 15747c16975SMattias Wallin if (ret) 15847c16975SMattias Wallin return ret; 15947c16975SMattias Wallin 16047c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 16147c16975SMattias Wallin if (ret < 0) 16247c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 16347c16975SMattias Wallin addr, ret); 16447c16975SMattias Wallin else 16547c16975SMattias Wallin *value = ret; 16647c16975SMattias Wallin 16747c16975SMattias Wallin mutex_unlock(&ab8500->lock); 16847c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 16947c16975SMattias Wallin 17047c16975SMattias Wallin return ret; 17147c16975SMattias Wallin } 17247c16975SMattias Wallin 17347c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 17447c16975SMattias Wallin u8 reg, u8 *value) 17547c16975SMattias Wallin { 17647c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 17747c16975SMattias Wallin 17847c16975SMattias Wallin return get_register_interruptible(ab8500, bank, reg, value); 17947c16975SMattias Wallin } 18047c16975SMattias Wallin 18147c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 18247c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 18347c16975SMattias Wallin { 18447c16975SMattias Wallin int ret; 18547c16975SMattias Wallin u8 data; 18647c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 18747c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 18847c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 18947c16975SMattias Wallin 19047c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 19147c16975SMattias Wallin if (ret) 19247c16975SMattias Wallin return ret; 19347c16975SMattias Wallin 19447c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 19547c16975SMattias Wallin if (ret < 0) { 19647c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 19747c16975SMattias Wallin addr, ret); 19847c16975SMattias Wallin goto out; 19947c16975SMattias Wallin } 20047c16975SMattias Wallin 20147c16975SMattias Wallin data = (u8)ret; 20247c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 20347c16975SMattias Wallin 20462579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 20562579266SRabin Vincent if (ret < 0) 20662579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 20762579266SRabin Vincent addr, ret); 20862579266SRabin Vincent 20947c16975SMattias Wallin dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); 21062579266SRabin Vincent out: 21162579266SRabin Vincent mutex_unlock(&ab8500->lock); 21262579266SRabin Vincent return ret; 21362579266SRabin Vincent } 21447c16975SMattias Wallin 21547c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 21647c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 21747c16975SMattias Wallin { 21847c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 21947c16975SMattias Wallin 22047c16975SMattias Wallin return mask_and_set_register_interruptible(ab8500, bank, reg, 22147c16975SMattias Wallin bitmask, bitvalues); 22247c16975SMattias Wallin 22347c16975SMattias Wallin } 22447c16975SMattias Wallin 22547c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 22647c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 22747c16975SMattias Wallin .get_register = ab8500_get_register, 22847c16975SMattias Wallin .set_register = ab8500_set_register, 22947c16975SMattias Wallin .get_register_page = NULL, 23047c16975SMattias Wallin .set_register_page = NULL, 23147c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 23247c16975SMattias Wallin .event_registers_startup_state_get = NULL, 23347c16975SMattias Wallin .startup_irq_enabled = NULL, 23447c16975SMattias Wallin }; 23562579266SRabin Vincent 2369505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 23762579266SRabin Vincent { 2389505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 23962579266SRabin Vincent 24062579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 24162579266SRabin Vincent } 24262579266SRabin Vincent 2439505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 24462579266SRabin Vincent { 2459505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 24662579266SRabin Vincent int i; 24762579266SRabin Vincent 24862579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 24962579266SRabin Vincent u8 old = ab8500->oldmask[i]; 25062579266SRabin Vincent u8 new = ab8500->mask[i]; 25162579266SRabin Vincent int reg; 25262579266SRabin Vincent 25362579266SRabin Vincent if (new == old) 25462579266SRabin Vincent continue; 25562579266SRabin Vincent 25692d50a41SMattias Wallin /* Interrupt register 12 does'nt exist prior to version 0x20 */ 25792d50a41SMattias Wallin if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20) 25892d50a41SMattias Wallin continue; 25992d50a41SMattias Wallin 26062579266SRabin Vincent ab8500->oldmask[i] = new; 26162579266SRabin Vincent 26262579266SRabin Vincent reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; 26347c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 26462579266SRabin Vincent } 26562579266SRabin Vincent 26662579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 26762579266SRabin Vincent } 26862579266SRabin Vincent 2699505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 27062579266SRabin Vincent { 2719505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 2729505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 27362579266SRabin Vincent int index = offset / 8; 27462579266SRabin Vincent int mask = 1 << (offset % 8); 27562579266SRabin Vincent 27662579266SRabin Vincent ab8500->mask[index] |= mask; 27762579266SRabin Vincent } 27862579266SRabin Vincent 2799505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 28062579266SRabin Vincent { 2819505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 2829505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 28362579266SRabin Vincent int index = offset / 8; 28462579266SRabin Vincent int mask = 1 << (offset % 8); 28562579266SRabin Vincent 28662579266SRabin Vincent ab8500->mask[index] &= ~mask; 28762579266SRabin Vincent } 28862579266SRabin Vincent 28962579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 29062579266SRabin Vincent .name = "ab8500", 2919505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 2929505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 2939505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 2949505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 29562579266SRabin Vincent }; 29662579266SRabin Vincent 29762579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 29862579266SRabin Vincent { 29962579266SRabin Vincent struct ab8500 *ab8500 = dev; 30062579266SRabin Vincent int i; 30162579266SRabin Vincent 30262579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 30362579266SRabin Vincent 30462579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 30562579266SRabin Vincent int regoffset = ab8500_irq_regoffset[i]; 30662579266SRabin Vincent int status; 30747c16975SMattias Wallin u8 value; 30862579266SRabin Vincent 30992d50a41SMattias Wallin /* Interrupt register 12 does'nt exist prior to version 0x20 */ 31092d50a41SMattias Wallin if (regoffset == 11 && ab8500->chip_id < 0x20) 31192d50a41SMattias Wallin continue; 31292d50a41SMattias Wallin 31347c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 31447c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 31547c16975SMattias Wallin if (status < 0 || value == 0) 31662579266SRabin Vincent continue; 31762579266SRabin Vincent 31862579266SRabin Vincent do { 31988aec4f7SMattias Wallin int bit = __ffs(value); 32062579266SRabin Vincent int line = i * 8 + bit; 32162579266SRabin Vincent 32262579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 32347c16975SMattias Wallin value &= ~(1 << bit); 32447c16975SMattias Wallin } while (value); 32562579266SRabin Vincent } 32662579266SRabin Vincent 32762579266SRabin Vincent return IRQ_HANDLED; 32862579266SRabin Vincent } 32962579266SRabin Vincent 33062579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 33162579266SRabin Vincent { 33262579266SRabin Vincent int base = ab8500->irq_base; 33362579266SRabin Vincent int irq; 33462579266SRabin Vincent 33562579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 33662579266SRabin Vincent set_irq_chip_data(irq, ab8500); 33762579266SRabin Vincent set_irq_chip_and_handler(irq, &ab8500_irq_chip, 33862579266SRabin Vincent handle_simple_irq); 33962579266SRabin Vincent set_irq_nested_thread(irq, 1); 34062579266SRabin Vincent #ifdef CONFIG_ARM 34162579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 34262579266SRabin Vincent #else 34362579266SRabin Vincent set_irq_noprobe(irq); 34462579266SRabin Vincent #endif 34562579266SRabin Vincent } 34662579266SRabin Vincent 34762579266SRabin Vincent return 0; 34862579266SRabin Vincent } 34962579266SRabin Vincent 35062579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 35162579266SRabin Vincent { 35262579266SRabin Vincent int base = ab8500->irq_base; 35362579266SRabin Vincent int irq; 35462579266SRabin Vincent 35562579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 35662579266SRabin Vincent #ifdef CONFIG_ARM 35762579266SRabin Vincent set_irq_flags(irq, 0); 35862579266SRabin Vincent #endif 35962579266SRabin Vincent set_irq_chip_and_handler(irq, NULL, NULL); 36062579266SRabin Vincent set_irq_chip_data(irq, NULL); 36162579266SRabin Vincent } 36262579266SRabin Vincent } 36362579266SRabin Vincent 36462579266SRabin Vincent static struct resource ab8500_gpadc_resources[] = { 36562579266SRabin Vincent { 36662579266SRabin Vincent .name = "HW_CONV_END", 36762579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 36862579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 36962579266SRabin Vincent .flags = IORESOURCE_IRQ, 37062579266SRabin Vincent }, 37162579266SRabin Vincent { 37262579266SRabin Vincent .name = "SW_CONV_END", 37362579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 37462579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 37562579266SRabin Vincent .flags = IORESOURCE_IRQ, 37662579266SRabin Vincent }, 37762579266SRabin Vincent }; 37862579266SRabin Vincent 37962579266SRabin Vincent static struct resource ab8500_rtc_resources[] = { 38062579266SRabin Vincent { 38162579266SRabin Vincent .name = "60S", 38262579266SRabin Vincent .start = AB8500_INT_RTC_60S, 38362579266SRabin Vincent .end = AB8500_INT_RTC_60S, 38462579266SRabin Vincent .flags = IORESOURCE_IRQ, 38562579266SRabin Vincent }, 38662579266SRabin Vincent { 38762579266SRabin Vincent .name = "ALARM", 38862579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 38962579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 39062579266SRabin Vincent .flags = IORESOURCE_IRQ, 39162579266SRabin Vincent }, 39262579266SRabin Vincent }; 39362579266SRabin Vincent 39477686517SSundar R Iyer static struct resource ab8500_poweronkey_db_resources[] = { 39577686517SSundar R Iyer { 39677686517SSundar R Iyer .name = "ONKEY_DBF", 39777686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 39877686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 39977686517SSundar R Iyer .flags = IORESOURCE_IRQ, 40077686517SSundar R Iyer }, 40177686517SSundar R Iyer { 40277686517SSundar R Iyer .name = "ONKEY_DBR", 40377686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 40477686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 40577686517SSundar R Iyer .flags = IORESOURCE_IRQ, 40677686517SSundar R Iyer }, 40777686517SSundar R Iyer }; 40877686517SSundar R Iyer 409e098adedSMattias Wallin static struct resource ab8500_bm_resources[] = { 410e098adedSMattias Wallin { 411e098adedSMattias Wallin .name = "MAIN_EXT_CH_NOT_OK", 412e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 413e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 414e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 415e098adedSMattias Wallin }, 416e098adedSMattias Wallin { 417e098adedSMattias Wallin .name = "BATT_OVV", 418e098adedSMattias Wallin .start = AB8500_INT_BATT_OVV, 419e098adedSMattias Wallin .end = AB8500_INT_BATT_OVV, 420e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 421e098adedSMattias Wallin }, 422e098adedSMattias Wallin { 423e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 424e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 425e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 426e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 427e098adedSMattias Wallin }, 428e098adedSMattias Wallin { 429e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 430e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 431e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 432e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 433e098adedSMattias Wallin }, 434e098adedSMattias Wallin { 435e098adedSMattias Wallin .name = "VBUS_DET_F", 436e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 437e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 438e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 439e098adedSMattias Wallin }, 440e098adedSMattias Wallin { 441e098adedSMattias Wallin .name = "VBUS_DET_R", 442e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 443e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 444e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 445e098adedSMattias Wallin }, 446e098adedSMattias Wallin { 447e098adedSMattias Wallin .name = "BAT_CTRL_INDB", 448e098adedSMattias Wallin .start = AB8500_INT_BAT_CTRL_INDB, 449e098adedSMattias Wallin .end = AB8500_INT_BAT_CTRL_INDB, 450e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 451e098adedSMattias Wallin }, 452e098adedSMattias Wallin { 453e098adedSMattias Wallin .name = "CH_WD_EXP", 454e098adedSMattias Wallin .start = AB8500_INT_CH_WD_EXP, 455e098adedSMattias Wallin .end = AB8500_INT_CH_WD_EXP, 456e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 457e098adedSMattias Wallin }, 458e098adedSMattias Wallin { 459e098adedSMattias Wallin .name = "VBUS_OVV", 460e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 461e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 462e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 463e098adedSMattias Wallin }, 464e098adedSMattias Wallin { 465e098adedSMattias Wallin .name = "NCONV_ACCU", 466e098adedSMattias Wallin .start = AB8500_INT_CCN_CONV_ACC, 467e098adedSMattias Wallin .end = AB8500_INT_CCN_CONV_ACC, 468e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 469e098adedSMattias Wallin }, 470e098adedSMattias Wallin { 471e098adedSMattias Wallin .name = "LOW_BAT_F", 472e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_F, 473e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_F, 474e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 475e098adedSMattias Wallin }, 476e098adedSMattias Wallin { 477e098adedSMattias Wallin .name = "LOW_BAT_R", 478e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_R, 479e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_R, 480e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 481e098adedSMattias Wallin }, 482e098adedSMattias Wallin { 483e098adedSMattias Wallin .name = "BTEMP_LOW", 484e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 485e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 486e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 487e098adedSMattias Wallin }, 488e098adedSMattias Wallin { 489e098adedSMattias Wallin .name = "BTEMP_HIGH", 490e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 491e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 492e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 493e098adedSMattias Wallin }, 494e098adedSMattias Wallin { 495e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKR", 496e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OK, 497e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OK, 498e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 499e098adedSMattias Wallin }, 500e098adedSMattias Wallin { 501e098adedSMattias Wallin .name = "USB_CHARGE_DET_DONE", 502e098adedSMattias Wallin .start = AB8500_INT_USB_CHG_DET_DONE, 503e098adedSMattias Wallin .end = AB8500_INT_USB_CHG_DET_DONE, 504e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 505e098adedSMattias Wallin }, 506e098adedSMattias Wallin { 507e098adedSMattias Wallin .name = "USB_CH_TH_PROT_R", 508e098adedSMattias Wallin .start = AB8500_INT_USB_CH_TH_PROT_R, 509e098adedSMattias Wallin .end = AB8500_INT_USB_CH_TH_PROT_R, 510e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 511e098adedSMattias Wallin }, 512e098adedSMattias Wallin { 513e098adedSMattias Wallin .name = "MAIN_CH_TH_PROT_R", 514e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_TH_PROT_R, 515e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_TH_PROT_R, 516e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 517e098adedSMattias Wallin }, 518e098adedSMattias Wallin { 519e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKF", 520e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 521e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 522e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 523e098adedSMattias Wallin }, 524e098adedSMattias Wallin }; 525e098adedSMattias Wallin 526e098adedSMattias Wallin static struct resource ab8500_debug_resources[] = { 527e098adedSMattias Wallin { 528e098adedSMattias Wallin .name = "IRQ_FIRST", 529e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 530e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 531e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 532e098adedSMattias Wallin }, 533e098adedSMattias Wallin { 534e098adedSMattias Wallin .name = "IRQ_LAST", 535e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 536e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 537e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 538e098adedSMattias Wallin }, 539e098adedSMattias Wallin }; 540e098adedSMattias Wallin 541e098adedSMattias Wallin static struct resource ab8500_usb_resources[] = { 542e098adedSMattias Wallin { 543e098adedSMattias Wallin .name = "ID_WAKEUP_R", 544e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 545e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 546e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 547e098adedSMattias Wallin }, 548e098adedSMattias Wallin { 549e098adedSMattias Wallin .name = "ID_WAKEUP_F", 550e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 551e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 552e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 553e098adedSMattias Wallin }, 554e098adedSMattias Wallin { 555e098adedSMattias Wallin .name = "VBUS_DET_F", 556e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 557e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 558e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 559e098adedSMattias Wallin }, 560e098adedSMattias Wallin { 561e098adedSMattias Wallin .name = "VBUS_DET_R", 562e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 563e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 564e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 565e098adedSMattias Wallin }, 56692d50a41SMattias Wallin { 56792d50a41SMattias Wallin .name = "USB_LINK_STATUS", 56892d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 56992d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 57092d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 57192d50a41SMattias Wallin }, 572e098adedSMattias Wallin }; 573e098adedSMattias Wallin 574e098adedSMattias Wallin static struct resource ab8500_temp_resources[] = { 575e098adedSMattias Wallin { 576e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 577e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 578e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 579e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 580e098adedSMattias Wallin }, 581e098adedSMattias Wallin }; 582e098adedSMattias Wallin 58362579266SRabin Vincent static struct mfd_cell ab8500_devs[] = { 5845814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 5855814fc35SMattias Wallin { 5865814fc35SMattias Wallin .name = "ab8500-debug", 587e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 588e098adedSMattias Wallin .resources = ab8500_debug_resources, 5895814fc35SMattias Wallin }, 5905814fc35SMattias Wallin #endif 59162579266SRabin Vincent { 592e098adedSMattias Wallin .name = "ab8500-sysctrl", 593e098adedSMattias Wallin }, 594e098adedSMattias Wallin { 595e098adedSMattias Wallin .name = "ab8500-regulator", 596e098adedSMattias Wallin }, 597e098adedSMattias Wallin { 59862579266SRabin Vincent .name = "ab8500-gpadc", 59962579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 60062579266SRabin Vincent .resources = ab8500_gpadc_resources, 60162579266SRabin Vincent }, 60262579266SRabin Vincent { 60362579266SRabin Vincent .name = "ab8500-rtc", 60462579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 60562579266SRabin Vincent .resources = ab8500_rtc_resources, 60662579266SRabin Vincent }, 607f0f05b1cSArun Murthy { 608e098adedSMattias Wallin .name = "ab8500-bm", 609e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_bm_resources), 610e098adedSMattias Wallin .resources = ab8500_bm_resources, 611e098adedSMattias Wallin }, 612e098adedSMattias Wallin { .name = "ab8500-codec", }, 613e098adedSMattias Wallin { 614e098adedSMattias Wallin .name = "ab8500-usb", 615e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_usb_resources), 616e098adedSMattias Wallin .resources = ab8500_usb_resources, 617e098adedSMattias Wallin }, 618e098adedSMattias Wallin { 619e098adedSMattias Wallin .name = "ab8500-poweron-key", 620e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 621e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 622e098adedSMattias Wallin }, 623e098adedSMattias Wallin { 624f0f05b1cSArun Murthy .name = "ab8500-pwm", 625f0f05b1cSArun Murthy .id = 1, 626f0f05b1cSArun Murthy }, 627f0f05b1cSArun Murthy { 628f0f05b1cSArun Murthy .name = "ab8500-pwm", 629f0f05b1cSArun Murthy .id = 2, 630f0f05b1cSArun Murthy }, 631f0f05b1cSArun Murthy { 632f0f05b1cSArun Murthy .name = "ab8500-pwm", 633f0f05b1cSArun Murthy .id = 3, 634f0f05b1cSArun Murthy }, 635e098adedSMattias Wallin { .name = "ab8500-leds", }, 63677686517SSundar R Iyer { 637e098adedSMattias Wallin .name = "ab8500-denc", 638e098adedSMattias Wallin }, 639e098adedSMattias Wallin { 640e098adedSMattias Wallin .name = "ab8500-temp", 641e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 642e098adedSMattias Wallin .resources = ab8500_temp_resources, 64377686517SSundar R Iyer }, 64462579266SRabin Vincent }; 64562579266SRabin Vincent 646cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 647cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 648cca69b67SMattias Wallin { 649cca69b67SMattias Wallin struct ab8500 *ab8500; 650cca69b67SMattias Wallin 651cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 652cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 653cca69b67SMattias Wallin } 654cca69b67SMattias Wallin 655cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 656cca69b67SMattias Wallin 657cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 658cca69b67SMattias Wallin &dev_attr_chip_id.attr, 659cca69b67SMattias Wallin NULL, 660cca69b67SMattias Wallin }; 661cca69b67SMattias Wallin 662cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 663cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 664cca69b67SMattias Wallin }; 665cca69b67SMattias Wallin 66662579266SRabin Vincent int __devinit ab8500_init(struct ab8500 *ab8500) 66762579266SRabin Vincent { 66862579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 66962579266SRabin Vincent int ret; 67062579266SRabin Vincent int i; 67147c16975SMattias Wallin u8 value; 67262579266SRabin Vincent 67362579266SRabin Vincent if (plat) 67462579266SRabin Vincent ab8500->irq_base = plat->irq_base; 67562579266SRabin Vincent 67662579266SRabin Vincent mutex_init(&ab8500->lock); 67762579266SRabin Vincent mutex_init(&ab8500->irq_lock); 67862579266SRabin Vincent 67947c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 68047c16975SMattias Wallin AB8500_REV_REG, &value); 68162579266SRabin Vincent if (ret < 0) 68262579266SRabin Vincent return ret; 68362579266SRabin Vincent 68462579266SRabin Vincent /* 68562579266SRabin Vincent * 0x0 - Early Drop 68662579266SRabin Vincent * 0x10 - Cut 1.0 68762579266SRabin Vincent * 0x11 - Cut 1.1 68892d50a41SMattias Wallin * 0x20 - Cut 2.0 689*adceed62SMattias Wallin * 0x30 - Cut 3.0 69062579266SRabin Vincent */ 691*adceed62SMattias Wallin if (value == 0x0 || value == 0x10 || value == 0x11 || value == 0x20 || 692*adceed62SMattias Wallin value == 0x30) { 69347c16975SMattias Wallin dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); 69462579266SRabin Vincent } else { 69547c16975SMattias Wallin dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); 69662579266SRabin Vincent return -EINVAL; 69762579266SRabin Vincent } 69847c16975SMattias Wallin ab8500->chip_id = value; 69962579266SRabin Vincent 70062579266SRabin Vincent if (plat && plat->init) 70162579266SRabin Vincent plat->init(ab8500); 70262579266SRabin Vincent 70362579266SRabin Vincent /* Clear and mask all interrupts */ 70492d50a41SMattias Wallin for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 70592d50a41SMattias Wallin /* Interrupt register 12 does'nt exist prior to version 0x20 */ 70692d50a41SMattias Wallin if (ab8500_irq_regoffset[i] == 11 && ab8500->chip_id < 0x20) 70792d50a41SMattias Wallin continue; 70862579266SRabin Vincent 70947c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 71092d50a41SMattias Wallin AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i], 71192d50a41SMattias Wallin &value); 71247c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 71392d50a41SMattias Wallin AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff); 71462579266SRabin Vincent } 71562579266SRabin Vincent 71647c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 71747c16975SMattias Wallin if (ret) 71847c16975SMattias Wallin return ret; 71947c16975SMattias Wallin 72062579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) 72162579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 72262579266SRabin Vincent 72362579266SRabin Vincent if (ab8500->irq_base) { 72462579266SRabin Vincent ret = ab8500_irq_init(ab8500); 72562579266SRabin Vincent if (ret) 72662579266SRabin Vincent return ret; 72762579266SRabin Vincent 72862579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 7294f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 7304f079985SMattias Wallin "ab8500", ab8500); 73162579266SRabin Vincent if (ret) 73262579266SRabin Vincent goto out_removeirq; 73362579266SRabin Vincent } 73462579266SRabin Vincent 735549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 73662579266SRabin Vincent ARRAY_SIZE(ab8500_devs), NULL, 73762579266SRabin Vincent ab8500->irq_base); 73862579266SRabin Vincent if (ret) 73962579266SRabin Vincent goto out_freeirq; 74062579266SRabin Vincent 741cca69b67SMattias Wallin ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group); 742cca69b67SMattias Wallin if (ret) 743cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 744cca69b67SMattias Wallin 74562579266SRabin Vincent return ret; 74662579266SRabin Vincent 74762579266SRabin Vincent out_freeirq: 74862579266SRabin Vincent if (ab8500->irq_base) { 74962579266SRabin Vincent free_irq(ab8500->irq, ab8500); 75062579266SRabin Vincent out_removeirq: 75162579266SRabin Vincent ab8500_irq_remove(ab8500); 75262579266SRabin Vincent } 75362579266SRabin Vincent return ret; 75462579266SRabin Vincent } 75562579266SRabin Vincent 75662579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 75762579266SRabin Vincent { 758cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 75962579266SRabin Vincent mfd_remove_devices(ab8500->dev); 76062579266SRabin Vincent if (ab8500->irq_base) { 76162579266SRabin Vincent free_irq(ab8500->irq, ab8500); 76262579266SRabin Vincent ab8500_irq_remove(ab8500); 76362579266SRabin Vincent } 76462579266SRabin Vincent 76562579266SRabin Vincent return 0; 76662579266SRabin Vincent } 76762579266SRabin Vincent 768*adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 76962579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 77062579266SRabin Vincent MODULE_LICENSE("GPL v2"); 771