162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 747c16975SMattias Wallin * Changes: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 2062579266SRabin Vincent #include <linux/mfd/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 3547c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3647c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3747c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3847c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 3947c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4047c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4162579266SRabin Vincent 4262579266SRabin Vincent /* 4362579266SRabin Vincent * latch registers 4462579266SRabin Vincent */ 4547c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4647c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4747c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4847c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 4947c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5047c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5147c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5247c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5347c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5447c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5547c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5647c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 5747c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 5847c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 5947c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6047c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6162579266SRabin Vincent 6262579266SRabin Vincent /* 6362579266SRabin Vincent * mask registers 6462579266SRabin Vincent */ 6562579266SRabin Vincent 6647c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 6747c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 6847c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 6947c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7047c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7147c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7247c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7347c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7447c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7547c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7647c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 7747c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 7847c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 7947c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8047c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8147c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8247c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8347c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8447c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8547c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8647c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 8747c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 8847c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 8947c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9062579266SRabin Vincent 9147c16975SMattias Wallin #define AB8500_REV_REG 0x80 9262579266SRabin Vincent 9362579266SRabin Vincent /* 9462579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 9562579266SRabin Vincent * numbers are indexed into this array with (num / 8). 9662579266SRabin Vincent * 9762579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 9862579266SRabin Vincent * offset 0. 9962579266SRabin Vincent */ 10062579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 10162579266SRabin Vincent 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21, 10262579266SRabin Vincent }; 10362579266SRabin Vincent 10447c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 10547c16975SMattias Wallin { 1066bce7bf1SMattias Wallin struct ab8500 *ab8500; 1076bce7bf1SMattias Wallin 1086bce7bf1SMattias Wallin if (!dev) 1096bce7bf1SMattias Wallin return -EINVAL; 1106bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1116bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 11247c16975SMattias Wallin } 11347c16975SMattias Wallin 11447c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 11547c16975SMattias Wallin u8 reg, u8 data) 11662579266SRabin Vincent { 11762579266SRabin Vincent int ret; 11847c16975SMattias Wallin /* 11947c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 12047c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 12147c16975SMattias Wallin * */ 12247c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 12362579266SRabin Vincent 12462579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 12562579266SRabin Vincent 12647c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 12747c16975SMattias Wallin if (ret) 12847c16975SMattias Wallin return ret; 12947c16975SMattias Wallin 13047c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 13147c16975SMattias Wallin if (ret < 0) 13247c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 13347c16975SMattias Wallin addr, ret); 13447c16975SMattias Wallin mutex_unlock(&ab8500->lock); 13547c16975SMattias Wallin 13647c16975SMattias Wallin return ret; 13747c16975SMattias Wallin } 13847c16975SMattias Wallin 13947c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 14047c16975SMattias Wallin u8 reg, u8 value) 14147c16975SMattias Wallin { 14247c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 14347c16975SMattias Wallin 14447c16975SMattias Wallin return set_register_interruptible(ab8500, bank, reg, value); 14547c16975SMattias Wallin } 14647c16975SMattias Wallin 14747c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 14847c16975SMattias Wallin u8 reg, u8 *value) 14947c16975SMattias Wallin { 15047c16975SMattias Wallin int ret; 15147c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 15247c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 15347c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 15447c16975SMattias Wallin 15547c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 15647c16975SMattias Wallin if (ret) 15747c16975SMattias Wallin return ret; 15847c16975SMattias Wallin 15947c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 16047c16975SMattias Wallin if (ret < 0) 16147c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 16247c16975SMattias Wallin addr, ret); 16347c16975SMattias Wallin else 16447c16975SMattias Wallin *value = ret; 16547c16975SMattias Wallin 16647c16975SMattias Wallin mutex_unlock(&ab8500->lock); 16747c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 16847c16975SMattias Wallin 16947c16975SMattias Wallin return ret; 17047c16975SMattias Wallin } 17147c16975SMattias Wallin 17247c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 17347c16975SMattias Wallin u8 reg, u8 *value) 17447c16975SMattias Wallin { 17547c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 17647c16975SMattias Wallin 17747c16975SMattias Wallin return get_register_interruptible(ab8500, bank, reg, value); 17847c16975SMattias Wallin } 17947c16975SMattias Wallin 18047c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 18147c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 18247c16975SMattias Wallin { 18347c16975SMattias Wallin int ret; 18447c16975SMattias Wallin u8 data; 18547c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 18647c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 18747c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 18847c16975SMattias Wallin 18947c16975SMattias Wallin ret = mutex_lock_interruptible(&ab8500->lock); 19047c16975SMattias Wallin if (ret) 19147c16975SMattias Wallin return ret; 19247c16975SMattias Wallin 19347c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 19447c16975SMattias Wallin if (ret < 0) { 19547c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 19647c16975SMattias Wallin addr, ret); 19747c16975SMattias Wallin goto out; 19847c16975SMattias Wallin } 19947c16975SMattias Wallin 20047c16975SMattias Wallin data = (u8)ret; 20147c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 20247c16975SMattias Wallin 20362579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 20462579266SRabin Vincent if (ret < 0) 20562579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 20662579266SRabin Vincent addr, ret); 20762579266SRabin Vincent 20847c16975SMattias Wallin dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data); 20962579266SRabin Vincent out: 21062579266SRabin Vincent mutex_unlock(&ab8500->lock); 21162579266SRabin Vincent return ret; 21262579266SRabin Vincent } 21347c16975SMattias Wallin 21447c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 21547c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 21647c16975SMattias Wallin { 21747c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 21847c16975SMattias Wallin 21947c16975SMattias Wallin return mask_and_set_register_interruptible(ab8500, bank, reg, 22047c16975SMattias Wallin bitmask, bitvalues); 22147c16975SMattias Wallin 22247c16975SMattias Wallin } 22347c16975SMattias Wallin 22447c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 22547c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 22647c16975SMattias Wallin .get_register = ab8500_get_register, 22747c16975SMattias Wallin .set_register = ab8500_set_register, 22847c16975SMattias Wallin .get_register_page = NULL, 22947c16975SMattias Wallin .set_register_page = NULL, 23047c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 23147c16975SMattias Wallin .event_registers_startup_state_get = NULL, 23247c16975SMattias Wallin .startup_irq_enabled = NULL, 23347c16975SMattias Wallin }; 23462579266SRabin Vincent 235*9505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 23662579266SRabin Vincent { 237*9505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 23862579266SRabin Vincent 23962579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 24062579266SRabin Vincent } 24162579266SRabin Vincent 242*9505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 24362579266SRabin Vincent { 244*9505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 24562579266SRabin Vincent int i; 24662579266SRabin Vincent 24762579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 24862579266SRabin Vincent u8 old = ab8500->oldmask[i]; 24962579266SRabin Vincent u8 new = ab8500->mask[i]; 25062579266SRabin Vincent int reg; 25162579266SRabin Vincent 25262579266SRabin Vincent if (new == old) 25362579266SRabin Vincent continue; 25462579266SRabin Vincent 25562579266SRabin Vincent ab8500->oldmask[i] = new; 25662579266SRabin Vincent 25762579266SRabin Vincent reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i]; 25847c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 25962579266SRabin Vincent } 26062579266SRabin Vincent 26162579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 26262579266SRabin Vincent } 26362579266SRabin Vincent 264*9505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 26562579266SRabin Vincent { 266*9505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 267*9505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 26862579266SRabin Vincent int index = offset / 8; 26962579266SRabin Vincent int mask = 1 << (offset % 8); 27062579266SRabin Vincent 27162579266SRabin Vincent ab8500->mask[index] |= mask; 27262579266SRabin Vincent } 27362579266SRabin Vincent 274*9505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 27562579266SRabin Vincent { 276*9505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 277*9505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 27862579266SRabin Vincent int index = offset / 8; 27962579266SRabin Vincent int mask = 1 << (offset % 8); 28062579266SRabin Vincent 28162579266SRabin Vincent ab8500->mask[index] &= ~mask; 28262579266SRabin Vincent } 28362579266SRabin Vincent 28462579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 28562579266SRabin Vincent .name = "ab8500", 286*9505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 287*9505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 288*9505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 289*9505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 29062579266SRabin Vincent }; 29162579266SRabin Vincent 29262579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 29362579266SRabin Vincent { 29462579266SRabin Vincent struct ab8500 *ab8500 = dev; 29562579266SRabin Vincent int i; 29662579266SRabin Vincent 29762579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 29862579266SRabin Vincent 29962579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) { 30062579266SRabin Vincent int regoffset = ab8500_irq_regoffset[i]; 30162579266SRabin Vincent int status; 30247c16975SMattias Wallin u8 value; 30362579266SRabin Vincent 30447c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 30547c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 30647c16975SMattias Wallin if (status < 0 || value == 0) 30762579266SRabin Vincent continue; 30862579266SRabin Vincent 30962579266SRabin Vincent do { 31088aec4f7SMattias Wallin int bit = __ffs(value); 31162579266SRabin Vincent int line = i * 8 + bit; 31262579266SRabin Vincent 31362579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 31447c16975SMattias Wallin value &= ~(1 << bit); 31547c16975SMattias Wallin } while (value); 31662579266SRabin Vincent } 31762579266SRabin Vincent 31862579266SRabin Vincent return IRQ_HANDLED; 31962579266SRabin Vincent } 32062579266SRabin Vincent 32162579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 32262579266SRabin Vincent { 32362579266SRabin Vincent int base = ab8500->irq_base; 32462579266SRabin Vincent int irq; 32562579266SRabin Vincent 32662579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 32762579266SRabin Vincent set_irq_chip_data(irq, ab8500); 32862579266SRabin Vincent set_irq_chip_and_handler(irq, &ab8500_irq_chip, 32962579266SRabin Vincent handle_simple_irq); 33062579266SRabin Vincent set_irq_nested_thread(irq, 1); 33162579266SRabin Vincent #ifdef CONFIG_ARM 33262579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 33362579266SRabin Vincent #else 33462579266SRabin Vincent set_irq_noprobe(irq); 33562579266SRabin Vincent #endif 33662579266SRabin Vincent } 33762579266SRabin Vincent 33862579266SRabin Vincent return 0; 33962579266SRabin Vincent } 34062579266SRabin Vincent 34162579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 34262579266SRabin Vincent { 34362579266SRabin Vincent int base = ab8500->irq_base; 34462579266SRabin Vincent int irq; 34562579266SRabin Vincent 34662579266SRabin Vincent for (irq = base; irq < base + AB8500_NR_IRQS; irq++) { 34762579266SRabin Vincent #ifdef CONFIG_ARM 34862579266SRabin Vincent set_irq_flags(irq, 0); 34962579266SRabin Vincent #endif 35062579266SRabin Vincent set_irq_chip_and_handler(irq, NULL, NULL); 35162579266SRabin Vincent set_irq_chip_data(irq, NULL); 35262579266SRabin Vincent } 35362579266SRabin Vincent } 35462579266SRabin Vincent 35562579266SRabin Vincent static struct resource ab8500_gpadc_resources[] = { 35662579266SRabin Vincent { 35762579266SRabin Vincent .name = "HW_CONV_END", 35862579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 35962579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 36062579266SRabin Vincent .flags = IORESOURCE_IRQ, 36162579266SRabin Vincent }, 36262579266SRabin Vincent { 36362579266SRabin Vincent .name = "SW_CONV_END", 36462579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 36562579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 36662579266SRabin Vincent .flags = IORESOURCE_IRQ, 36762579266SRabin Vincent }, 36862579266SRabin Vincent }; 36962579266SRabin Vincent 37062579266SRabin Vincent static struct resource ab8500_rtc_resources[] = { 37162579266SRabin Vincent { 37262579266SRabin Vincent .name = "60S", 37362579266SRabin Vincent .start = AB8500_INT_RTC_60S, 37462579266SRabin Vincent .end = AB8500_INT_RTC_60S, 37562579266SRabin Vincent .flags = IORESOURCE_IRQ, 37662579266SRabin Vincent }, 37762579266SRabin Vincent { 37862579266SRabin Vincent .name = "ALARM", 37962579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 38062579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 38162579266SRabin Vincent .flags = IORESOURCE_IRQ, 38262579266SRabin Vincent }, 38362579266SRabin Vincent }; 38462579266SRabin Vincent 38577686517SSundar R Iyer static struct resource ab8500_poweronkey_db_resources[] = { 38677686517SSundar R Iyer { 38777686517SSundar R Iyer .name = "ONKEY_DBF", 38877686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 38977686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 39077686517SSundar R Iyer .flags = IORESOURCE_IRQ, 39177686517SSundar R Iyer }, 39277686517SSundar R Iyer { 39377686517SSundar R Iyer .name = "ONKEY_DBR", 39477686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 39577686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 39677686517SSundar R Iyer .flags = IORESOURCE_IRQ, 39777686517SSundar R Iyer }, 39877686517SSundar R Iyer }; 39977686517SSundar R Iyer 400e098adedSMattias Wallin static struct resource ab8500_bm_resources[] = { 401e098adedSMattias Wallin { 402e098adedSMattias Wallin .name = "MAIN_EXT_CH_NOT_OK", 403e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 404e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 405e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 406e098adedSMattias Wallin }, 407e098adedSMattias Wallin { 408e098adedSMattias Wallin .name = "BATT_OVV", 409e098adedSMattias Wallin .start = AB8500_INT_BATT_OVV, 410e098adedSMattias Wallin .end = AB8500_INT_BATT_OVV, 411e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 412e098adedSMattias Wallin }, 413e098adedSMattias Wallin { 414e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 415e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 416e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 417e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 418e098adedSMattias Wallin }, 419e098adedSMattias Wallin { 420e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 421e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 422e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 423e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 424e098adedSMattias Wallin }, 425e098adedSMattias Wallin { 426e098adedSMattias Wallin .name = "VBUS_DET_F", 427e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 428e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 429e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 430e098adedSMattias Wallin }, 431e098adedSMattias Wallin { 432e098adedSMattias Wallin .name = "VBUS_DET_R", 433e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 434e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 435e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 436e098adedSMattias Wallin }, 437e098adedSMattias Wallin { 438e098adedSMattias Wallin .name = "BAT_CTRL_INDB", 439e098adedSMattias Wallin .start = AB8500_INT_BAT_CTRL_INDB, 440e098adedSMattias Wallin .end = AB8500_INT_BAT_CTRL_INDB, 441e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 442e098adedSMattias Wallin }, 443e098adedSMattias Wallin { 444e098adedSMattias Wallin .name = "CH_WD_EXP", 445e098adedSMattias Wallin .start = AB8500_INT_CH_WD_EXP, 446e098adedSMattias Wallin .end = AB8500_INT_CH_WD_EXP, 447e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 448e098adedSMattias Wallin }, 449e098adedSMattias Wallin { 450e098adedSMattias Wallin .name = "VBUS_OVV", 451e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 452e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 453e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 454e098adedSMattias Wallin }, 455e098adedSMattias Wallin { 456e098adedSMattias Wallin .name = "NCONV_ACCU", 457e098adedSMattias Wallin .start = AB8500_INT_CCN_CONV_ACC, 458e098adedSMattias Wallin .end = AB8500_INT_CCN_CONV_ACC, 459e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 460e098adedSMattias Wallin }, 461e098adedSMattias Wallin { 462e098adedSMattias Wallin .name = "LOW_BAT_F", 463e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_F, 464e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_F, 465e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 466e098adedSMattias Wallin }, 467e098adedSMattias Wallin { 468e098adedSMattias Wallin .name = "LOW_BAT_R", 469e098adedSMattias Wallin .start = AB8500_INT_LOW_BAT_R, 470e098adedSMattias Wallin .end = AB8500_INT_LOW_BAT_R, 471e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 472e098adedSMattias Wallin }, 473e098adedSMattias Wallin { 474e098adedSMattias Wallin .name = "BTEMP_LOW", 475e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 476e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 477e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 478e098adedSMattias Wallin }, 479e098adedSMattias Wallin { 480e098adedSMattias Wallin .name = "BTEMP_HIGH", 481e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 482e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 483e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 484e098adedSMattias Wallin }, 485e098adedSMattias Wallin { 486e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKR", 487e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OK, 488e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OK, 489e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 490e098adedSMattias Wallin }, 491e098adedSMattias Wallin { 492e098adedSMattias Wallin .name = "USB_CHARGE_DET_DONE", 493e098adedSMattias Wallin .start = AB8500_INT_USB_CHG_DET_DONE, 494e098adedSMattias Wallin .end = AB8500_INT_USB_CHG_DET_DONE, 495e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 496e098adedSMattias Wallin }, 497e098adedSMattias Wallin { 498e098adedSMattias Wallin .name = "USB_CH_TH_PROT_R", 499e098adedSMattias Wallin .start = AB8500_INT_USB_CH_TH_PROT_R, 500e098adedSMattias Wallin .end = AB8500_INT_USB_CH_TH_PROT_R, 501e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 502e098adedSMattias Wallin }, 503e098adedSMattias Wallin { 504e098adedSMattias Wallin .name = "MAIN_CH_TH_PROT_R", 505e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_TH_PROT_R, 506e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_TH_PROT_R, 507e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 508e098adedSMattias Wallin }, 509e098adedSMattias Wallin { 510e098adedSMattias Wallin .name = "USB_CHARGER_NOT_OKF", 511e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 512e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 513e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 514e098adedSMattias Wallin }, 515e098adedSMattias Wallin }; 516e098adedSMattias Wallin 517e098adedSMattias Wallin static struct resource ab8500_debug_resources[] = { 518e098adedSMattias Wallin { 519e098adedSMattias Wallin .name = "IRQ_FIRST", 520e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 521e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 522e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 523e098adedSMattias Wallin }, 524e098adedSMattias Wallin { 525e098adedSMattias Wallin .name = "IRQ_LAST", 526e098adedSMattias Wallin .start = AB8500_INT_USB_CHARGER_NOT_OKF, 527e098adedSMattias Wallin .end = AB8500_INT_USB_CHARGER_NOT_OKF, 528e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 529e098adedSMattias Wallin }, 530e098adedSMattias Wallin }; 531e098adedSMattias Wallin 532e098adedSMattias Wallin static struct resource ab8500_usb_resources[] = { 533e098adedSMattias Wallin { 534e098adedSMattias Wallin .name = "ID_WAKEUP_R", 535e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 536e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 537e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 538e098adedSMattias Wallin }, 539e098adedSMattias Wallin { 540e098adedSMattias Wallin .name = "ID_WAKEUP_F", 541e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 542e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 543e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 544e098adedSMattias Wallin }, 545e098adedSMattias Wallin { 546e098adedSMattias Wallin .name = "VBUS_DET_F", 547e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 548e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 549e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 550e098adedSMattias Wallin }, 551e098adedSMattias Wallin { 552e098adedSMattias Wallin .name = "VBUS_DET_R", 553e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 554e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 555e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 556e098adedSMattias Wallin }, 557e098adedSMattias Wallin }; 558e098adedSMattias Wallin 559e098adedSMattias Wallin static struct resource ab8500_temp_resources[] = { 560e098adedSMattias Wallin { 561e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 562e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 563e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 564e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 565e098adedSMattias Wallin }, 566e098adedSMattias Wallin }; 567e098adedSMattias Wallin 56862579266SRabin Vincent static struct mfd_cell ab8500_devs[] = { 5695814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 5705814fc35SMattias Wallin { 5715814fc35SMattias Wallin .name = "ab8500-debug", 572e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 573e098adedSMattias Wallin .resources = ab8500_debug_resources, 5745814fc35SMattias Wallin }, 5755814fc35SMattias Wallin #endif 57662579266SRabin Vincent { 577e098adedSMattias Wallin .name = "ab8500-sysctrl", 578e098adedSMattias Wallin }, 579e098adedSMattias Wallin { 580e098adedSMattias Wallin .name = "ab8500-regulator", 581e098adedSMattias Wallin }, 582e098adedSMattias Wallin { 58362579266SRabin Vincent .name = "ab8500-gpadc", 58462579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 58562579266SRabin Vincent .resources = ab8500_gpadc_resources, 58662579266SRabin Vincent }, 58762579266SRabin Vincent { 58862579266SRabin Vincent .name = "ab8500-rtc", 58962579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 59062579266SRabin Vincent .resources = ab8500_rtc_resources, 59162579266SRabin Vincent }, 592f0f05b1cSArun Murthy { 593e098adedSMattias Wallin .name = "ab8500-bm", 594e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_bm_resources), 595e098adedSMattias Wallin .resources = ab8500_bm_resources, 596e098adedSMattias Wallin }, 597e098adedSMattias Wallin { .name = "ab8500-codec", }, 598e098adedSMattias Wallin { 599e098adedSMattias Wallin .name = "ab8500-usb", 600e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_usb_resources), 601e098adedSMattias Wallin .resources = ab8500_usb_resources, 602e098adedSMattias Wallin }, 603e098adedSMattias Wallin { 604e098adedSMattias Wallin .name = "ab8500-poweron-key", 605e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 606e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 607e098adedSMattias Wallin }, 608e098adedSMattias Wallin { 609f0f05b1cSArun Murthy .name = "ab8500-pwm", 610f0f05b1cSArun Murthy .id = 1, 611f0f05b1cSArun Murthy }, 612f0f05b1cSArun Murthy { 613f0f05b1cSArun Murthy .name = "ab8500-pwm", 614f0f05b1cSArun Murthy .id = 2, 615f0f05b1cSArun Murthy }, 616f0f05b1cSArun Murthy { 617f0f05b1cSArun Murthy .name = "ab8500-pwm", 618f0f05b1cSArun Murthy .id = 3, 619f0f05b1cSArun Murthy }, 620e098adedSMattias Wallin { .name = "ab8500-leds", }, 62177686517SSundar R Iyer { 622e098adedSMattias Wallin .name = "ab8500-denc", 623e098adedSMattias Wallin }, 624e098adedSMattias Wallin { 625e098adedSMattias Wallin .name = "ab8500-temp", 626e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 627e098adedSMattias Wallin .resources = ab8500_temp_resources, 62877686517SSundar R Iyer }, 62962579266SRabin Vincent }; 63062579266SRabin Vincent 631cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 632cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 633cca69b67SMattias Wallin { 634cca69b67SMattias Wallin struct ab8500 *ab8500; 635cca69b67SMattias Wallin 636cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 637cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 638cca69b67SMattias Wallin } 639cca69b67SMattias Wallin 640cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 641cca69b67SMattias Wallin 642cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 643cca69b67SMattias Wallin &dev_attr_chip_id.attr, 644cca69b67SMattias Wallin NULL, 645cca69b67SMattias Wallin }; 646cca69b67SMattias Wallin 647cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 648cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 649cca69b67SMattias Wallin }; 650cca69b67SMattias Wallin 65162579266SRabin Vincent int __devinit ab8500_init(struct ab8500 *ab8500) 65262579266SRabin Vincent { 65362579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 65462579266SRabin Vincent int ret; 65562579266SRabin Vincent int i; 65647c16975SMattias Wallin u8 value; 65762579266SRabin Vincent 65862579266SRabin Vincent if (plat) 65962579266SRabin Vincent ab8500->irq_base = plat->irq_base; 66062579266SRabin Vincent 66162579266SRabin Vincent mutex_init(&ab8500->lock); 66262579266SRabin Vincent mutex_init(&ab8500->irq_lock); 66362579266SRabin Vincent 66447c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 66547c16975SMattias Wallin AB8500_REV_REG, &value); 66662579266SRabin Vincent if (ret < 0) 66762579266SRabin Vincent return ret; 66862579266SRabin Vincent 66962579266SRabin Vincent /* 67062579266SRabin Vincent * 0x0 - Early Drop 67162579266SRabin Vincent * 0x10 - Cut 1.0 67262579266SRabin Vincent * 0x11 - Cut 1.1 67362579266SRabin Vincent */ 67447c16975SMattias Wallin if (value == 0x0 || value == 0x10 || value == 0x11) { 67547c16975SMattias Wallin ab8500->revision = value; 67647c16975SMattias Wallin dev_info(ab8500->dev, "detected chip, revision: %#x\n", value); 67762579266SRabin Vincent } else { 67847c16975SMattias Wallin dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value); 67962579266SRabin Vincent return -EINVAL; 68062579266SRabin Vincent } 68147c16975SMattias Wallin ab8500->chip_id = value; 68262579266SRabin Vincent 68362579266SRabin Vincent if (plat && plat->init) 68462579266SRabin Vincent plat->init(ab8500); 68562579266SRabin Vincent 68662579266SRabin Vincent /* Clear and mask all interrupts */ 68762579266SRabin Vincent for (i = 0; i < 10; i++) { 68847c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 68947c16975SMattias Wallin AB8500_IT_LATCH1_REG + i, &value); 69047c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 69147c16975SMattias Wallin AB8500_IT_MASK1_REG + i, 0xff); 69262579266SRabin Vincent } 69362579266SRabin Vincent 69462579266SRabin Vincent for (i = 18; i < 24; i++) { 69547c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 69647c16975SMattias Wallin AB8500_IT_LATCH1_REG + i, &value); 69747c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 69847c16975SMattias Wallin AB8500_IT_MASK1_REG + i, 0xff); 69962579266SRabin Vincent } 70062579266SRabin Vincent 70147c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 70247c16975SMattias Wallin if (ret) 70347c16975SMattias Wallin return ret; 70447c16975SMattias Wallin 70562579266SRabin Vincent for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) 70662579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 70762579266SRabin Vincent 70862579266SRabin Vincent if (ab8500->irq_base) { 70962579266SRabin Vincent ret = ab8500_irq_init(ab8500); 71062579266SRabin Vincent if (ret) 71162579266SRabin Vincent return ret; 71262579266SRabin Vincent 71362579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 7144f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 7154f079985SMattias Wallin "ab8500", ab8500); 71662579266SRabin Vincent if (ret) 71762579266SRabin Vincent goto out_removeirq; 71862579266SRabin Vincent } 71962579266SRabin Vincent 720549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 72162579266SRabin Vincent ARRAY_SIZE(ab8500_devs), NULL, 72262579266SRabin Vincent ab8500->irq_base); 72362579266SRabin Vincent if (ret) 72462579266SRabin Vincent goto out_freeirq; 72562579266SRabin Vincent 726cca69b67SMattias Wallin ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group); 727cca69b67SMattias Wallin if (ret) 728cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 729cca69b67SMattias Wallin 73062579266SRabin Vincent return ret; 73162579266SRabin Vincent 73262579266SRabin Vincent out_freeirq: 73362579266SRabin Vincent if (ab8500->irq_base) { 73462579266SRabin Vincent free_irq(ab8500->irq, ab8500); 73562579266SRabin Vincent out_removeirq: 73662579266SRabin Vincent ab8500_irq_remove(ab8500); 73762579266SRabin Vincent } 73862579266SRabin Vincent return ret; 73962579266SRabin Vincent } 74062579266SRabin Vincent 74162579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 74262579266SRabin Vincent { 743cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 74462579266SRabin Vincent mfd_remove_devices(ab8500->dev); 74562579266SRabin Vincent if (ab8500->irq_base) { 74662579266SRabin Vincent free_irq(ab8500->irq, ab8500); 74762579266SRabin Vincent ab8500_irq_remove(ab8500); 74862579266SRabin Vincent } 74962579266SRabin Vincent 75062579266SRabin Vincent return 0; 75162579266SRabin Vincent } 75262579266SRabin Vincent 75362579266SRabin Vincent MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent"); 75462579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 75562579266SRabin Vincent MODULE_LICENSE("GPL v2"); 756