162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 20ee66e653SLinus Walleij #include <linux/mfd/abx500/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 35d6255529SLinus Walleij #define AB9540_IT_SOURCE13_REG 0x0C 3647c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3747c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3847c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3947c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 4047c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4147c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4262579266SRabin Vincent 4362579266SRabin Vincent /* 4462579266SRabin Vincent * latch registers 4562579266SRabin Vincent */ 4647c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4747c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4847c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4947c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 5047c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5147c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5247c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5347c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5447c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5547c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5692d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 57d6255529SLinus Walleij #define AB9540_IT_LATCH13_REG 0x2C 5847c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5947c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 6047c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 6147c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6247c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6347c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6462579266SRabin Vincent 6562579266SRabin Vincent /* 6662579266SRabin Vincent * mask registers 6762579266SRabin Vincent */ 6862579266SRabin Vincent 6947c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 7047c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 7147c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7247c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7347c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7447c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7547c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7647c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7747c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7847c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7947c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 8047c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 8147c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8247c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8347c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8447c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8547c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8647c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8747c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8847c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8947c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 9047c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 9147c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9247c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9362579266SRabin Vincent 94*7ccfe9b1SMichel JAOUEN /* 95*7ccfe9b1SMichel JAOUEN * latch hierarchy registers 96*7ccfe9b1SMichel JAOUEN */ 97*7ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER1_REG 0x60 98*7ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER2_REG 0x61 99*7ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER3_REG 0x62 100*7ccfe9b1SMichel JAOUEN 101*7ccfe9b1SMichel JAOUEN #define AB8500_IT_LATCHHIER_NUM 3 102*7ccfe9b1SMichel JAOUEN 10347c16975SMattias Wallin #define AB8500_REV_REG 0x80 1040f620837SLinus Walleij #define AB8500_IC_NAME_REG 0x82 105e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 10662579266SRabin Vincent 107b4a31037SAndrew Lynn #define AB8500_TURN_ON_STATUS 0x00 108b4a31037SAndrew Lynn 1096ef9418cSRickard Andersson static bool no_bm; /* No battery management */ 1106ef9418cSRickard Andersson module_param(no_bm, bool, S_IRUGO); 1116ef9418cSRickard Andersson 112d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_REG 0x23 113d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 114d6255529SLinus Walleij 11562579266SRabin Vincent /* 11662579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 1172ced445eSLinus Walleij * numbers are indexed into this array with (num / 8). The interupts are 1182ced445eSLinus Walleij * defined in linux/mfd/ab8500.h 11962579266SRabin Vincent * 12062579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 12162579266SRabin Vincent * offset 0. 12262579266SRabin Vincent */ 1232ced445eSLinus Walleij /* AB8500 support */ 12462579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 12592d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12662579266SRabin Vincent }; 12762579266SRabin Vincent 128d6255529SLinus Walleij /* AB9540 support */ 129d6255529SLinus Walleij static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 130d6255529SLinus Walleij 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 131d6255529SLinus Walleij }; 132d6255529SLinus Walleij 1330f620837SLinus Walleij static const char ab8500_version_str[][7] = { 1340f620837SLinus Walleij [AB8500_VERSION_AB8500] = "AB8500", 1350f620837SLinus Walleij [AB8500_VERSION_AB8505] = "AB8505", 1360f620837SLinus Walleij [AB8500_VERSION_AB9540] = "AB9540", 1370f620837SLinus Walleij [AB8500_VERSION_AB8540] = "AB8540", 1380f620837SLinus Walleij }; 1390f620837SLinus Walleij 14047c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 14147c16975SMattias Wallin { 1426bce7bf1SMattias Wallin struct ab8500 *ab8500; 1436bce7bf1SMattias Wallin 1446bce7bf1SMattias Wallin if (!dev) 1456bce7bf1SMattias Wallin return -EINVAL; 1466bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1476bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 14847c16975SMattias Wallin } 14947c16975SMattias Wallin 15047c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 15147c16975SMattias Wallin u8 reg, u8 data) 15262579266SRabin Vincent { 15362579266SRabin Vincent int ret; 15447c16975SMattias Wallin /* 15547c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 15647c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 15747c16975SMattias Wallin * */ 15847c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 15962579266SRabin Vincent 16062579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 16162579266SRabin Vincent 162392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 16347c16975SMattias Wallin 16447c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 16547c16975SMattias Wallin if (ret < 0) 16647c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 16747c16975SMattias Wallin addr, ret); 16847c16975SMattias Wallin mutex_unlock(&ab8500->lock); 16947c16975SMattias Wallin 17047c16975SMattias Wallin return ret; 17147c16975SMattias Wallin } 17247c16975SMattias Wallin 17347c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 17447c16975SMattias Wallin u8 reg, u8 value) 17547c16975SMattias Wallin { 176112a80d2SJonas Aaberg int ret; 17747c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 17847c16975SMattias Wallin 179112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 180112a80d2SJonas Aaberg ret = set_register_interruptible(ab8500, bank, reg, value); 181112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 182112a80d2SJonas Aaberg return ret; 18347c16975SMattias Wallin } 18447c16975SMattias Wallin 18547c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 18647c16975SMattias Wallin u8 reg, u8 *value) 18747c16975SMattias Wallin { 18847c16975SMattias Wallin int ret; 18947c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 19047c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 19147c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 19247c16975SMattias Wallin 193392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 19447c16975SMattias Wallin 19547c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 19647c16975SMattias Wallin if (ret < 0) 19747c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 19847c16975SMattias Wallin addr, ret); 19947c16975SMattias Wallin else 20047c16975SMattias Wallin *value = ret; 20147c16975SMattias Wallin 20247c16975SMattias Wallin mutex_unlock(&ab8500->lock); 20347c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 20447c16975SMattias Wallin 20547c16975SMattias Wallin return ret; 20647c16975SMattias Wallin } 20747c16975SMattias Wallin 20847c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 20947c16975SMattias Wallin u8 reg, u8 *value) 21047c16975SMattias Wallin { 211112a80d2SJonas Aaberg int ret; 21247c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 21347c16975SMattias Wallin 214112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 215112a80d2SJonas Aaberg ret = get_register_interruptible(ab8500, bank, reg, value); 216112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 217112a80d2SJonas Aaberg return ret; 21847c16975SMattias Wallin } 21947c16975SMattias Wallin 22047c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 22147c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 22247c16975SMattias Wallin { 22347c16975SMattias Wallin int ret; 22447c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 22547c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 22647c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 22747c16975SMattias Wallin 228392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 22947c16975SMattias Wallin 230bc628fd1SMattias Nilsson if (ab8500->write_masked == NULL) { 231bc628fd1SMattias Nilsson u8 data; 232bc628fd1SMattias Nilsson 23347c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 23447c16975SMattias Wallin if (ret < 0) { 23547c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 23647c16975SMattias Wallin addr, ret); 23747c16975SMattias Wallin goto out; 23847c16975SMattias Wallin } 23947c16975SMattias Wallin 24047c16975SMattias Wallin data = (u8)ret; 24147c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 24247c16975SMattias Wallin 24362579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 24462579266SRabin Vincent if (ret < 0) 24562579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 24662579266SRabin Vincent addr, ret); 24762579266SRabin Vincent 248bc628fd1SMattias Nilsson dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 249bc628fd1SMattias Nilsson data); 250bc628fd1SMattias Nilsson goto out; 251bc628fd1SMattias Nilsson } 252bc628fd1SMattias Nilsson ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 253bc628fd1SMattias Nilsson if (ret < 0) 254bc628fd1SMattias Nilsson dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 255bc628fd1SMattias Nilsson ret); 25662579266SRabin Vincent out: 25762579266SRabin Vincent mutex_unlock(&ab8500->lock); 25862579266SRabin Vincent return ret; 25962579266SRabin Vincent } 26047c16975SMattias Wallin 26147c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 26247c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 26347c16975SMattias Wallin { 264112a80d2SJonas Aaberg int ret; 26547c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 26647c16975SMattias Wallin 267112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 268112a80d2SJonas Aaberg ret= mask_and_set_register_interruptible(ab8500, bank, reg, 26947c16975SMattias Wallin bitmask, bitvalues); 270112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 271112a80d2SJonas Aaberg return ret; 27247c16975SMattias Wallin } 27347c16975SMattias Wallin 27447c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 27547c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 27647c16975SMattias Wallin .get_register = ab8500_get_register, 27747c16975SMattias Wallin .set_register = ab8500_set_register, 27847c16975SMattias Wallin .get_register_page = NULL, 27947c16975SMattias Wallin .set_register_page = NULL, 28047c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 28147c16975SMattias Wallin .event_registers_startup_state_get = NULL, 28247c16975SMattias Wallin .startup_irq_enabled = NULL, 28347c16975SMattias Wallin }; 28462579266SRabin Vincent 2859505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 28662579266SRabin Vincent { 2879505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 28862579266SRabin Vincent 28962579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 290112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 29162579266SRabin Vincent } 29262579266SRabin Vincent 2939505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 29462579266SRabin Vincent { 2959505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 29662579266SRabin Vincent int i; 29762579266SRabin Vincent 2982ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 29962579266SRabin Vincent u8 old = ab8500->oldmask[i]; 30062579266SRabin Vincent u8 new = ab8500->mask[i]; 30162579266SRabin Vincent int reg; 30262579266SRabin Vincent 30362579266SRabin Vincent if (new == old) 30462579266SRabin Vincent continue; 30562579266SRabin Vincent 3060f620837SLinus Walleij /* 3070f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 3080f620837SLinus Walleij * 2.0 3090f620837SLinus Walleij */ 3100f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 3110f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 31292d50a41SMattias Wallin continue; 31392d50a41SMattias Wallin 31462579266SRabin Vincent ab8500->oldmask[i] = new; 31562579266SRabin Vincent 3162ced445eSLinus Walleij reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 31747c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 31862579266SRabin Vincent } 319112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 32062579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 32162579266SRabin Vincent } 32262579266SRabin Vincent 3239505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 32462579266SRabin Vincent { 3259505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3269505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 32762579266SRabin Vincent int index = offset / 8; 32862579266SRabin Vincent int mask = 1 << (offset % 8); 32962579266SRabin Vincent 33062579266SRabin Vincent ab8500->mask[index] |= mask; 33162579266SRabin Vincent } 33262579266SRabin Vincent 3339505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 33462579266SRabin Vincent { 3359505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3369505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 33762579266SRabin Vincent int index = offset / 8; 33862579266SRabin Vincent int mask = 1 << (offset % 8); 33962579266SRabin Vincent 34062579266SRabin Vincent ab8500->mask[index] &= ~mask; 34162579266SRabin Vincent } 34262579266SRabin Vincent 34362579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 34462579266SRabin Vincent .name = "ab8500", 3459505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 3469505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 3479505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 348e6f9306eSVirupax Sadashivpetimath .irq_disable = ab8500_irq_mask, 3499505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 35062579266SRabin Vincent }; 35162579266SRabin Vincent 352*7ccfe9b1SMichel JAOUEN static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500, 353*7ccfe9b1SMichel JAOUEN int latch_offset, u8 latch_val) 354*7ccfe9b1SMichel JAOUEN { 355*7ccfe9b1SMichel JAOUEN int int_bit = __ffs(latch_val); 356*7ccfe9b1SMichel JAOUEN int line, i; 357*7ccfe9b1SMichel JAOUEN 358*7ccfe9b1SMichel JAOUEN do { 359*7ccfe9b1SMichel JAOUEN int_bit = __ffs(latch_val); 360*7ccfe9b1SMichel JAOUEN 361*7ccfe9b1SMichel JAOUEN for (i = 0; i < ab8500->mask_size; i++) 362*7ccfe9b1SMichel JAOUEN if (ab8500->irq_reg_offset[i] == latch_offset) 363*7ccfe9b1SMichel JAOUEN break; 364*7ccfe9b1SMichel JAOUEN 365*7ccfe9b1SMichel JAOUEN if (i >= ab8500->mask_size) { 366*7ccfe9b1SMichel JAOUEN dev_err(ab8500->dev, "Register offset 0x%2x not declared\n", 367*7ccfe9b1SMichel JAOUEN latch_offset); 368*7ccfe9b1SMichel JAOUEN return -ENXIO; 369*7ccfe9b1SMichel JAOUEN } 370*7ccfe9b1SMichel JAOUEN 371*7ccfe9b1SMichel JAOUEN line = (i << 3) + int_bit; 372*7ccfe9b1SMichel JAOUEN latch_val &= ~(1 << int_bit); 373*7ccfe9b1SMichel JAOUEN 374*7ccfe9b1SMichel JAOUEN handle_nested_irq(ab8500->irq_base + line); 375*7ccfe9b1SMichel JAOUEN } while (latch_val); 376*7ccfe9b1SMichel JAOUEN 377*7ccfe9b1SMichel JAOUEN return 0; 378*7ccfe9b1SMichel JAOUEN } 379*7ccfe9b1SMichel JAOUEN 380*7ccfe9b1SMichel JAOUEN static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500, 381*7ccfe9b1SMichel JAOUEN int hier_offset, u8 hier_val) 382*7ccfe9b1SMichel JAOUEN { 383*7ccfe9b1SMichel JAOUEN int latch_bit, status; 384*7ccfe9b1SMichel JAOUEN u8 latch_offset, latch_val; 385*7ccfe9b1SMichel JAOUEN 386*7ccfe9b1SMichel JAOUEN do { 387*7ccfe9b1SMichel JAOUEN latch_bit = __ffs(hier_val); 388*7ccfe9b1SMichel JAOUEN latch_offset = (hier_offset << 3) + latch_bit; 389*7ccfe9b1SMichel JAOUEN 390*7ccfe9b1SMichel JAOUEN /* Fix inconsistent ITFromLatch25 bit mapping... */ 391*7ccfe9b1SMichel JAOUEN if (unlikely(latch_offset == 17)) 392*7ccfe9b1SMichel JAOUEN latch_offset = 24; 393*7ccfe9b1SMichel JAOUEN 394*7ccfe9b1SMichel JAOUEN status = get_register_interruptible(ab8500, 395*7ccfe9b1SMichel JAOUEN AB8500_INTERRUPT, 396*7ccfe9b1SMichel JAOUEN AB8500_IT_LATCH1_REG + latch_offset, 397*7ccfe9b1SMichel JAOUEN &latch_val); 398*7ccfe9b1SMichel JAOUEN if (status < 0 || latch_val == 0) 399*7ccfe9b1SMichel JAOUEN goto discard; 400*7ccfe9b1SMichel JAOUEN 401*7ccfe9b1SMichel JAOUEN status = ab8500_handle_hierarchical_line(ab8500, 402*7ccfe9b1SMichel JAOUEN latch_offset, latch_val); 403*7ccfe9b1SMichel JAOUEN if (status < 0) 404*7ccfe9b1SMichel JAOUEN return status; 405*7ccfe9b1SMichel JAOUEN discard: 406*7ccfe9b1SMichel JAOUEN hier_val &= ~(1 << latch_bit); 407*7ccfe9b1SMichel JAOUEN } while (hier_val); 408*7ccfe9b1SMichel JAOUEN 409*7ccfe9b1SMichel JAOUEN return 0; 410*7ccfe9b1SMichel JAOUEN } 411*7ccfe9b1SMichel JAOUEN 412*7ccfe9b1SMichel JAOUEN static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev) 413*7ccfe9b1SMichel JAOUEN { 414*7ccfe9b1SMichel JAOUEN struct ab8500 *ab8500 = dev; 415*7ccfe9b1SMichel JAOUEN u8 i; 416*7ccfe9b1SMichel JAOUEN 417*7ccfe9b1SMichel JAOUEN dev_vdbg(ab8500->dev, "interrupt\n"); 418*7ccfe9b1SMichel JAOUEN 419*7ccfe9b1SMichel JAOUEN /* Hierarchical interrupt version */ 420*7ccfe9b1SMichel JAOUEN for (i = 0; i < AB8500_IT_LATCHHIER_NUM; i++) { 421*7ccfe9b1SMichel JAOUEN int status; 422*7ccfe9b1SMichel JAOUEN u8 hier_val; 423*7ccfe9b1SMichel JAOUEN 424*7ccfe9b1SMichel JAOUEN status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 425*7ccfe9b1SMichel JAOUEN AB8500_IT_LATCHHIER1_REG + i, &hier_val); 426*7ccfe9b1SMichel JAOUEN if (status < 0 || hier_val == 0) 427*7ccfe9b1SMichel JAOUEN continue; 428*7ccfe9b1SMichel JAOUEN 429*7ccfe9b1SMichel JAOUEN status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val); 430*7ccfe9b1SMichel JAOUEN if (status < 0) 431*7ccfe9b1SMichel JAOUEN break; 432*7ccfe9b1SMichel JAOUEN } 433*7ccfe9b1SMichel JAOUEN return IRQ_HANDLED; 434*7ccfe9b1SMichel JAOUEN } 435*7ccfe9b1SMichel JAOUEN 43662579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 43762579266SRabin Vincent { 43862579266SRabin Vincent struct ab8500 *ab8500 = dev; 43962579266SRabin Vincent int i; 44062579266SRabin Vincent 44162579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 44262579266SRabin Vincent 443112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 444112a80d2SJonas Aaberg 4452ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 4462ced445eSLinus Walleij int regoffset = ab8500->irq_reg_offset[i]; 44762579266SRabin Vincent int status; 44847c16975SMattias Wallin u8 value; 44962579266SRabin Vincent 4500f620837SLinus Walleij /* 4510f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 4520f620837SLinus Walleij * 2.0 4530f620837SLinus Walleij */ 4540f620837SLinus Walleij if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) 45592d50a41SMattias Wallin continue; 45692d50a41SMattias Wallin 45747c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 45847c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 45947c16975SMattias Wallin if (status < 0 || value == 0) 46062579266SRabin Vincent continue; 46162579266SRabin Vincent 46262579266SRabin Vincent do { 46388aec4f7SMattias Wallin int bit = __ffs(value); 46462579266SRabin Vincent int line = i * 8 + bit; 46562579266SRabin Vincent 46662579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 46747c16975SMattias Wallin value &= ~(1 << bit); 468112a80d2SJonas Aaberg 46947c16975SMattias Wallin } while (value); 47062579266SRabin Vincent } 471112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 47262579266SRabin Vincent return IRQ_HANDLED; 47362579266SRabin Vincent } 47462579266SRabin Vincent 47562579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 47662579266SRabin Vincent { 47762579266SRabin Vincent int base = ab8500->irq_base; 47862579266SRabin Vincent int irq; 4792ced445eSLinus Walleij int num_irqs; 48062579266SRabin Vincent 481d6255529SLinus Walleij if (is_ab9540(ab8500)) 482d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 483a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 484a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 485d6255529SLinus Walleij else 4862ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 4872ced445eSLinus Walleij 4882ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 489d5bb1221SThomas Gleixner irq_set_chip_data(irq, ab8500); 490d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, &ab8500_irq_chip, 49162579266SRabin Vincent handle_simple_irq); 492d5bb1221SThomas Gleixner irq_set_nested_thread(irq, 1); 49362579266SRabin Vincent #ifdef CONFIG_ARM 49462579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 49562579266SRabin Vincent #else 496d5bb1221SThomas Gleixner irq_set_noprobe(irq); 49762579266SRabin Vincent #endif 49862579266SRabin Vincent } 49962579266SRabin Vincent 50062579266SRabin Vincent return 0; 50162579266SRabin Vincent } 50262579266SRabin Vincent 50362579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 50462579266SRabin Vincent { 50562579266SRabin Vincent int base = ab8500->irq_base; 50662579266SRabin Vincent int irq; 5072ced445eSLinus Walleij int num_irqs; 50862579266SRabin Vincent 509d6255529SLinus Walleij if (is_ab9540(ab8500)) 510d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 511a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 512a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 513d6255529SLinus Walleij else 5142ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 5152ced445eSLinus Walleij 5162ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 51762579266SRabin Vincent #ifdef CONFIG_ARM 51862579266SRabin Vincent set_irq_flags(irq, 0); 51962579266SRabin Vincent #endif 520d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, NULL, NULL); 521d5bb1221SThomas Gleixner irq_set_chip_data(irq, NULL); 52262579266SRabin Vincent } 52362579266SRabin Vincent } 52462579266SRabin Vincent 525112a80d2SJonas Aaberg int ab8500_suspend(struct ab8500 *ab8500) 526112a80d2SJonas Aaberg { 527112a80d2SJonas Aaberg if (atomic_read(&ab8500->transfer_ongoing)) 528112a80d2SJonas Aaberg return -EINVAL; 529112a80d2SJonas Aaberg else 530112a80d2SJonas Aaberg return 0; 531112a80d2SJonas Aaberg } 532112a80d2SJonas Aaberg 533d6255529SLinus Walleij /* AB8500 GPIO Resources */ 5345cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = { 5350cb3fcd7SBibek Basu { 5360cb3fcd7SBibek Basu .name = "GPIO_INT6", 5370cb3fcd7SBibek Basu .start = AB8500_INT_GPIO6R, 5380cb3fcd7SBibek Basu .end = AB8500_INT_GPIO41F, 5390cb3fcd7SBibek Basu .flags = IORESOURCE_IRQ, 5400cb3fcd7SBibek Basu } 5410cb3fcd7SBibek Basu }; 5420cb3fcd7SBibek Basu 543d6255529SLinus Walleij /* AB9540 GPIO Resources */ 544d6255529SLinus Walleij static struct resource __devinitdata ab9540_gpio_resources[] = { 545d6255529SLinus Walleij { 546d6255529SLinus Walleij .name = "GPIO_INT6", 547d6255529SLinus Walleij .start = AB8500_INT_GPIO6R, 548d6255529SLinus Walleij .end = AB8500_INT_GPIO41F, 549d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 550d6255529SLinus Walleij }, 551d6255529SLinus Walleij { 552d6255529SLinus Walleij .name = "GPIO_INT14", 553d6255529SLinus Walleij .start = AB9540_INT_GPIO50R, 554d6255529SLinus Walleij .end = AB9540_INT_GPIO54R, 555d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 556d6255529SLinus Walleij }, 557d6255529SLinus Walleij { 558d6255529SLinus Walleij .name = "GPIO_INT15", 559d6255529SLinus Walleij .start = AB9540_INT_GPIO50F, 560d6255529SLinus Walleij .end = AB9540_INT_GPIO54F, 561d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 562d6255529SLinus Walleij } 563d6255529SLinus Walleij }; 564d6255529SLinus Walleij 5655cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = { 56662579266SRabin Vincent { 56762579266SRabin Vincent .name = "HW_CONV_END", 56862579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 56962579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 57062579266SRabin Vincent .flags = IORESOURCE_IRQ, 57162579266SRabin Vincent }, 57262579266SRabin Vincent { 57362579266SRabin Vincent .name = "SW_CONV_END", 57462579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 57562579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 57662579266SRabin Vincent .flags = IORESOURCE_IRQ, 57762579266SRabin Vincent }, 57862579266SRabin Vincent }; 57962579266SRabin Vincent 5805cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = { 58162579266SRabin Vincent { 58262579266SRabin Vincent .name = "60S", 58362579266SRabin Vincent .start = AB8500_INT_RTC_60S, 58462579266SRabin Vincent .end = AB8500_INT_RTC_60S, 58562579266SRabin Vincent .flags = IORESOURCE_IRQ, 58662579266SRabin Vincent }, 58762579266SRabin Vincent { 58862579266SRabin Vincent .name = "ALARM", 58962579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 59062579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 59162579266SRabin Vincent .flags = IORESOURCE_IRQ, 59262579266SRabin Vincent }, 59362579266SRabin Vincent }; 59462579266SRabin Vincent 5955cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { 59677686517SSundar R Iyer { 59777686517SSundar R Iyer .name = "ONKEY_DBF", 59877686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 59977686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 60077686517SSundar R Iyer .flags = IORESOURCE_IRQ, 60177686517SSundar R Iyer }, 60277686517SSundar R Iyer { 60377686517SSundar R Iyer .name = "ONKEY_DBR", 60477686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 60577686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 60677686517SSundar R Iyer .flags = IORESOURCE_IRQ, 60777686517SSundar R Iyer }, 60877686517SSundar R Iyer }; 60977686517SSundar R Iyer 6106af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { 611e098adedSMattias Wallin { 6126af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_F", 6136af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_F, 6146af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_F, 615e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 616e098adedSMattias Wallin }, 617e098adedSMattias Wallin { 6186af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_R", 6196af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_R, 6206af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_R, 621e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 622e098adedSMattias Wallin }, 623e098adedSMattias Wallin { 6246af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_F", 6256af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_F, 6266af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_F, 6276af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6286af75ecdSLinus Walleij }, 6296af75ecdSLinus Walleij { 6306af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_R", 6316af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_R, 6326af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_R, 6336af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6346af75ecdSLinus Walleij }, 6356af75ecdSLinus Walleij { 6366af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_F", 6376af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_F, 6386af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_F, 6396af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6406af75ecdSLinus Walleij }, 6416af75ecdSLinus Walleij { 6426af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_R", 6436af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_R, 6446af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_R, 6456af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6466af75ecdSLinus Walleij }, 6476af75ecdSLinus Walleij }; 6486af75ecdSLinus Walleij 6496af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = { 6506af75ecdSLinus Walleij { 651e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 652e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 653e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 654e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 655e098adedSMattias Wallin }, 656e098adedSMattias Wallin { 657e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 658e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 659e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 660e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 661e098adedSMattias Wallin }, 662e098adedSMattias Wallin { 663e098adedSMattias Wallin .name = "VBUS_DET_R", 664e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 665e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 666e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 667e098adedSMattias Wallin }, 668e098adedSMattias Wallin { 6696af75ecdSLinus Walleij .name = "VBUS_DET_F", 6706af75ecdSLinus Walleij .start = AB8500_INT_VBUS_DET_F, 6716af75ecdSLinus Walleij .end = AB8500_INT_VBUS_DET_F, 672e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 673e098adedSMattias Wallin }, 674e098adedSMattias Wallin { 6756af75ecdSLinus Walleij .name = "USB_LINK_STATUS", 6766af75ecdSLinus Walleij .start = AB8500_INT_USB_LINK_STATUS, 6776af75ecdSLinus Walleij .end = AB8500_INT_USB_LINK_STATUS, 6786af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6796af75ecdSLinus Walleij }, 6806af75ecdSLinus Walleij { 681e098adedSMattias Wallin .name = "VBUS_OVV", 682e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 683e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 684e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 685e098adedSMattias Wallin }, 686e098adedSMattias Wallin { 6876af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_R", 6886af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_R, 6896af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_R, 690e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 691e098adedSMattias Wallin }, 692e098adedSMattias Wallin { 6936af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_F", 6946af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_F, 6956af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_F, 696e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 697e098adedSMattias Wallin }, 698e098adedSMattias Wallin { 6996af75ecdSLinus Walleij .name = "MAIN_EXT_CH_NOT_OK", 7006af75ecdSLinus Walleij .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 7016af75ecdSLinus Walleij .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 7026af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7036af75ecdSLinus Walleij }, 7046af75ecdSLinus Walleij { 7056af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_R", 7066af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_R, 7076af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_R, 7086af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7096af75ecdSLinus Walleij }, 7106af75ecdSLinus Walleij { 7116af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_F", 7126af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_F, 7136af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_F, 7146af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7156af75ecdSLinus Walleij }, 7166af75ecdSLinus Walleij { 7176af75ecdSLinus Walleij .name = "USB_CHARGER_NOT_OKR", 718a982362cSBengt Jonsson .start = AB8500_INT_USB_CHARGER_NOT_OKR, 719a982362cSBengt Jonsson .end = AB8500_INT_USB_CHARGER_NOT_OKR, 7206af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7216af75ecdSLinus Walleij }, 7226af75ecdSLinus Walleij { 7236af75ecdSLinus Walleij .name = "CH_WD_EXP", 7246af75ecdSLinus Walleij .start = AB8500_INT_CH_WD_EXP, 7256af75ecdSLinus Walleij .end = AB8500_INT_CH_WD_EXP, 7266af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7276af75ecdSLinus Walleij }, 7286af75ecdSLinus Walleij }; 7296af75ecdSLinus Walleij 7306af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = { 7316af75ecdSLinus Walleij { 7326af75ecdSLinus Walleij .name = "BAT_CTRL_INDB", 7336af75ecdSLinus Walleij .start = AB8500_INT_BAT_CTRL_INDB, 7346af75ecdSLinus Walleij .end = AB8500_INT_BAT_CTRL_INDB, 735e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 736e098adedSMattias Wallin }, 737e098adedSMattias Wallin { 738e098adedSMattias Wallin .name = "BTEMP_LOW", 739e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 740e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 741e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 742e098adedSMattias Wallin }, 743e098adedSMattias Wallin { 744e098adedSMattias Wallin .name = "BTEMP_HIGH", 745e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 746e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 747e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 748e098adedSMattias Wallin }, 749e098adedSMattias Wallin { 7506af75ecdSLinus Walleij .name = "BTEMP_LOW_MEDIUM", 7516af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_LOW_MEDIUM, 7526af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_LOW_MEDIUM, 753e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 754e098adedSMattias Wallin }, 755e098adedSMattias Wallin { 7566af75ecdSLinus Walleij .name = "BTEMP_MEDIUM_HIGH", 7576af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 7586af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 759e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 760e098adedSMattias Wallin }, 761e098adedSMattias Wallin }; 762e098adedSMattias Wallin 7636af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = { 7646af75ecdSLinus Walleij { 7656af75ecdSLinus Walleij .name = "NCONV_ACCU", 7666af75ecdSLinus Walleij .start = AB8500_INT_CCN_CONV_ACC, 7676af75ecdSLinus Walleij .end = AB8500_INT_CCN_CONV_ACC, 7686af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7696af75ecdSLinus Walleij }, 7706af75ecdSLinus Walleij { 7716af75ecdSLinus Walleij .name = "BATT_OVV", 7726af75ecdSLinus Walleij .start = AB8500_INT_BATT_OVV, 7736af75ecdSLinus Walleij .end = AB8500_INT_BATT_OVV, 7746af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7756af75ecdSLinus Walleij }, 7766af75ecdSLinus Walleij { 7776af75ecdSLinus Walleij .name = "LOW_BAT_F", 7786af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_F, 7796af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_F, 7806af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7816af75ecdSLinus Walleij }, 7826af75ecdSLinus Walleij { 7836af75ecdSLinus Walleij .name = "LOW_BAT_R", 7846af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_R, 7856af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_R, 7866af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7876af75ecdSLinus Walleij }, 7886af75ecdSLinus Walleij { 7896af75ecdSLinus Walleij .name = "CC_INT_CALIB", 7906af75ecdSLinus Walleij .start = AB8500_INT_CC_INT_CALIB, 7916af75ecdSLinus Walleij .end = AB8500_INT_CC_INT_CALIB, 7926af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7936af75ecdSLinus Walleij }, 794a982362cSBengt Jonsson { 795a982362cSBengt Jonsson .name = "CCEOC", 796a982362cSBengt Jonsson .start = AB8500_INT_CCEOC, 797a982362cSBengt Jonsson .end = AB8500_INT_CCEOC, 798a982362cSBengt Jonsson .flags = IORESOURCE_IRQ, 799a982362cSBengt Jonsson }, 8006af75ecdSLinus Walleij }; 8016af75ecdSLinus Walleij 8026af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {}; 8036af75ecdSLinus Walleij 804df720647SAxel Lin #ifdef CONFIG_DEBUG_FS 8055cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = { 806e098adedSMattias Wallin { 807e098adedSMattias Wallin .name = "IRQ_FIRST", 808e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 809e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 810e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 811e098adedSMattias Wallin }, 812e098adedSMattias Wallin { 813e098adedSMattias Wallin .name = "IRQ_LAST", 814a982362cSBengt Jonsson .start = AB8500_INT_XTAL32K_KO, 815a982362cSBengt Jonsson .end = AB8500_INT_XTAL32K_KO, 816e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 817e098adedSMattias Wallin }, 818e098adedSMattias Wallin }; 819df720647SAxel Lin #endif 820e098adedSMattias Wallin 8215cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = { 822e098adedSMattias Wallin { 823e098adedSMattias Wallin .name = "ID_WAKEUP_R", 824e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 825e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 826e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 827e098adedSMattias Wallin }, 828e098adedSMattias Wallin { 829e098adedSMattias Wallin .name = "ID_WAKEUP_F", 830e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 831e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 832e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 833e098adedSMattias Wallin }, 834e098adedSMattias Wallin { 835e098adedSMattias Wallin .name = "VBUS_DET_F", 836e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 837e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 838e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 839e098adedSMattias Wallin }, 840e098adedSMattias Wallin { 841e098adedSMattias Wallin .name = "VBUS_DET_R", 842e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 843e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 844e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 845e098adedSMattias Wallin }, 84692d50a41SMattias Wallin { 84792d50a41SMattias Wallin .name = "USB_LINK_STATUS", 84892d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 84992d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 85092d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 85192d50a41SMattias Wallin }, 8526af75ecdSLinus Walleij { 8536af75ecdSLinus Walleij .name = "USB_ADP_PROBE_PLUG", 8546af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_PLUG, 8556af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_PLUG, 8566af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8576af75ecdSLinus Walleij }, 8586af75ecdSLinus Walleij { 8596af75ecdSLinus Walleij .name = "USB_ADP_PROBE_UNPLUG", 8606af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_UNPLUG, 8616af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_UNPLUG, 8626af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 8636af75ecdSLinus Walleij }, 864e098adedSMattias Wallin }; 865e098adedSMattias Wallin 86644f72e53SVirupax Sadashivpetimath static struct resource __devinitdata ab8505_iddet_resources[] = { 86744f72e53SVirupax Sadashivpetimath { 86844f72e53SVirupax Sadashivpetimath .name = "KeyDeglitch", 86944f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYDEGLITCH, 87044f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYDEGLITCH, 87144f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 87244f72e53SVirupax Sadashivpetimath }, 87344f72e53SVirupax Sadashivpetimath { 87444f72e53SVirupax Sadashivpetimath .name = "KP", 87544f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KP, 87644f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KP, 87744f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 87844f72e53SVirupax Sadashivpetimath }, 87944f72e53SVirupax Sadashivpetimath { 88044f72e53SVirupax Sadashivpetimath .name = "IKP", 88144f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKP, 88244f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKP, 88344f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 88444f72e53SVirupax Sadashivpetimath }, 88544f72e53SVirupax Sadashivpetimath { 88644f72e53SVirupax Sadashivpetimath .name = "IKR", 88744f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKR, 88844f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKR, 88944f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 89044f72e53SVirupax Sadashivpetimath }, 89144f72e53SVirupax Sadashivpetimath { 89244f72e53SVirupax Sadashivpetimath .name = "KeyStuck", 89344f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYSTUCK, 89444f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYSTUCK, 89544f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 89644f72e53SVirupax Sadashivpetimath }, 89744f72e53SVirupax Sadashivpetimath }; 89844f72e53SVirupax Sadashivpetimath 8995cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = { 900e098adedSMattias Wallin { 901e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 902e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 903e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 904e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 905e098adedSMattias Wallin }, 906e098adedSMattias Wallin }; 907e098adedSMattias Wallin 908d6255529SLinus Walleij static struct mfd_cell __devinitdata abx500_common_devs[] = { 9095814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 9105814fc35SMattias Wallin { 9115814fc35SMattias Wallin .name = "ab8500-debug", 912e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 913e098adedSMattias Wallin .resources = ab8500_debug_resources, 9145814fc35SMattias Wallin }, 9155814fc35SMattias Wallin #endif 91662579266SRabin Vincent { 917e098adedSMattias Wallin .name = "ab8500-sysctrl", 918e098adedSMattias Wallin }, 919e098adedSMattias Wallin { 920e098adedSMattias Wallin .name = "ab8500-regulator", 921e098adedSMattias Wallin }, 922e098adedSMattias Wallin { 92362579266SRabin Vincent .name = "ab8500-gpadc", 92462579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 92562579266SRabin Vincent .resources = ab8500_gpadc_resources, 92662579266SRabin Vincent }, 92762579266SRabin Vincent { 92862579266SRabin Vincent .name = "ab8500-rtc", 92962579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 93062579266SRabin Vincent .resources = ab8500_rtc_resources, 93162579266SRabin Vincent }, 932f0f05b1cSArun Murthy { 9336af75ecdSLinus Walleij .name = "ab8500-acc-det", 9346af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 9356af75ecdSLinus Walleij .resources = ab8500_av_acc_detect_resources, 9366af75ecdSLinus Walleij }, 9376af75ecdSLinus Walleij { 938e098adedSMattias Wallin .name = "ab8500-poweron-key", 939e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 940e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 941e098adedSMattias Wallin }, 942e098adedSMattias Wallin { 943f0f05b1cSArun Murthy .name = "ab8500-pwm", 944f0f05b1cSArun Murthy .id = 1, 945f0f05b1cSArun Murthy }, 946f0f05b1cSArun Murthy { 947f0f05b1cSArun Murthy .name = "ab8500-pwm", 948f0f05b1cSArun Murthy .id = 2, 949f0f05b1cSArun Murthy }, 950f0f05b1cSArun Murthy { 951f0f05b1cSArun Murthy .name = "ab8500-pwm", 952f0f05b1cSArun Murthy .id = 3, 953f0f05b1cSArun Murthy }, 954e098adedSMattias Wallin { .name = "ab8500-leds", }, 95577686517SSundar R Iyer { 956e098adedSMattias Wallin .name = "ab8500-denc", 957e098adedSMattias Wallin }, 958e098adedSMattias Wallin { 959e098adedSMattias Wallin .name = "ab8500-temp", 960e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 961e098adedSMattias Wallin .resources = ab8500_temp_resources, 96277686517SSundar R Iyer }, 96362579266SRabin Vincent }; 96462579266SRabin Vincent 9656ef9418cSRickard Andersson static struct mfd_cell __devinitdata ab8500_bm_devs[] = { 9666ef9418cSRickard Andersson { 9676ef9418cSRickard Andersson .name = "ab8500-charger", 9686ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_charger_resources), 9696ef9418cSRickard Andersson .resources = ab8500_charger_resources, 9706ef9418cSRickard Andersson }, 9716ef9418cSRickard Andersson { 9726ef9418cSRickard Andersson .name = "ab8500-btemp", 9736ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 9746ef9418cSRickard Andersson .resources = ab8500_btemp_resources, 9756ef9418cSRickard Andersson }, 9766ef9418cSRickard Andersson { 9776ef9418cSRickard Andersson .name = "ab8500-fg", 9786ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_fg_resources), 9796ef9418cSRickard Andersson .resources = ab8500_fg_resources, 9806ef9418cSRickard Andersson }, 9816ef9418cSRickard Andersson { 9826ef9418cSRickard Andersson .name = "ab8500-chargalg", 9836ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 9846ef9418cSRickard Andersson .resources = ab8500_chargalg_resources, 9856ef9418cSRickard Andersson }, 9866ef9418cSRickard Andersson }; 9876ef9418cSRickard Andersson 988d6255529SLinus Walleij static struct mfd_cell __devinitdata ab8500_devs[] = { 989d6255529SLinus Walleij { 990d6255529SLinus Walleij .name = "ab8500-gpio", 991d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_gpio_resources), 992d6255529SLinus Walleij .resources = ab8500_gpio_resources, 993d6255529SLinus Walleij }, 994d6255529SLinus Walleij { 995d6255529SLinus Walleij .name = "ab8500-usb", 996d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 997d6255529SLinus Walleij .resources = ab8500_usb_resources, 998d6255529SLinus Walleij }, 99944f72e53SVirupax Sadashivpetimath { 100044f72e53SVirupax Sadashivpetimath .name = "ab8500-codec", 100144f72e53SVirupax Sadashivpetimath }, 1002d6255529SLinus Walleij }; 1003d6255529SLinus Walleij 1004d6255529SLinus Walleij static struct mfd_cell __devinitdata ab9540_devs[] = { 1005d6255529SLinus Walleij { 1006d6255529SLinus Walleij .name = "ab8500-gpio", 1007d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab9540_gpio_resources), 1008d6255529SLinus Walleij .resources = ab9540_gpio_resources, 1009d6255529SLinus Walleij }, 1010d6255529SLinus Walleij { 1011d6255529SLinus Walleij .name = "ab9540-usb", 1012d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 1013d6255529SLinus Walleij .resources = ab8500_usb_resources, 1014d6255529SLinus Walleij }, 101544f72e53SVirupax Sadashivpetimath { 101644f72e53SVirupax Sadashivpetimath .name = "ab9540-codec", 101744f72e53SVirupax Sadashivpetimath }, 101844f72e53SVirupax Sadashivpetimath }; 101944f72e53SVirupax Sadashivpetimath 102044f72e53SVirupax Sadashivpetimath /* Device list common to ab9540 and ab8505 */ 102144f72e53SVirupax Sadashivpetimath static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = { 102244f72e53SVirupax Sadashivpetimath { 102344f72e53SVirupax Sadashivpetimath .name = "ab-iddet", 102444f72e53SVirupax Sadashivpetimath .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 102544f72e53SVirupax Sadashivpetimath .resources = ab8505_iddet_resources, 102644f72e53SVirupax Sadashivpetimath }, 1027d6255529SLinus Walleij }; 1028d6255529SLinus Walleij 1029cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 1030cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 1031cca69b67SMattias Wallin { 1032cca69b67SMattias Wallin struct ab8500 *ab8500; 1033cca69b67SMattias Wallin 1034cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 1035cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 1036cca69b67SMattias Wallin } 1037cca69b67SMattias Wallin 1038e5c238c3SMattias Wallin /* 1039e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1040e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1041e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1042e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1043e5c238c3SMattias Wallin * 0x08 Watchdog expired 1044e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1045e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1046e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1047e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1048e5c238c3SMattias Wallin */ 1049e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 1050e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 1051e5c238c3SMattias Wallin { 1052e5c238c3SMattias Wallin int ret; 1053e5c238c3SMattias Wallin u8 value; 1054e5c238c3SMattias Wallin struct ab8500 *ab8500; 1055e5c238c3SMattias Wallin 1056e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 1057e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1058e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1059e5c238c3SMattias Wallin if (ret < 0) 1060e5c238c3SMattias Wallin return ret; 1061e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 1062e5c238c3SMattias Wallin } 1063e5c238c3SMattias Wallin 1064b4a31037SAndrew Lynn /* 1065b4a31037SAndrew Lynn * ab8500 has turned on due to (TURN_ON_STATUS): 1066b4a31037SAndrew Lynn * 0x01 PORnVbat 1067b4a31037SAndrew Lynn * 0x02 PonKey1dbF 1068b4a31037SAndrew Lynn * 0x04 PonKey2dbF 1069b4a31037SAndrew Lynn * 0x08 RTCAlarm 1070b4a31037SAndrew Lynn * 0x10 MainChDet 1071b4a31037SAndrew Lynn * 0x20 VbusDet 1072b4a31037SAndrew Lynn * 0x40 UsbIDDetect 1073b4a31037SAndrew Lynn * 0x80 Reserved 1074b4a31037SAndrew Lynn */ 1075b4a31037SAndrew Lynn static ssize_t show_turn_on_status(struct device *dev, 1076b4a31037SAndrew Lynn struct device_attribute *attr, char *buf) 1077b4a31037SAndrew Lynn { 1078b4a31037SAndrew Lynn int ret; 1079b4a31037SAndrew Lynn u8 value; 1080b4a31037SAndrew Lynn struct ab8500 *ab8500; 1081b4a31037SAndrew Lynn 1082b4a31037SAndrew Lynn ab8500 = dev_get_drvdata(dev); 1083b4a31037SAndrew Lynn ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 1084b4a31037SAndrew Lynn AB8500_TURN_ON_STATUS, &value); 1085b4a31037SAndrew Lynn if (ret < 0) 1086b4a31037SAndrew Lynn return ret; 1087b4a31037SAndrew Lynn return sprintf(buf, "%#x\n", value); 1088b4a31037SAndrew Lynn } 1089b4a31037SAndrew Lynn 1090d6255529SLinus Walleij static ssize_t show_ab9540_dbbrstn(struct device *dev, 1091d6255529SLinus Walleij struct device_attribute *attr, char *buf) 1092d6255529SLinus Walleij { 1093d6255529SLinus Walleij struct ab8500 *ab8500; 1094d6255529SLinus Walleij int ret; 1095d6255529SLinus Walleij u8 value; 1096d6255529SLinus Walleij 1097d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1098d6255529SLinus Walleij 1099d6255529SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 1100d6255529SLinus Walleij AB9540_MODEM_CTRL2_REG, &value); 1101d6255529SLinus Walleij if (ret < 0) 1102d6255529SLinus Walleij return ret; 1103d6255529SLinus Walleij 1104d6255529SLinus Walleij return sprintf(buf, "%d\n", 1105d6255529SLinus Walleij (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 1106d6255529SLinus Walleij } 1107d6255529SLinus Walleij 1108d6255529SLinus Walleij static ssize_t store_ab9540_dbbrstn(struct device *dev, 1109d6255529SLinus Walleij struct device_attribute *attr, const char *buf, size_t count) 1110d6255529SLinus Walleij { 1111d6255529SLinus Walleij struct ab8500 *ab8500; 1112d6255529SLinus Walleij int ret = count; 1113d6255529SLinus Walleij int err; 1114d6255529SLinus Walleij u8 bitvalues; 1115d6255529SLinus Walleij 1116d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1117d6255529SLinus Walleij 1118d6255529SLinus Walleij if (count > 0) { 1119d6255529SLinus Walleij switch (buf[0]) { 1120d6255529SLinus Walleij case '0': 1121d6255529SLinus Walleij bitvalues = 0; 1122d6255529SLinus Walleij break; 1123d6255529SLinus Walleij case '1': 1124d6255529SLinus Walleij bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1125d6255529SLinus Walleij break; 1126d6255529SLinus Walleij default: 1127d6255529SLinus Walleij goto exit; 1128d6255529SLinus Walleij } 1129d6255529SLinus Walleij 1130d6255529SLinus Walleij err = mask_and_set_register_interruptible(ab8500, 1131d6255529SLinus Walleij AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1132d6255529SLinus Walleij AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1133d6255529SLinus Walleij if (err) 1134d6255529SLinus Walleij dev_info(ab8500->dev, 1135d6255529SLinus Walleij "Failed to set DBBRSTN %c, err %#x\n", 1136d6255529SLinus Walleij buf[0], err); 1137d6255529SLinus Walleij } 1138d6255529SLinus Walleij 1139d6255529SLinus Walleij exit: 1140d6255529SLinus Walleij return ret; 1141d6255529SLinus Walleij } 1142d6255529SLinus Walleij 1143cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1144e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1145b4a31037SAndrew Lynn static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1146d6255529SLinus Walleij static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1147d6255529SLinus Walleij show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1148cca69b67SMattias Wallin 1149cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 1150cca69b67SMattias Wallin &dev_attr_chip_id.attr, 1151e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 1152b4a31037SAndrew Lynn &dev_attr_turn_on_status.attr, 1153cca69b67SMattias Wallin NULL, 1154cca69b67SMattias Wallin }; 1155cca69b67SMattias Wallin 1156d6255529SLinus Walleij static struct attribute *ab9540_sysfs_entries[] = { 1157d6255529SLinus Walleij &dev_attr_chip_id.attr, 1158d6255529SLinus Walleij &dev_attr_switch_off_status.attr, 1159d6255529SLinus Walleij &dev_attr_turn_on_status.attr, 1160d6255529SLinus Walleij &dev_attr_dbbrstn.attr, 1161d6255529SLinus Walleij NULL, 1162d6255529SLinus Walleij }; 1163d6255529SLinus Walleij 1164cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 1165cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 1166cca69b67SMattias Wallin }; 1167cca69b67SMattias Wallin 1168d6255529SLinus Walleij static struct attribute_group ab9540_attr_group = { 1169d6255529SLinus Walleij .attrs = ab9540_sysfs_entries, 1170d6255529SLinus Walleij }; 1171d6255529SLinus Walleij 11720f620837SLinus Walleij int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) 117362579266SRabin Vincent { 117462579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 117562579266SRabin Vincent int ret; 117662579266SRabin Vincent int i; 117747c16975SMattias Wallin u8 value; 117862579266SRabin Vincent 117962579266SRabin Vincent if (plat) 118062579266SRabin Vincent ab8500->irq_base = plat->irq_base; 118162579266SRabin Vincent 118262579266SRabin Vincent mutex_init(&ab8500->lock); 118362579266SRabin Vincent mutex_init(&ab8500->irq_lock); 1184112a80d2SJonas Aaberg atomic_set(&ab8500->transfer_ongoing, 0); 118562579266SRabin Vincent 11860f620837SLinus Walleij if (version != AB8500_VERSION_UNDEFINED) 11870f620837SLinus Walleij ab8500->version = version; 11880f620837SLinus Walleij else { 11890f620837SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_MISC, 11900f620837SLinus Walleij AB8500_IC_NAME_REG, &value); 11910f620837SLinus Walleij if (ret < 0) 11920f620837SLinus Walleij return ret; 11930f620837SLinus Walleij 11940f620837SLinus Walleij ab8500->version = value; 11950f620837SLinus Walleij } 11960f620837SLinus Walleij 119747c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 119847c16975SMattias Wallin AB8500_REV_REG, &value); 119962579266SRabin Vincent if (ret < 0) 120062579266SRabin Vincent return ret; 120162579266SRabin Vincent 120247c16975SMattias Wallin ab8500->chip_id = value; 120362579266SRabin Vincent 12040f620837SLinus Walleij dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 12050f620837SLinus Walleij ab8500_version_str[ab8500->version], 12060f620837SLinus Walleij ab8500->chip_id >> 4, 12070f620837SLinus Walleij ab8500->chip_id & 0x0F); 12080f620837SLinus Walleij 1209d6255529SLinus Walleij /* Configure AB8500 or AB9540 IRQ */ 1210a982362cSBengt Jonsson if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1211d6255529SLinus Walleij ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1212d6255529SLinus Walleij ab8500->irq_reg_offset = ab9540_irq_regoffset; 1213d6255529SLinus Walleij } else { 12142ced445eSLinus Walleij ab8500->mask_size = AB8500_NUM_IRQ_REGS; 12152ced445eSLinus Walleij ab8500->irq_reg_offset = ab8500_irq_regoffset; 1216d6255529SLinus Walleij } 12172ced445eSLinus Walleij ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); 12182ced445eSLinus Walleij if (!ab8500->mask) 12192ced445eSLinus Walleij return -ENOMEM; 12202ced445eSLinus Walleij ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); 12212ced445eSLinus Walleij if (!ab8500->oldmask) { 12222ced445eSLinus Walleij ret = -ENOMEM; 12232ced445eSLinus Walleij goto out_freemask; 12242ced445eSLinus Walleij } 1225e5c238c3SMattias Wallin /* 1226e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1227e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1228e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1229e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1230e5c238c3SMattias Wallin * 0x08 Watchdog expired 1231e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1232e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1233e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1234e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1235e5c238c3SMattias Wallin */ 1236e5c238c3SMattias Wallin 1237e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1238e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1239e5c238c3SMattias Wallin if (ret < 0) 1240e5c238c3SMattias Wallin return ret; 1241e5c238c3SMattias Wallin dev_info(ab8500->dev, "switch off status: %#x", value); 1242e5c238c3SMattias Wallin 124362579266SRabin Vincent if (plat && plat->init) 124462579266SRabin Vincent plat->init(ab8500); 124562579266SRabin Vincent 124662579266SRabin Vincent /* Clear and mask all interrupts */ 12472ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 12480f620837SLinus Walleij /* 12490f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 12500f620837SLinus Walleij * 2.0 12510f620837SLinus Walleij */ 12520f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 12530f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 125492d50a41SMattias Wallin continue; 125562579266SRabin Vincent 125647c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 12572ced445eSLinus Walleij AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 125892d50a41SMattias Wallin &value); 125947c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 12602ced445eSLinus Walleij AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 126162579266SRabin Vincent } 126262579266SRabin Vincent 126347c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 126447c16975SMattias Wallin if (ret) 12652ced445eSLinus Walleij goto out_freeoldmask; 126647c16975SMattias Wallin 12672ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) 126862579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 126962579266SRabin Vincent 127062579266SRabin Vincent if (ab8500->irq_base) { 127162579266SRabin Vincent ret = ab8500_irq_init(ab8500); 127262579266SRabin Vincent if (ret) 12732ced445eSLinus Walleij goto out_freeoldmask; 127462579266SRabin Vincent 1275*7ccfe9b1SMichel JAOUEN /* Activate this feature only in ab9540 */ 1276*7ccfe9b1SMichel JAOUEN /* till tests are done on ab8500 1p2 or later*/ 1277*7ccfe9b1SMichel JAOUEN if (is_ab9540(ab8500)) 1278*7ccfe9b1SMichel JAOUEN ret = request_threaded_irq(ab8500->irq, NULL, 1279*7ccfe9b1SMichel JAOUEN ab8500_hierarchical_irq, 1280*7ccfe9b1SMichel JAOUEN IRQF_ONESHOT | IRQF_NO_SUSPEND, 1281*7ccfe9b1SMichel JAOUEN "ab8500", ab8500); 1282*7ccfe9b1SMichel JAOUEN else 1283*7ccfe9b1SMichel JAOUEN ret = request_threaded_irq(ab8500->irq, NULL, 1284*7ccfe9b1SMichel JAOUEN ab8500_irq, 12854f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 12864f079985SMattias Wallin "ab8500", ab8500); 128762579266SRabin Vincent if (ret) 128862579266SRabin Vincent goto out_removeirq; 128962579266SRabin Vincent } 129062579266SRabin Vincent 1291d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, 1292d6255529SLinus Walleij ARRAY_SIZE(abx500_common_devs), NULL, 1293d6255529SLinus Walleij ab8500->irq_base); 1294d6255529SLinus Walleij 1295d6255529SLinus Walleij if (ret) 1296d6255529SLinus Walleij goto out_freeirq; 1297d6255529SLinus Walleij 1298d6255529SLinus Walleij if (is_ab9540(ab8500)) 1299d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1300d6255529SLinus Walleij ARRAY_SIZE(ab9540_devs), NULL, 1301d6255529SLinus Walleij ab8500->irq_base); 1302d6255529SLinus Walleij else 1303549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 130444f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab8500_devs), NULL, 130562579266SRabin Vincent ab8500->irq_base); 130644f72e53SVirupax Sadashivpetimath 130744f72e53SVirupax Sadashivpetimath if (is_ab9540(ab8500) || is_ab8505(ab8500)) 130844f72e53SVirupax Sadashivpetimath ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, 130944f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab9540_ab8505_devs), NULL, 131044f72e53SVirupax Sadashivpetimath ab8500->irq_base); 131144f72e53SVirupax Sadashivpetimath 131262579266SRabin Vincent if (ret) 131362579266SRabin Vincent goto out_freeirq; 131462579266SRabin Vincent 13156ef9418cSRickard Andersson if (!no_bm) { 13166ef9418cSRickard Andersson /* Add battery management devices */ 13176ef9418cSRickard Andersson ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 13186ef9418cSRickard Andersson ARRAY_SIZE(ab8500_bm_devs), NULL, 13196ef9418cSRickard Andersson ab8500->irq_base); 13206ef9418cSRickard Andersson if (ret) 13216ef9418cSRickard Andersson dev_err(ab8500->dev, "error adding bm devices\n"); 13226ef9418cSRickard Andersson } 13236ef9418cSRickard Andersson 1324d6255529SLinus Walleij if (is_ab9540(ab8500)) 1325d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1326d6255529SLinus Walleij &ab9540_attr_group); 1327d6255529SLinus Walleij else 1328d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1329d6255529SLinus Walleij &ab8500_attr_group); 1330cca69b67SMattias Wallin if (ret) 1331cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 1332d6255529SLinus Walleij else 133362579266SRabin Vincent return ret; 133462579266SRabin Vincent 133562579266SRabin Vincent out_freeirq: 13366d95b7fdSLinus Walleij if (ab8500->irq_base) 133762579266SRabin Vincent free_irq(ab8500->irq, ab8500); 133862579266SRabin Vincent out_removeirq: 13396d95b7fdSLinus Walleij if (ab8500->irq_base) 134062579266SRabin Vincent ab8500_irq_remove(ab8500); 13412ced445eSLinus Walleij out_freeoldmask: 13422ced445eSLinus Walleij kfree(ab8500->oldmask); 13432ced445eSLinus Walleij out_freemask: 13442ced445eSLinus Walleij kfree(ab8500->mask); 13456d95b7fdSLinus Walleij 134662579266SRabin Vincent return ret; 134762579266SRabin Vincent } 134862579266SRabin Vincent 134962579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 135062579266SRabin Vincent { 1351d6255529SLinus Walleij if (is_ab9540(ab8500)) 1352d6255529SLinus Walleij sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1353d6255529SLinus Walleij else 1354cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 135562579266SRabin Vincent mfd_remove_devices(ab8500->dev); 135662579266SRabin Vincent if (ab8500->irq_base) { 135762579266SRabin Vincent free_irq(ab8500->irq, ab8500); 135862579266SRabin Vincent ab8500_irq_remove(ab8500); 135962579266SRabin Vincent } 13602ced445eSLinus Walleij kfree(ab8500->oldmask); 13612ced445eSLinus Walleij kfree(ab8500->mask); 136262579266SRabin Vincent 136362579266SRabin Vincent return 0; 136462579266SRabin Vincent } 136562579266SRabin Vincent 1366adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 136762579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 136862579266SRabin Vincent MODULE_LICENSE("GPL v2"); 1369