162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 20ee66e653SLinus Walleij #include <linux/mfd/abx500/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 35d6255529SLinus Walleij #define AB9540_IT_SOURCE13_REG 0x0C 3647c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3747c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3847c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3947c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 4047c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4147c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4262579266SRabin Vincent 4362579266SRabin Vincent /* 4462579266SRabin Vincent * latch registers 4562579266SRabin Vincent */ 4647c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4747c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4847c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4947c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 5047c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5147c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5247c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5347c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5447c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5547c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5692d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 57d6255529SLinus Walleij #define AB9540_IT_LATCH13_REG 0x2C 5847c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5947c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 6047c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 6147c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6247c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6347c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6462579266SRabin Vincent 6562579266SRabin Vincent /* 6662579266SRabin Vincent * mask registers 6762579266SRabin Vincent */ 6862579266SRabin Vincent 6947c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 7047c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 7147c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7247c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7347c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7447c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7547c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7647c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7747c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7847c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7947c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 8047c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 8147c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8247c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8347c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8447c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8547c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8647c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8747c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8847c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8947c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 9047c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 9147c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9247c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9362579266SRabin Vincent 9447c16975SMattias Wallin #define AB8500_REV_REG 0x80 950f620837SLinus Walleij #define AB8500_IC_NAME_REG 0x82 96e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 9762579266SRabin Vincent 98b4a31037SAndrew Lynn #define AB8500_TURN_ON_STATUS 0x00 99b4a31037SAndrew Lynn 100*6ef9418cSRickard Andersson static bool no_bm; /* No battery management */ 101*6ef9418cSRickard Andersson module_param(no_bm, bool, S_IRUGO); 102*6ef9418cSRickard Andersson 103d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_REG 0x23 104d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 105d6255529SLinus Walleij 10662579266SRabin Vincent /* 10762579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 1082ced445eSLinus Walleij * numbers are indexed into this array with (num / 8). The interupts are 1092ced445eSLinus Walleij * defined in linux/mfd/ab8500.h 11062579266SRabin Vincent * 11162579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 11262579266SRabin Vincent * offset 0. 11362579266SRabin Vincent */ 1142ced445eSLinus Walleij /* AB8500 support */ 11562579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 11692d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 11762579266SRabin Vincent }; 11862579266SRabin Vincent 119d6255529SLinus Walleij /* AB9540 support */ 120d6255529SLinus Walleij static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 121d6255529SLinus Walleij 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 122d6255529SLinus Walleij }; 123d6255529SLinus Walleij 1240f620837SLinus Walleij static const char ab8500_version_str[][7] = { 1250f620837SLinus Walleij [AB8500_VERSION_AB8500] = "AB8500", 1260f620837SLinus Walleij [AB8500_VERSION_AB8505] = "AB8505", 1270f620837SLinus Walleij [AB8500_VERSION_AB9540] = "AB9540", 1280f620837SLinus Walleij [AB8500_VERSION_AB8540] = "AB8540", 1290f620837SLinus Walleij }; 1300f620837SLinus Walleij 13147c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 13247c16975SMattias Wallin { 1336bce7bf1SMattias Wallin struct ab8500 *ab8500; 1346bce7bf1SMattias Wallin 1356bce7bf1SMattias Wallin if (!dev) 1366bce7bf1SMattias Wallin return -EINVAL; 1376bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1386bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 13947c16975SMattias Wallin } 14047c16975SMattias Wallin 14147c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 14247c16975SMattias Wallin u8 reg, u8 data) 14362579266SRabin Vincent { 14462579266SRabin Vincent int ret; 14547c16975SMattias Wallin /* 14647c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 14747c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 14847c16975SMattias Wallin * */ 14947c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 15062579266SRabin Vincent 15162579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 15262579266SRabin Vincent 153392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 15447c16975SMattias Wallin 15547c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 15647c16975SMattias Wallin if (ret < 0) 15747c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 15847c16975SMattias Wallin addr, ret); 15947c16975SMattias Wallin mutex_unlock(&ab8500->lock); 16047c16975SMattias Wallin 16147c16975SMattias Wallin return ret; 16247c16975SMattias Wallin } 16347c16975SMattias Wallin 16447c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 16547c16975SMattias Wallin u8 reg, u8 value) 16647c16975SMattias Wallin { 167112a80d2SJonas Aaberg int ret; 16847c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 16947c16975SMattias Wallin 170112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 171112a80d2SJonas Aaberg ret = set_register_interruptible(ab8500, bank, reg, value); 172112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 173112a80d2SJonas Aaberg return ret; 17447c16975SMattias Wallin } 17547c16975SMattias Wallin 17647c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 17747c16975SMattias Wallin u8 reg, u8 *value) 17847c16975SMattias Wallin { 17947c16975SMattias Wallin int ret; 18047c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 18147c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 18247c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 18347c16975SMattias Wallin 184392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 18547c16975SMattias Wallin 18647c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 18747c16975SMattias Wallin if (ret < 0) 18847c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 18947c16975SMattias Wallin addr, ret); 19047c16975SMattias Wallin else 19147c16975SMattias Wallin *value = ret; 19247c16975SMattias Wallin 19347c16975SMattias Wallin mutex_unlock(&ab8500->lock); 19447c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 19547c16975SMattias Wallin 19647c16975SMattias Wallin return ret; 19747c16975SMattias Wallin } 19847c16975SMattias Wallin 19947c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 20047c16975SMattias Wallin u8 reg, u8 *value) 20147c16975SMattias Wallin { 202112a80d2SJonas Aaberg int ret; 20347c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 20447c16975SMattias Wallin 205112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 206112a80d2SJonas Aaberg ret = get_register_interruptible(ab8500, bank, reg, value); 207112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 208112a80d2SJonas Aaberg return ret; 20947c16975SMattias Wallin } 21047c16975SMattias Wallin 21147c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 21247c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 21347c16975SMattias Wallin { 21447c16975SMattias Wallin int ret; 21547c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 21647c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 21747c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 21847c16975SMattias Wallin 219392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 22047c16975SMattias Wallin 221bc628fd1SMattias Nilsson if (ab8500->write_masked == NULL) { 222bc628fd1SMattias Nilsson u8 data; 223bc628fd1SMattias Nilsson 22447c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 22547c16975SMattias Wallin if (ret < 0) { 22647c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 22747c16975SMattias Wallin addr, ret); 22847c16975SMattias Wallin goto out; 22947c16975SMattias Wallin } 23047c16975SMattias Wallin 23147c16975SMattias Wallin data = (u8)ret; 23247c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 23347c16975SMattias Wallin 23462579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 23562579266SRabin Vincent if (ret < 0) 23662579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 23762579266SRabin Vincent addr, ret); 23862579266SRabin Vincent 239bc628fd1SMattias Nilsson dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 240bc628fd1SMattias Nilsson data); 241bc628fd1SMattias Nilsson goto out; 242bc628fd1SMattias Nilsson } 243bc628fd1SMattias Nilsson ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 244bc628fd1SMattias Nilsson if (ret < 0) 245bc628fd1SMattias Nilsson dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 246bc628fd1SMattias Nilsson ret); 24762579266SRabin Vincent out: 24862579266SRabin Vincent mutex_unlock(&ab8500->lock); 24962579266SRabin Vincent return ret; 25062579266SRabin Vincent } 25147c16975SMattias Wallin 25247c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 25347c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 25447c16975SMattias Wallin { 255112a80d2SJonas Aaberg int ret; 25647c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 25747c16975SMattias Wallin 258112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 259112a80d2SJonas Aaberg ret= mask_and_set_register_interruptible(ab8500, bank, reg, 26047c16975SMattias Wallin bitmask, bitvalues); 261112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 262112a80d2SJonas Aaberg return ret; 26347c16975SMattias Wallin } 26447c16975SMattias Wallin 26547c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 26647c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 26747c16975SMattias Wallin .get_register = ab8500_get_register, 26847c16975SMattias Wallin .set_register = ab8500_set_register, 26947c16975SMattias Wallin .get_register_page = NULL, 27047c16975SMattias Wallin .set_register_page = NULL, 27147c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 27247c16975SMattias Wallin .event_registers_startup_state_get = NULL, 27347c16975SMattias Wallin .startup_irq_enabled = NULL, 27447c16975SMattias Wallin }; 27562579266SRabin Vincent 2769505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 27762579266SRabin Vincent { 2789505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 27962579266SRabin Vincent 28062579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 281112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 28262579266SRabin Vincent } 28362579266SRabin Vincent 2849505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 28562579266SRabin Vincent { 2869505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 28762579266SRabin Vincent int i; 28862579266SRabin Vincent 2892ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 29062579266SRabin Vincent u8 old = ab8500->oldmask[i]; 29162579266SRabin Vincent u8 new = ab8500->mask[i]; 29262579266SRabin Vincent int reg; 29362579266SRabin Vincent 29462579266SRabin Vincent if (new == old) 29562579266SRabin Vincent continue; 29662579266SRabin Vincent 2970f620837SLinus Walleij /* 2980f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 2990f620837SLinus Walleij * 2.0 3000f620837SLinus Walleij */ 3010f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 3020f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 30392d50a41SMattias Wallin continue; 30492d50a41SMattias Wallin 30562579266SRabin Vincent ab8500->oldmask[i] = new; 30662579266SRabin Vincent 3072ced445eSLinus Walleij reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 30847c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 30962579266SRabin Vincent } 310112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 31162579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 31262579266SRabin Vincent } 31362579266SRabin Vincent 3149505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 31562579266SRabin Vincent { 3169505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3179505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 31862579266SRabin Vincent int index = offset / 8; 31962579266SRabin Vincent int mask = 1 << (offset % 8); 32062579266SRabin Vincent 32162579266SRabin Vincent ab8500->mask[index] |= mask; 32262579266SRabin Vincent } 32362579266SRabin Vincent 3249505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 32562579266SRabin Vincent { 3269505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3279505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 32862579266SRabin Vincent int index = offset / 8; 32962579266SRabin Vincent int mask = 1 << (offset % 8); 33062579266SRabin Vincent 33162579266SRabin Vincent ab8500->mask[index] &= ~mask; 33262579266SRabin Vincent } 33362579266SRabin Vincent 33462579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 33562579266SRabin Vincent .name = "ab8500", 3369505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 3379505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 3389505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 339e6f9306eSVirupax Sadashivpetimath .irq_disable = ab8500_irq_mask, 3409505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 34162579266SRabin Vincent }; 34262579266SRabin Vincent 34362579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 34462579266SRabin Vincent { 34562579266SRabin Vincent struct ab8500 *ab8500 = dev; 34662579266SRabin Vincent int i; 34762579266SRabin Vincent 34862579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 34962579266SRabin Vincent 350112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 351112a80d2SJonas Aaberg 3522ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 3532ced445eSLinus Walleij int regoffset = ab8500->irq_reg_offset[i]; 35462579266SRabin Vincent int status; 35547c16975SMattias Wallin u8 value; 35662579266SRabin Vincent 3570f620837SLinus Walleij /* 3580f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 3590f620837SLinus Walleij * 2.0 3600f620837SLinus Walleij */ 3610f620837SLinus Walleij if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) 36292d50a41SMattias Wallin continue; 36392d50a41SMattias Wallin 36447c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 36547c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 36647c16975SMattias Wallin if (status < 0 || value == 0) 36762579266SRabin Vincent continue; 36862579266SRabin Vincent 36962579266SRabin Vincent do { 37088aec4f7SMattias Wallin int bit = __ffs(value); 37162579266SRabin Vincent int line = i * 8 + bit; 37262579266SRabin Vincent 37362579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 37447c16975SMattias Wallin value &= ~(1 << bit); 375112a80d2SJonas Aaberg 37647c16975SMattias Wallin } while (value); 37762579266SRabin Vincent } 378112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 37962579266SRabin Vincent return IRQ_HANDLED; 38062579266SRabin Vincent } 38162579266SRabin Vincent 38262579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 38362579266SRabin Vincent { 38462579266SRabin Vincent int base = ab8500->irq_base; 38562579266SRabin Vincent int irq; 3862ced445eSLinus Walleij int num_irqs; 38762579266SRabin Vincent 388d6255529SLinus Walleij if (is_ab9540(ab8500)) 389d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 390a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 391a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 392d6255529SLinus Walleij else 3932ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 3942ced445eSLinus Walleij 3952ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 396d5bb1221SThomas Gleixner irq_set_chip_data(irq, ab8500); 397d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, &ab8500_irq_chip, 39862579266SRabin Vincent handle_simple_irq); 399d5bb1221SThomas Gleixner irq_set_nested_thread(irq, 1); 40062579266SRabin Vincent #ifdef CONFIG_ARM 40162579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 40262579266SRabin Vincent #else 403d5bb1221SThomas Gleixner irq_set_noprobe(irq); 40462579266SRabin Vincent #endif 40562579266SRabin Vincent } 40662579266SRabin Vincent 40762579266SRabin Vincent return 0; 40862579266SRabin Vincent } 40962579266SRabin Vincent 41062579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 41162579266SRabin Vincent { 41262579266SRabin Vincent int base = ab8500->irq_base; 41362579266SRabin Vincent int irq; 4142ced445eSLinus Walleij int num_irqs; 41562579266SRabin Vincent 416d6255529SLinus Walleij if (is_ab9540(ab8500)) 417d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 418a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 419a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 420d6255529SLinus Walleij else 4212ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 4222ced445eSLinus Walleij 4232ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 42462579266SRabin Vincent #ifdef CONFIG_ARM 42562579266SRabin Vincent set_irq_flags(irq, 0); 42662579266SRabin Vincent #endif 427d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, NULL, NULL); 428d5bb1221SThomas Gleixner irq_set_chip_data(irq, NULL); 42962579266SRabin Vincent } 43062579266SRabin Vincent } 43162579266SRabin Vincent 432112a80d2SJonas Aaberg int ab8500_suspend(struct ab8500 *ab8500) 433112a80d2SJonas Aaberg { 434112a80d2SJonas Aaberg if (atomic_read(&ab8500->transfer_ongoing)) 435112a80d2SJonas Aaberg return -EINVAL; 436112a80d2SJonas Aaberg else 437112a80d2SJonas Aaberg return 0; 438112a80d2SJonas Aaberg } 439112a80d2SJonas Aaberg 440d6255529SLinus Walleij /* AB8500 GPIO Resources */ 4415cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = { 4420cb3fcd7SBibek Basu { 4430cb3fcd7SBibek Basu .name = "GPIO_INT6", 4440cb3fcd7SBibek Basu .start = AB8500_INT_GPIO6R, 4450cb3fcd7SBibek Basu .end = AB8500_INT_GPIO41F, 4460cb3fcd7SBibek Basu .flags = IORESOURCE_IRQ, 4470cb3fcd7SBibek Basu } 4480cb3fcd7SBibek Basu }; 4490cb3fcd7SBibek Basu 450d6255529SLinus Walleij /* AB9540 GPIO Resources */ 451d6255529SLinus Walleij static struct resource __devinitdata ab9540_gpio_resources[] = { 452d6255529SLinus Walleij { 453d6255529SLinus Walleij .name = "GPIO_INT6", 454d6255529SLinus Walleij .start = AB8500_INT_GPIO6R, 455d6255529SLinus Walleij .end = AB8500_INT_GPIO41F, 456d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 457d6255529SLinus Walleij }, 458d6255529SLinus Walleij { 459d6255529SLinus Walleij .name = "GPIO_INT14", 460d6255529SLinus Walleij .start = AB9540_INT_GPIO50R, 461d6255529SLinus Walleij .end = AB9540_INT_GPIO54R, 462d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 463d6255529SLinus Walleij }, 464d6255529SLinus Walleij { 465d6255529SLinus Walleij .name = "GPIO_INT15", 466d6255529SLinus Walleij .start = AB9540_INT_GPIO50F, 467d6255529SLinus Walleij .end = AB9540_INT_GPIO54F, 468d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 469d6255529SLinus Walleij } 470d6255529SLinus Walleij }; 471d6255529SLinus Walleij 4725cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = { 47362579266SRabin Vincent { 47462579266SRabin Vincent .name = "HW_CONV_END", 47562579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 47662579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 47762579266SRabin Vincent .flags = IORESOURCE_IRQ, 47862579266SRabin Vincent }, 47962579266SRabin Vincent { 48062579266SRabin Vincent .name = "SW_CONV_END", 48162579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 48262579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 48362579266SRabin Vincent .flags = IORESOURCE_IRQ, 48462579266SRabin Vincent }, 48562579266SRabin Vincent }; 48662579266SRabin Vincent 4875cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = { 48862579266SRabin Vincent { 48962579266SRabin Vincent .name = "60S", 49062579266SRabin Vincent .start = AB8500_INT_RTC_60S, 49162579266SRabin Vincent .end = AB8500_INT_RTC_60S, 49262579266SRabin Vincent .flags = IORESOURCE_IRQ, 49362579266SRabin Vincent }, 49462579266SRabin Vincent { 49562579266SRabin Vincent .name = "ALARM", 49662579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 49762579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 49862579266SRabin Vincent .flags = IORESOURCE_IRQ, 49962579266SRabin Vincent }, 50062579266SRabin Vincent }; 50162579266SRabin Vincent 5025cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { 50377686517SSundar R Iyer { 50477686517SSundar R Iyer .name = "ONKEY_DBF", 50577686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 50677686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 50777686517SSundar R Iyer .flags = IORESOURCE_IRQ, 50877686517SSundar R Iyer }, 50977686517SSundar R Iyer { 51077686517SSundar R Iyer .name = "ONKEY_DBR", 51177686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 51277686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 51377686517SSundar R Iyer .flags = IORESOURCE_IRQ, 51477686517SSundar R Iyer }, 51577686517SSundar R Iyer }; 51677686517SSundar R Iyer 5176af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { 518e098adedSMattias Wallin { 5196af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_F", 5206af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_F, 5216af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_F, 522e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 523e098adedSMattias Wallin }, 524e098adedSMattias Wallin { 5256af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_R", 5266af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_R, 5276af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_R, 528e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 529e098adedSMattias Wallin }, 530e098adedSMattias Wallin { 5316af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_F", 5326af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_F, 5336af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_F, 5346af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5356af75ecdSLinus Walleij }, 5366af75ecdSLinus Walleij { 5376af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_R", 5386af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_R, 5396af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_R, 5406af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5416af75ecdSLinus Walleij }, 5426af75ecdSLinus Walleij { 5436af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_F", 5446af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_F, 5456af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_F, 5466af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5476af75ecdSLinus Walleij }, 5486af75ecdSLinus Walleij { 5496af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_R", 5506af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_R, 5516af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_R, 5526af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5536af75ecdSLinus Walleij }, 5546af75ecdSLinus Walleij }; 5556af75ecdSLinus Walleij 5566af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = { 5576af75ecdSLinus Walleij { 558e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 559e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 560e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 561e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 562e098adedSMattias Wallin }, 563e098adedSMattias Wallin { 564e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 565e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 566e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 567e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 568e098adedSMattias Wallin }, 569e098adedSMattias Wallin { 570e098adedSMattias Wallin .name = "VBUS_DET_R", 571e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 572e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 573e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 574e098adedSMattias Wallin }, 575e098adedSMattias Wallin { 5766af75ecdSLinus Walleij .name = "VBUS_DET_F", 5776af75ecdSLinus Walleij .start = AB8500_INT_VBUS_DET_F, 5786af75ecdSLinus Walleij .end = AB8500_INT_VBUS_DET_F, 579e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 580e098adedSMattias Wallin }, 581e098adedSMattias Wallin { 5826af75ecdSLinus Walleij .name = "USB_LINK_STATUS", 5836af75ecdSLinus Walleij .start = AB8500_INT_USB_LINK_STATUS, 5846af75ecdSLinus Walleij .end = AB8500_INT_USB_LINK_STATUS, 5856af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5866af75ecdSLinus Walleij }, 5876af75ecdSLinus Walleij { 588e098adedSMattias Wallin .name = "VBUS_OVV", 589e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 590e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 591e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 592e098adedSMattias Wallin }, 593e098adedSMattias Wallin { 5946af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_R", 5956af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_R, 5966af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_R, 597e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 598e098adedSMattias Wallin }, 599e098adedSMattias Wallin { 6006af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_F", 6016af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_F, 6026af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_F, 603e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 604e098adedSMattias Wallin }, 605e098adedSMattias Wallin { 6066af75ecdSLinus Walleij .name = "MAIN_EXT_CH_NOT_OK", 6076af75ecdSLinus Walleij .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 6086af75ecdSLinus Walleij .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 6096af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6106af75ecdSLinus Walleij }, 6116af75ecdSLinus Walleij { 6126af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_R", 6136af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_R, 6146af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_R, 6156af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6166af75ecdSLinus Walleij }, 6176af75ecdSLinus Walleij { 6186af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_F", 6196af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_F, 6206af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_F, 6216af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6226af75ecdSLinus Walleij }, 6236af75ecdSLinus Walleij { 6246af75ecdSLinus Walleij .name = "USB_CHARGER_NOT_OKR", 625a982362cSBengt Jonsson .start = AB8500_INT_USB_CHARGER_NOT_OKR, 626a982362cSBengt Jonsson .end = AB8500_INT_USB_CHARGER_NOT_OKR, 6276af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6286af75ecdSLinus Walleij }, 6296af75ecdSLinus Walleij { 6306af75ecdSLinus Walleij .name = "CH_WD_EXP", 6316af75ecdSLinus Walleij .start = AB8500_INT_CH_WD_EXP, 6326af75ecdSLinus Walleij .end = AB8500_INT_CH_WD_EXP, 6336af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6346af75ecdSLinus Walleij }, 6356af75ecdSLinus Walleij }; 6366af75ecdSLinus Walleij 6376af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = { 6386af75ecdSLinus Walleij { 6396af75ecdSLinus Walleij .name = "BAT_CTRL_INDB", 6406af75ecdSLinus Walleij .start = AB8500_INT_BAT_CTRL_INDB, 6416af75ecdSLinus Walleij .end = AB8500_INT_BAT_CTRL_INDB, 642e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 643e098adedSMattias Wallin }, 644e098adedSMattias Wallin { 645e098adedSMattias Wallin .name = "BTEMP_LOW", 646e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 647e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 648e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 649e098adedSMattias Wallin }, 650e098adedSMattias Wallin { 651e098adedSMattias Wallin .name = "BTEMP_HIGH", 652e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 653e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 654e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 655e098adedSMattias Wallin }, 656e098adedSMattias Wallin { 6576af75ecdSLinus Walleij .name = "BTEMP_LOW_MEDIUM", 6586af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_LOW_MEDIUM, 6596af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_LOW_MEDIUM, 660e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 661e098adedSMattias Wallin }, 662e098adedSMattias Wallin { 6636af75ecdSLinus Walleij .name = "BTEMP_MEDIUM_HIGH", 6646af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 6656af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 666e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 667e098adedSMattias Wallin }, 668e098adedSMattias Wallin }; 669e098adedSMattias Wallin 6706af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = { 6716af75ecdSLinus Walleij { 6726af75ecdSLinus Walleij .name = "NCONV_ACCU", 6736af75ecdSLinus Walleij .start = AB8500_INT_CCN_CONV_ACC, 6746af75ecdSLinus Walleij .end = AB8500_INT_CCN_CONV_ACC, 6756af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6766af75ecdSLinus Walleij }, 6776af75ecdSLinus Walleij { 6786af75ecdSLinus Walleij .name = "BATT_OVV", 6796af75ecdSLinus Walleij .start = AB8500_INT_BATT_OVV, 6806af75ecdSLinus Walleij .end = AB8500_INT_BATT_OVV, 6816af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6826af75ecdSLinus Walleij }, 6836af75ecdSLinus Walleij { 6846af75ecdSLinus Walleij .name = "LOW_BAT_F", 6856af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_F, 6866af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_F, 6876af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6886af75ecdSLinus Walleij }, 6896af75ecdSLinus Walleij { 6906af75ecdSLinus Walleij .name = "LOW_BAT_R", 6916af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_R, 6926af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_R, 6936af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6946af75ecdSLinus Walleij }, 6956af75ecdSLinus Walleij { 6966af75ecdSLinus Walleij .name = "CC_INT_CALIB", 6976af75ecdSLinus Walleij .start = AB8500_INT_CC_INT_CALIB, 6986af75ecdSLinus Walleij .end = AB8500_INT_CC_INT_CALIB, 6996af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7006af75ecdSLinus Walleij }, 701a982362cSBengt Jonsson { 702a982362cSBengt Jonsson .name = "CCEOC", 703a982362cSBengt Jonsson .start = AB8500_INT_CCEOC, 704a982362cSBengt Jonsson .end = AB8500_INT_CCEOC, 705a982362cSBengt Jonsson .flags = IORESOURCE_IRQ, 706a982362cSBengt Jonsson }, 7076af75ecdSLinus Walleij }; 7086af75ecdSLinus Walleij 7096af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {}; 7106af75ecdSLinus Walleij 711df720647SAxel Lin #ifdef CONFIG_DEBUG_FS 7125cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = { 713e098adedSMattias Wallin { 714e098adedSMattias Wallin .name = "IRQ_FIRST", 715e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 716e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 717e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 718e098adedSMattias Wallin }, 719e098adedSMattias Wallin { 720e098adedSMattias Wallin .name = "IRQ_LAST", 721a982362cSBengt Jonsson .start = AB8500_INT_XTAL32K_KO, 722a982362cSBengt Jonsson .end = AB8500_INT_XTAL32K_KO, 723e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 724e098adedSMattias Wallin }, 725e098adedSMattias Wallin }; 726df720647SAxel Lin #endif 727e098adedSMattias Wallin 7285cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = { 729e098adedSMattias Wallin { 730e098adedSMattias Wallin .name = "ID_WAKEUP_R", 731e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 732e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 733e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 734e098adedSMattias Wallin }, 735e098adedSMattias Wallin { 736e098adedSMattias Wallin .name = "ID_WAKEUP_F", 737e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 738e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 739e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 740e098adedSMattias Wallin }, 741e098adedSMattias Wallin { 742e098adedSMattias Wallin .name = "VBUS_DET_F", 743e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 744e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 745e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 746e098adedSMattias Wallin }, 747e098adedSMattias Wallin { 748e098adedSMattias Wallin .name = "VBUS_DET_R", 749e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 750e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 751e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 752e098adedSMattias Wallin }, 75392d50a41SMattias Wallin { 75492d50a41SMattias Wallin .name = "USB_LINK_STATUS", 75592d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 75692d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 75792d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 75892d50a41SMattias Wallin }, 7596af75ecdSLinus Walleij { 7606af75ecdSLinus Walleij .name = "USB_ADP_PROBE_PLUG", 7616af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_PLUG, 7626af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_PLUG, 7636af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7646af75ecdSLinus Walleij }, 7656af75ecdSLinus Walleij { 7666af75ecdSLinus Walleij .name = "USB_ADP_PROBE_UNPLUG", 7676af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_UNPLUG, 7686af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_UNPLUG, 7696af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7706af75ecdSLinus Walleij }, 771e098adedSMattias Wallin }; 772e098adedSMattias Wallin 77344f72e53SVirupax Sadashivpetimath static struct resource __devinitdata ab8505_iddet_resources[] = { 77444f72e53SVirupax Sadashivpetimath { 77544f72e53SVirupax Sadashivpetimath .name = "KeyDeglitch", 77644f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYDEGLITCH, 77744f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYDEGLITCH, 77844f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 77944f72e53SVirupax Sadashivpetimath }, 78044f72e53SVirupax Sadashivpetimath { 78144f72e53SVirupax Sadashivpetimath .name = "KP", 78244f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KP, 78344f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KP, 78444f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 78544f72e53SVirupax Sadashivpetimath }, 78644f72e53SVirupax Sadashivpetimath { 78744f72e53SVirupax Sadashivpetimath .name = "IKP", 78844f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKP, 78944f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKP, 79044f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 79144f72e53SVirupax Sadashivpetimath }, 79244f72e53SVirupax Sadashivpetimath { 79344f72e53SVirupax Sadashivpetimath .name = "IKR", 79444f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKR, 79544f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKR, 79644f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 79744f72e53SVirupax Sadashivpetimath }, 79844f72e53SVirupax Sadashivpetimath { 79944f72e53SVirupax Sadashivpetimath .name = "KeyStuck", 80044f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYSTUCK, 80144f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYSTUCK, 80244f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 80344f72e53SVirupax Sadashivpetimath }, 80444f72e53SVirupax Sadashivpetimath }; 80544f72e53SVirupax Sadashivpetimath 8065cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = { 807e098adedSMattias Wallin { 808e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 809e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 810e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 811e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 812e098adedSMattias Wallin }, 813e098adedSMattias Wallin }; 814e098adedSMattias Wallin 815d6255529SLinus Walleij static struct mfd_cell __devinitdata abx500_common_devs[] = { 8165814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 8175814fc35SMattias Wallin { 8185814fc35SMattias Wallin .name = "ab8500-debug", 819e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 820e098adedSMattias Wallin .resources = ab8500_debug_resources, 8215814fc35SMattias Wallin }, 8225814fc35SMattias Wallin #endif 82362579266SRabin Vincent { 824e098adedSMattias Wallin .name = "ab8500-sysctrl", 825e098adedSMattias Wallin }, 826e098adedSMattias Wallin { 827e098adedSMattias Wallin .name = "ab8500-regulator", 828e098adedSMattias Wallin }, 829e098adedSMattias Wallin { 83062579266SRabin Vincent .name = "ab8500-gpadc", 83162579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 83262579266SRabin Vincent .resources = ab8500_gpadc_resources, 83362579266SRabin Vincent }, 83462579266SRabin Vincent { 83562579266SRabin Vincent .name = "ab8500-rtc", 83662579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 83762579266SRabin Vincent .resources = ab8500_rtc_resources, 83862579266SRabin Vincent }, 839f0f05b1cSArun Murthy { 8406af75ecdSLinus Walleij .name = "ab8500-acc-det", 8416af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 8426af75ecdSLinus Walleij .resources = ab8500_av_acc_detect_resources, 8436af75ecdSLinus Walleij }, 8446af75ecdSLinus Walleij { 845e098adedSMattias Wallin .name = "ab8500-poweron-key", 846e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 847e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 848e098adedSMattias Wallin }, 849e098adedSMattias Wallin { 850f0f05b1cSArun Murthy .name = "ab8500-pwm", 851f0f05b1cSArun Murthy .id = 1, 852f0f05b1cSArun Murthy }, 853f0f05b1cSArun Murthy { 854f0f05b1cSArun Murthy .name = "ab8500-pwm", 855f0f05b1cSArun Murthy .id = 2, 856f0f05b1cSArun Murthy }, 857f0f05b1cSArun Murthy { 858f0f05b1cSArun Murthy .name = "ab8500-pwm", 859f0f05b1cSArun Murthy .id = 3, 860f0f05b1cSArun Murthy }, 861e098adedSMattias Wallin { .name = "ab8500-leds", }, 86277686517SSundar R Iyer { 863e098adedSMattias Wallin .name = "ab8500-denc", 864e098adedSMattias Wallin }, 865e098adedSMattias Wallin { 866e098adedSMattias Wallin .name = "ab8500-temp", 867e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 868e098adedSMattias Wallin .resources = ab8500_temp_resources, 86977686517SSundar R Iyer }, 87062579266SRabin Vincent }; 87162579266SRabin Vincent 872*6ef9418cSRickard Andersson static struct mfd_cell __devinitdata ab8500_bm_devs[] = { 873*6ef9418cSRickard Andersson { 874*6ef9418cSRickard Andersson .name = "ab8500-charger", 875*6ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_charger_resources), 876*6ef9418cSRickard Andersson .resources = ab8500_charger_resources, 877*6ef9418cSRickard Andersson }, 878*6ef9418cSRickard Andersson { 879*6ef9418cSRickard Andersson .name = "ab8500-btemp", 880*6ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 881*6ef9418cSRickard Andersson .resources = ab8500_btemp_resources, 882*6ef9418cSRickard Andersson }, 883*6ef9418cSRickard Andersson { 884*6ef9418cSRickard Andersson .name = "ab8500-fg", 885*6ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_fg_resources), 886*6ef9418cSRickard Andersson .resources = ab8500_fg_resources, 887*6ef9418cSRickard Andersson }, 888*6ef9418cSRickard Andersson { 889*6ef9418cSRickard Andersson .name = "ab8500-chargalg", 890*6ef9418cSRickard Andersson .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 891*6ef9418cSRickard Andersson .resources = ab8500_chargalg_resources, 892*6ef9418cSRickard Andersson }, 893*6ef9418cSRickard Andersson }; 894*6ef9418cSRickard Andersson 895d6255529SLinus Walleij static struct mfd_cell __devinitdata ab8500_devs[] = { 896d6255529SLinus Walleij { 897d6255529SLinus Walleij .name = "ab8500-gpio", 898d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_gpio_resources), 899d6255529SLinus Walleij .resources = ab8500_gpio_resources, 900d6255529SLinus Walleij }, 901d6255529SLinus Walleij { 902d6255529SLinus Walleij .name = "ab8500-usb", 903d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 904d6255529SLinus Walleij .resources = ab8500_usb_resources, 905d6255529SLinus Walleij }, 90644f72e53SVirupax Sadashivpetimath { 90744f72e53SVirupax Sadashivpetimath .name = "ab8500-codec", 90844f72e53SVirupax Sadashivpetimath }, 909d6255529SLinus Walleij }; 910d6255529SLinus Walleij 911d6255529SLinus Walleij static struct mfd_cell __devinitdata ab9540_devs[] = { 912d6255529SLinus Walleij { 913d6255529SLinus Walleij .name = "ab8500-gpio", 914d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab9540_gpio_resources), 915d6255529SLinus Walleij .resources = ab9540_gpio_resources, 916d6255529SLinus Walleij }, 917d6255529SLinus Walleij { 918d6255529SLinus Walleij .name = "ab9540-usb", 919d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 920d6255529SLinus Walleij .resources = ab8500_usb_resources, 921d6255529SLinus Walleij }, 92244f72e53SVirupax Sadashivpetimath { 92344f72e53SVirupax Sadashivpetimath .name = "ab9540-codec", 92444f72e53SVirupax Sadashivpetimath }, 92544f72e53SVirupax Sadashivpetimath }; 92644f72e53SVirupax Sadashivpetimath 92744f72e53SVirupax Sadashivpetimath /* Device list common to ab9540 and ab8505 */ 92844f72e53SVirupax Sadashivpetimath static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = { 92944f72e53SVirupax Sadashivpetimath { 93044f72e53SVirupax Sadashivpetimath .name = "ab-iddet", 93144f72e53SVirupax Sadashivpetimath .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 93244f72e53SVirupax Sadashivpetimath .resources = ab8505_iddet_resources, 93344f72e53SVirupax Sadashivpetimath }, 934d6255529SLinus Walleij }; 935d6255529SLinus Walleij 936cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 937cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 938cca69b67SMattias Wallin { 939cca69b67SMattias Wallin struct ab8500 *ab8500; 940cca69b67SMattias Wallin 941cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 942cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 943cca69b67SMattias Wallin } 944cca69b67SMattias Wallin 945e5c238c3SMattias Wallin /* 946e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 947e5c238c3SMattias Wallin * 0x01 Swoff bit programming 948e5c238c3SMattias Wallin * 0x02 Thermal protection activation 949e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 950e5c238c3SMattias Wallin * 0x08 Watchdog expired 951e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 952e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 953e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 954e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 955e5c238c3SMattias Wallin */ 956e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 957e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 958e5c238c3SMattias Wallin { 959e5c238c3SMattias Wallin int ret; 960e5c238c3SMattias Wallin u8 value; 961e5c238c3SMattias Wallin struct ab8500 *ab8500; 962e5c238c3SMattias Wallin 963e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 964e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 965e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 966e5c238c3SMattias Wallin if (ret < 0) 967e5c238c3SMattias Wallin return ret; 968e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 969e5c238c3SMattias Wallin } 970e5c238c3SMattias Wallin 971b4a31037SAndrew Lynn /* 972b4a31037SAndrew Lynn * ab8500 has turned on due to (TURN_ON_STATUS): 973b4a31037SAndrew Lynn * 0x01 PORnVbat 974b4a31037SAndrew Lynn * 0x02 PonKey1dbF 975b4a31037SAndrew Lynn * 0x04 PonKey2dbF 976b4a31037SAndrew Lynn * 0x08 RTCAlarm 977b4a31037SAndrew Lynn * 0x10 MainChDet 978b4a31037SAndrew Lynn * 0x20 VbusDet 979b4a31037SAndrew Lynn * 0x40 UsbIDDetect 980b4a31037SAndrew Lynn * 0x80 Reserved 981b4a31037SAndrew Lynn */ 982b4a31037SAndrew Lynn static ssize_t show_turn_on_status(struct device *dev, 983b4a31037SAndrew Lynn struct device_attribute *attr, char *buf) 984b4a31037SAndrew Lynn { 985b4a31037SAndrew Lynn int ret; 986b4a31037SAndrew Lynn u8 value; 987b4a31037SAndrew Lynn struct ab8500 *ab8500; 988b4a31037SAndrew Lynn 989b4a31037SAndrew Lynn ab8500 = dev_get_drvdata(dev); 990b4a31037SAndrew Lynn ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 991b4a31037SAndrew Lynn AB8500_TURN_ON_STATUS, &value); 992b4a31037SAndrew Lynn if (ret < 0) 993b4a31037SAndrew Lynn return ret; 994b4a31037SAndrew Lynn return sprintf(buf, "%#x\n", value); 995b4a31037SAndrew Lynn } 996b4a31037SAndrew Lynn 997d6255529SLinus Walleij static ssize_t show_ab9540_dbbrstn(struct device *dev, 998d6255529SLinus Walleij struct device_attribute *attr, char *buf) 999d6255529SLinus Walleij { 1000d6255529SLinus Walleij struct ab8500 *ab8500; 1001d6255529SLinus Walleij int ret; 1002d6255529SLinus Walleij u8 value; 1003d6255529SLinus Walleij 1004d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1005d6255529SLinus Walleij 1006d6255529SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 1007d6255529SLinus Walleij AB9540_MODEM_CTRL2_REG, &value); 1008d6255529SLinus Walleij if (ret < 0) 1009d6255529SLinus Walleij return ret; 1010d6255529SLinus Walleij 1011d6255529SLinus Walleij return sprintf(buf, "%d\n", 1012d6255529SLinus Walleij (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 1013d6255529SLinus Walleij } 1014d6255529SLinus Walleij 1015d6255529SLinus Walleij static ssize_t store_ab9540_dbbrstn(struct device *dev, 1016d6255529SLinus Walleij struct device_attribute *attr, const char *buf, size_t count) 1017d6255529SLinus Walleij { 1018d6255529SLinus Walleij struct ab8500 *ab8500; 1019d6255529SLinus Walleij int ret = count; 1020d6255529SLinus Walleij int err; 1021d6255529SLinus Walleij u8 bitvalues; 1022d6255529SLinus Walleij 1023d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1024d6255529SLinus Walleij 1025d6255529SLinus Walleij if (count > 0) { 1026d6255529SLinus Walleij switch (buf[0]) { 1027d6255529SLinus Walleij case '0': 1028d6255529SLinus Walleij bitvalues = 0; 1029d6255529SLinus Walleij break; 1030d6255529SLinus Walleij case '1': 1031d6255529SLinus Walleij bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1032d6255529SLinus Walleij break; 1033d6255529SLinus Walleij default: 1034d6255529SLinus Walleij goto exit; 1035d6255529SLinus Walleij } 1036d6255529SLinus Walleij 1037d6255529SLinus Walleij err = mask_and_set_register_interruptible(ab8500, 1038d6255529SLinus Walleij AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1039d6255529SLinus Walleij AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1040d6255529SLinus Walleij if (err) 1041d6255529SLinus Walleij dev_info(ab8500->dev, 1042d6255529SLinus Walleij "Failed to set DBBRSTN %c, err %#x\n", 1043d6255529SLinus Walleij buf[0], err); 1044d6255529SLinus Walleij } 1045d6255529SLinus Walleij 1046d6255529SLinus Walleij exit: 1047d6255529SLinus Walleij return ret; 1048d6255529SLinus Walleij } 1049d6255529SLinus Walleij 1050cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1051e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1052b4a31037SAndrew Lynn static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1053d6255529SLinus Walleij static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1054d6255529SLinus Walleij show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1055cca69b67SMattias Wallin 1056cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 1057cca69b67SMattias Wallin &dev_attr_chip_id.attr, 1058e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 1059b4a31037SAndrew Lynn &dev_attr_turn_on_status.attr, 1060cca69b67SMattias Wallin NULL, 1061cca69b67SMattias Wallin }; 1062cca69b67SMattias Wallin 1063d6255529SLinus Walleij static struct attribute *ab9540_sysfs_entries[] = { 1064d6255529SLinus Walleij &dev_attr_chip_id.attr, 1065d6255529SLinus Walleij &dev_attr_switch_off_status.attr, 1066d6255529SLinus Walleij &dev_attr_turn_on_status.attr, 1067d6255529SLinus Walleij &dev_attr_dbbrstn.attr, 1068d6255529SLinus Walleij NULL, 1069d6255529SLinus Walleij }; 1070d6255529SLinus Walleij 1071cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 1072cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 1073cca69b67SMattias Wallin }; 1074cca69b67SMattias Wallin 1075d6255529SLinus Walleij static struct attribute_group ab9540_attr_group = { 1076d6255529SLinus Walleij .attrs = ab9540_sysfs_entries, 1077d6255529SLinus Walleij }; 1078d6255529SLinus Walleij 10790f620837SLinus Walleij int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) 108062579266SRabin Vincent { 108162579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 108262579266SRabin Vincent int ret; 108362579266SRabin Vincent int i; 108447c16975SMattias Wallin u8 value; 108562579266SRabin Vincent 108662579266SRabin Vincent if (plat) 108762579266SRabin Vincent ab8500->irq_base = plat->irq_base; 108862579266SRabin Vincent 108962579266SRabin Vincent mutex_init(&ab8500->lock); 109062579266SRabin Vincent mutex_init(&ab8500->irq_lock); 1091112a80d2SJonas Aaberg atomic_set(&ab8500->transfer_ongoing, 0); 109262579266SRabin Vincent 10930f620837SLinus Walleij if (version != AB8500_VERSION_UNDEFINED) 10940f620837SLinus Walleij ab8500->version = version; 10950f620837SLinus Walleij else { 10960f620837SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_MISC, 10970f620837SLinus Walleij AB8500_IC_NAME_REG, &value); 10980f620837SLinus Walleij if (ret < 0) 10990f620837SLinus Walleij return ret; 11000f620837SLinus Walleij 11010f620837SLinus Walleij ab8500->version = value; 11020f620837SLinus Walleij } 11030f620837SLinus Walleij 110447c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 110547c16975SMattias Wallin AB8500_REV_REG, &value); 110662579266SRabin Vincent if (ret < 0) 110762579266SRabin Vincent return ret; 110862579266SRabin Vincent 110947c16975SMattias Wallin ab8500->chip_id = value; 111062579266SRabin Vincent 11110f620837SLinus Walleij dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 11120f620837SLinus Walleij ab8500_version_str[ab8500->version], 11130f620837SLinus Walleij ab8500->chip_id >> 4, 11140f620837SLinus Walleij ab8500->chip_id & 0x0F); 11150f620837SLinus Walleij 1116d6255529SLinus Walleij /* Configure AB8500 or AB9540 IRQ */ 1117a982362cSBengt Jonsson if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1118d6255529SLinus Walleij ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1119d6255529SLinus Walleij ab8500->irq_reg_offset = ab9540_irq_regoffset; 1120d6255529SLinus Walleij } else { 11212ced445eSLinus Walleij ab8500->mask_size = AB8500_NUM_IRQ_REGS; 11222ced445eSLinus Walleij ab8500->irq_reg_offset = ab8500_irq_regoffset; 1123d6255529SLinus Walleij } 11242ced445eSLinus Walleij ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); 11252ced445eSLinus Walleij if (!ab8500->mask) 11262ced445eSLinus Walleij return -ENOMEM; 11272ced445eSLinus Walleij ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); 11282ced445eSLinus Walleij if (!ab8500->oldmask) { 11292ced445eSLinus Walleij ret = -ENOMEM; 11302ced445eSLinus Walleij goto out_freemask; 11312ced445eSLinus Walleij } 1132e5c238c3SMattias Wallin /* 1133e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1134e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1135e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1136e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1137e5c238c3SMattias Wallin * 0x08 Watchdog expired 1138e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1139e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1140e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1141e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1142e5c238c3SMattias Wallin */ 1143e5c238c3SMattias Wallin 1144e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1145e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1146e5c238c3SMattias Wallin if (ret < 0) 1147e5c238c3SMattias Wallin return ret; 1148e5c238c3SMattias Wallin dev_info(ab8500->dev, "switch off status: %#x", value); 1149e5c238c3SMattias Wallin 115062579266SRabin Vincent if (plat && plat->init) 115162579266SRabin Vincent plat->init(ab8500); 115262579266SRabin Vincent 115362579266SRabin Vincent /* Clear and mask all interrupts */ 11542ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 11550f620837SLinus Walleij /* 11560f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 11570f620837SLinus Walleij * 2.0 11580f620837SLinus Walleij */ 11590f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 11600f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 116192d50a41SMattias Wallin continue; 116262579266SRabin Vincent 116347c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 11642ced445eSLinus Walleij AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 116592d50a41SMattias Wallin &value); 116647c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 11672ced445eSLinus Walleij AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 116862579266SRabin Vincent } 116962579266SRabin Vincent 117047c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 117147c16975SMattias Wallin if (ret) 11722ced445eSLinus Walleij goto out_freeoldmask; 117347c16975SMattias Wallin 11742ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) 117562579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 117662579266SRabin Vincent 117762579266SRabin Vincent if (ab8500->irq_base) { 117862579266SRabin Vincent ret = ab8500_irq_init(ab8500); 117962579266SRabin Vincent if (ret) 11802ced445eSLinus Walleij goto out_freeoldmask; 118162579266SRabin Vincent 118262579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 11834f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 11844f079985SMattias Wallin "ab8500", ab8500); 118562579266SRabin Vincent if (ret) 118662579266SRabin Vincent goto out_removeirq; 118762579266SRabin Vincent } 118862579266SRabin Vincent 1189d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, 1190d6255529SLinus Walleij ARRAY_SIZE(abx500_common_devs), NULL, 1191d6255529SLinus Walleij ab8500->irq_base); 1192d6255529SLinus Walleij 1193d6255529SLinus Walleij if (ret) 1194d6255529SLinus Walleij goto out_freeirq; 1195d6255529SLinus Walleij 1196d6255529SLinus Walleij if (is_ab9540(ab8500)) 1197d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1198d6255529SLinus Walleij ARRAY_SIZE(ab9540_devs), NULL, 1199d6255529SLinus Walleij ab8500->irq_base); 1200d6255529SLinus Walleij else 1201549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 120244f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab8500_devs), NULL, 120362579266SRabin Vincent ab8500->irq_base); 120444f72e53SVirupax Sadashivpetimath 120544f72e53SVirupax Sadashivpetimath if (is_ab9540(ab8500) || is_ab8505(ab8500)) 120644f72e53SVirupax Sadashivpetimath ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, 120744f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab9540_ab8505_devs), NULL, 120844f72e53SVirupax Sadashivpetimath ab8500->irq_base); 120944f72e53SVirupax Sadashivpetimath 121062579266SRabin Vincent if (ret) 121162579266SRabin Vincent goto out_freeirq; 121262579266SRabin Vincent 1213*6ef9418cSRickard Andersson if (!no_bm) { 1214*6ef9418cSRickard Andersson /* Add battery management devices */ 1215*6ef9418cSRickard Andersson ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs, 1216*6ef9418cSRickard Andersson ARRAY_SIZE(ab8500_bm_devs), NULL, 1217*6ef9418cSRickard Andersson ab8500->irq_base); 1218*6ef9418cSRickard Andersson if (ret) 1219*6ef9418cSRickard Andersson dev_err(ab8500->dev, "error adding bm devices\n"); 1220*6ef9418cSRickard Andersson } 1221*6ef9418cSRickard Andersson 1222d6255529SLinus Walleij if (is_ab9540(ab8500)) 1223d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1224d6255529SLinus Walleij &ab9540_attr_group); 1225d6255529SLinus Walleij else 1226d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1227d6255529SLinus Walleij &ab8500_attr_group); 1228cca69b67SMattias Wallin if (ret) 1229cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 1230d6255529SLinus Walleij else 123162579266SRabin Vincent return ret; 123262579266SRabin Vincent 123362579266SRabin Vincent out_freeirq: 12346d95b7fdSLinus Walleij if (ab8500->irq_base) 123562579266SRabin Vincent free_irq(ab8500->irq, ab8500); 123662579266SRabin Vincent out_removeirq: 12376d95b7fdSLinus Walleij if (ab8500->irq_base) 123862579266SRabin Vincent ab8500_irq_remove(ab8500); 12392ced445eSLinus Walleij out_freeoldmask: 12402ced445eSLinus Walleij kfree(ab8500->oldmask); 12412ced445eSLinus Walleij out_freemask: 12422ced445eSLinus Walleij kfree(ab8500->mask); 12436d95b7fdSLinus Walleij 124462579266SRabin Vincent return ret; 124562579266SRabin Vincent } 124662579266SRabin Vincent 124762579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 124862579266SRabin Vincent { 1249d6255529SLinus Walleij if (is_ab9540(ab8500)) 1250d6255529SLinus Walleij sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1251d6255529SLinus Walleij else 1252cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 125362579266SRabin Vincent mfd_remove_devices(ab8500->dev); 125462579266SRabin Vincent if (ab8500->irq_base) { 125562579266SRabin Vincent free_irq(ab8500->irq, ab8500); 125662579266SRabin Vincent ab8500_irq_remove(ab8500); 125762579266SRabin Vincent } 12582ced445eSLinus Walleij kfree(ab8500->oldmask); 12592ced445eSLinus Walleij kfree(ab8500->mask); 126062579266SRabin Vincent 126162579266SRabin Vincent return 0; 126262579266SRabin Vincent } 126362579266SRabin Vincent 1264adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 126562579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 126662579266SRabin Vincent MODULE_LICENSE("GPL v2"); 1267