162579266SRabin Vincent /* 262579266SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 362579266SRabin Vincent * 462579266SRabin Vincent * License Terms: GNU General Public License v2 562579266SRabin Vincent * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> 662579266SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> 7adceed62SMattias Wallin * Author: Mattias Wallin <mattias.wallin@stericsson.com> 862579266SRabin Vincent */ 962579266SRabin Vincent 1062579266SRabin Vincent #include <linux/kernel.h> 1162579266SRabin Vincent #include <linux/slab.h> 1262579266SRabin Vincent #include <linux/init.h> 1362579266SRabin Vincent #include <linux/irq.h> 1462579266SRabin Vincent #include <linux/delay.h> 1562579266SRabin Vincent #include <linux/interrupt.h> 1662579266SRabin Vincent #include <linux/module.h> 1762579266SRabin Vincent #include <linux/platform_device.h> 1862579266SRabin Vincent #include <linux/mfd/core.h> 1947c16975SMattias Wallin #include <linux/mfd/abx500.h> 20ee66e653SLinus Walleij #include <linux/mfd/abx500/ab8500.h> 21549931f9SSundar R Iyer #include <linux/regulator/ab8500.h> 2262579266SRabin Vincent 2362579266SRabin Vincent /* 2462579266SRabin Vincent * Interrupt register offsets 2562579266SRabin Vincent * Bank : 0x0E 2662579266SRabin Vincent */ 2747c16975SMattias Wallin #define AB8500_IT_SOURCE1_REG 0x00 2847c16975SMattias Wallin #define AB8500_IT_SOURCE2_REG 0x01 2947c16975SMattias Wallin #define AB8500_IT_SOURCE3_REG 0x02 3047c16975SMattias Wallin #define AB8500_IT_SOURCE4_REG 0x03 3147c16975SMattias Wallin #define AB8500_IT_SOURCE5_REG 0x04 3247c16975SMattias Wallin #define AB8500_IT_SOURCE6_REG 0x05 3347c16975SMattias Wallin #define AB8500_IT_SOURCE7_REG 0x06 3447c16975SMattias Wallin #define AB8500_IT_SOURCE8_REG 0x07 35d6255529SLinus Walleij #define AB9540_IT_SOURCE13_REG 0x0C 3647c16975SMattias Wallin #define AB8500_IT_SOURCE19_REG 0x12 3747c16975SMattias Wallin #define AB8500_IT_SOURCE20_REG 0x13 3847c16975SMattias Wallin #define AB8500_IT_SOURCE21_REG 0x14 3947c16975SMattias Wallin #define AB8500_IT_SOURCE22_REG 0x15 4047c16975SMattias Wallin #define AB8500_IT_SOURCE23_REG 0x16 4147c16975SMattias Wallin #define AB8500_IT_SOURCE24_REG 0x17 4262579266SRabin Vincent 4362579266SRabin Vincent /* 4462579266SRabin Vincent * latch registers 4562579266SRabin Vincent */ 4647c16975SMattias Wallin #define AB8500_IT_LATCH1_REG 0x20 4747c16975SMattias Wallin #define AB8500_IT_LATCH2_REG 0x21 4847c16975SMattias Wallin #define AB8500_IT_LATCH3_REG 0x22 4947c16975SMattias Wallin #define AB8500_IT_LATCH4_REG 0x23 5047c16975SMattias Wallin #define AB8500_IT_LATCH5_REG 0x24 5147c16975SMattias Wallin #define AB8500_IT_LATCH6_REG 0x25 5247c16975SMattias Wallin #define AB8500_IT_LATCH7_REG 0x26 5347c16975SMattias Wallin #define AB8500_IT_LATCH8_REG 0x27 5447c16975SMattias Wallin #define AB8500_IT_LATCH9_REG 0x28 5547c16975SMattias Wallin #define AB8500_IT_LATCH10_REG 0x29 5692d50a41SMattias Wallin #define AB8500_IT_LATCH12_REG 0x2B 57d6255529SLinus Walleij #define AB9540_IT_LATCH13_REG 0x2C 5847c16975SMattias Wallin #define AB8500_IT_LATCH19_REG 0x32 5947c16975SMattias Wallin #define AB8500_IT_LATCH20_REG 0x33 6047c16975SMattias Wallin #define AB8500_IT_LATCH21_REG 0x34 6147c16975SMattias Wallin #define AB8500_IT_LATCH22_REG 0x35 6247c16975SMattias Wallin #define AB8500_IT_LATCH23_REG 0x36 6347c16975SMattias Wallin #define AB8500_IT_LATCH24_REG 0x37 6462579266SRabin Vincent 6562579266SRabin Vincent /* 6662579266SRabin Vincent * mask registers 6762579266SRabin Vincent */ 6862579266SRabin Vincent 6947c16975SMattias Wallin #define AB8500_IT_MASK1_REG 0x40 7047c16975SMattias Wallin #define AB8500_IT_MASK2_REG 0x41 7147c16975SMattias Wallin #define AB8500_IT_MASK3_REG 0x42 7247c16975SMattias Wallin #define AB8500_IT_MASK4_REG 0x43 7347c16975SMattias Wallin #define AB8500_IT_MASK5_REG 0x44 7447c16975SMattias Wallin #define AB8500_IT_MASK6_REG 0x45 7547c16975SMattias Wallin #define AB8500_IT_MASK7_REG 0x46 7647c16975SMattias Wallin #define AB8500_IT_MASK8_REG 0x47 7747c16975SMattias Wallin #define AB8500_IT_MASK9_REG 0x48 7847c16975SMattias Wallin #define AB8500_IT_MASK10_REG 0x49 7947c16975SMattias Wallin #define AB8500_IT_MASK11_REG 0x4A 8047c16975SMattias Wallin #define AB8500_IT_MASK12_REG 0x4B 8147c16975SMattias Wallin #define AB8500_IT_MASK13_REG 0x4C 8247c16975SMattias Wallin #define AB8500_IT_MASK14_REG 0x4D 8347c16975SMattias Wallin #define AB8500_IT_MASK15_REG 0x4E 8447c16975SMattias Wallin #define AB8500_IT_MASK16_REG 0x4F 8547c16975SMattias Wallin #define AB8500_IT_MASK17_REG 0x50 8647c16975SMattias Wallin #define AB8500_IT_MASK18_REG 0x51 8747c16975SMattias Wallin #define AB8500_IT_MASK19_REG 0x52 8847c16975SMattias Wallin #define AB8500_IT_MASK20_REG 0x53 8947c16975SMattias Wallin #define AB8500_IT_MASK21_REG 0x54 9047c16975SMattias Wallin #define AB8500_IT_MASK22_REG 0x55 9147c16975SMattias Wallin #define AB8500_IT_MASK23_REG 0x56 9247c16975SMattias Wallin #define AB8500_IT_MASK24_REG 0x57 9362579266SRabin Vincent 9447c16975SMattias Wallin #define AB8500_REV_REG 0x80 950f620837SLinus Walleij #define AB8500_IC_NAME_REG 0x82 96e5c238c3SMattias Wallin #define AB8500_SWITCH_OFF_STATUS 0x00 9762579266SRabin Vincent 98b4a31037SAndrew Lynn #define AB8500_TURN_ON_STATUS 0x00 99b4a31037SAndrew Lynn 100d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_REG 0x23 101d6255529SLinus Walleij #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2) 102d6255529SLinus Walleij 10362579266SRabin Vincent /* 10462579266SRabin Vincent * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt 1052ced445eSLinus Walleij * numbers are indexed into this array with (num / 8). The interupts are 1062ced445eSLinus Walleij * defined in linux/mfd/ab8500.h 10762579266SRabin Vincent * 10862579266SRabin Vincent * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at 10962579266SRabin Vincent * offset 0. 11062579266SRabin Vincent */ 1112ced445eSLinus Walleij /* AB8500 support */ 11262579266SRabin Vincent static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = { 11392d50a41SMattias Wallin 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 11462579266SRabin Vincent }; 11562579266SRabin Vincent 116d6255529SLinus Walleij /* AB9540 support */ 117d6255529SLinus Walleij static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = { 118d6255529SLinus Walleij 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 119d6255529SLinus Walleij }; 120d6255529SLinus Walleij 1210f620837SLinus Walleij static const char ab8500_version_str[][7] = { 1220f620837SLinus Walleij [AB8500_VERSION_AB8500] = "AB8500", 1230f620837SLinus Walleij [AB8500_VERSION_AB8505] = "AB8505", 1240f620837SLinus Walleij [AB8500_VERSION_AB9540] = "AB9540", 1250f620837SLinus Walleij [AB8500_VERSION_AB8540] = "AB8540", 1260f620837SLinus Walleij }; 1270f620837SLinus Walleij 12847c16975SMattias Wallin static int ab8500_get_chip_id(struct device *dev) 12947c16975SMattias Wallin { 1306bce7bf1SMattias Wallin struct ab8500 *ab8500; 1316bce7bf1SMattias Wallin 1326bce7bf1SMattias Wallin if (!dev) 1336bce7bf1SMattias Wallin return -EINVAL; 1346bce7bf1SMattias Wallin ab8500 = dev_get_drvdata(dev->parent); 1356bce7bf1SMattias Wallin return ab8500 ? (int)ab8500->chip_id : -EINVAL; 13647c16975SMattias Wallin } 13747c16975SMattias Wallin 13847c16975SMattias Wallin static int set_register_interruptible(struct ab8500 *ab8500, u8 bank, 13947c16975SMattias Wallin u8 reg, u8 data) 14062579266SRabin Vincent { 14162579266SRabin Vincent int ret; 14247c16975SMattias Wallin /* 14347c16975SMattias Wallin * Put the u8 bank and u8 register together into a an u16. 14447c16975SMattias Wallin * The bank on higher 8 bits and register in lower 8 bits. 14547c16975SMattias Wallin * */ 14647c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 14762579266SRabin Vincent 14862579266SRabin Vincent dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data); 14962579266SRabin Vincent 150392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 15147c16975SMattias Wallin 15247c16975SMattias Wallin ret = ab8500->write(ab8500, addr, data); 15347c16975SMattias Wallin if (ret < 0) 15447c16975SMattias Wallin dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 15547c16975SMattias Wallin addr, ret); 15647c16975SMattias Wallin mutex_unlock(&ab8500->lock); 15747c16975SMattias Wallin 15847c16975SMattias Wallin return ret; 15947c16975SMattias Wallin } 16047c16975SMattias Wallin 16147c16975SMattias Wallin static int ab8500_set_register(struct device *dev, u8 bank, 16247c16975SMattias Wallin u8 reg, u8 value) 16347c16975SMattias Wallin { 164*112a80d2SJonas Aaberg int ret; 16547c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 16647c16975SMattias Wallin 167*112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 168*112a80d2SJonas Aaberg ret = set_register_interruptible(ab8500, bank, reg, value); 169*112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 170*112a80d2SJonas Aaberg return ret; 17147c16975SMattias Wallin } 17247c16975SMattias Wallin 17347c16975SMattias Wallin static int get_register_interruptible(struct ab8500 *ab8500, u8 bank, 17447c16975SMattias Wallin u8 reg, u8 *value) 17547c16975SMattias Wallin { 17647c16975SMattias Wallin int ret; 17747c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 17847c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 17947c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 18047c16975SMattias Wallin 181392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 18247c16975SMattias Wallin 18347c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 18447c16975SMattias Wallin if (ret < 0) 18547c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 18647c16975SMattias Wallin addr, ret); 18747c16975SMattias Wallin else 18847c16975SMattias Wallin *value = ret; 18947c16975SMattias Wallin 19047c16975SMattias Wallin mutex_unlock(&ab8500->lock); 19147c16975SMattias Wallin dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret); 19247c16975SMattias Wallin 19347c16975SMattias Wallin return ret; 19447c16975SMattias Wallin } 19547c16975SMattias Wallin 19647c16975SMattias Wallin static int ab8500_get_register(struct device *dev, u8 bank, 19747c16975SMattias Wallin u8 reg, u8 *value) 19847c16975SMattias Wallin { 199*112a80d2SJonas Aaberg int ret; 20047c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 20147c16975SMattias Wallin 202*112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 203*112a80d2SJonas Aaberg ret = get_register_interruptible(ab8500, bank, reg, value); 204*112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 205*112a80d2SJonas Aaberg return ret; 20647c16975SMattias Wallin } 20747c16975SMattias Wallin 20847c16975SMattias Wallin static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank, 20947c16975SMattias Wallin u8 reg, u8 bitmask, u8 bitvalues) 21047c16975SMattias Wallin { 21147c16975SMattias Wallin int ret; 21247c16975SMattias Wallin /* put the u8 bank and u8 reg together into a an u16. 21347c16975SMattias Wallin * bank on higher 8 bits and reg in lower */ 21447c16975SMattias Wallin u16 addr = ((u16)bank) << 8 | reg; 21547c16975SMattias Wallin 216392cbd1eSRabin Vincent mutex_lock(&ab8500->lock); 21747c16975SMattias Wallin 218bc628fd1SMattias Nilsson if (ab8500->write_masked == NULL) { 219bc628fd1SMattias Nilsson u8 data; 220bc628fd1SMattias Nilsson 22147c16975SMattias Wallin ret = ab8500->read(ab8500, addr); 22247c16975SMattias Wallin if (ret < 0) { 22347c16975SMattias Wallin dev_err(ab8500->dev, "failed to read reg %#x: %d\n", 22447c16975SMattias Wallin addr, ret); 22547c16975SMattias Wallin goto out; 22647c16975SMattias Wallin } 22747c16975SMattias Wallin 22847c16975SMattias Wallin data = (u8)ret; 22947c16975SMattias Wallin data = (~bitmask & data) | (bitmask & bitvalues); 23047c16975SMattias Wallin 23162579266SRabin Vincent ret = ab8500->write(ab8500, addr, data); 23262579266SRabin Vincent if (ret < 0) 23362579266SRabin Vincent dev_err(ab8500->dev, "failed to write reg %#x: %d\n", 23462579266SRabin Vincent addr, ret); 23562579266SRabin Vincent 236bc628fd1SMattias Nilsson dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, 237bc628fd1SMattias Nilsson data); 238bc628fd1SMattias Nilsson goto out; 239bc628fd1SMattias Nilsson } 240bc628fd1SMattias Nilsson ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues); 241bc628fd1SMattias Nilsson if (ret < 0) 242bc628fd1SMattias Nilsson dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr, 243bc628fd1SMattias Nilsson ret); 24462579266SRabin Vincent out: 24562579266SRabin Vincent mutex_unlock(&ab8500->lock); 24662579266SRabin Vincent return ret; 24762579266SRabin Vincent } 24847c16975SMattias Wallin 24947c16975SMattias Wallin static int ab8500_mask_and_set_register(struct device *dev, 25047c16975SMattias Wallin u8 bank, u8 reg, u8 bitmask, u8 bitvalues) 25147c16975SMattias Wallin { 252*112a80d2SJonas Aaberg int ret; 25347c16975SMattias Wallin struct ab8500 *ab8500 = dev_get_drvdata(dev->parent); 25447c16975SMattias Wallin 255*112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 256*112a80d2SJonas Aaberg ret= mask_and_set_register_interruptible(ab8500, bank, reg, 25747c16975SMattias Wallin bitmask, bitvalues); 258*112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 259*112a80d2SJonas Aaberg return ret; 26047c16975SMattias Wallin } 26147c16975SMattias Wallin 26247c16975SMattias Wallin static struct abx500_ops ab8500_ops = { 26347c16975SMattias Wallin .get_chip_id = ab8500_get_chip_id, 26447c16975SMattias Wallin .get_register = ab8500_get_register, 26547c16975SMattias Wallin .set_register = ab8500_set_register, 26647c16975SMattias Wallin .get_register_page = NULL, 26747c16975SMattias Wallin .set_register_page = NULL, 26847c16975SMattias Wallin .mask_and_set_register = ab8500_mask_and_set_register, 26947c16975SMattias Wallin .event_registers_startup_state_get = NULL, 27047c16975SMattias Wallin .startup_irq_enabled = NULL, 27147c16975SMattias Wallin }; 27262579266SRabin Vincent 2739505a0a0SMark Brown static void ab8500_irq_lock(struct irq_data *data) 27462579266SRabin Vincent { 2759505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 27662579266SRabin Vincent 27762579266SRabin Vincent mutex_lock(&ab8500->irq_lock); 278*112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 27962579266SRabin Vincent } 28062579266SRabin Vincent 2819505a0a0SMark Brown static void ab8500_irq_sync_unlock(struct irq_data *data) 28262579266SRabin Vincent { 2839505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 28462579266SRabin Vincent int i; 28562579266SRabin Vincent 2862ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 28762579266SRabin Vincent u8 old = ab8500->oldmask[i]; 28862579266SRabin Vincent u8 new = ab8500->mask[i]; 28962579266SRabin Vincent int reg; 29062579266SRabin Vincent 29162579266SRabin Vincent if (new == old) 29262579266SRabin Vincent continue; 29362579266SRabin Vincent 2940f620837SLinus Walleij /* 2950f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 2960f620837SLinus Walleij * 2.0 2970f620837SLinus Walleij */ 2980f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 2990f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 30092d50a41SMattias Wallin continue; 30192d50a41SMattias Wallin 30262579266SRabin Vincent ab8500->oldmask[i] = new; 30362579266SRabin Vincent 3042ced445eSLinus Walleij reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i]; 30547c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new); 30662579266SRabin Vincent } 307*112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 30862579266SRabin Vincent mutex_unlock(&ab8500->irq_lock); 30962579266SRabin Vincent } 31062579266SRabin Vincent 3119505a0a0SMark Brown static void ab8500_irq_mask(struct irq_data *data) 31262579266SRabin Vincent { 3139505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3149505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 31562579266SRabin Vincent int index = offset / 8; 31662579266SRabin Vincent int mask = 1 << (offset % 8); 31762579266SRabin Vincent 31862579266SRabin Vincent ab8500->mask[index] |= mask; 31962579266SRabin Vincent } 32062579266SRabin Vincent 3219505a0a0SMark Brown static void ab8500_irq_unmask(struct irq_data *data) 32262579266SRabin Vincent { 3239505a0a0SMark Brown struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); 3249505a0a0SMark Brown int offset = data->irq - ab8500->irq_base; 32562579266SRabin Vincent int index = offset / 8; 32662579266SRabin Vincent int mask = 1 << (offset % 8); 32762579266SRabin Vincent 32862579266SRabin Vincent ab8500->mask[index] &= ~mask; 32962579266SRabin Vincent } 33062579266SRabin Vincent 33162579266SRabin Vincent static struct irq_chip ab8500_irq_chip = { 33262579266SRabin Vincent .name = "ab8500", 3339505a0a0SMark Brown .irq_bus_lock = ab8500_irq_lock, 3349505a0a0SMark Brown .irq_bus_sync_unlock = ab8500_irq_sync_unlock, 3359505a0a0SMark Brown .irq_mask = ab8500_irq_mask, 336e6f9306eSVirupax Sadashivpetimath .irq_disable = ab8500_irq_mask, 3379505a0a0SMark Brown .irq_unmask = ab8500_irq_unmask, 33862579266SRabin Vincent }; 33962579266SRabin Vincent 34062579266SRabin Vincent static irqreturn_t ab8500_irq(int irq, void *dev) 34162579266SRabin Vincent { 34262579266SRabin Vincent struct ab8500 *ab8500 = dev; 34362579266SRabin Vincent int i; 34462579266SRabin Vincent 34562579266SRabin Vincent dev_vdbg(ab8500->dev, "interrupt\n"); 34662579266SRabin Vincent 347*112a80d2SJonas Aaberg atomic_inc(&ab8500->transfer_ongoing); 348*112a80d2SJonas Aaberg 3492ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 3502ced445eSLinus Walleij int regoffset = ab8500->irq_reg_offset[i]; 35162579266SRabin Vincent int status; 35247c16975SMattias Wallin u8 value; 35362579266SRabin Vincent 3540f620837SLinus Walleij /* 3550f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 3560f620837SLinus Walleij * 2.0 3570f620837SLinus Walleij */ 3580f620837SLinus Walleij if (regoffset == 11 && is_ab8500_1p1_or_earlier(ab8500)) 35992d50a41SMattias Wallin continue; 36092d50a41SMattias Wallin 36147c16975SMattias Wallin status = get_register_interruptible(ab8500, AB8500_INTERRUPT, 36247c16975SMattias Wallin AB8500_IT_LATCH1_REG + regoffset, &value); 36347c16975SMattias Wallin if (status < 0 || value == 0) 36462579266SRabin Vincent continue; 36562579266SRabin Vincent 36662579266SRabin Vincent do { 36788aec4f7SMattias Wallin int bit = __ffs(value); 36862579266SRabin Vincent int line = i * 8 + bit; 36962579266SRabin Vincent 37062579266SRabin Vincent handle_nested_irq(ab8500->irq_base + line); 37147c16975SMattias Wallin value &= ~(1 << bit); 372*112a80d2SJonas Aaberg 37347c16975SMattias Wallin } while (value); 37462579266SRabin Vincent } 375*112a80d2SJonas Aaberg atomic_dec(&ab8500->transfer_ongoing); 37662579266SRabin Vincent return IRQ_HANDLED; 37762579266SRabin Vincent } 37862579266SRabin Vincent 37962579266SRabin Vincent static int ab8500_irq_init(struct ab8500 *ab8500) 38062579266SRabin Vincent { 38162579266SRabin Vincent int base = ab8500->irq_base; 38262579266SRabin Vincent int irq; 3832ced445eSLinus Walleij int num_irqs; 38462579266SRabin Vincent 385d6255529SLinus Walleij if (is_ab9540(ab8500)) 386d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 387a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 388a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 389d6255529SLinus Walleij else 3902ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 3912ced445eSLinus Walleij 3922ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 393d5bb1221SThomas Gleixner irq_set_chip_data(irq, ab8500); 394d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, &ab8500_irq_chip, 39562579266SRabin Vincent handle_simple_irq); 396d5bb1221SThomas Gleixner irq_set_nested_thread(irq, 1); 39762579266SRabin Vincent #ifdef CONFIG_ARM 39862579266SRabin Vincent set_irq_flags(irq, IRQF_VALID); 39962579266SRabin Vincent #else 400d5bb1221SThomas Gleixner irq_set_noprobe(irq); 40162579266SRabin Vincent #endif 40262579266SRabin Vincent } 40362579266SRabin Vincent 40462579266SRabin Vincent return 0; 40562579266SRabin Vincent } 40662579266SRabin Vincent 40762579266SRabin Vincent static void ab8500_irq_remove(struct ab8500 *ab8500) 40862579266SRabin Vincent { 40962579266SRabin Vincent int base = ab8500->irq_base; 41062579266SRabin Vincent int irq; 4112ced445eSLinus Walleij int num_irqs; 41262579266SRabin Vincent 413d6255529SLinus Walleij if (is_ab9540(ab8500)) 414d6255529SLinus Walleij num_irqs = AB9540_NR_IRQS; 415a982362cSBengt Jonsson else if (is_ab8505(ab8500)) 416a982362cSBengt Jonsson num_irqs = AB8505_NR_IRQS; 417d6255529SLinus Walleij else 4182ced445eSLinus Walleij num_irqs = AB8500_NR_IRQS; 4192ced445eSLinus Walleij 4202ced445eSLinus Walleij for (irq = base; irq < base + num_irqs; irq++) { 42162579266SRabin Vincent #ifdef CONFIG_ARM 42262579266SRabin Vincent set_irq_flags(irq, 0); 42362579266SRabin Vincent #endif 424d5bb1221SThomas Gleixner irq_set_chip_and_handler(irq, NULL, NULL); 425d5bb1221SThomas Gleixner irq_set_chip_data(irq, NULL); 42662579266SRabin Vincent } 42762579266SRabin Vincent } 42862579266SRabin Vincent 429*112a80d2SJonas Aaberg int ab8500_suspend(struct ab8500 *ab8500) 430*112a80d2SJonas Aaberg { 431*112a80d2SJonas Aaberg if (atomic_read(&ab8500->transfer_ongoing)) 432*112a80d2SJonas Aaberg return -EINVAL; 433*112a80d2SJonas Aaberg else 434*112a80d2SJonas Aaberg return 0; 435*112a80d2SJonas Aaberg } 436*112a80d2SJonas Aaberg 437d6255529SLinus Walleij /* AB8500 GPIO Resources */ 4385cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpio_resources[] = { 4390cb3fcd7SBibek Basu { 4400cb3fcd7SBibek Basu .name = "GPIO_INT6", 4410cb3fcd7SBibek Basu .start = AB8500_INT_GPIO6R, 4420cb3fcd7SBibek Basu .end = AB8500_INT_GPIO41F, 4430cb3fcd7SBibek Basu .flags = IORESOURCE_IRQ, 4440cb3fcd7SBibek Basu } 4450cb3fcd7SBibek Basu }; 4460cb3fcd7SBibek Basu 447d6255529SLinus Walleij /* AB9540 GPIO Resources */ 448d6255529SLinus Walleij static struct resource __devinitdata ab9540_gpio_resources[] = { 449d6255529SLinus Walleij { 450d6255529SLinus Walleij .name = "GPIO_INT6", 451d6255529SLinus Walleij .start = AB8500_INT_GPIO6R, 452d6255529SLinus Walleij .end = AB8500_INT_GPIO41F, 453d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 454d6255529SLinus Walleij }, 455d6255529SLinus Walleij { 456d6255529SLinus Walleij .name = "GPIO_INT14", 457d6255529SLinus Walleij .start = AB9540_INT_GPIO50R, 458d6255529SLinus Walleij .end = AB9540_INT_GPIO54R, 459d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 460d6255529SLinus Walleij }, 461d6255529SLinus Walleij { 462d6255529SLinus Walleij .name = "GPIO_INT15", 463d6255529SLinus Walleij .start = AB9540_INT_GPIO50F, 464d6255529SLinus Walleij .end = AB9540_INT_GPIO54F, 465d6255529SLinus Walleij .flags = IORESOURCE_IRQ, 466d6255529SLinus Walleij } 467d6255529SLinus Walleij }; 468d6255529SLinus Walleij 4695cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_gpadc_resources[] = { 47062579266SRabin Vincent { 47162579266SRabin Vincent .name = "HW_CONV_END", 47262579266SRabin Vincent .start = AB8500_INT_GP_HW_ADC_CONV_END, 47362579266SRabin Vincent .end = AB8500_INT_GP_HW_ADC_CONV_END, 47462579266SRabin Vincent .flags = IORESOURCE_IRQ, 47562579266SRabin Vincent }, 47662579266SRabin Vincent { 47762579266SRabin Vincent .name = "SW_CONV_END", 47862579266SRabin Vincent .start = AB8500_INT_GP_SW_ADC_CONV_END, 47962579266SRabin Vincent .end = AB8500_INT_GP_SW_ADC_CONV_END, 48062579266SRabin Vincent .flags = IORESOURCE_IRQ, 48162579266SRabin Vincent }, 48262579266SRabin Vincent }; 48362579266SRabin Vincent 4845cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_rtc_resources[] = { 48562579266SRabin Vincent { 48662579266SRabin Vincent .name = "60S", 48762579266SRabin Vincent .start = AB8500_INT_RTC_60S, 48862579266SRabin Vincent .end = AB8500_INT_RTC_60S, 48962579266SRabin Vincent .flags = IORESOURCE_IRQ, 49062579266SRabin Vincent }, 49162579266SRabin Vincent { 49262579266SRabin Vincent .name = "ALARM", 49362579266SRabin Vincent .start = AB8500_INT_RTC_ALARM, 49462579266SRabin Vincent .end = AB8500_INT_RTC_ALARM, 49562579266SRabin Vincent .flags = IORESOURCE_IRQ, 49662579266SRabin Vincent }, 49762579266SRabin Vincent }; 49862579266SRabin Vincent 4995cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_poweronkey_db_resources[] = { 50077686517SSundar R Iyer { 50177686517SSundar R Iyer .name = "ONKEY_DBF", 50277686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_F, 50377686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_F, 50477686517SSundar R Iyer .flags = IORESOURCE_IRQ, 50577686517SSundar R Iyer }, 50677686517SSundar R Iyer { 50777686517SSundar R Iyer .name = "ONKEY_DBR", 50877686517SSundar R Iyer .start = AB8500_INT_PON_KEY1DB_R, 50977686517SSundar R Iyer .end = AB8500_INT_PON_KEY1DB_R, 51077686517SSundar R Iyer .flags = IORESOURCE_IRQ, 51177686517SSundar R Iyer }, 51277686517SSundar R Iyer }; 51377686517SSundar R Iyer 5146af75ecdSLinus Walleij static struct resource __devinitdata ab8500_av_acc_detect_resources[] = { 515e098adedSMattias Wallin { 5166af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_F", 5176af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_F, 5186af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_F, 519e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 520e098adedSMattias Wallin }, 521e098adedSMattias Wallin { 5226af75ecdSLinus Walleij .name = "ACC_DETECT_1DB_R", 5236af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_1DB_R, 5246af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_1DB_R, 525e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 526e098adedSMattias Wallin }, 527e098adedSMattias Wallin { 5286af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_F", 5296af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_F, 5306af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_F, 5316af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5326af75ecdSLinus Walleij }, 5336af75ecdSLinus Walleij { 5346af75ecdSLinus Walleij .name = "ACC_DETECT_21DB_R", 5356af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_21DB_R, 5366af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_21DB_R, 5376af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5386af75ecdSLinus Walleij }, 5396af75ecdSLinus Walleij { 5406af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_F", 5416af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_F, 5426af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_F, 5436af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5446af75ecdSLinus Walleij }, 5456af75ecdSLinus Walleij { 5466af75ecdSLinus Walleij .name = "ACC_DETECT_22DB_R", 5476af75ecdSLinus Walleij .start = AB8500_INT_ACC_DETECT_22DB_R, 5486af75ecdSLinus Walleij .end = AB8500_INT_ACC_DETECT_22DB_R, 5496af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5506af75ecdSLinus Walleij }, 5516af75ecdSLinus Walleij }; 5526af75ecdSLinus Walleij 5536af75ecdSLinus Walleij static struct resource __devinitdata ab8500_charger_resources[] = { 5546af75ecdSLinus Walleij { 555e098adedSMattias Wallin .name = "MAIN_CH_UNPLUG_DET", 556e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_UNPLUG_DET, 557e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_UNPLUG_DET, 558e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 559e098adedSMattias Wallin }, 560e098adedSMattias Wallin { 561e098adedSMattias Wallin .name = "MAIN_CHARGE_PLUG_DET", 562e098adedSMattias Wallin .start = AB8500_INT_MAIN_CH_PLUG_DET, 563e098adedSMattias Wallin .end = AB8500_INT_MAIN_CH_PLUG_DET, 564e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 565e098adedSMattias Wallin }, 566e098adedSMattias Wallin { 567e098adedSMattias Wallin .name = "VBUS_DET_R", 568e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 569e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 570e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 571e098adedSMattias Wallin }, 572e098adedSMattias Wallin { 5736af75ecdSLinus Walleij .name = "VBUS_DET_F", 5746af75ecdSLinus Walleij .start = AB8500_INT_VBUS_DET_F, 5756af75ecdSLinus Walleij .end = AB8500_INT_VBUS_DET_F, 576e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 577e098adedSMattias Wallin }, 578e098adedSMattias Wallin { 5796af75ecdSLinus Walleij .name = "USB_LINK_STATUS", 5806af75ecdSLinus Walleij .start = AB8500_INT_USB_LINK_STATUS, 5816af75ecdSLinus Walleij .end = AB8500_INT_USB_LINK_STATUS, 5826af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 5836af75ecdSLinus Walleij }, 5846af75ecdSLinus Walleij { 585e098adedSMattias Wallin .name = "VBUS_OVV", 586e098adedSMattias Wallin .start = AB8500_INT_VBUS_OVV, 587e098adedSMattias Wallin .end = AB8500_INT_VBUS_OVV, 588e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 589e098adedSMattias Wallin }, 590e098adedSMattias Wallin { 5916af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_R", 5926af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_R, 5936af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_R, 594e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 595e098adedSMattias Wallin }, 596e098adedSMattias Wallin { 5976af75ecdSLinus Walleij .name = "USB_CH_TH_PROT_F", 5986af75ecdSLinus Walleij .start = AB8500_INT_USB_CH_TH_PROT_F, 5996af75ecdSLinus Walleij .end = AB8500_INT_USB_CH_TH_PROT_F, 600e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 601e098adedSMattias Wallin }, 602e098adedSMattias Wallin { 6036af75ecdSLinus Walleij .name = "MAIN_EXT_CH_NOT_OK", 6046af75ecdSLinus Walleij .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 6056af75ecdSLinus Walleij .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 6066af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6076af75ecdSLinus Walleij }, 6086af75ecdSLinus Walleij { 6096af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_R", 6106af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_R, 6116af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_R, 6126af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6136af75ecdSLinus Walleij }, 6146af75ecdSLinus Walleij { 6156af75ecdSLinus Walleij .name = "MAIN_CH_TH_PROT_F", 6166af75ecdSLinus Walleij .start = AB8500_INT_MAIN_CH_TH_PROT_F, 6176af75ecdSLinus Walleij .end = AB8500_INT_MAIN_CH_TH_PROT_F, 6186af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6196af75ecdSLinus Walleij }, 6206af75ecdSLinus Walleij { 6216af75ecdSLinus Walleij .name = "USB_CHARGER_NOT_OKR", 622a982362cSBengt Jonsson .start = AB8500_INT_USB_CHARGER_NOT_OKR, 623a982362cSBengt Jonsson .end = AB8500_INT_USB_CHARGER_NOT_OKR, 6246af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6256af75ecdSLinus Walleij }, 6266af75ecdSLinus Walleij { 6276af75ecdSLinus Walleij .name = "CH_WD_EXP", 6286af75ecdSLinus Walleij .start = AB8500_INT_CH_WD_EXP, 6296af75ecdSLinus Walleij .end = AB8500_INT_CH_WD_EXP, 6306af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6316af75ecdSLinus Walleij }, 6326af75ecdSLinus Walleij }; 6336af75ecdSLinus Walleij 6346af75ecdSLinus Walleij static struct resource __devinitdata ab8500_btemp_resources[] = { 6356af75ecdSLinus Walleij { 6366af75ecdSLinus Walleij .name = "BAT_CTRL_INDB", 6376af75ecdSLinus Walleij .start = AB8500_INT_BAT_CTRL_INDB, 6386af75ecdSLinus Walleij .end = AB8500_INT_BAT_CTRL_INDB, 639e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 640e098adedSMattias Wallin }, 641e098adedSMattias Wallin { 642e098adedSMattias Wallin .name = "BTEMP_LOW", 643e098adedSMattias Wallin .start = AB8500_INT_BTEMP_LOW, 644e098adedSMattias Wallin .end = AB8500_INT_BTEMP_LOW, 645e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 646e098adedSMattias Wallin }, 647e098adedSMattias Wallin { 648e098adedSMattias Wallin .name = "BTEMP_HIGH", 649e098adedSMattias Wallin .start = AB8500_INT_BTEMP_HIGH, 650e098adedSMattias Wallin .end = AB8500_INT_BTEMP_HIGH, 651e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 652e098adedSMattias Wallin }, 653e098adedSMattias Wallin { 6546af75ecdSLinus Walleij .name = "BTEMP_LOW_MEDIUM", 6556af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_LOW_MEDIUM, 6566af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_LOW_MEDIUM, 657e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 658e098adedSMattias Wallin }, 659e098adedSMattias Wallin { 6606af75ecdSLinus Walleij .name = "BTEMP_MEDIUM_HIGH", 6616af75ecdSLinus Walleij .start = AB8500_INT_BTEMP_MEDIUM_HIGH, 6626af75ecdSLinus Walleij .end = AB8500_INT_BTEMP_MEDIUM_HIGH, 663e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 664e098adedSMattias Wallin }, 665e098adedSMattias Wallin }; 666e098adedSMattias Wallin 6676af75ecdSLinus Walleij static struct resource __devinitdata ab8500_fg_resources[] = { 6686af75ecdSLinus Walleij { 6696af75ecdSLinus Walleij .name = "NCONV_ACCU", 6706af75ecdSLinus Walleij .start = AB8500_INT_CCN_CONV_ACC, 6716af75ecdSLinus Walleij .end = AB8500_INT_CCN_CONV_ACC, 6726af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6736af75ecdSLinus Walleij }, 6746af75ecdSLinus Walleij { 6756af75ecdSLinus Walleij .name = "BATT_OVV", 6766af75ecdSLinus Walleij .start = AB8500_INT_BATT_OVV, 6776af75ecdSLinus Walleij .end = AB8500_INT_BATT_OVV, 6786af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6796af75ecdSLinus Walleij }, 6806af75ecdSLinus Walleij { 6816af75ecdSLinus Walleij .name = "LOW_BAT_F", 6826af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_F, 6836af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_F, 6846af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6856af75ecdSLinus Walleij }, 6866af75ecdSLinus Walleij { 6876af75ecdSLinus Walleij .name = "LOW_BAT_R", 6886af75ecdSLinus Walleij .start = AB8500_INT_LOW_BAT_R, 6896af75ecdSLinus Walleij .end = AB8500_INT_LOW_BAT_R, 6906af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6916af75ecdSLinus Walleij }, 6926af75ecdSLinus Walleij { 6936af75ecdSLinus Walleij .name = "CC_INT_CALIB", 6946af75ecdSLinus Walleij .start = AB8500_INT_CC_INT_CALIB, 6956af75ecdSLinus Walleij .end = AB8500_INT_CC_INT_CALIB, 6966af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 6976af75ecdSLinus Walleij }, 698a982362cSBengt Jonsson { 699a982362cSBengt Jonsson .name = "CCEOC", 700a982362cSBengt Jonsson .start = AB8500_INT_CCEOC, 701a982362cSBengt Jonsson .end = AB8500_INT_CCEOC, 702a982362cSBengt Jonsson .flags = IORESOURCE_IRQ, 703a982362cSBengt Jonsson }, 7046af75ecdSLinus Walleij }; 7056af75ecdSLinus Walleij 7066af75ecdSLinus Walleij static struct resource __devinitdata ab8500_chargalg_resources[] = {}; 7076af75ecdSLinus Walleij 708df720647SAxel Lin #ifdef CONFIG_DEBUG_FS 7095cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_debug_resources[] = { 710e098adedSMattias Wallin { 711e098adedSMattias Wallin .name = "IRQ_FIRST", 712e098adedSMattias Wallin .start = AB8500_INT_MAIN_EXT_CH_NOT_OK, 713e098adedSMattias Wallin .end = AB8500_INT_MAIN_EXT_CH_NOT_OK, 714e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 715e098adedSMattias Wallin }, 716e098adedSMattias Wallin { 717e098adedSMattias Wallin .name = "IRQ_LAST", 718a982362cSBengt Jonsson .start = AB8500_INT_XTAL32K_KO, 719a982362cSBengt Jonsson .end = AB8500_INT_XTAL32K_KO, 720e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 721e098adedSMattias Wallin }, 722e098adedSMattias Wallin }; 723df720647SAxel Lin #endif 724e098adedSMattias Wallin 7255cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_usb_resources[] = { 726e098adedSMattias Wallin { 727e098adedSMattias Wallin .name = "ID_WAKEUP_R", 728e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_R, 729e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_R, 730e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 731e098adedSMattias Wallin }, 732e098adedSMattias Wallin { 733e098adedSMattias Wallin .name = "ID_WAKEUP_F", 734e098adedSMattias Wallin .start = AB8500_INT_ID_WAKEUP_F, 735e098adedSMattias Wallin .end = AB8500_INT_ID_WAKEUP_F, 736e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 737e098adedSMattias Wallin }, 738e098adedSMattias Wallin { 739e098adedSMattias Wallin .name = "VBUS_DET_F", 740e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_F, 741e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_F, 742e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 743e098adedSMattias Wallin }, 744e098adedSMattias Wallin { 745e098adedSMattias Wallin .name = "VBUS_DET_R", 746e098adedSMattias Wallin .start = AB8500_INT_VBUS_DET_R, 747e098adedSMattias Wallin .end = AB8500_INT_VBUS_DET_R, 748e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 749e098adedSMattias Wallin }, 75092d50a41SMattias Wallin { 75192d50a41SMattias Wallin .name = "USB_LINK_STATUS", 75292d50a41SMattias Wallin .start = AB8500_INT_USB_LINK_STATUS, 75392d50a41SMattias Wallin .end = AB8500_INT_USB_LINK_STATUS, 75492d50a41SMattias Wallin .flags = IORESOURCE_IRQ, 75592d50a41SMattias Wallin }, 7566af75ecdSLinus Walleij { 7576af75ecdSLinus Walleij .name = "USB_ADP_PROBE_PLUG", 7586af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_PLUG, 7596af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_PLUG, 7606af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7616af75ecdSLinus Walleij }, 7626af75ecdSLinus Walleij { 7636af75ecdSLinus Walleij .name = "USB_ADP_PROBE_UNPLUG", 7646af75ecdSLinus Walleij .start = AB8500_INT_ADP_PROBE_UNPLUG, 7656af75ecdSLinus Walleij .end = AB8500_INT_ADP_PROBE_UNPLUG, 7666af75ecdSLinus Walleij .flags = IORESOURCE_IRQ, 7676af75ecdSLinus Walleij }, 768e098adedSMattias Wallin }; 769e098adedSMattias Wallin 77044f72e53SVirupax Sadashivpetimath static struct resource __devinitdata ab8505_iddet_resources[] = { 77144f72e53SVirupax Sadashivpetimath { 77244f72e53SVirupax Sadashivpetimath .name = "KeyDeglitch", 77344f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYDEGLITCH, 77444f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYDEGLITCH, 77544f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 77644f72e53SVirupax Sadashivpetimath }, 77744f72e53SVirupax Sadashivpetimath { 77844f72e53SVirupax Sadashivpetimath .name = "KP", 77944f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KP, 78044f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KP, 78144f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 78244f72e53SVirupax Sadashivpetimath }, 78344f72e53SVirupax Sadashivpetimath { 78444f72e53SVirupax Sadashivpetimath .name = "IKP", 78544f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKP, 78644f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKP, 78744f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 78844f72e53SVirupax Sadashivpetimath }, 78944f72e53SVirupax Sadashivpetimath { 79044f72e53SVirupax Sadashivpetimath .name = "IKR", 79144f72e53SVirupax Sadashivpetimath .start = AB8505_INT_IKR, 79244f72e53SVirupax Sadashivpetimath .end = AB8505_INT_IKR, 79344f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 79444f72e53SVirupax Sadashivpetimath }, 79544f72e53SVirupax Sadashivpetimath { 79644f72e53SVirupax Sadashivpetimath .name = "KeyStuck", 79744f72e53SVirupax Sadashivpetimath .start = AB8505_INT_KEYSTUCK, 79844f72e53SVirupax Sadashivpetimath .end = AB8505_INT_KEYSTUCK, 79944f72e53SVirupax Sadashivpetimath .flags = IORESOURCE_IRQ, 80044f72e53SVirupax Sadashivpetimath }, 80144f72e53SVirupax Sadashivpetimath }; 80244f72e53SVirupax Sadashivpetimath 8035cef8df5SRobert Rosengren static struct resource __devinitdata ab8500_temp_resources[] = { 804e098adedSMattias Wallin { 805e098adedSMattias Wallin .name = "AB8500_TEMP_WARM", 806e098adedSMattias Wallin .start = AB8500_INT_TEMP_WARM, 807e098adedSMattias Wallin .end = AB8500_INT_TEMP_WARM, 808e098adedSMattias Wallin .flags = IORESOURCE_IRQ, 809e098adedSMattias Wallin }, 810e098adedSMattias Wallin }; 811e098adedSMattias Wallin 812d6255529SLinus Walleij static struct mfd_cell __devinitdata abx500_common_devs[] = { 8135814fc35SMattias Wallin #ifdef CONFIG_DEBUG_FS 8145814fc35SMattias Wallin { 8155814fc35SMattias Wallin .name = "ab8500-debug", 816e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_debug_resources), 817e098adedSMattias Wallin .resources = ab8500_debug_resources, 8185814fc35SMattias Wallin }, 8195814fc35SMattias Wallin #endif 82062579266SRabin Vincent { 821e098adedSMattias Wallin .name = "ab8500-sysctrl", 822e098adedSMattias Wallin }, 823e098adedSMattias Wallin { 824e098adedSMattias Wallin .name = "ab8500-regulator", 825e098adedSMattias Wallin }, 826e098adedSMattias Wallin { 82762579266SRabin Vincent .name = "ab8500-gpadc", 82862579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_gpadc_resources), 82962579266SRabin Vincent .resources = ab8500_gpadc_resources, 83062579266SRabin Vincent }, 83162579266SRabin Vincent { 83262579266SRabin Vincent .name = "ab8500-rtc", 83362579266SRabin Vincent .num_resources = ARRAY_SIZE(ab8500_rtc_resources), 83462579266SRabin Vincent .resources = ab8500_rtc_resources, 83562579266SRabin Vincent }, 836f0f05b1cSArun Murthy { 8376af75ecdSLinus Walleij .name = "ab8500-charger", 8386af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_charger_resources), 8396af75ecdSLinus Walleij .resources = ab8500_charger_resources, 840e098adedSMattias Wallin }, 8416af75ecdSLinus Walleij { 8426af75ecdSLinus Walleij .name = "ab8500-btemp", 8436af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_btemp_resources), 8446af75ecdSLinus Walleij .resources = ab8500_btemp_resources, 8456af75ecdSLinus Walleij }, 8466af75ecdSLinus Walleij { 8476af75ecdSLinus Walleij .name = "ab8500-fg", 8486af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_fg_resources), 8496af75ecdSLinus Walleij .resources = ab8500_fg_resources, 8506af75ecdSLinus Walleij }, 8516af75ecdSLinus Walleij { 8526af75ecdSLinus Walleij .name = "ab8500-chargalg", 8536af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_chargalg_resources), 8546af75ecdSLinus Walleij .resources = ab8500_chargalg_resources, 8556af75ecdSLinus Walleij }, 8566af75ecdSLinus Walleij { 8576af75ecdSLinus Walleij .name = "ab8500-acc-det", 8586af75ecdSLinus Walleij .num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources), 8596af75ecdSLinus Walleij .resources = ab8500_av_acc_detect_resources, 8606af75ecdSLinus Walleij }, 8616af75ecdSLinus Walleij { 862e098adedSMattias Wallin .name = "ab8500-poweron-key", 863e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources), 864e098adedSMattias Wallin .resources = ab8500_poweronkey_db_resources, 865e098adedSMattias Wallin }, 866e098adedSMattias Wallin { 867f0f05b1cSArun Murthy .name = "ab8500-pwm", 868f0f05b1cSArun Murthy .id = 1, 869f0f05b1cSArun Murthy }, 870f0f05b1cSArun Murthy { 871f0f05b1cSArun Murthy .name = "ab8500-pwm", 872f0f05b1cSArun Murthy .id = 2, 873f0f05b1cSArun Murthy }, 874f0f05b1cSArun Murthy { 875f0f05b1cSArun Murthy .name = "ab8500-pwm", 876f0f05b1cSArun Murthy .id = 3, 877f0f05b1cSArun Murthy }, 878e098adedSMattias Wallin { .name = "ab8500-leds", }, 87977686517SSundar R Iyer { 880e098adedSMattias Wallin .name = "ab8500-denc", 881e098adedSMattias Wallin }, 882e098adedSMattias Wallin { 883e098adedSMattias Wallin .name = "ab8500-temp", 884e098adedSMattias Wallin .num_resources = ARRAY_SIZE(ab8500_temp_resources), 885e098adedSMattias Wallin .resources = ab8500_temp_resources, 88677686517SSundar R Iyer }, 88762579266SRabin Vincent }; 88862579266SRabin Vincent 889d6255529SLinus Walleij static struct mfd_cell __devinitdata ab8500_devs[] = { 890d6255529SLinus Walleij { 891d6255529SLinus Walleij .name = "ab8500-gpio", 892d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_gpio_resources), 893d6255529SLinus Walleij .resources = ab8500_gpio_resources, 894d6255529SLinus Walleij }, 895d6255529SLinus Walleij { 896d6255529SLinus Walleij .name = "ab8500-usb", 897d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 898d6255529SLinus Walleij .resources = ab8500_usb_resources, 899d6255529SLinus Walleij }, 90044f72e53SVirupax Sadashivpetimath { 90144f72e53SVirupax Sadashivpetimath .name = "ab8500-codec", 90244f72e53SVirupax Sadashivpetimath }, 903d6255529SLinus Walleij }; 904d6255529SLinus Walleij 905d6255529SLinus Walleij static struct mfd_cell __devinitdata ab9540_devs[] = { 906d6255529SLinus Walleij { 907d6255529SLinus Walleij .name = "ab8500-gpio", 908d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab9540_gpio_resources), 909d6255529SLinus Walleij .resources = ab9540_gpio_resources, 910d6255529SLinus Walleij }, 911d6255529SLinus Walleij { 912d6255529SLinus Walleij .name = "ab9540-usb", 913d6255529SLinus Walleij .num_resources = ARRAY_SIZE(ab8500_usb_resources), 914d6255529SLinus Walleij .resources = ab8500_usb_resources, 915d6255529SLinus Walleij }, 91644f72e53SVirupax Sadashivpetimath { 91744f72e53SVirupax Sadashivpetimath .name = "ab9540-codec", 91844f72e53SVirupax Sadashivpetimath }, 91944f72e53SVirupax Sadashivpetimath }; 92044f72e53SVirupax Sadashivpetimath 92144f72e53SVirupax Sadashivpetimath /* Device list common to ab9540 and ab8505 */ 92244f72e53SVirupax Sadashivpetimath static struct mfd_cell __devinitdata ab9540_ab8505_devs[] = { 92344f72e53SVirupax Sadashivpetimath { 92444f72e53SVirupax Sadashivpetimath .name = "ab-iddet", 92544f72e53SVirupax Sadashivpetimath .num_resources = ARRAY_SIZE(ab8505_iddet_resources), 92644f72e53SVirupax Sadashivpetimath .resources = ab8505_iddet_resources, 92744f72e53SVirupax Sadashivpetimath }, 928d6255529SLinus Walleij }; 929d6255529SLinus Walleij 930cca69b67SMattias Wallin static ssize_t show_chip_id(struct device *dev, 931cca69b67SMattias Wallin struct device_attribute *attr, char *buf) 932cca69b67SMattias Wallin { 933cca69b67SMattias Wallin struct ab8500 *ab8500; 934cca69b67SMattias Wallin 935cca69b67SMattias Wallin ab8500 = dev_get_drvdata(dev); 936cca69b67SMattias Wallin return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL); 937cca69b67SMattias Wallin } 938cca69b67SMattias Wallin 939e5c238c3SMattias Wallin /* 940e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 941e5c238c3SMattias Wallin * 0x01 Swoff bit programming 942e5c238c3SMattias Wallin * 0x02 Thermal protection activation 943e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 944e5c238c3SMattias Wallin * 0x08 Watchdog expired 945e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 946e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 947e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 948e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 949e5c238c3SMattias Wallin */ 950e5c238c3SMattias Wallin static ssize_t show_switch_off_status(struct device *dev, 951e5c238c3SMattias Wallin struct device_attribute *attr, char *buf) 952e5c238c3SMattias Wallin { 953e5c238c3SMattias Wallin int ret; 954e5c238c3SMattias Wallin u8 value; 955e5c238c3SMattias Wallin struct ab8500 *ab8500; 956e5c238c3SMattias Wallin 957e5c238c3SMattias Wallin ab8500 = dev_get_drvdata(dev); 958e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 959e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 960e5c238c3SMattias Wallin if (ret < 0) 961e5c238c3SMattias Wallin return ret; 962e5c238c3SMattias Wallin return sprintf(buf, "%#x\n", value); 963e5c238c3SMattias Wallin } 964e5c238c3SMattias Wallin 965b4a31037SAndrew Lynn /* 966b4a31037SAndrew Lynn * ab8500 has turned on due to (TURN_ON_STATUS): 967b4a31037SAndrew Lynn * 0x01 PORnVbat 968b4a31037SAndrew Lynn * 0x02 PonKey1dbF 969b4a31037SAndrew Lynn * 0x04 PonKey2dbF 970b4a31037SAndrew Lynn * 0x08 RTCAlarm 971b4a31037SAndrew Lynn * 0x10 MainChDet 972b4a31037SAndrew Lynn * 0x20 VbusDet 973b4a31037SAndrew Lynn * 0x40 UsbIDDetect 974b4a31037SAndrew Lynn * 0x80 Reserved 975b4a31037SAndrew Lynn */ 976b4a31037SAndrew Lynn static ssize_t show_turn_on_status(struct device *dev, 977b4a31037SAndrew Lynn struct device_attribute *attr, char *buf) 978b4a31037SAndrew Lynn { 979b4a31037SAndrew Lynn int ret; 980b4a31037SAndrew Lynn u8 value; 981b4a31037SAndrew Lynn struct ab8500 *ab8500; 982b4a31037SAndrew Lynn 983b4a31037SAndrew Lynn ab8500 = dev_get_drvdata(dev); 984b4a31037SAndrew Lynn ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK, 985b4a31037SAndrew Lynn AB8500_TURN_ON_STATUS, &value); 986b4a31037SAndrew Lynn if (ret < 0) 987b4a31037SAndrew Lynn return ret; 988b4a31037SAndrew Lynn return sprintf(buf, "%#x\n", value); 989b4a31037SAndrew Lynn } 990b4a31037SAndrew Lynn 991d6255529SLinus Walleij static ssize_t show_ab9540_dbbrstn(struct device *dev, 992d6255529SLinus Walleij struct device_attribute *attr, char *buf) 993d6255529SLinus Walleij { 994d6255529SLinus Walleij struct ab8500 *ab8500; 995d6255529SLinus Walleij int ret; 996d6255529SLinus Walleij u8 value; 997d6255529SLinus Walleij 998d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 999d6255529SLinus Walleij 1000d6255529SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2, 1001d6255529SLinus Walleij AB9540_MODEM_CTRL2_REG, &value); 1002d6255529SLinus Walleij if (ret < 0) 1003d6255529SLinus Walleij return ret; 1004d6255529SLinus Walleij 1005d6255529SLinus Walleij return sprintf(buf, "%d\n", 1006d6255529SLinus Walleij (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0); 1007d6255529SLinus Walleij } 1008d6255529SLinus Walleij 1009d6255529SLinus Walleij static ssize_t store_ab9540_dbbrstn(struct device *dev, 1010d6255529SLinus Walleij struct device_attribute *attr, const char *buf, size_t count) 1011d6255529SLinus Walleij { 1012d6255529SLinus Walleij struct ab8500 *ab8500; 1013d6255529SLinus Walleij int ret = count; 1014d6255529SLinus Walleij int err; 1015d6255529SLinus Walleij u8 bitvalues; 1016d6255529SLinus Walleij 1017d6255529SLinus Walleij ab8500 = dev_get_drvdata(dev); 1018d6255529SLinus Walleij 1019d6255529SLinus Walleij if (count > 0) { 1020d6255529SLinus Walleij switch (buf[0]) { 1021d6255529SLinus Walleij case '0': 1022d6255529SLinus Walleij bitvalues = 0; 1023d6255529SLinus Walleij break; 1024d6255529SLinus Walleij case '1': 1025d6255529SLinus Walleij bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT; 1026d6255529SLinus Walleij break; 1027d6255529SLinus Walleij default: 1028d6255529SLinus Walleij goto exit; 1029d6255529SLinus Walleij } 1030d6255529SLinus Walleij 1031d6255529SLinus Walleij err = mask_and_set_register_interruptible(ab8500, 1032d6255529SLinus Walleij AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG, 1033d6255529SLinus Walleij AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues); 1034d6255529SLinus Walleij if (err) 1035d6255529SLinus Walleij dev_info(ab8500->dev, 1036d6255529SLinus Walleij "Failed to set DBBRSTN %c, err %#x\n", 1037d6255529SLinus Walleij buf[0], err); 1038d6255529SLinus Walleij } 1039d6255529SLinus Walleij 1040d6255529SLinus Walleij exit: 1041d6255529SLinus Walleij return ret; 1042d6255529SLinus Walleij } 1043d6255529SLinus Walleij 1044cca69b67SMattias Wallin static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL); 1045e5c238c3SMattias Wallin static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL); 1046b4a31037SAndrew Lynn static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL); 1047d6255529SLinus Walleij static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR, 1048d6255529SLinus Walleij show_ab9540_dbbrstn, store_ab9540_dbbrstn); 1049cca69b67SMattias Wallin 1050cca69b67SMattias Wallin static struct attribute *ab8500_sysfs_entries[] = { 1051cca69b67SMattias Wallin &dev_attr_chip_id.attr, 1052e5c238c3SMattias Wallin &dev_attr_switch_off_status.attr, 1053b4a31037SAndrew Lynn &dev_attr_turn_on_status.attr, 1054cca69b67SMattias Wallin NULL, 1055cca69b67SMattias Wallin }; 1056cca69b67SMattias Wallin 1057d6255529SLinus Walleij static struct attribute *ab9540_sysfs_entries[] = { 1058d6255529SLinus Walleij &dev_attr_chip_id.attr, 1059d6255529SLinus Walleij &dev_attr_switch_off_status.attr, 1060d6255529SLinus Walleij &dev_attr_turn_on_status.attr, 1061d6255529SLinus Walleij &dev_attr_dbbrstn.attr, 1062d6255529SLinus Walleij NULL, 1063d6255529SLinus Walleij }; 1064d6255529SLinus Walleij 1065cca69b67SMattias Wallin static struct attribute_group ab8500_attr_group = { 1066cca69b67SMattias Wallin .attrs = ab8500_sysfs_entries, 1067cca69b67SMattias Wallin }; 1068cca69b67SMattias Wallin 1069d6255529SLinus Walleij static struct attribute_group ab9540_attr_group = { 1070d6255529SLinus Walleij .attrs = ab9540_sysfs_entries, 1071d6255529SLinus Walleij }; 1072d6255529SLinus Walleij 10730f620837SLinus Walleij int __devinit ab8500_init(struct ab8500 *ab8500, enum ab8500_version version) 107462579266SRabin Vincent { 107562579266SRabin Vincent struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev); 107662579266SRabin Vincent int ret; 107762579266SRabin Vincent int i; 107847c16975SMattias Wallin u8 value; 107962579266SRabin Vincent 108062579266SRabin Vincent if (plat) 108162579266SRabin Vincent ab8500->irq_base = plat->irq_base; 108262579266SRabin Vincent 108362579266SRabin Vincent mutex_init(&ab8500->lock); 108462579266SRabin Vincent mutex_init(&ab8500->irq_lock); 1085*112a80d2SJonas Aaberg atomic_set(&ab8500->transfer_ongoing, 0); 108662579266SRabin Vincent 10870f620837SLinus Walleij if (version != AB8500_VERSION_UNDEFINED) 10880f620837SLinus Walleij ab8500->version = version; 10890f620837SLinus Walleij else { 10900f620837SLinus Walleij ret = get_register_interruptible(ab8500, AB8500_MISC, 10910f620837SLinus Walleij AB8500_IC_NAME_REG, &value); 10920f620837SLinus Walleij if (ret < 0) 10930f620837SLinus Walleij return ret; 10940f620837SLinus Walleij 10950f620837SLinus Walleij ab8500->version = value; 10960f620837SLinus Walleij } 10970f620837SLinus Walleij 109847c16975SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_MISC, 109947c16975SMattias Wallin AB8500_REV_REG, &value); 110062579266SRabin Vincent if (ret < 0) 110162579266SRabin Vincent return ret; 110262579266SRabin Vincent 110347c16975SMattias Wallin ab8500->chip_id = value; 110462579266SRabin Vincent 11050f620837SLinus Walleij dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n", 11060f620837SLinus Walleij ab8500_version_str[ab8500->version], 11070f620837SLinus Walleij ab8500->chip_id >> 4, 11080f620837SLinus Walleij ab8500->chip_id & 0x0F); 11090f620837SLinus Walleij 1110d6255529SLinus Walleij /* Configure AB8500 or AB9540 IRQ */ 1111a982362cSBengt Jonsson if (is_ab9540(ab8500) || is_ab8505(ab8500)) { 1112d6255529SLinus Walleij ab8500->mask_size = AB9540_NUM_IRQ_REGS; 1113d6255529SLinus Walleij ab8500->irq_reg_offset = ab9540_irq_regoffset; 1114d6255529SLinus Walleij } else { 11152ced445eSLinus Walleij ab8500->mask_size = AB8500_NUM_IRQ_REGS; 11162ced445eSLinus Walleij ab8500->irq_reg_offset = ab8500_irq_regoffset; 1117d6255529SLinus Walleij } 11182ced445eSLinus Walleij ab8500->mask = kzalloc(ab8500->mask_size, GFP_KERNEL); 11192ced445eSLinus Walleij if (!ab8500->mask) 11202ced445eSLinus Walleij return -ENOMEM; 11212ced445eSLinus Walleij ab8500->oldmask = kzalloc(ab8500->mask_size, GFP_KERNEL); 11222ced445eSLinus Walleij if (!ab8500->oldmask) { 11232ced445eSLinus Walleij ret = -ENOMEM; 11242ced445eSLinus Walleij goto out_freemask; 11252ced445eSLinus Walleij } 1126e5c238c3SMattias Wallin /* 1127e5c238c3SMattias Wallin * ab8500 has switched off due to (SWITCH_OFF_STATUS): 1128e5c238c3SMattias Wallin * 0x01 Swoff bit programming 1129e5c238c3SMattias Wallin * 0x02 Thermal protection activation 1130e5c238c3SMattias Wallin * 0x04 Vbat lower then BattOk falling threshold 1131e5c238c3SMattias Wallin * 0x08 Watchdog expired 1132e5c238c3SMattias Wallin * 0x10 Non presence of 32kHz clock 1133e5c238c3SMattias Wallin * 0x20 Battery level lower than power on reset threshold 1134e5c238c3SMattias Wallin * 0x40 Power on key 1 pressed longer than 10 seconds 1135e5c238c3SMattias Wallin * 0x80 DB8500 thermal shutdown 1136e5c238c3SMattias Wallin */ 1137e5c238c3SMattias Wallin 1138e5c238c3SMattias Wallin ret = get_register_interruptible(ab8500, AB8500_RTC, 1139e5c238c3SMattias Wallin AB8500_SWITCH_OFF_STATUS, &value); 1140e5c238c3SMattias Wallin if (ret < 0) 1141e5c238c3SMattias Wallin return ret; 1142e5c238c3SMattias Wallin dev_info(ab8500->dev, "switch off status: %#x", value); 1143e5c238c3SMattias Wallin 114462579266SRabin Vincent if (plat && plat->init) 114562579266SRabin Vincent plat->init(ab8500); 114662579266SRabin Vincent 114762579266SRabin Vincent /* Clear and mask all interrupts */ 11482ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) { 11490f620837SLinus Walleij /* 11500f620837SLinus Walleij * Interrupt register 12 doesn't exist prior to AB8500 version 11510f620837SLinus Walleij * 2.0 11520f620837SLinus Walleij */ 11530f620837SLinus Walleij if (ab8500->irq_reg_offset[i] == 11 && 11540f620837SLinus Walleij is_ab8500_1p1_or_earlier(ab8500)) 115592d50a41SMattias Wallin continue; 115662579266SRabin Vincent 115747c16975SMattias Wallin get_register_interruptible(ab8500, AB8500_INTERRUPT, 11582ced445eSLinus Walleij AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i], 115992d50a41SMattias Wallin &value); 116047c16975SMattias Wallin set_register_interruptible(ab8500, AB8500_INTERRUPT, 11612ced445eSLinus Walleij AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff); 116262579266SRabin Vincent } 116362579266SRabin Vincent 116447c16975SMattias Wallin ret = abx500_register_ops(ab8500->dev, &ab8500_ops); 116547c16975SMattias Wallin if (ret) 11662ced445eSLinus Walleij goto out_freeoldmask; 116747c16975SMattias Wallin 11682ced445eSLinus Walleij for (i = 0; i < ab8500->mask_size; i++) 116962579266SRabin Vincent ab8500->mask[i] = ab8500->oldmask[i] = 0xff; 117062579266SRabin Vincent 117162579266SRabin Vincent if (ab8500->irq_base) { 117262579266SRabin Vincent ret = ab8500_irq_init(ab8500); 117362579266SRabin Vincent if (ret) 11742ced445eSLinus Walleij goto out_freeoldmask; 117562579266SRabin Vincent 117662579266SRabin Vincent ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq, 11774f079985SMattias Wallin IRQF_ONESHOT | IRQF_NO_SUSPEND, 11784f079985SMattias Wallin "ab8500", ab8500); 117962579266SRabin Vincent if (ret) 118062579266SRabin Vincent goto out_removeirq; 118162579266SRabin Vincent } 118262579266SRabin Vincent 1183d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, abx500_common_devs, 1184d6255529SLinus Walleij ARRAY_SIZE(abx500_common_devs), NULL, 1185d6255529SLinus Walleij ab8500->irq_base); 1186d6255529SLinus Walleij 1187d6255529SLinus Walleij if (ret) 1188d6255529SLinus Walleij goto out_freeirq; 1189d6255529SLinus Walleij 1190d6255529SLinus Walleij if (is_ab9540(ab8500)) 1191d6255529SLinus Walleij ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs, 1192d6255529SLinus Walleij ARRAY_SIZE(ab9540_devs), NULL, 1193d6255529SLinus Walleij ab8500->irq_base); 1194d6255529SLinus Walleij else 1195549931f9SSundar R Iyer ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs, 119644f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab8500_devs), NULL, 119762579266SRabin Vincent ab8500->irq_base); 119844f72e53SVirupax Sadashivpetimath 119944f72e53SVirupax Sadashivpetimath if (is_ab9540(ab8500) || is_ab8505(ab8500)) 120044f72e53SVirupax Sadashivpetimath ret = mfd_add_devices(ab8500->dev, 0, ab9540_ab8505_devs, 120144f72e53SVirupax Sadashivpetimath ARRAY_SIZE(ab9540_ab8505_devs), NULL, 120244f72e53SVirupax Sadashivpetimath ab8500->irq_base); 120344f72e53SVirupax Sadashivpetimath 120462579266SRabin Vincent if (ret) 120562579266SRabin Vincent goto out_freeirq; 120662579266SRabin Vincent 1207d6255529SLinus Walleij if (is_ab9540(ab8500)) 1208d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1209d6255529SLinus Walleij &ab9540_attr_group); 1210d6255529SLinus Walleij else 1211d6255529SLinus Walleij ret = sysfs_create_group(&ab8500->dev->kobj, 1212d6255529SLinus Walleij &ab8500_attr_group); 1213cca69b67SMattias Wallin if (ret) 1214cca69b67SMattias Wallin dev_err(ab8500->dev, "error creating sysfs entries\n"); 1215d6255529SLinus Walleij else 121662579266SRabin Vincent return ret; 121762579266SRabin Vincent 121862579266SRabin Vincent out_freeirq: 12196d95b7fdSLinus Walleij if (ab8500->irq_base) 122062579266SRabin Vincent free_irq(ab8500->irq, ab8500); 122162579266SRabin Vincent out_removeirq: 12226d95b7fdSLinus Walleij if (ab8500->irq_base) 122362579266SRabin Vincent ab8500_irq_remove(ab8500); 12242ced445eSLinus Walleij out_freeoldmask: 12252ced445eSLinus Walleij kfree(ab8500->oldmask); 12262ced445eSLinus Walleij out_freemask: 12272ced445eSLinus Walleij kfree(ab8500->mask); 12286d95b7fdSLinus Walleij 122962579266SRabin Vincent return ret; 123062579266SRabin Vincent } 123162579266SRabin Vincent 123262579266SRabin Vincent int __devexit ab8500_exit(struct ab8500 *ab8500) 123362579266SRabin Vincent { 1234d6255529SLinus Walleij if (is_ab9540(ab8500)) 1235d6255529SLinus Walleij sysfs_remove_group(&ab8500->dev->kobj, &ab9540_attr_group); 1236d6255529SLinus Walleij else 1237cca69b67SMattias Wallin sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group); 123862579266SRabin Vincent mfd_remove_devices(ab8500->dev); 123962579266SRabin Vincent if (ab8500->irq_base) { 124062579266SRabin Vincent free_irq(ab8500->irq, ab8500); 124162579266SRabin Vincent ab8500_irq_remove(ab8500); 124262579266SRabin Vincent } 12432ced445eSLinus Walleij kfree(ab8500->oldmask); 12442ced445eSLinus Walleij kfree(ab8500->mask); 124562579266SRabin Vincent 124662579266SRabin Vincent return 0; 124762579266SRabin Vincent } 124862579266SRabin Vincent 1249adceed62SMattias Wallin MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent"); 125062579266SRabin Vincent MODULE_DESCRIPTION("AB8500 MFD core"); 125162579266SRabin Vincent MODULE_LICENSE("GPL v2"); 1252