1*c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
20c0d06caSMauro Carvalho Chehab /*
30c0d06caSMauro Carvalho Chehab * STK1160 driver
40c0d06caSMauro Carvalho Chehab *
50c0d06caSMauro Carvalho Chehab * Copyright (C) 2012 Ezequiel Garcia
60c0d06caSMauro Carvalho Chehab * <elezegarcia--a.t--gmail.com>
70c0d06caSMauro Carvalho Chehab *
8e36e6b5fSMarcel Hasler * Copyright (C) 2016 Marcel Hasler
9e36e6b5fSMarcel Hasler * <mahasler--a.t--gmail.com>
10e36e6b5fSMarcel Hasler *
110c0d06caSMauro Carvalho Chehab * Based on Easycap driver by R.M. Thomas
120c0d06caSMauro Carvalho Chehab * Copyright (C) 2010 R.M. Thomas
130c0d06caSMauro Carvalho Chehab * <rmthomas--a.t--sciolus.org>
140c0d06caSMauro Carvalho Chehab */
150c0d06caSMauro Carvalho Chehab
169a4825edSMarcel Hasler #include <linux/delay.h>
179a4825edSMarcel Hasler
180c0d06caSMauro Carvalho Chehab #include "stk1160.h"
190c0d06caSMauro Carvalho Chehab #include "stk1160-reg.h"
200c0d06caSMauro Carvalho Chehab
stk1160_ac97_wait_transfer_complete(struct stk1160 * dev)219a4825edSMarcel Hasler static int stk1160_ac97_wait_transfer_complete(struct stk1160 *dev)
229a4825edSMarcel Hasler {
239a4825edSMarcel Hasler unsigned long timeout = jiffies + msecs_to_jiffies(STK1160_AC97_TIMEOUT);
249a4825edSMarcel Hasler u8 value;
259a4825edSMarcel Hasler
269a4825edSMarcel Hasler /* Wait for AC97 transfer to complete */
279a4825edSMarcel Hasler while (time_is_after_jiffies(timeout)) {
289a4825edSMarcel Hasler stk1160_read_reg(dev, STK1160_AC97CTL_0, &value);
299a4825edSMarcel Hasler
309a4825edSMarcel Hasler if (!(value & (STK1160_AC97CTL_0_CR | STK1160_AC97CTL_0_CW)))
319a4825edSMarcel Hasler return 0;
329a4825edSMarcel Hasler
339a4825edSMarcel Hasler usleep_range(50, 100);
349a4825edSMarcel Hasler }
359a4825edSMarcel Hasler
369a4825edSMarcel Hasler stk1160_err("AC97 transfer took too long, this should never happen!");
379a4825edSMarcel Hasler return -EBUSY;
389a4825edSMarcel Hasler }
399a4825edSMarcel Hasler
stk1160_write_ac97(struct stk1160 * dev,u16 reg,u16 value)40e36e6b5fSMarcel Hasler static void stk1160_write_ac97(struct stk1160 *dev, u16 reg, u16 value)
410c0d06caSMauro Carvalho Chehab {
420c0d06caSMauro Carvalho Chehab /* Set codec register address */
430c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_ADDR, reg);
440c0d06caSMauro Carvalho Chehab
450c0d06caSMauro Carvalho Chehab /* Set codec command */
460c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_CMD, value & 0xff);
470c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_CMD + 1, (value & 0xff00) >> 8);
480c0d06caSMauro Carvalho Chehab
499a4825edSMarcel Hasler /* Set command write bit to initiate write operation */
500c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x8c);
519a4825edSMarcel Hasler
529a4825edSMarcel Hasler /* Wait for command write bit to be cleared */
539a4825edSMarcel Hasler stk1160_ac97_wait_transfer_complete(dev);
540c0d06caSMauro Carvalho Chehab }
550c0d06caSMauro Carvalho Chehab
56e36e6b5fSMarcel Hasler #ifdef DEBUG
stk1160_read_ac97(struct stk1160 * dev,u16 reg)57e36e6b5fSMarcel Hasler static u16 stk1160_read_ac97(struct stk1160 *dev, u16 reg)
580c0d06caSMauro Carvalho Chehab {
590c0d06caSMauro Carvalho Chehab u8 vall = 0;
600c0d06caSMauro Carvalho Chehab u8 valh = 0;
610c0d06caSMauro Carvalho Chehab
620c0d06caSMauro Carvalho Chehab /* Set codec register address */
630c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97_ADDR, reg);
640c0d06caSMauro Carvalho Chehab
659a4825edSMarcel Hasler /* Set command read bit to initiate read operation */
660c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x8b);
670c0d06caSMauro Carvalho Chehab
689a4825edSMarcel Hasler /* Wait for command read bit to be cleared */
699a4825edSMarcel Hasler if (stk1160_ac97_wait_transfer_complete(dev) < 0)
709a4825edSMarcel Hasler return 0;
719a4825edSMarcel Hasler
729a4825edSMarcel Hasler
730c0d06caSMauro Carvalho Chehab /* Retrieve register value */
740c0d06caSMauro Carvalho Chehab stk1160_read_reg(dev, STK1160_AC97_CMD, &vall);
750c0d06caSMauro Carvalho Chehab stk1160_read_reg(dev, STK1160_AC97_CMD + 1, &valh);
760c0d06caSMauro Carvalho Chehab
770c0d06caSMauro Carvalho Chehab return (valh << 8) | vall;
780c0d06caSMauro Carvalho Chehab }
790c0d06caSMauro Carvalho Chehab
stk1160_ac97_dump_regs(struct stk1160 * dev)80e36e6b5fSMarcel Hasler void stk1160_ac97_dump_regs(struct stk1160 *dev)
810c0d06caSMauro Carvalho Chehab {
82e36e6b5fSMarcel Hasler u16 value;
83e36e6b5fSMarcel Hasler
84e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x12); /* CD volume */
85e36e6b5fSMarcel Hasler stk1160_dbg("0x12 == 0x%04x", value);
86e36e6b5fSMarcel Hasler
87e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x10); /* Line-in volume */
88e36e6b5fSMarcel Hasler stk1160_dbg("0x10 == 0x%04x", value);
89e36e6b5fSMarcel Hasler
90e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x0e); /* MIC volume (mono) */
91e36e6b5fSMarcel Hasler stk1160_dbg("0x0e == 0x%04x", value);
92e36e6b5fSMarcel Hasler
93e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x16); /* Aux volume */
94e36e6b5fSMarcel Hasler stk1160_dbg("0x16 == 0x%04x", value);
95e36e6b5fSMarcel Hasler
96e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x1a); /* Record select */
97e36e6b5fSMarcel Hasler stk1160_dbg("0x1a == 0x%04x", value);
98e36e6b5fSMarcel Hasler
99e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x02); /* Master volume */
100e36e6b5fSMarcel Hasler stk1160_dbg("0x02 == 0x%04x", value);
101e36e6b5fSMarcel Hasler
102e36e6b5fSMarcel Hasler value = stk1160_read_ac97(dev, 0x1c); /* Record gain */
103e36e6b5fSMarcel Hasler stk1160_dbg("0x1c == 0x%04x", value);
104e36e6b5fSMarcel Hasler }
105e36e6b5fSMarcel Hasler #endif
106e36e6b5fSMarcel Hasler
stk1160_has_audio(struct stk1160 * dev)107504fc028SMauro Carvalho Chehab static int stk1160_has_audio(struct stk1160 *dev)
1081dc7df4dSMarcel Hasler {
1091dc7df4dSMarcel Hasler u8 value;
1101dc7df4dSMarcel Hasler
1111dc7df4dSMarcel Hasler stk1160_read_reg(dev, STK1160_POSV_L, &value);
1121dc7df4dSMarcel Hasler return !(value & STK1160_POSV_L_ACDOUT);
1131dc7df4dSMarcel Hasler }
1141dc7df4dSMarcel Hasler
stk1160_has_ac97(struct stk1160 * dev)115504fc028SMauro Carvalho Chehab static int stk1160_has_ac97(struct stk1160 *dev)
1161dc7df4dSMarcel Hasler {
1171dc7df4dSMarcel Hasler u8 value;
1181dc7df4dSMarcel Hasler
1191dc7df4dSMarcel Hasler stk1160_read_reg(dev, STK1160_POSV_L, &value);
1201dc7df4dSMarcel Hasler return !(value & STK1160_POSV_L_ACSYNC);
1211dc7df4dSMarcel Hasler }
1221dc7df4dSMarcel Hasler
stk1160_ac97_setup(struct stk1160 * dev)123e36e6b5fSMarcel Hasler void stk1160_ac97_setup(struct stk1160 *dev)
124e36e6b5fSMarcel Hasler {
1251dc7df4dSMarcel Hasler if (!stk1160_has_audio(dev)) {
1261dc7df4dSMarcel Hasler stk1160_info("Device doesn't support audio, skipping AC97 setup.");
1271dc7df4dSMarcel Hasler return;
1281dc7df4dSMarcel Hasler }
1291dc7df4dSMarcel Hasler
1301dc7df4dSMarcel Hasler if (!stk1160_has_ac97(dev)) {
1311dc7df4dSMarcel Hasler stk1160_info("Device uses internal 8-bit ADC, skipping AC97 setup.");
1321dc7df4dSMarcel Hasler return;
1331dc7df4dSMarcel Hasler }
1341dc7df4dSMarcel Hasler
1350c0d06caSMauro Carvalho Chehab /* Two-step reset AC97 interface and hardware codec */
1360c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x94);
137e36e6b5fSMarcel Hasler stk1160_write_reg(dev, STK1160_AC97CTL_0, 0x8c);
1380c0d06caSMauro Carvalho Chehab
1390c0d06caSMauro Carvalho Chehab /* Set 16-bit audio data and choose L&R channel*/
1400c0d06caSMauro Carvalho Chehab stk1160_write_reg(dev, STK1160_AC97CTL_1 + 2, 0x01);
141e36e6b5fSMarcel Hasler stk1160_write_reg(dev, STK1160_AC97CTL_1 + 3, 0x00);
1420c0d06caSMauro Carvalho Chehab
143e36e6b5fSMarcel Hasler /* Setup channels */
144e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x12, 0x8808); /* CD volume */
145e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x10, 0x0808); /* Line-in volume */
146e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x0e, 0x0008); /* MIC volume (mono) */
147e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x16, 0x0808); /* Aux volume */
148e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x1a, 0x0404); /* Record select */
149e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x02, 0x0000); /* Master volume */
150e36e6b5fSMarcel Hasler stk1160_write_ac97(dev, 0x1c, 0x0808); /* Record gain */
1510c0d06caSMauro Carvalho Chehab
152e36e6b5fSMarcel Hasler #ifdef DEBUG
153e36e6b5fSMarcel Hasler stk1160_ac97_dump_regs(dev);
154e36e6b5fSMarcel Hasler #endif
1550c0d06caSMauro Carvalho Chehab }
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