10c0d06caSMauro Carvalho Chehab /* 20c0d06caSMauro Carvalho Chehab cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices 30c0d06caSMauro Carvalho Chehab 40c0d06caSMauro Carvalho Chehab Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 50c0d06caSMauro Carvalho Chehab Based on em28xx driver 60c0d06caSMauro Carvalho Chehab 70c0d06caSMauro Carvalho Chehab This program is free software; you can redistribute it and/or modify 80c0d06caSMauro Carvalho Chehab it under the terms of the GNU General Public License as published by 90c0d06caSMauro Carvalho Chehab the Free Software Foundation; either version 2 of the License, or 100c0d06caSMauro Carvalho Chehab (at your option) any later version. 110c0d06caSMauro Carvalho Chehab 120c0d06caSMauro Carvalho Chehab This program is distributed in the hope that it will be useful, 130c0d06caSMauro Carvalho Chehab but WITHOUT ANY WARRANTY; without even the implied warranty of 140c0d06caSMauro Carvalho Chehab MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 150c0d06caSMauro Carvalho Chehab GNU General Public License for more details. 160c0d06caSMauro Carvalho Chehab 170c0d06caSMauro Carvalho Chehab You should have received a copy of the GNU General Public License 180c0d06caSMauro Carvalho Chehab along with this program; if not, write to the Free Software 190c0d06caSMauro Carvalho Chehab Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 200c0d06caSMauro Carvalho Chehab */ 210c0d06caSMauro Carvalho Chehab 220c0d06caSMauro Carvalho Chehab #ifndef _CX231XX_H 230c0d06caSMauro Carvalho Chehab #define _CX231XX_H 240c0d06caSMauro Carvalho Chehab 250c0d06caSMauro Carvalho Chehab #include <linux/videodev2.h> 260c0d06caSMauro Carvalho Chehab #include <linux/types.h> 270c0d06caSMauro Carvalho Chehab #include <linux/ioctl.h> 280c0d06caSMauro Carvalho Chehab #include <linux/i2c.h> 290c0d06caSMauro Carvalho Chehab #include <linux/workqueue.h> 300c0d06caSMauro Carvalho Chehab #include <linux/mutex.h> 310c0d06caSMauro Carvalho Chehab 320c0d06caSMauro Carvalho Chehab #include <media/cx2341x.h> 330c0d06caSMauro Carvalho Chehab 340c0d06caSMauro Carvalho Chehab #include <media/videobuf-vmalloc.h> 350c0d06caSMauro Carvalho Chehab #include <media/v4l2-device.h> 36d2370f8eSHans Verkuil #include <media/v4l2-ctrls.h> 371d08a4faSHans Verkuil #include <media/v4l2-fh.h> 380c0d06caSMauro Carvalho Chehab #include <media/rc-core.h> 390c0d06caSMauro Carvalho Chehab #include <media/ir-kbd-i2c.h> 400c0d06caSMauro Carvalho Chehab #include <media/videobuf-dvb.h> 410c0d06caSMauro Carvalho Chehab 420c0d06caSMauro Carvalho Chehab #include "cx231xx-reg.h" 430c0d06caSMauro Carvalho Chehab #include "cx231xx-pcb-cfg.h" 440c0d06caSMauro Carvalho Chehab #include "cx231xx-conf-reg.h" 450c0d06caSMauro Carvalho Chehab 460c0d06caSMauro Carvalho Chehab #define DRIVER_NAME "cx231xx" 470c0d06caSMauro Carvalho Chehab #define PWR_SLEEP_INTERVAL 10 480c0d06caSMauro Carvalho Chehab 490c0d06caSMauro Carvalho Chehab /* I2C addresses for control block in Cx231xx */ 500c0d06caSMauro Carvalho Chehab #define AFE_DEVICE_ADDRESS 0x60 510c0d06caSMauro Carvalho Chehab #define I2S_BLK_DEVICE_ADDRESS 0x98 520c0d06caSMauro Carvalho Chehab #define VID_BLK_I2C_ADDRESS 0x88 530c0d06caSMauro Carvalho Chehab #define VERVE_I2C_ADDRESS 0x40 540c0d06caSMauro Carvalho Chehab #define DIF_USE_BASEBAND 0xFFFFFFFF 550c0d06caSMauro Carvalho Chehab 560c0d06caSMauro Carvalho Chehab /* Boards supported by driver */ 570c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_UNKNOWN 0 580c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_CARRAERA 1 590c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_SHELBY 2 600c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDE_253S 3 610c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDU_253S 4 620c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5 630c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDE_250 6 640c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDU_250 7 650c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_EXETER 8 660c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9 670c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10 680c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_PV_XCAPTURE_USB 11 690c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12 700c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_ICONBIT_U100 13 710c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14 720c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15 7368c97bf3SAlf Høgemark #define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16 743ead1ba3SMatt Gomboc #define CX231XX_BOARD_OTG102 17 758b1255a2SJohannes Erdfelt #define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18 76*dd2e7dd2SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19 770c0d06caSMauro Carvalho Chehab 780c0d06caSMauro Carvalho Chehab /* Limits minimum and default number of buffers */ 790c0d06caSMauro Carvalho Chehab #define CX231XX_MIN_BUF 4 800c0d06caSMauro Carvalho Chehab #define CX231XX_DEF_BUF 12 810c0d06caSMauro Carvalho Chehab #define CX231XX_DEF_VBI_BUF 6 820c0d06caSMauro Carvalho Chehab 830c0d06caSMauro Carvalho Chehab #define VBI_LINE_COUNT 17 840c0d06caSMauro Carvalho Chehab #define VBI_LINE_LENGTH 1440 850c0d06caSMauro Carvalho Chehab 860c0d06caSMauro Carvalho Chehab /*Limits the max URB message size */ 870c0d06caSMauro Carvalho Chehab #define URB_MAX_CTRL_SIZE 80 880c0d06caSMauro Carvalho Chehab 890c0d06caSMauro Carvalho Chehab /* Params for validated field */ 900c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_NOT_VALIDATED 1 910c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_VALIDATED 0 920c0d06caSMauro Carvalho Chehab 930c0d06caSMauro Carvalho Chehab /* maximum number of cx231xx boards */ 940c0d06caSMauro Carvalho Chehab #define CX231XX_MAXBOARDS 8 950c0d06caSMauro Carvalho Chehab 960c0d06caSMauro Carvalho Chehab /* maximum number of frames that can be queued */ 970c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_FRAMES 5 980c0d06caSMauro Carvalho Chehab 990c0d06caSMauro Carvalho Chehab /* number of buffers for isoc transfers */ 1000c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_BUFS 8 1010c0d06caSMauro Carvalho Chehab 1020c0d06caSMauro Carvalho Chehab /* number of packets for each buffer 1030c0d06caSMauro Carvalho Chehab windows requests only 40 packets .. so we better do the same 1040c0d06caSMauro Carvalho Chehab this is what I found out for all alternate numbers there! 1050c0d06caSMauro Carvalho Chehab */ 1060c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_PACKETS 40 1070c0d06caSMauro Carvalho Chehab 1080c0d06caSMauro Carvalho Chehab /* default alternate; 0 means choose the best */ 1090c0d06caSMauro Carvalho Chehab #define CX231XX_PINOUT 0 1100c0d06caSMauro Carvalho Chehab 1110c0d06caSMauro Carvalho Chehab #define CX231XX_INTERLACED_DEFAULT 1 1120c0d06caSMauro Carvalho Chehab 1130c0d06caSMauro Carvalho Chehab /* time to wait when stopping the isoc transfer */ 1140c0d06caSMauro Carvalho Chehab #define CX231XX_URB_TIMEOUT \ 1150c0d06caSMauro Carvalho Chehab msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) 1160c0d06caSMauro Carvalho Chehab 1170c0d06caSMauro Carvalho Chehab #define CX231xx_NORMS (\ 1180c0d06caSMauro Carvalho Chehab V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 1190c0d06caSMauro Carvalho Chehab V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 1200c0d06caSMauro Carvalho Chehab V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 1210c0d06caSMauro Carvalho Chehab V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 1220c0d06caSMauro Carvalho Chehab 1230c0d06caSMauro Carvalho Chehab #define SLEEP_S5H1432 30 1240c0d06caSMauro Carvalho Chehab #define CX23417_OSC_EN 8 1250c0d06caSMauro Carvalho Chehab #define CX23417_RESET 9 1260c0d06caSMauro Carvalho Chehab 1270c0d06caSMauro Carvalho Chehab struct cx23417_fmt { 1280c0d06caSMauro Carvalho Chehab char *name; 1290c0d06caSMauro Carvalho Chehab u32 fourcc; /* v4l2 format id */ 1300c0d06caSMauro Carvalho Chehab int depth; 1310c0d06caSMauro Carvalho Chehab int flags; 1320c0d06caSMauro Carvalho Chehab u32 cxformat; 1330c0d06caSMauro Carvalho Chehab }; 1340c0d06caSMauro Carvalho Chehab enum cx231xx_mode { 1350c0d06caSMauro Carvalho Chehab CX231XX_SUSPEND, 1360c0d06caSMauro Carvalho Chehab CX231XX_ANALOG_MODE, 1370c0d06caSMauro Carvalho Chehab CX231XX_DIGITAL_MODE, 1380c0d06caSMauro Carvalho Chehab }; 1390c0d06caSMauro Carvalho Chehab 1400c0d06caSMauro Carvalho Chehab enum cx231xx_std_mode { 1410c0d06caSMauro Carvalho Chehab CX231XX_TV_AIR = 0, 1420c0d06caSMauro Carvalho Chehab CX231XX_TV_CABLE 1430c0d06caSMauro Carvalho Chehab }; 1440c0d06caSMauro Carvalho Chehab 1450c0d06caSMauro Carvalho Chehab enum cx231xx_stream_state { 1460c0d06caSMauro Carvalho Chehab STREAM_OFF, 1470c0d06caSMauro Carvalho Chehab STREAM_INTERRUPT, 1480c0d06caSMauro Carvalho Chehab STREAM_ON, 1490c0d06caSMauro Carvalho Chehab }; 1500c0d06caSMauro Carvalho Chehab 1510c0d06caSMauro Carvalho Chehab struct cx231xx; 1520c0d06caSMauro Carvalho Chehab 1530c0d06caSMauro Carvalho Chehab struct cx231xx_isoc_ctl { 1540c0d06caSMauro Carvalho Chehab /* max packet size of isoc transaction */ 1550c0d06caSMauro Carvalho Chehab int max_pkt_size; 1560c0d06caSMauro Carvalho Chehab 1570c0d06caSMauro Carvalho Chehab /* number of allocated urbs */ 1580c0d06caSMauro Carvalho Chehab int num_bufs; 1590c0d06caSMauro Carvalho Chehab 1600c0d06caSMauro Carvalho Chehab /* urb for isoc transfers */ 1610c0d06caSMauro Carvalho Chehab struct urb **urb; 1620c0d06caSMauro Carvalho Chehab 1630c0d06caSMauro Carvalho Chehab /* transfer buffers for isoc transfer */ 1640c0d06caSMauro Carvalho Chehab char **transfer_buffer; 1650c0d06caSMauro Carvalho Chehab 1660c0d06caSMauro Carvalho Chehab /* Last buffer command and region */ 1670c0d06caSMauro Carvalho Chehab u8 cmd; 1680c0d06caSMauro Carvalho Chehab int pos, size, pktsize; 1690c0d06caSMauro Carvalho Chehab 1700c0d06caSMauro Carvalho Chehab /* Last field: ODD or EVEN? */ 1710c0d06caSMauro Carvalho Chehab int field; 1720c0d06caSMauro Carvalho Chehab 1730c0d06caSMauro Carvalho Chehab /* Stores incomplete commands */ 1740c0d06caSMauro Carvalho Chehab u32 tmp_buf; 1750c0d06caSMauro Carvalho Chehab int tmp_buf_len; 1760c0d06caSMauro Carvalho Chehab 1770c0d06caSMauro Carvalho Chehab /* Stores already requested buffers */ 1780c0d06caSMauro Carvalho Chehab struct cx231xx_buffer *buf; 1790c0d06caSMauro Carvalho Chehab 1800c0d06caSMauro Carvalho Chehab /* Stores the number of received fields */ 1810c0d06caSMauro Carvalho Chehab int nfields; 1820c0d06caSMauro Carvalho Chehab 1830c0d06caSMauro Carvalho Chehab /* isoc urb callback */ 1840c0d06caSMauro Carvalho Chehab int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); 1850c0d06caSMauro Carvalho Chehab }; 1860c0d06caSMauro Carvalho Chehab 1870c0d06caSMauro Carvalho Chehab struct cx231xx_bulk_ctl { 1880c0d06caSMauro Carvalho Chehab /* max packet size of bulk transaction */ 1890c0d06caSMauro Carvalho Chehab int max_pkt_size; 1900c0d06caSMauro Carvalho Chehab 1910c0d06caSMauro Carvalho Chehab /* number of allocated urbs */ 1920c0d06caSMauro Carvalho Chehab int num_bufs; 1930c0d06caSMauro Carvalho Chehab 1940c0d06caSMauro Carvalho Chehab /* urb for bulk transfers */ 1950c0d06caSMauro Carvalho Chehab struct urb **urb; 1960c0d06caSMauro Carvalho Chehab 1970c0d06caSMauro Carvalho Chehab /* transfer buffers for bulk transfer */ 1980c0d06caSMauro Carvalho Chehab char **transfer_buffer; 1990c0d06caSMauro Carvalho Chehab 2000c0d06caSMauro Carvalho Chehab /* Last buffer command and region */ 2010c0d06caSMauro Carvalho Chehab u8 cmd; 2020c0d06caSMauro Carvalho Chehab int pos, size, pktsize; 2030c0d06caSMauro Carvalho Chehab 2040c0d06caSMauro Carvalho Chehab /* Last field: ODD or EVEN? */ 2050c0d06caSMauro Carvalho Chehab int field; 2060c0d06caSMauro Carvalho Chehab 2070c0d06caSMauro Carvalho Chehab /* Stores incomplete commands */ 2080c0d06caSMauro Carvalho Chehab u32 tmp_buf; 2090c0d06caSMauro Carvalho Chehab int tmp_buf_len; 2100c0d06caSMauro Carvalho Chehab 2110c0d06caSMauro Carvalho Chehab /* Stores already requested buffers */ 2120c0d06caSMauro Carvalho Chehab struct cx231xx_buffer *buf; 2130c0d06caSMauro Carvalho Chehab 2140c0d06caSMauro Carvalho Chehab /* Stores the number of received fields */ 2150c0d06caSMauro Carvalho Chehab int nfields; 2160c0d06caSMauro Carvalho Chehab 2170c0d06caSMauro Carvalho Chehab /* bulk urb callback */ 2180c0d06caSMauro Carvalho Chehab int (*bulk_copy) (struct cx231xx *dev, struct urb *urb); 2190c0d06caSMauro Carvalho Chehab }; 2200c0d06caSMauro Carvalho Chehab 2210c0d06caSMauro Carvalho Chehab struct cx231xx_fmt { 2220c0d06caSMauro Carvalho Chehab char *name; 2230c0d06caSMauro Carvalho Chehab u32 fourcc; /* v4l2 format id */ 2240c0d06caSMauro Carvalho Chehab int depth; 2250c0d06caSMauro Carvalho Chehab int reg; 2260c0d06caSMauro Carvalho Chehab }; 2270c0d06caSMauro Carvalho Chehab 2280c0d06caSMauro Carvalho Chehab /* buffer for one video frame */ 2290c0d06caSMauro Carvalho Chehab struct cx231xx_buffer { 2300c0d06caSMauro Carvalho Chehab /* common v4l buffer stuff -- must be first */ 2310c0d06caSMauro Carvalho Chehab struct videobuf_buffer vb; 2320c0d06caSMauro Carvalho Chehab 2330c0d06caSMauro Carvalho Chehab struct list_head frame; 2340c0d06caSMauro Carvalho Chehab int top_field; 2350c0d06caSMauro Carvalho Chehab int receiving; 2360c0d06caSMauro Carvalho Chehab }; 2370c0d06caSMauro Carvalho Chehab 2380c0d06caSMauro Carvalho Chehab enum ps_package_head { 2390c0d06caSMauro Carvalho Chehab CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0, 2400c0d06caSMauro Carvalho Chehab CX231XX_NONEED_PS_PACKAGE_HEAD 2410c0d06caSMauro Carvalho Chehab }; 2420c0d06caSMauro Carvalho Chehab 2430c0d06caSMauro Carvalho Chehab struct cx231xx_dmaqueue { 2440c0d06caSMauro Carvalho Chehab struct list_head active; 2450c0d06caSMauro Carvalho Chehab struct list_head queued; 2460c0d06caSMauro Carvalho Chehab 2470c0d06caSMauro Carvalho Chehab wait_queue_head_t wq; 2480c0d06caSMauro Carvalho Chehab 2490c0d06caSMauro Carvalho Chehab /* Counters to control buffer fill */ 2500c0d06caSMauro Carvalho Chehab int pos; 2510c0d06caSMauro Carvalho Chehab u8 is_partial_line; 2520c0d06caSMauro Carvalho Chehab u8 partial_buf[8]; 2530c0d06caSMauro Carvalho Chehab u8 last_sav; 2540c0d06caSMauro Carvalho Chehab int current_field; 2550c0d06caSMauro Carvalho Chehab u32 bytes_left_in_line; 2560c0d06caSMauro Carvalho Chehab u32 lines_completed; 2570c0d06caSMauro Carvalho Chehab u8 field1_done; 2580c0d06caSMauro Carvalho Chehab u32 lines_per_field; 2590c0d06caSMauro Carvalho Chehab 2600c0d06caSMauro Carvalho Chehab /*Mpeg2 control buffer*/ 2610c0d06caSMauro Carvalho Chehab u8 *p_left_data; 2620c0d06caSMauro Carvalho Chehab u32 left_data_count; 2630c0d06caSMauro Carvalho Chehab u8 mpeg_buffer_done; 2640c0d06caSMauro Carvalho Chehab u32 mpeg_buffer_completed; 2650c0d06caSMauro Carvalho Chehab enum ps_package_head add_ps_package_head; 2660c0d06caSMauro Carvalho Chehab char ps_head[10]; 2670c0d06caSMauro Carvalho Chehab }; 2680c0d06caSMauro Carvalho Chehab 2690c0d06caSMauro Carvalho Chehab /* inputs */ 2700c0d06caSMauro Carvalho Chehab 2710c0d06caSMauro Carvalho Chehab #define MAX_CX231XX_INPUT 4 2720c0d06caSMauro Carvalho Chehab 2730c0d06caSMauro Carvalho Chehab enum cx231xx_itype { 2740c0d06caSMauro Carvalho Chehab CX231XX_VMUX_COMPOSITE1 = 1, 2750c0d06caSMauro Carvalho Chehab CX231XX_VMUX_SVIDEO, 2760c0d06caSMauro Carvalho Chehab CX231XX_VMUX_TELEVISION, 2770c0d06caSMauro Carvalho Chehab CX231XX_VMUX_CABLE, 2780c0d06caSMauro Carvalho Chehab CX231XX_RADIO, 2790c0d06caSMauro Carvalho Chehab CX231XX_VMUX_DVB, 2800c0d06caSMauro Carvalho Chehab CX231XX_VMUX_DEBUG 2810c0d06caSMauro Carvalho Chehab }; 2820c0d06caSMauro Carvalho Chehab 2830c0d06caSMauro Carvalho Chehab enum cx231xx_v_input { 2840c0d06caSMauro Carvalho Chehab CX231XX_VIN_1_1 = 0x1, 2850c0d06caSMauro Carvalho Chehab CX231XX_VIN_2_1, 2860c0d06caSMauro Carvalho Chehab CX231XX_VIN_3_1, 2870c0d06caSMauro Carvalho Chehab CX231XX_VIN_4_1, 2880c0d06caSMauro Carvalho Chehab CX231XX_VIN_1_2 = 0x01, 2890c0d06caSMauro Carvalho Chehab CX231XX_VIN_2_2, 2900c0d06caSMauro Carvalho Chehab CX231XX_VIN_3_2, 2910c0d06caSMauro Carvalho Chehab CX231XX_VIN_1_3 = 0x1, 2920c0d06caSMauro Carvalho Chehab CX231XX_VIN_2_3, 2930c0d06caSMauro Carvalho Chehab CX231XX_VIN_3_3, 2940c0d06caSMauro Carvalho Chehab }; 2950c0d06caSMauro Carvalho Chehab 2960c0d06caSMauro Carvalho Chehab /* cx231xx has two audio inputs: tuner and line in */ 2970c0d06caSMauro Carvalho Chehab enum cx231xx_amux { 2980c0d06caSMauro Carvalho Chehab /* This is the only entry for cx231xx tuner input */ 2990c0d06caSMauro Carvalho Chehab CX231XX_AMUX_VIDEO, /* cx231xx tuner */ 3000c0d06caSMauro Carvalho Chehab CX231XX_AMUX_LINE_IN, /* Line In */ 3010c0d06caSMauro Carvalho Chehab }; 3020c0d06caSMauro Carvalho Chehab 3030c0d06caSMauro Carvalho Chehab struct cx231xx_reg_seq { 3040c0d06caSMauro Carvalho Chehab unsigned char bit; 3050c0d06caSMauro Carvalho Chehab unsigned char val; 3060c0d06caSMauro Carvalho Chehab int sleep; 3070c0d06caSMauro Carvalho Chehab }; 3080c0d06caSMauro Carvalho Chehab 3090c0d06caSMauro Carvalho Chehab struct cx231xx_input { 3100c0d06caSMauro Carvalho Chehab enum cx231xx_itype type; 3110c0d06caSMauro Carvalho Chehab unsigned int vmux; 3120c0d06caSMauro Carvalho Chehab enum cx231xx_amux amux; 3130c0d06caSMauro Carvalho Chehab struct cx231xx_reg_seq *gpio; 3140c0d06caSMauro Carvalho Chehab }; 3150c0d06caSMauro Carvalho Chehab 3160c0d06caSMauro Carvalho Chehab #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr]) 3170c0d06caSMauro Carvalho Chehab 3180c0d06caSMauro Carvalho Chehab enum cx231xx_decoder { 3190c0d06caSMauro Carvalho Chehab CX231XX_NODECODER, 3200c0d06caSMauro Carvalho Chehab CX231XX_AVDECODER 3210c0d06caSMauro Carvalho Chehab }; 3220c0d06caSMauro Carvalho Chehab 3230c0d06caSMauro Carvalho Chehab enum CX231XX_I2C_MASTER_PORT { 3240c0d06caSMauro Carvalho Chehab I2C_0 = 0, 3250c0d06caSMauro Carvalho Chehab I2C_1 = 1, 3260c0d06caSMauro Carvalho Chehab I2C_2 = 2, 3270c0d06caSMauro Carvalho Chehab I2C_3 = 3 3280c0d06caSMauro Carvalho Chehab }; 3290c0d06caSMauro Carvalho Chehab 3300c0d06caSMauro Carvalho Chehab struct cx231xx_board { 3310c0d06caSMauro Carvalho Chehab char *name; 3320c0d06caSMauro Carvalho Chehab int vchannels; 3330c0d06caSMauro Carvalho Chehab int tuner_type; 3340c0d06caSMauro Carvalho Chehab int tuner_addr; 3350c0d06caSMauro Carvalho Chehab v4l2_std_id norm; /* tv norm */ 3360c0d06caSMauro Carvalho Chehab 3370c0d06caSMauro Carvalho Chehab /* demod related */ 3380c0d06caSMauro Carvalho Chehab int demod_addr; 3390c0d06caSMauro Carvalho Chehab u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ 3400c0d06caSMauro Carvalho Chehab 3410c0d06caSMauro Carvalho Chehab /* GPIO Pins */ 3420c0d06caSMauro Carvalho Chehab struct cx231xx_reg_seq *dvb_gpio; 3430c0d06caSMauro Carvalho Chehab struct cx231xx_reg_seq *suspend_gpio; 3440c0d06caSMauro Carvalho Chehab struct cx231xx_reg_seq *tuner_gpio; 3450c0d06caSMauro Carvalho Chehab /* Negative means don't use it */ 3460c0d06caSMauro Carvalho Chehab s8 tuner_sif_gpio; 3470c0d06caSMauro Carvalho Chehab s8 tuner_scl_gpio; 3480c0d06caSMauro Carvalho Chehab s8 tuner_sda_gpio; 3490c0d06caSMauro Carvalho Chehab 3500c0d06caSMauro Carvalho Chehab /* PIN ctrl */ 3510c0d06caSMauro Carvalho Chehab u32 ctl_pin_status_mask; 3520c0d06caSMauro Carvalho Chehab u8 agc_analog_digital_select_gpio; 3530c0d06caSMauro Carvalho Chehab u32 gpio_pin_status_mask; 3540c0d06caSMauro Carvalho Chehab 3550c0d06caSMauro Carvalho Chehab /* i2c masters */ 3560c0d06caSMauro Carvalho Chehab u8 tuner_i2c_master; 3570c0d06caSMauro Carvalho Chehab u8 demod_i2c_master; 3580c0d06caSMauro Carvalho Chehab u8 ir_i2c_master; 3590c0d06caSMauro Carvalho Chehab 3600c0d06caSMauro Carvalho Chehab /* for devices with I2C chips for IR */ 3610c0d06caSMauro Carvalho Chehab char *rc_map_name; 3620c0d06caSMauro Carvalho Chehab 3630c0d06caSMauro Carvalho Chehab unsigned int max_range_640_480:1; 3640c0d06caSMauro Carvalho Chehab unsigned int has_dvb:1; 3650c0d06caSMauro Carvalho Chehab unsigned int has_417:1; 3660c0d06caSMauro Carvalho Chehab unsigned int valid:1; 3670c0d06caSMauro Carvalho Chehab unsigned int no_alt_vanc:1; 3680c0d06caSMauro Carvalho Chehab unsigned int external_av:1; 3690c0d06caSMauro Carvalho Chehab unsigned int dont_use_port_3:1; 3700c0d06caSMauro Carvalho Chehab 3710c0d06caSMauro Carvalho Chehab unsigned char xclk, i2c_speed; 3720c0d06caSMauro Carvalho Chehab 3730c0d06caSMauro Carvalho Chehab enum cx231xx_decoder decoder; 3740c0d06caSMauro Carvalho Chehab int output_mode; 3750c0d06caSMauro Carvalho Chehab 3760c0d06caSMauro Carvalho Chehab struct cx231xx_input input[MAX_CX231XX_INPUT]; 3770c0d06caSMauro Carvalho Chehab struct cx231xx_input radio; 3780c0d06caSMauro Carvalho Chehab struct rc_map *ir_codes; 3790c0d06caSMauro Carvalho Chehab }; 3800c0d06caSMauro Carvalho Chehab 3810c0d06caSMauro Carvalho Chehab /* device states */ 3820c0d06caSMauro Carvalho Chehab enum cx231xx_dev_state { 3830c0d06caSMauro Carvalho Chehab DEV_INITIALIZED = 0x01, 3840c0d06caSMauro Carvalho Chehab DEV_DISCONNECTED = 0x02, 3850c0d06caSMauro Carvalho Chehab }; 3860c0d06caSMauro Carvalho Chehab 3870c0d06caSMauro Carvalho Chehab enum AFE_MODE { 3880c0d06caSMauro Carvalho Chehab AFE_MODE_LOW_IF, 3890c0d06caSMauro Carvalho Chehab AFE_MODE_BASEBAND, 3900c0d06caSMauro Carvalho Chehab AFE_MODE_EU_HI_IF, 3910c0d06caSMauro Carvalho Chehab AFE_MODE_US_HI_IF, 3920c0d06caSMauro Carvalho Chehab AFE_MODE_JAPAN_HI_IF 3930c0d06caSMauro Carvalho Chehab }; 3940c0d06caSMauro Carvalho Chehab 3950c0d06caSMauro Carvalho Chehab enum AUDIO_INPUT { 3960c0d06caSMauro Carvalho Chehab AUDIO_INPUT_MUTE, 3970c0d06caSMauro Carvalho Chehab AUDIO_INPUT_LINE, 3980c0d06caSMauro Carvalho Chehab AUDIO_INPUT_TUNER_TV, 3990c0d06caSMauro Carvalho Chehab AUDIO_INPUT_SPDIF, 4000c0d06caSMauro Carvalho Chehab AUDIO_INPUT_TUNER_FM 4010c0d06caSMauro Carvalho Chehab }; 4020c0d06caSMauro Carvalho Chehab 4030c0d06caSMauro Carvalho Chehab #define CX231XX_AUDIO_BUFS 5 4040c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_AUDIO_PACKETS 16 4050c0d06caSMauro Carvalho Chehab #define CX231XX_ISO_NUM_AUDIO_PACKETS 64 4060c0d06caSMauro Carvalho Chehab 4070c0d06caSMauro Carvalho Chehab /* cx231xx extensions */ 4080c0d06caSMauro Carvalho Chehab #define CX231XX_AUDIO 0x10 4090c0d06caSMauro Carvalho Chehab #define CX231XX_DVB 0x20 4100c0d06caSMauro Carvalho Chehab 4110c0d06caSMauro Carvalho Chehab struct cx231xx_audio { 4120c0d06caSMauro Carvalho Chehab char name[50]; 4130c0d06caSMauro Carvalho Chehab char *transfer_buffer[CX231XX_AUDIO_BUFS]; 4140c0d06caSMauro Carvalho Chehab struct urb *urb[CX231XX_AUDIO_BUFS]; 4150c0d06caSMauro Carvalho Chehab struct usb_device *udev; 4160c0d06caSMauro Carvalho Chehab unsigned int capture_transfer_done; 4170c0d06caSMauro Carvalho Chehab struct snd_pcm_substream *capture_pcm_substream; 4180c0d06caSMauro Carvalho Chehab 4190c0d06caSMauro Carvalho Chehab unsigned int hwptr_done_capture; 4200c0d06caSMauro Carvalho Chehab struct snd_card *sndcard; 4210c0d06caSMauro Carvalho Chehab 4220c0d06caSMauro Carvalho Chehab int users, shutdown; 4230c0d06caSMauro Carvalho Chehab /* locks */ 4240c0d06caSMauro Carvalho Chehab spinlock_t slock; 4250c0d06caSMauro Carvalho Chehab 4260c0d06caSMauro Carvalho Chehab int alt; /* alternate */ 4270c0d06caSMauro Carvalho Chehab int max_pkt_size; /* max packet size of isoc transaction */ 4280c0d06caSMauro Carvalho Chehab int num_alt; /* Number of alternative settings */ 4290c0d06caSMauro Carvalho Chehab unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 4300c0d06caSMauro Carvalho Chehab u16 end_point_addr; 4310c0d06caSMauro Carvalho Chehab }; 4320c0d06caSMauro Carvalho Chehab 4330c0d06caSMauro Carvalho Chehab struct cx231xx; 4340c0d06caSMauro Carvalho Chehab 4350c0d06caSMauro Carvalho Chehab struct cx231xx_fh { 4361d08a4faSHans Verkuil struct v4l2_fh fh; 4370c0d06caSMauro Carvalho Chehab struct cx231xx *dev; 4380c0d06caSMauro Carvalho Chehab unsigned int stream_on:1; /* Locks streams */ 4390c0d06caSMauro Carvalho Chehab enum v4l2_buf_type type; 4400c0d06caSMauro Carvalho Chehab 44171590765SHans Verkuil struct videobuf_queue vb_vidq; 4420c0d06caSMauro Carvalho Chehab 4430c0d06caSMauro Carvalho Chehab /* vbi capture */ 4440c0d06caSMauro Carvalho Chehab struct videobuf_queue vidq; 4450c0d06caSMauro Carvalho Chehab struct videobuf_queue vbiq; 4460c0d06caSMauro Carvalho Chehab 4470c0d06caSMauro Carvalho Chehab /* MPEG Encoder specifics ONLY */ 4480c0d06caSMauro Carvalho Chehab 4490c0d06caSMauro Carvalho Chehab atomic_t v4l_reading; 4500c0d06caSMauro Carvalho Chehab }; 4510c0d06caSMauro Carvalho Chehab 4520c0d06caSMauro Carvalho Chehab /*****************************************************************/ 4530c0d06caSMauro Carvalho Chehab /* set/get i2c */ 4540c0d06caSMauro Carvalho Chehab /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ 4550c0d06caSMauro Carvalho Chehab #define I2C_SPEED_1M 0x0 4560c0d06caSMauro Carvalho Chehab #define I2C_SPEED_400K 0x1 4570c0d06caSMauro Carvalho Chehab #define I2C_SPEED_100K 0x2 4580c0d06caSMauro Carvalho Chehab #define I2C_SPEED_5M 0x3 4590c0d06caSMauro Carvalho Chehab 4600c0d06caSMauro Carvalho Chehab /* 0-- STOP transaction */ 4610c0d06caSMauro Carvalho Chehab #define I2C_STOP 0x0 4620c0d06caSMauro Carvalho Chehab /* 1-- do not transmit STOP at end of transaction */ 4630c0d06caSMauro Carvalho Chehab #define I2C_NOSTOP 0x1 4640c0d06caSMauro Carvalho Chehab /* 1--allow slave to insert clock wait states */ 4650c0d06caSMauro Carvalho Chehab #define I2C_SYNC 0x1 4660c0d06caSMauro Carvalho Chehab 4670c0d06caSMauro Carvalho Chehab struct cx231xx_i2c { 4680c0d06caSMauro Carvalho Chehab struct cx231xx *dev; 4690c0d06caSMauro Carvalho Chehab 4700c0d06caSMauro Carvalho Chehab int nr; 4710c0d06caSMauro Carvalho Chehab 4720c0d06caSMauro Carvalho Chehab /* i2c i/o */ 4730c0d06caSMauro Carvalho Chehab struct i2c_adapter i2c_adap; 4740c0d06caSMauro Carvalho Chehab struct i2c_client i2c_client; 4750c0d06caSMauro Carvalho Chehab u32 i2c_rc; 4760c0d06caSMauro Carvalho Chehab 4770c0d06caSMauro Carvalho Chehab /* different settings for each bus */ 4780c0d06caSMauro Carvalho Chehab u8 i2c_period; 4790c0d06caSMauro Carvalho Chehab u8 i2c_nostop; 4800c0d06caSMauro Carvalho Chehab u8 i2c_reserve; 4810c0d06caSMauro Carvalho Chehab }; 4820c0d06caSMauro Carvalho Chehab 4830c0d06caSMauro Carvalho Chehab struct cx231xx_i2c_xfer_data { 4840c0d06caSMauro Carvalho Chehab u8 dev_addr; 4850c0d06caSMauro Carvalho Chehab u8 direction; /* 1 - IN, 0 - OUT */ 4860c0d06caSMauro Carvalho Chehab u8 saddr_len; /* sub address len */ 4870c0d06caSMauro Carvalho Chehab u16 saddr_dat; /* sub addr data */ 4880c0d06caSMauro Carvalho Chehab u8 buf_size; /* buffer size */ 4890c0d06caSMauro Carvalho Chehab u8 *p_buffer; /* pointer to the buffer */ 4900c0d06caSMauro Carvalho Chehab }; 4910c0d06caSMauro Carvalho Chehab 4920c0d06caSMauro Carvalho Chehab struct VENDOR_REQUEST_IN { 4930c0d06caSMauro Carvalho Chehab u8 bRequest; 4940c0d06caSMauro Carvalho Chehab u16 wValue; 4950c0d06caSMauro Carvalho Chehab u16 wIndex; 4960c0d06caSMauro Carvalho Chehab u16 wLength; 4970c0d06caSMauro Carvalho Chehab u8 direction; 4980c0d06caSMauro Carvalho Chehab u8 bData; 4990c0d06caSMauro Carvalho Chehab u8 *pBuff; 5000c0d06caSMauro Carvalho Chehab }; 5010c0d06caSMauro Carvalho Chehab 5020c0d06caSMauro Carvalho Chehab struct cx231xx_tvnorm { 5030c0d06caSMauro Carvalho Chehab char *name; 5040c0d06caSMauro Carvalho Chehab v4l2_std_id id; 5050c0d06caSMauro Carvalho Chehab u32 cxiformat; 5060c0d06caSMauro Carvalho Chehab u32 cxoformat; 5070c0d06caSMauro Carvalho Chehab }; 5080c0d06caSMauro Carvalho Chehab 5090c0d06caSMauro Carvalho Chehab enum TRANSFER_TYPE { 5100c0d06caSMauro Carvalho Chehab Raw_Video = 0, 5110c0d06caSMauro Carvalho Chehab Audio, 5120c0d06caSMauro Carvalho Chehab Vbi, /* VANC */ 5130c0d06caSMauro Carvalho Chehab Sliced_cc, /* HANC */ 5140c0d06caSMauro Carvalho Chehab TS1_serial_mode, 5150c0d06caSMauro Carvalho Chehab TS2, 5160c0d06caSMauro Carvalho Chehab TS1_parallel_mode 5170c0d06caSMauro Carvalho Chehab } ; 5180c0d06caSMauro Carvalho Chehab 5190c0d06caSMauro Carvalho Chehab struct cx231xx_video_mode { 5200c0d06caSMauro Carvalho Chehab /* Isoc control struct */ 5210c0d06caSMauro Carvalho Chehab struct cx231xx_dmaqueue vidq; 5220c0d06caSMauro Carvalho Chehab struct cx231xx_isoc_ctl isoc_ctl; 5230c0d06caSMauro Carvalho Chehab struct cx231xx_bulk_ctl bulk_ctl; 5240c0d06caSMauro Carvalho Chehab /* locks */ 5250c0d06caSMauro Carvalho Chehab spinlock_t slock; 5260c0d06caSMauro Carvalho Chehab 5270c0d06caSMauro Carvalho Chehab /* usb transfer */ 5280c0d06caSMauro Carvalho Chehab int alt; /* alternate */ 5290c0d06caSMauro Carvalho Chehab int max_pkt_size; /* max packet size of isoc transaction */ 5300c0d06caSMauro Carvalho Chehab int num_alt; /* Number of alternative settings */ 5310c0d06caSMauro Carvalho Chehab unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 5320c0d06caSMauro Carvalho Chehab u16 end_point_addr; 5330c0d06caSMauro Carvalho Chehab }; 5340c0d06caSMauro Carvalho Chehab /* 5350c0d06caSMauro Carvalho Chehab struct cx23885_dmaqueue { 5360c0d06caSMauro Carvalho Chehab struct list_head active; 5370c0d06caSMauro Carvalho Chehab struct list_head queued; 5380c0d06caSMauro Carvalho Chehab struct timer_list timeout; 5390c0d06caSMauro Carvalho Chehab struct btcx_riscmem stopper; 5400c0d06caSMauro Carvalho Chehab u32 count; 5410c0d06caSMauro Carvalho Chehab }; 5420c0d06caSMauro Carvalho Chehab */ 5430c0d06caSMauro Carvalho Chehab struct cx231xx_tsport { 5440c0d06caSMauro Carvalho Chehab struct cx231xx *dev; 5450c0d06caSMauro Carvalho Chehab 5460c0d06caSMauro Carvalho Chehab int nr; 5470c0d06caSMauro Carvalho Chehab int sram_chno; 5480c0d06caSMauro Carvalho Chehab 5490c0d06caSMauro Carvalho Chehab struct videobuf_dvb_frontends frontends; 5500c0d06caSMauro Carvalho Chehab 5510c0d06caSMauro Carvalho Chehab /* dma queues */ 5520c0d06caSMauro Carvalho Chehab 5530c0d06caSMauro Carvalho Chehab u32 ts_packet_size; 5540c0d06caSMauro Carvalho Chehab u32 ts_packet_count; 5550c0d06caSMauro Carvalho Chehab 5560c0d06caSMauro Carvalho Chehab int width; 5570c0d06caSMauro Carvalho Chehab int height; 5580c0d06caSMauro Carvalho Chehab 5590c0d06caSMauro Carvalho Chehab /* locks */ 5600c0d06caSMauro Carvalho Chehab spinlock_t slock; 5610c0d06caSMauro Carvalho Chehab 5620c0d06caSMauro Carvalho Chehab /* registers */ 5630c0d06caSMauro Carvalho Chehab u32 reg_gpcnt; 5640c0d06caSMauro Carvalho Chehab u32 reg_gpcnt_ctl; 5650c0d06caSMauro Carvalho Chehab u32 reg_dma_ctl; 5660c0d06caSMauro Carvalho Chehab u32 reg_lngth; 5670c0d06caSMauro Carvalho Chehab u32 reg_hw_sop_ctrl; 5680c0d06caSMauro Carvalho Chehab u32 reg_gen_ctrl; 5690c0d06caSMauro Carvalho Chehab u32 reg_bd_pkt_status; 5700c0d06caSMauro Carvalho Chehab u32 reg_sop_status; 5710c0d06caSMauro Carvalho Chehab u32 reg_fifo_ovfl_stat; 5720c0d06caSMauro Carvalho Chehab u32 reg_vld_misc; 5730c0d06caSMauro Carvalho Chehab u32 reg_ts_clk_en; 5740c0d06caSMauro Carvalho Chehab u32 reg_ts_int_msk; 5750c0d06caSMauro Carvalho Chehab u32 reg_ts_int_stat; 5760c0d06caSMauro Carvalho Chehab u32 reg_src_sel; 5770c0d06caSMauro Carvalho Chehab 5780c0d06caSMauro Carvalho Chehab /* Default register vals */ 5790c0d06caSMauro Carvalho Chehab int pci_irqmask; 5800c0d06caSMauro Carvalho Chehab u32 dma_ctl_val; 5810c0d06caSMauro Carvalho Chehab u32 ts_int_msk_val; 5820c0d06caSMauro Carvalho Chehab u32 gen_ctrl_val; 5830c0d06caSMauro Carvalho Chehab u32 ts_clk_en_val; 5840c0d06caSMauro Carvalho Chehab u32 src_sel_val; 5850c0d06caSMauro Carvalho Chehab u32 vld_misc_val; 5860c0d06caSMauro Carvalho Chehab u32 hw_sop_ctrl_val; 5870c0d06caSMauro Carvalho Chehab 5880c0d06caSMauro Carvalho Chehab /* Allow a single tsport to have multiple frontends */ 5890c0d06caSMauro Carvalho Chehab u32 num_frontends; 5900c0d06caSMauro Carvalho Chehab void *port_priv; 5910c0d06caSMauro Carvalho Chehab }; 5920c0d06caSMauro Carvalho Chehab 5930c0d06caSMauro Carvalho Chehab /* main device struct */ 5940c0d06caSMauro Carvalho Chehab struct cx231xx { 5950c0d06caSMauro Carvalho Chehab /* generic device properties */ 5960c0d06caSMauro Carvalho Chehab char name[30]; /* name (including minor) of the device */ 5970c0d06caSMauro Carvalho Chehab int model; /* index in the device_data struct */ 5980c0d06caSMauro Carvalho Chehab int devno; /* marks the number of this device */ 5990c0d06caSMauro Carvalho Chehab 6000c0d06caSMauro Carvalho Chehab struct cx231xx_board board; 6010c0d06caSMauro Carvalho Chehab 6020c0d06caSMauro Carvalho Chehab /* For I2C IR support */ 6030c0d06caSMauro Carvalho Chehab struct IR_i2c_init_data init_data; 6040c0d06caSMauro Carvalho Chehab struct i2c_client *ir_i2c_client; 6050c0d06caSMauro Carvalho Chehab 6060c0d06caSMauro Carvalho Chehab unsigned int stream_on:1; /* Locks streams */ 6070c0d06caSMauro Carvalho Chehab unsigned int vbi_stream_on:1; /* Locks streams for VBI */ 6080c0d06caSMauro Carvalho Chehab unsigned int has_audio_class:1; 6090c0d06caSMauro Carvalho Chehab unsigned int has_alsa_audio:1; 6100c0d06caSMauro Carvalho Chehab 6110c0d06caSMauro Carvalho Chehab struct cx231xx_fmt *format; 6120c0d06caSMauro Carvalho Chehab 6130c0d06caSMauro Carvalho Chehab struct v4l2_device v4l2_dev; 6140c0d06caSMauro Carvalho Chehab struct v4l2_subdev *sd_cx25840; 6150c0d06caSMauro Carvalho Chehab struct v4l2_subdev *sd_tuner; 616d2370f8eSHans Verkuil struct v4l2_ctrl_handler ctrl_handler; 617d2370f8eSHans Verkuil struct v4l2_ctrl_handler radio_ctrl_handler; 61888b6ffedSHans Verkuil struct cx2341x_handler mpeg_ctrl_handler; 6190c0d06caSMauro Carvalho Chehab 6200c0d06caSMauro Carvalho Chehab struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ 6210c0d06caSMauro Carvalho Chehab atomic_t stream_started; /* stream should be running if true */ 6220c0d06caSMauro Carvalho Chehab 6230c0d06caSMauro Carvalho Chehab struct list_head devlist; 6240c0d06caSMauro Carvalho Chehab 6250c0d06caSMauro Carvalho Chehab int tuner_type; /* type of the tuner */ 6260c0d06caSMauro Carvalho Chehab int tuner_addr; /* tuner address */ 6270c0d06caSMauro Carvalho Chehab 6280c0d06caSMauro Carvalho Chehab /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 6290c0d06caSMauro Carvalho Chehab struct cx231xx_i2c i2c_bus[3]; 6300c0d06caSMauro Carvalho Chehab unsigned int xc_fw_load_done:1; 6310c0d06caSMauro Carvalho Chehab /* locks */ 6320c0d06caSMauro Carvalho Chehab struct mutex gpio_i2c_lock; 6330c0d06caSMauro Carvalho Chehab struct mutex i2c_lock; 6340c0d06caSMauro Carvalho Chehab 6350c0d06caSMauro Carvalho Chehab /* video for linux */ 6360c0d06caSMauro Carvalho Chehab int users; /* user count for exclusive use */ 6370c0d06caSMauro Carvalho Chehab struct video_device *vdev; /* video for linux device struct */ 6380c0d06caSMauro Carvalho Chehab v4l2_std_id norm; /* selected tv norm */ 6390c0d06caSMauro Carvalho Chehab int ctl_freq; /* selected frequency */ 6400c0d06caSMauro Carvalho Chehab unsigned int ctl_ainput; /* selected audio input */ 6410c0d06caSMauro Carvalho Chehab 6420c0d06caSMauro Carvalho Chehab /* frame properties */ 6430c0d06caSMauro Carvalho Chehab int width; /* current frame width */ 6440c0d06caSMauro Carvalho Chehab int height; /* current frame height */ 6450c0d06caSMauro Carvalho Chehab int interlaced; /* 1=interlace fileds, 0=just top fileds */ 6460c0d06caSMauro Carvalho Chehab 6470c0d06caSMauro Carvalho Chehab struct cx231xx_audio adev; 6480c0d06caSMauro Carvalho Chehab 6490c0d06caSMauro Carvalho Chehab /* states */ 6500c0d06caSMauro Carvalho Chehab enum cx231xx_dev_state state; 6510c0d06caSMauro Carvalho Chehab 6520c0d06caSMauro Carvalho Chehab struct work_struct request_module_wk; 6530c0d06caSMauro Carvalho Chehab 6540c0d06caSMauro Carvalho Chehab /* locks */ 6550c0d06caSMauro Carvalho Chehab struct mutex lock; 6560c0d06caSMauro Carvalho Chehab struct mutex ctrl_urb_lock; /* protects urb_buf */ 6570c0d06caSMauro Carvalho Chehab struct list_head inqueue, outqueue; 6580c0d06caSMauro Carvalho Chehab wait_queue_head_t open, wait_frame, wait_stream; 6590c0d06caSMauro Carvalho Chehab struct video_device *vbi_dev; 6600c0d06caSMauro Carvalho Chehab struct video_device *radio_dev; 6610c0d06caSMauro Carvalho Chehab 6620c0d06caSMauro Carvalho Chehab unsigned char eedata[256]; 6630c0d06caSMauro Carvalho Chehab 6640c0d06caSMauro Carvalho Chehab struct cx231xx_video_mode video_mode; 6650c0d06caSMauro Carvalho Chehab struct cx231xx_video_mode vbi_mode; 6660c0d06caSMauro Carvalho Chehab struct cx231xx_video_mode sliced_cc_mode; 6670c0d06caSMauro Carvalho Chehab struct cx231xx_video_mode ts1_mode; 6680c0d06caSMauro Carvalho Chehab 6690c0d06caSMauro Carvalho Chehab atomic_t devlist_count; 6700c0d06caSMauro Carvalho Chehab 6710c0d06caSMauro Carvalho Chehab struct usb_device *udev; /* the usb device */ 6720c0d06caSMauro Carvalho Chehab char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ 6730c0d06caSMauro Carvalho Chehab 6740c0d06caSMauro Carvalho Chehab /* helper funcs that call usb_control_msg */ 6750c0d06caSMauro Carvalho Chehab int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, 6760c0d06caSMauro Carvalho Chehab char *buf, int len); 6770c0d06caSMauro Carvalho Chehab int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, 6780c0d06caSMauro Carvalho Chehab char *buf, int len); 6790c0d06caSMauro Carvalho Chehab int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus, 6800c0d06caSMauro Carvalho Chehab struct cx231xx_i2c_xfer_data *req_data); 6810c0d06caSMauro Carvalho Chehab int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr, 6820c0d06caSMauro Carvalho Chehab u8 *buf, u8 len); 6830c0d06caSMauro Carvalho Chehab int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr, 6840c0d06caSMauro Carvalho Chehab u8 *buf, u8 len); 6850c0d06caSMauro Carvalho Chehab 6860c0d06caSMauro Carvalho Chehab int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq); 6870c0d06caSMauro Carvalho Chehab int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev); 6880c0d06caSMauro Carvalho Chehab 6890c0d06caSMauro Carvalho Chehab enum cx231xx_mode mode; 6900c0d06caSMauro Carvalho Chehab 6910c0d06caSMauro Carvalho Chehab struct cx231xx_dvb *dvb; 6920c0d06caSMauro Carvalho Chehab 6930c0d06caSMauro Carvalho Chehab /* Cx231xx supported PCB config's */ 6940c0d06caSMauro Carvalho Chehab struct pcb_config current_pcb_config; 6950c0d06caSMauro Carvalho Chehab u8 current_scenario_idx; 6960c0d06caSMauro Carvalho Chehab u8 interface_count; 6970c0d06caSMauro Carvalho Chehab u8 max_iad_interface_count; 6980c0d06caSMauro Carvalho Chehab 6990c0d06caSMauro Carvalho Chehab /* GPIO related register direction and values */ 7000c0d06caSMauro Carvalho Chehab u32 gpio_dir; 7010c0d06caSMauro Carvalho Chehab u32 gpio_val; 7020c0d06caSMauro Carvalho Chehab 7030c0d06caSMauro Carvalho Chehab /* Power Modes */ 7040c0d06caSMauro Carvalho Chehab int power_mode; 7050c0d06caSMauro Carvalho Chehab 7060c0d06caSMauro Carvalho Chehab /* afe parameters */ 7070c0d06caSMauro Carvalho Chehab enum AFE_MODE afe_mode; 7080c0d06caSMauro Carvalho Chehab u32 afe_ref_count; 7090c0d06caSMauro Carvalho Chehab 7100c0d06caSMauro Carvalho Chehab /* video related parameters */ 7110c0d06caSMauro Carvalho Chehab u32 video_input; 7120c0d06caSMauro Carvalho Chehab u32 active_mode; 7130c0d06caSMauro Carvalho Chehab u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ 7140c0d06caSMauro Carvalho Chehab enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ 7150c0d06caSMauro Carvalho Chehab 7160c0d06caSMauro Carvalho Chehab /*mode: digital=1 or analog=0*/ 7170c0d06caSMauro Carvalho Chehab u8 mode_tv; 7180c0d06caSMauro Carvalho Chehab 7190c0d06caSMauro Carvalho Chehab u8 USE_ISO; 7200c0d06caSMauro Carvalho Chehab struct cx231xx_tvnorm encodernorm; 7210c0d06caSMauro Carvalho Chehab struct cx231xx_tsport ts1, ts2; 7220c0d06caSMauro Carvalho Chehab struct video_device *v4l_device; 7230c0d06caSMauro Carvalho Chehab atomic_t v4l_reader_count; 7240c0d06caSMauro Carvalho Chehab u32 freq; 7250c0d06caSMauro Carvalho Chehab unsigned int input; 7260c0d06caSMauro Carvalho Chehab u32 cx23417_mailbox; 7270c0d06caSMauro Carvalho Chehab u32 __iomem *lmmio; 7280c0d06caSMauro Carvalho Chehab u8 __iomem *bmmio; 7290c0d06caSMauro Carvalho Chehab }; 7300c0d06caSMauro Carvalho Chehab 7310c0d06caSMauro Carvalho Chehab extern struct list_head cx231xx_devlist; 7320c0d06caSMauro Carvalho Chehab 7330c0d06caSMauro Carvalho Chehab #define cx25840_call(cx231xx, o, f, args...) \ 7340c0d06caSMauro Carvalho Chehab v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args) 7350c0d06caSMauro Carvalho Chehab #define tuner_call(cx231xx, o, f, args...) \ 7360c0d06caSMauro Carvalho Chehab v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args) 7370c0d06caSMauro Carvalho Chehab #define call_all(dev, o, f, args...) \ 7380c0d06caSMauro Carvalho Chehab v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args) 7390c0d06caSMauro Carvalho Chehab 7400c0d06caSMauro Carvalho Chehab struct cx231xx_ops { 7410c0d06caSMauro Carvalho Chehab struct list_head next; 7420c0d06caSMauro Carvalho Chehab char *name; 7430c0d06caSMauro Carvalho Chehab int id; 7440c0d06caSMauro Carvalho Chehab int (*init) (struct cx231xx *); 7450c0d06caSMauro Carvalho Chehab int (*fini) (struct cx231xx *); 7460c0d06caSMauro Carvalho Chehab }; 7470c0d06caSMauro Carvalho Chehab 7480c0d06caSMauro Carvalho Chehab /* call back functions in dvb module */ 7490c0d06caSMauro Carvalho Chehab int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq); 7500c0d06caSMauro Carvalho Chehab int cx231xx_reset_analog_tuner(struct cx231xx *dev); 7510c0d06caSMauro Carvalho Chehab 7520c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-i2c.c */ 7530c0d06caSMauro Carvalho Chehab void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c); 7540c0d06caSMauro Carvalho Chehab int cx231xx_i2c_register(struct cx231xx_i2c *bus); 7550c0d06caSMauro Carvalho Chehab int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); 7560c0d06caSMauro Carvalho Chehab 7570c0d06caSMauro Carvalho Chehab /* Internal block control functions */ 7580c0d06caSMauro Carvalho Chehab int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, 7590c0d06caSMauro Carvalho Chehab u8 saddr_len, u32 *data, u8 data_len, int master); 7600c0d06caSMauro Carvalho Chehab int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, 7610c0d06caSMauro Carvalho Chehab u8 saddr_len, u32 data, u8 data_len, int master); 7620c0d06caSMauro Carvalho Chehab int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, 7630c0d06caSMauro Carvalho Chehab u16 saddr, u8 saddr_len, u32 *data, u8 data_len); 7640c0d06caSMauro Carvalho Chehab int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, 7650c0d06caSMauro Carvalho Chehab u16 saddr, u8 saddr_len, u32 data, u8 data_len); 7660c0d06caSMauro Carvalho Chehab int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, 7670c0d06caSMauro Carvalho Chehab u16 register_address, u8 bit_start, u8 bit_end, 7680c0d06caSMauro Carvalho Chehab u32 value); 7690c0d06caSMauro Carvalho Chehab int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, 7700c0d06caSMauro Carvalho Chehab u16 saddr, u32 mask, u32 value); 7710c0d06caSMauro Carvalho Chehab u32 cx231xx_set_field(u32 field_mask, u32 data); 7720c0d06caSMauro Carvalho Chehab 7730c0d06caSMauro Carvalho Chehab /*verve r/w*/ 7740c0d06caSMauro Carvalho Chehab void initGPIO(struct cx231xx *dev); 7750c0d06caSMauro Carvalho Chehab void uninitGPIO(struct cx231xx *dev); 7760c0d06caSMauro Carvalho Chehab /* afe related functions */ 7770c0d06caSMauro Carvalho Chehab int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count); 7780c0d06caSMauro Carvalho Chehab int cx231xx_afe_init_channels(struct cx231xx *dev); 7790c0d06caSMauro Carvalho Chehab int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev); 7800c0d06caSMauro Carvalho Chehab int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux); 7810c0d06caSMauro Carvalho Chehab int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode); 7820c0d06caSMauro Carvalho Chehab int cx231xx_afe_update_power_control(struct cx231xx *dev, 7830c0d06caSMauro Carvalho Chehab enum AV_MODE avmode); 7840c0d06caSMauro Carvalho Chehab int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input); 7850c0d06caSMauro Carvalho Chehab 7860c0d06caSMauro Carvalho Chehab /* i2s block related functions */ 7870c0d06caSMauro Carvalho Chehab int cx231xx_i2s_blk_initialize(struct cx231xx *dev); 7880c0d06caSMauro Carvalho Chehab int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, 7890c0d06caSMauro Carvalho Chehab enum AV_MODE avmode); 7900c0d06caSMauro Carvalho Chehab int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input); 7910c0d06caSMauro Carvalho Chehab 7920c0d06caSMauro Carvalho Chehab /* DIF related functions */ 7930c0d06caSMauro Carvalho Chehab int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, 7940c0d06caSMauro Carvalho Chehab u32 function_mode, u32 standard); 7950c0d06caSMauro Carvalho Chehab void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, 7960c0d06caSMauro Carvalho Chehab u8 spectral_invert, u32 mode); 7970c0d06caSMauro Carvalho Chehab u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd); 7980c0d06caSMauro Carvalho Chehab void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, 7990c0d06caSMauro Carvalho Chehab u8 spectral_invert, u32 mode); 8000c0d06caSMauro Carvalho Chehab void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev); 8010c0d06caSMauro Carvalho Chehab void reset_s5h1432_demod(struct cx231xx *dev); 8020c0d06caSMauro Carvalho Chehab void cx231xx_dump_HH_reg(struct cx231xx *dev); 8030c0d06caSMauro Carvalho Chehab void update_HH_register_after_set_DIF(struct cx231xx *dev); 8040c0d06caSMauro Carvalho Chehab void cx231xx_dump_SC_reg(struct cx231xx *dev); 8050c0d06caSMauro Carvalho Chehab 8060c0d06caSMauro Carvalho Chehab 8070c0d06caSMauro Carvalho Chehab 8080c0d06caSMauro Carvalho Chehab int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); 8090c0d06caSMauro Carvalho Chehab int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); 8100c0d06caSMauro Carvalho Chehab int cx231xx_tuner_post_channel_change(struct cx231xx *dev); 8110c0d06caSMauro Carvalho Chehab 8120c0d06caSMauro Carvalho Chehab /* video parser functions */ 8130c0d06caSMauro Carvalho Chehab u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, 8140c0d06caSMauro Carvalho Chehab u32 *p_bytes_used); 8150c0d06caSMauro Carvalho Chehab u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, 8160c0d06caSMauro Carvalho Chehab u32 *p_bytes_used); 8170c0d06caSMauro Carvalho Chehab int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 8180c0d06caSMauro Carvalho Chehab u8 *p_buffer, u32 bytes_to_copy); 8190c0d06caSMauro Carvalho Chehab void cx231xx_reset_video_buffer(struct cx231xx *dev, 8200c0d06caSMauro Carvalho Chehab struct cx231xx_dmaqueue *dma_q); 8210c0d06caSMauro Carvalho Chehab u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); 8220c0d06caSMauro Carvalho Chehab u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 8230c0d06caSMauro Carvalho Chehab u8 *p_line, u32 length, int field_number); 8240c0d06caSMauro Carvalho Chehab u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 8250c0d06caSMauro Carvalho Chehab u8 sav_eav, u8 *p_buffer, u32 buffer_size); 8260c0d06caSMauro Carvalho Chehab void cx231xx_swab(u16 *from, u16 *to, u16 len); 8270c0d06caSMauro Carvalho Chehab 8280c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-core.c */ 8290c0d06caSMauro Carvalho Chehab 8300c0d06caSMauro Carvalho Chehab u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count); 8310c0d06caSMauro Carvalho Chehab void cx231xx_queue_unusedframes(struct cx231xx *dev); 8320c0d06caSMauro Carvalho Chehab void cx231xx_release_buffers(struct cx231xx *dev); 8330c0d06caSMauro Carvalho Chehab 8340c0d06caSMauro Carvalho Chehab /* read from control pipe */ 8350c0d06caSMauro Carvalho Chehab int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 8360c0d06caSMauro Carvalho Chehab char *buf, int len); 8370c0d06caSMauro Carvalho Chehab 8380c0d06caSMauro Carvalho Chehab /* write to control pipe */ 8390c0d06caSMauro Carvalho Chehab int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 8400c0d06caSMauro Carvalho Chehab char *buf, int len); 8410c0d06caSMauro Carvalho Chehab int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); 8420c0d06caSMauro Carvalho Chehab 8430c0d06caSMauro Carvalho Chehab int cx231xx_send_vendor_cmd(struct cx231xx *dev, 8440c0d06caSMauro Carvalho Chehab struct VENDOR_REQUEST_IN *ven_req); 8450c0d06caSMauro Carvalho Chehab int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, 8460c0d06caSMauro Carvalho Chehab struct cx231xx_i2c_xfer_data *req_data); 8470c0d06caSMauro Carvalho Chehab 8480c0d06caSMauro Carvalho Chehab /* Gpio related functions */ 8490c0d06caSMauro Carvalho Chehab int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, 8500c0d06caSMauro Carvalho Chehab u8 len, u8 request, u8 direction); 8510c0d06caSMauro Carvalho Chehab int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); 8520c0d06caSMauro Carvalho Chehab int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, 8530c0d06caSMauro Carvalho Chehab int pin_value); 8540c0d06caSMauro Carvalho Chehab 8550c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_start(struct cx231xx *dev); 8560c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_end(struct cx231xx *dev); 8570c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); 8580c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); 8590c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); 8600c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); 8610c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); 8620c0d06caSMauro Carvalho Chehab 8630c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); 8640c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); 8650c0d06caSMauro Carvalho Chehab 8660c0d06caSMauro Carvalho Chehab /* audio related functions */ 8670c0d06caSMauro Carvalho Chehab int cx231xx_set_audio_decoder_input(struct cx231xx *dev, 8680c0d06caSMauro Carvalho Chehab enum AUDIO_INPUT audio_input); 8690c0d06caSMauro Carvalho Chehab 8700c0d06caSMauro Carvalho Chehab int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); 8710c0d06caSMauro Carvalho Chehab int cx231xx_set_video_alternate(struct cx231xx *dev); 8720c0d06caSMauro Carvalho Chehab int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); 8730c0d06caSMauro Carvalho Chehab int is_fw_load(struct cx231xx *dev); 8740c0d06caSMauro Carvalho Chehab int cx231xx_check_fw(struct cx231xx *dev); 8750c0d06caSMauro Carvalho Chehab int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, 8760c0d06caSMauro Carvalho Chehab int num_bufs, int max_pkt_size, 8770c0d06caSMauro Carvalho Chehab int (*isoc_copy) (struct cx231xx *dev, 8780c0d06caSMauro Carvalho Chehab struct urb *urb)); 8790c0d06caSMauro Carvalho Chehab int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, 8800c0d06caSMauro Carvalho Chehab int num_bufs, int max_pkt_size, 8810c0d06caSMauro Carvalho Chehab int (*bulk_copy) (struct cx231xx *dev, 8820c0d06caSMauro Carvalho Chehab struct urb *urb)); 8830c0d06caSMauro Carvalho Chehab void cx231xx_stop_TS1(struct cx231xx *dev); 8840c0d06caSMauro Carvalho Chehab void cx231xx_start_TS1(struct cx231xx *dev); 8850c0d06caSMauro Carvalho Chehab void cx231xx_uninit_isoc(struct cx231xx *dev); 8860c0d06caSMauro Carvalho Chehab void cx231xx_uninit_bulk(struct cx231xx *dev); 8870c0d06caSMauro Carvalho Chehab int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); 8880c0d06caSMauro Carvalho Chehab int cx231xx_unmute_audio(struct cx231xx *dev); 8890c0d06caSMauro Carvalho Chehab int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size); 8900c0d06caSMauro Carvalho Chehab void cx231xx_disable656(struct cx231xx *dev); 8910c0d06caSMauro Carvalho Chehab void cx231xx_enable656(struct cx231xx *dev); 8920c0d06caSMauro Carvalho Chehab int cx231xx_demod_reset(struct cx231xx *dev); 8930c0d06caSMauro Carvalho Chehab int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); 8940c0d06caSMauro Carvalho Chehab 8950c0d06caSMauro Carvalho Chehab /* Device list functions */ 8960c0d06caSMauro Carvalho Chehab void cx231xx_release_resources(struct cx231xx *dev); 8970c0d06caSMauro Carvalho Chehab void cx231xx_release_analog_resources(struct cx231xx *dev); 8980c0d06caSMauro Carvalho Chehab int cx231xx_register_analog_devices(struct cx231xx *dev); 8990c0d06caSMauro Carvalho Chehab void cx231xx_remove_from_devlist(struct cx231xx *dev); 9000c0d06caSMauro Carvalho Chehab void cx231xx_add_into_devlist(struct cx231xx *dev); 9010c0d06caSMauro Carvalho Chehab void cx231xx_init_extension(struct cx231xx *dev); 9020c0d06caSMauro Carvalho Chehab void cx231xx_close_extension(struct cx231xx *dev); 9030c0d06caSMauro Carvalho Chehab 9040c0d06caSMauro Carvalho Chehab /* hardware init functions */ 9050c0d06caSMauro Carvalho Chehab int cx231xx_dev_init(struct cx231xx *dev); 9060c0d06caSMauro Carvalho Chehab void cx231xx_dev_uninit(struct cx231xx *dev); 9070c0d06caSMauro Carvalho Chehab void cx231xx_config_i2c(struct cx231xx *dev); 9080c0d06caSMauro Carvalho Chehab int cx231xx_config(struct cx231xx *dev); 9090c0d06caSMauro Carvalho Chehab 9100c0d06caSMauro Carvalho Chehab /* Stream control functions */ 9110c0d06caSMauro Carvalho Chehab int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask); 9120c0d06caSMauro Carvalho Chehab int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask); 9130c0d06caSMauro Carvalho Chehab 9140c0d06caSMauro Carvalho Chehab int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type); 9150c0d06caSMauro Carvalho Chehab 9160c0d06caSMauro Carvalho Chehab /* Power control functions */ 9170c0d06caSMauro Carvalho Chehab int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode); 9180c0d06caSMauro Carvalho Chehab int cx231xx_power_suspend(struct cx231xx *dev); 9190c0d06caSMauro Carvalho Chehab 9200c0d06caSMauro Carvalho Chehab /* chip specific control functions */ 9210c0d06caSMauro Carvalho Chehab int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); 9220c0d06caSMauro Carvalho Chehab int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, 9230c0d06caSMauro Carvalho Chehab u8 analog_or_digital); 9240c0d06caSMauro Carvalho Chehab int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3); 9250c0d06caSMauro Carvalho Chehab 9260c0d06caSMauro Carvalho Chehab /* video audio decoder related functions */ 9270c0d06caSMauro Carvalho Chehab void video_mux(struct cx231xx *dev, int index); 9280c0d06caSMauro Carvalho Chehab int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input); 9290c0d06caSMauro Carvalho Chehab int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input); 9300c0d06caSMauro Carvalho Chehab int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); 9310c0d06caSMauro Carvalho Chehab int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); 9320c0d06caSMauro Carvalho Chehab 9330c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-video.c */ 9340c0d06caSMauro Carvalho Chehab int cx231xx_register_extension(struct cx231xx_ops *dev); 9350c0d06caSMauro Carvalho Chehab void cx231xx_unregister_extension(struct cx231xx_ops *dev); 9360c0d06caSMauro Carvalho Chehab void cx231xx_init_extension(struct cx231xx *dev); 9370c0d06caSMauro Carvalho Chehab void cx231xx_close_extension(struct cx231xx *dev); 938bc08734cSHans Verkuil int cx231xx_querycap(struct file *file, void *priv, 939bc08734cSHans Verkuil struct v4l2_capability *cap); 940b86d1544SHans Verkuil int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t); 9412f73c7c5SHans Verkuil int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t); 942b86d1544SHans Verkuil int cx231xx_g_frequency(struct file *file, void *priv, 943b86d1544SHans Verkuil struct v4l2_frequency *f); 944b86d1544SHans Verkuil int cx231xx_s_frequency(struct file *file, void *priv, 945b530a447SHans Verkuil const struct v4l2_frequency *f); 946b86d1544SHans Verkuil int cx231xx_enum_input(struct file *file, void *priv, 947b86d1544SHans Verkuil struct v4l2_input *i); 948b86d1544SHans Verkuil int cx231xx_g_input(struct file *file, void *priv, unsigned int *i); 949b86d1544SHans Verkuil int cx231xx_s_input(struct file *file, void *priv, unsigned int i); 95008fe9f7dSHans Verkuil int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip); 951b86d1544SHans Verkuil int cx231xx_g_register(struct file *file, void *priv, 952b86d1544SHans Verkuil struct v4l2_dbg_register *reg); 953b86d1544SHans Verkuil int cx231xx_s_register(struct file *file, void *priv, 954977ba3b1SHans Verkuil const struct v4l2_dbg_register *reg); 9550c0d06caSMauro Carvalho Chehab 9560c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-cards.c */ 9570c0d06caSMauro Carvalho Chehab extern void cx231xx_pre_card_setup(struct cx231xx *dev); 9580c0d06caSMauro Carvalho Chehab extern void cx231xx_card_setup(struct cx231xx *dev); 9590c0d06caSMauro Carvalho Chehab extern struct cx231xx_board cx231xx_boards[]; 9600c0d06caSMauro Carvalho Chehab extern struct usb_device_id cx231xx_id_table[]; 9610c0d06caSMauro Carvalho Chehab extern const unsigned int cx231xx_bcount; 9620c0d06caSMauro Carvalho Chehab int cx231xx_tuner_callback(void *ptr, int component, int command, int arg); 9630c0d06caSMauro Carvalho Chehab 9640c0d06caSMauro Carvalho Chehab /* cx23885-417.c */ 9650c0d06caSMauro Carvalho Chehab extern int cx231xx_417_register(struct cx231xx *dev); 9660c0d06caSMauro Carvalho Chehab extern void cx231xx_417_unregister(struct cx231xx *dev); 9670c0d06caSMauro Carvalho Chehab 9680c0d06caSMauro Carvalho Chehab /* cx23885-input.c */ 9690c0d06caSMauro Carvalho Chehab 9700c0d06caSMauro Carvalho Chehab #if defined(CONFIG_VIDEO_CX231XX_RC) 9710c0d06caSMauro Carvalho Chehab int cx231xx_ir_init(struct cx231xx *dev); 9720c0d06caSMauro Carvalho Chehab void cx231xx_ir_exit(struct cx231xx *dev); 9730c0d06caSMauro Carvalho Chehab #else 9740c0d06caSMauro Carvalho Chehab #define cx231xx_ir_init(dev) (0) 9750c0d06caSMauro Carvalho Chehab #define cx231xx_ir_exit(dev) (0) 9760c0d06caSMauro Carvalho Chehab #endif 9770c0d06caSMauro Carvalho Chehab 9780c0d06caSMauro Carvalho Chehab 9790c0d06caSMauro Carvalho Chehab /* printk macros */ 9800c0d06caSMauro Carvalho Chehab 9810c0d06caSMauro Carvalho Chehab #define cx231xx_err(fmt, arg...) do {\ 9820c0d06caSMauro Carvalho Chehab printk(KERN_ERR fmt , ##arg); } while (0) 9830c0d06caSMauro Carvalho Chehab 9840c0d06caSMauro Carvalho Chehab #define cx231xx_errdev(fmt, arg...) do {\ 9850c0d06caSMauro Carvalho Chehab printk(KERN_ERR "%s: "fmt,\ 9860c0d06caSMauro Carvalho Chehab dev->name , ##arg); } while (0) 9870c0d06caSMauro Carvalho Chehab 9880c0d06caSMauro Carvalho Chehab #define cx231xx_info(fmt, arg...) do {\ 9890c0d06caSMauro Carvalho Chehab printk(KERN_INFO "%s: "fmt,\ 9900c0d06caSMauro Carvalho Chehab dev->name , ##arg); } while (0) 9910c0d06caSMauro Carvalho Chehab #define cx231xx_warn(fmt, arg...) do {\ 9920c0d06caSMauro Carvalho Chehab printk(KERN_WARNING "%s: "fmt,\ 9930c0d06caSMauro Carvalho Chehab dev->name , ##arg); } while (0) 9940c0d06caSMauro Carvalho Chehab 9950c0d06caSMauro Carvalho Chehab static inline unsigned int norm_maxw(struct cx231xx *dev) 9960c0d06caSMauro Carvalho Chehab { 9970c0d06caSMauro Carvalho Chehab if (dev->board.max_range_640_480) 9980c0d06caSMauro Carvalho Chehab return 640; 9990c0d06caSMauro Carvalho Chehab else 10000c0d06caSMauro Carvalho Chehab return 720; 10010c0d06caSMauro Carvalho Chehab } 10020c0d06caSMauro Carvalho Chehab 10030c0d06caSMauro Carvalho Chehab static inline unsigned int norm_maxh(struct cx231xx *dev) 10040c0d06caSMauro Carvalho Chehab { 10050c0d06caSMauro Carvalho Chehab if (dev->board.max_range_640_480) 10060c0d06caSMauro Carvalho Chehab return 480; 10070c0d06caSMauro Carvalho Chehab else 10080c0d06caSMauro Carvalho Chehab return (dev->norm & V4L2_STD_625_50) ? 576 : 480; 10090c0d06caSMauro Carvalho Chehab } 10100c0d06caSMauro Carvalho Chehab #endif 1011