xref: /openbmc/linux/drivers/media/usb/cx231xx/cx231xx.h (revision 19fbf1ba2e609e8bc6dad943de4e1314ca7c436d)
10c0d06caSMauro Carvalho Chehab /*
20c0d06caSMauro Carvalho Chehab    cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
30c0d06caSMauro Carvalho Chehab 
40c0d06caSMauro Carvalho Chehab    Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
50c0d06caSMauro Carvalho Chehab 	Based on em28xx driver
60c0d06caSMauro Carvalho Chehab 
70c0d06caSMauro Carvalho Chehab    This program is free software; you can redistribute it and/or modify
80c0d06caSMauro Carvalho Chehab    it under the terms of the GNU General Public License as published by
90c0d06caSMauro Carvalho Chehab    the Free Software Foundation; either version 2 of the License, or
100c0d06caSMauro Carvalho Chehab    (at your option) any later version.
110c0d06caSMauro Carvalho Chehab 
120c0d06caSMauro Carvalho Chehab    This program is distributed in the hope that it will be useful,
130c0d06caSMauro Carvalho Chehab    but WITHOUT ANY WARRANTY; without even the implied warranty of
140c0d06caSMauro Carvalho Chehab    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
150c0d06caSMauro Carvalho Chehab    GNU General Public License for more details.
160c0d06caSMauro Carvalho Chehab 
170c0d06caSMauro Carvalho Chehab    You should have received a copy of the GNU General Public License
180c0d06caSMauro Carvalho Chehab    along with this program; if not, write to the Free Software
190c0d06caSMauro Carvalho Chehab    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
200c0d06caSMauro Carvalho Chehab  */
210c0d06caSMauro Carvalho Chehab 
220c0d06caSMauro Carvalho Chehab #ifndef _CX231XX_H
230c0d06caSMauro Carvalho Chehab #define _CX231XX_H
240c0d06caSMauro Carvalho Chehab 
250c0d06caSMauro Carvalho Chehab #include <linux/videodev2.h>
260c0d06caSMauro Carvalho Chehab #include <linux/types.h>
270c0d06caSMauro Carvalho Chehab #include <linux/ioctl.h>
280c0d06caSMauro Carvalho Chehab #include <linux/i2c.h>
290c0d06caSMauro Carvalho Chehab #include <linux/workqueue.h>
300c0d06caSMauro Carvalho Chehab #include <linux/mutex.h>
31b7085c08SMauro Carvalho Chehab #include <linux/usb.h>
320c0d06caSMauro Carvalho Chehab 
33d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx2341x.h>
340c0d06caSMauro Carvalho Chehab 
350c0d06caSMauro Carvalho Chehab #include <media/videobuf-vmalloc.h>
360c0d06caSMauro Carvalho Chehab #include <media/v4l2-device.h>
37d2370f8eSHans Verkuil #include <media/v4l2-ctrls.h>
381d08a4faSHans Verkuil #include <media/v4l2-fh.h>
390c0d06caSMauro Carvalho Chehab #include <media/rc-core.h>
40b5dcee22SMauro Carvalho Chehab #include <media/i2c/ir-kbd-i2c.h>
410c0d06caSMauro Carvalho Chehab #include <media/videobuf-dvb.h>
420c0d06caSMauro Carvalho Chehab 
430c0d06caSMauro Carvalho Chehab #include "cx231xx-reg.h"
440c0d06caSMauro Carvalho Chehab #include "cx231xx-pcb-cfg.h"
450c0d06caSMauro Carvalho Chehab #include "cx231xx-conf-reg.h"
460c0d06caSMauro Carvalho Chehab 
470c0d06caSMauro Carvalho Chehab #define DRIVER_NAME                     "cx231xx"
480c0d06caSMauro Carvalho Chehab #define PWR_SLEEP_INTERVAL              10
490c0d06caSMauro Carvalho Chehab 
500c0d06caSMauro Carvalho Chehab /* I2C addresses for control block in Cx231xx */
510c0d06caSMauro Carvalho Chehab #define     AFE_DEVICE_ADDRESS		0x60
520c0d06caSMauro Carvalho Chehab #define     I2S_BLK_DEVICE_ADDRESS	0x98
530c0d06caSMauro Carvalho Chehab #define     VID_BLK_I2C_ADDRESS		0x88
540c0d06caSMauro Carvalho Chehab #define     VERVE_I2C_ADDRESS           0x40
550c0d06caSMauro Carvalho Chehab #define     DIF_USE_BASEBAND            0xFFFFFFFF
560c0d06caSMauro Carvalho Chehab 
570c0d06caSMauro Carvalho Chehab /* Boards supported by driver */
580c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_UNKNOWN		    0
590c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_CARRAERA	1
600c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_SHELBY	2
610c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDE_253S	3
620c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDU_253S	4
630c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_VIDEO_GRABBER	5
640c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDE_250	6
650c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_CNXT_RDU_250	7
660c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_EXETER  8
670c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
680c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
690c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_PV_XCAPTURE_USB 11
700c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
710c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_ICONBIT_U100 13
720c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
730c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
7468c97bf3SAlf Høgemark #define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
753ead1ba3SMatt Gomboc #define CX231XX_BOARD_OTG102 17
768b1255a2SJohannes Erdfelt #define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18
77dd2e7dd2SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19
789e49f7c3SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx 20
79809abdbfSOlli Salonen #define CX231XX_BOARD_HAUPPAUGE_955Q 21
80eee1d06dSTommi Rantala #define CX231XX_BOARD_TERRATEC_GRABBY 22
81a096fd64SOleh Kravchenko #define CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD 23
820f42b331SOleh Kravchenko #define CX231XX_BOARD_ASTROMETA_T2HYBRID 24
83fdda0109SRomain Reignier #define CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO 25
84c5bef50eSBrad Love #define CX231XX_BOARD_HAUPPAUGE_935C 26
85*19fbf1baSBrad Love #define CX231XX_BOARD_HAUPPAUGE_975 27
860c0d06caSMauro Carvalho Chehab 
870c0d06caSMauro Carvalho Chehab /* Limits minimum and default number of buffers */
880c0d06caSMauro Carvalho Chehab #define CX231XX_MIN_BUF                 4
890c0d06caSMauro Carvalho Chehab #define CX231XX_DEF_BUF                 12
900c0d06caSMauro Carvalho Chehab #define CX231XX_DEF_VBI_BUF             6
910c0d06caSMauro Carvalho Chehab 
920c0d06caSMauro Carvalho Chehab #define VBI_LINE_COUNT                  17
930c0d06caSMauro Carvalho Chehab #define VBI_LINE_LENGTH                 1440
940c0d06caSMauro Carvalho Chehab 
950c0d06caSMauro Carvalho Chehab /*Limits the max URB message size */
960c0d06caSMauro Carvalho Chehab #define URB_MAX_CTRL_SIZE               80
970c0d06caSMauro Carvalho Chehab 
980c0d06caSMauro Carvalho Chehab /* Params for validated field */
990c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_NOT_VALIDATED     1
1000c0d06caSMauro Carvalho Chehab #define CX231XX_BOARD_VALIDATED		0
1010c0d06caSMauro Carvalho Chehab 
1020c0d06caSMauro Carvalho Chehab /* maximum number of cx231xx boards */
1030c0d06caSMauro Carvalho Chehab #define CX231XX_MAXBOARDS               8
1040c0d06caSMauro Carvalho Chehab 
1050c0d06caSMauro Carvalho Chehab /* maximum number of frames that can be queued */
1060c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_FRAMES              5
1070c0d06caSMauro Carvalho Chehab 
1080c0d06caSMauro Carvalho Chehab /* number of buffers for isoc transfers */
1090c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_BUFS                8
1100c0d06caSMauro Carvalho Chehab 
1110c0d06caSMauro Carvalho Chehab /* number of packets for each buffer
1120c0d06caSMauro Carvalho Chehab    windows requests only 40 packets .. so we better do the same
1130c0d06caSMauro Carvalho Chehab    this is what I found out for all alternate numbers there!
1140c0d06caSMauro Carvalho Chehab  */
1150c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_PACKETS             40
1160c0d06caSMauro Carvalho Chehab 
1170c0d06caSMauro Carvalho Chehab /* default alternate; 0 means choose the best */
1180c0d06caSMauro Carvalho Chehab #define CX231XX_PINOUT                  0
1190c0d06caSMauro Carvalho Chehab 
1200c0d06caSMauro Carvalho Chehab #define CX231XX_INTERLACED_DEFAULT      1
1210c0d06caSMauro Carvalho Chehab 
1220c0d06caSMauro Carvalho Chehab /* time to wait when stopping the isoc transfer */
1230c0d06caSMauro Carvalho Chehab #define CX231XX_URB_TIMEOUT		\
1240c0d06caSMauro Carvalho Chehab 		msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
1250c0d06caSMauro Carvalho Chehab 
1260c0d06caSMauro Carvalho Chehab #define CX231xx_NORMS (\
1270c0d06caSMauro Carvalho Chehab 	V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
1280c0d06caSMauro Carvalho Chehab 	V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
1290c0d06caSMauro Carvalho Chehab 	V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
1300c0d06caSMauro Carvalho Chehab 	V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
1310c0d06caSMauro Carvalho Chehab 
1320c0d06caSMauro Carvalho Chehab #define SLEEP_S5H1432    30
1330c0d06caSMauro Carvalho Chehab #define CX23417_OSC_EN   8
1340c0d06caSMauro Carvalho Chehab #define CX23417_RESET    9
1350c0d06caSMauro Carvalho Chehab 
1360c0d06caSMauro Carvalho Chehab struct cx23417_fmt {
1370c0d06caSMauro Carvalho Chehab 	char  *name;
1380c0d06caSMauro Carvalho Chehab 	u32   fourcc;          /* v4l2 format id */
1390c0d06caSMauro Carvalho Chehab 	int   depth;
1400c0d06caSMauro Carvalho Chehab 	int   flags;
1410c0d06caSMauro Carvalho Chehab 	u32   cxformat;
1420c0d06caSMauro Carvalho Chehab };
1430c0d06caSMauro Carvalho Chehab enum cx231xx_mode {
1440c0d06caSMauro Carvalho Chehab 	CX231XX_SUSPEND,
1450c0d06caSMauro Carvalho Chehab 	CX231XX_ANALOG_MODE,
1460c0d06caSMauro Carvalho Chehab 	CX231XX_DIGITAL_MODE,
1470c0d06caSMauro Carvalho Chehab };
1480c0d06caSMauro Carvalho Chehab 
1490c0d06caSMauro Carvalho Chehab enum cx231xx_std_mode {
1500c0d06caSMauro Carvalho Chehab 	CX231XX_TV_AIR = 0,
1510c0d06caSMauro Carvalho Chehab 	CX231XX_TV_CABLE
1520c0d06caSMauro Carvalho Chehab };
1530c0d06caSMauro Carvalho Chehab 
1540c0d06caSMauro Carvalho Chehab enum cx231xx_stream_state {
1550c0d06caSMauro Carvalho Chehab 	STREAM_OFF,
1560c0d06caSMauro Carvalho Chehab 	STREAM_INTERRUPT,
1570c0d06caSMauro Carvalho Chehab 	STREAM_ON,
1580c0d06caSMauro Carvalho Chehab };
1590c0d06caSMauro Carvalho Chehab 
1600c0d06caSMauro Carvalho Chehab struct cx231xx;
1610c0d06caSMauro Carvalho Chehab 
1620c0d06caSMauro Carvalho Chehab struct cx231xx_isoc_ctl {
1630c0d06caSMauro Carvalho Chehab 	/* max packet size of isoc transaction */
1640c0d06caSMauro Carvalho Chehab 	int max_pkt_size;
1650c0d06caSMauro Carvalho Chehab 
1660c0d06caSMauro Carvalho Chehab 	/* number of allocated urbs */
1670c0d06caSMauro Carvalho Chehab 	int num_bufs;
1680c0d06caSMauro Carvalho Chehab 
1690c0d06caSMauro Carvalho Chehab 	/* urb for isoc transfers */
1700c0d06caSMauro Carvalho Chehab 	struct urb **urb;
1710c0d06caSMauro Carvalho Chehab 
1720c0d06caSMauro Carvalho Chehab 	/* transfer buffers for isoc transfer */
1730c0d06caSMauro Carvalho Chehab 	char **transfer_buffer;
1740c0d06caSMauro Carvalho Chehab 
1750c0d06caSMauro Carvalho Chehab 	/* Last buffer command and region */
1760c0d06caSMauro Carvalho Chehab 	u8 cmd;
1770c0d06caSMauro Carvalho Chehab 	int pos, size, pktsize;
1780c0d06caSMauro Carvalho Chehab 
1790c0d06caSMauro Carvalho Chehab 	/* Last field: ODD or EVEN? */
1800c0d06caSMauro Carvalho Chehab 	int field;
1810c0d06caSMauro Carvalho Chehab 
1820c0d06caSMauro Carvalho Chehab 	/* Stores incomplete commands */
1830c0d06caSMauro Carvalho Chehab 	u32 tmp_buf;
1840c0d06caSMauro Carvalho Chehab 	int tmp_buf_len;
1850c0d06caSMauro Carvalho Chehab 
1860c0d06caSMauro Carvalho Chehab 	/* Stores already requested buffers */
1870c0d06caSMauro Carvalho Chehab 	struct cx231xx_buffer *buf;
1880c0d06caSMauro Carvalho Chehab 
1890c0d06caSMauro Carvalho Chehab 	/* Stores the number of received fields */
1900c0d06caSMauro Carvalho Chehab 	int nfields;
1910c0d06caSMauro Carvalho Chehab 
1920c0d06caSMauro Carvalho Chehab 	/* isoc urb callback */
1930c0d06caSMauro Carvalho Chehab 	int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
1940c0d06caSMauro Carvalho Chehab };
1950c0d06caSMauro Carvalho Chehab 
1960c0d06caSMauro Carvalho Chehab struct cx231xx_bulk_ctl {
1970c0d06caSMauro Carvalho Chehab 	/* max packet size of bulk transaction */
1980c0d06caSMauro Carvalho Chehab 	int max_pkt_size;
1990c0d06caSMauro Carvalho Chehab 
2000c0d06caSMauro Carvalho Chehab 	/* number of allocated urbs */
2010c0d06caSMauro Carvalho Chehab 	int num_bufs;
2020c0d06caSMauro Carvalho Chehab 
2030c0d06caSMauro Carvalho Chehab 	/* urb for bulk transfers */
2040c0d06caSMauro Carvalho Chehab 	struct urb **urb;
2050c0d06caSMauro Carvalho Chehab 
2060c0d06caSMauro Carvalho Chehab 	/* transfer buffers for bulk transfer */
2070c0d06caSMauro Carvalho Chehab 	char **transfer_buffer;
2080c0d06caSMauro Carvalho Chehab 
2090c0d06caSMauro Carvalho Chehab 	/* Last buffer command and region */
2100c0d06caSMauro Carvalho Chehab 	u8 cmd;
2110c0d06caSMauro Carvalho Chehab 	int pos, size, pktsize;
2120c0d06caSMauro Carvalho Chehab 
2130c0d06caSMauro Carvalho Chehab 	/* Last field: ODD or EVEN? */
2140c0d06caSMauro Carvalho Chehab 	int field;
2150c0d06caSMauro Carvalho Chehab 
2160c0d06caSMauro Carvalho Chehab 	/* Stores incomplete commands */
2170c0d06caSMauro Carvalho Chehab 	u32 tmp_buf;
2180c0d06caSMauro Carvalho Chehab 	int tmp_buf_len;
2190c0d06caSMauro Carvalho Chehab 
2200c0d06caSMauro Carvalho Chehab 	/* Stores already requested buffers */
2210c0d06caSMauro Carvalho Chehab 	struct cx231xx_buffer *buf;
2220c0d06caSMauro Carvalho Chehab 
2230c0d06caSMauro Carvalho Chehab 	/* Stores the number of received fields */
2240c0d06caSMauro Carvalho Chehab 	int nfields;
2250c0d06caSMauro Carvalho Chehab 
2260c0d06caSMauro Carvalho Chehab 	/* bulk urb callback */
2270c0d06caSMauro Carvalho Chehab 	int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
2280c0d06caSMauro Carvalho Chehab };
2290c0d06caSMauro Carvalho Chehab 
2300c0d06caSMauro Carvalho Chehab struct cx231xx_fmt {
2310c0d06caSMauro Carvalho Chehab 	char *name;
2320c0d06caSMauro Carvalho Chehab 	u32 fourcc;		/* v4l2 format id */
2330c0d06caSMauro Carvalho Chehab 	int depth;
2340c0d06caSMauro Carvalho Chehab 	int reg;
2350c0d06caSMauro Carvalho Chehab };
2360c0d06caSMauro Carvalho Chehab 
2370c0d06caSMauro Carvalho Chehab /* buffer for one video frame */
2380c0d06caSMauro Carvalho Chehab struct cx231xx_buffer {
2390c0d06caSMauro Carvalho Chehab 	/* common v4l buffer stuff -- must be first */
2400c0d06caSMauro Carvalho Chehab 	struct videobuf_buffer vb;
2410c0d06caSMauro Carvalho Chehab 
2420c0d06caSMauro Carvalho Chehab 	struct list_head frame;
2430c0d06caSMauro Carvalho Chehab 	int top_field;
2440c0d06caSMauro Carvalho Chehab 	int receiving;
2450c0d06caSMauro Carvalho Chehab };
2460c0d06caSMauro Carvalho Chehab 
2470c0d06caSMauro Carvalho Chehab enum ps_package_head {
2480c0d06caSMauro Carvalho Chehab 	CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
2490c0d06caSMauro Carvalho Chehab 	CX231XX_NONEED_PS_PACKAGE_HEAD
2500c0d06caSMauro Carvalho Chehab };
2510c0d06caSMauro Carvalho Chehab 
2520c0d06caSMauro Carvalho Chehab struct cx231xx_dmaqueue {
2530c0d06caSMauro Carvalho Chehab 	struct list_head active;
2540c0d06caSMauro Carvalho Chehab 	struct list_head queued;
2550c0d06caSMauro Carvalho Chehab 
2560c0d06caSMauro Carvalho Chehab 	wait_queue_head_t wq;
2570c0d06caSMauro Carvalho Chehab 
2580c0d06caSMauro Carvalho Chehab 	/* Counters to control buffer fill */
2590c0d06caSMauro Carvalho Chehab 	int pos;
2600c0d06caSMauro Carvalho Chehab 	u8 is_partial_line;
2610c0d06caSMauro Carvalho Chehab 	u8 partial_buf[8];
2620c0d06caSMauro Carvalho Chehab 	u8 last_sav;
2630c0d06caSMauro Carvalho Chehab 	int current_field;
2640c0d06caSMauro Carvalho Chehab 	u32 bytes_left_in_line;
2650c0d06caSMauro Carvalho Chehab 	u32 lines_completed;
2660c0d06caSMauro Carvalho Chehab 	u8 field1_done;
2670c0d06caSMauro Carvalho Chehab 	u32 lines_per_field;
2680c0d06caSMauro Carvalho Chehab 
2690c0d06caSMauro Carvalho Chehab 	/*Mpeg2 control buffer*/
2700c0d06caSMauro Carvalho Chehab 	u8 *p_left_data;
2710c0d06caSMauro Carvalho Chehab 	u32 left_data_count;
2720c0d06caSMauro Carvalho Chehab 	u8 mpeg_buffer_done;
2730c0d06caSMauro Carvalho Chehab 	u32 mpeg_buffer_completed;
2740c0d06caSMauro Carvalho Chehab 	enum ps_package_head add_ps_package_head;
2750c0d06caSMauro Carvalho Chehab 	char ps_head[10];
2760c0d06caSMauro Carvalho Chehab };
2770c0d06caSMauro Carvalho Chehab 
2780c0d06caSMauro Carvalho Chehab /* inputs */
2790c0d06caSMauro Carvalho Chehab 
2800c0d06caSMauro Carvalho Chehab #define MAX_CX231XX_INPUT               4
2810c0d06caSMauro Carvalho Chehab 
2820c0d06caSMauro Carvalho Chehab enum cx231xx_itype {
2830c0d06caSMauro Carvalho Chehab 	CX231XX_VMUX_COMPOSITE1 = 1,
2840c0d06caSMauro Carvalho Chehab 	CX231XX_VMUX_SVIDEO,
2850c0d06caSMauro Carvalho Chehab 	CX231XX_VMUX_TELEVISION,
2860c0d06caSMauro Carvalho Chehab 	CX231XX_VMUX_CABLE,
2870c0d06caSMauro Carvalho Chehab 	CX231XX_RADIO,
2880c0d06caSMauro Carvalho Chehab 	CX231XX_VMUX_DVB,
2890c0d06caSMauro Carvalho Chehab };
2900c0d06caSMauro Carvalho Chehab 
2910c0d06caSMauro Carvalho Chehab enum cx231xx_v_input {
2920c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_1_1 = 0x1,
2930c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_2_1,
2940c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_3_1,
2950c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_4_1,
2960c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_1_2 = 0x01,
2970c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_2_2,
2980c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_3_2,
2990c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_1_3 = 0x1,
3000c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_2_3,
3010c0d06caSMauro Carvalho Chehab 	CX231XX_VIN_3_3,
3020c0d06caSMauro Carvalho Chehab };
3030c0d06caSMauro Carvalho Chehab 
3040c0d06caSMauro Carvalho Chehab /* cx231xx has two audio inputs: tuner and line in */
3050c0d06caSMauro Carvalho Chehab enum cx231xx_amux {
3060c0d06caSMauro Carvalho Chehab 	/* This is the only entry for cx231xx tuner input */
3070c0d06caSMauro Carvalho Chehab 	CX231XX_AMUX_VIDEO,	/* cx231xx tuner */
3080c0d06caSMauro Carvalho Chehab 	CX231XX_AMUX_LINE_IN,	/* Line In */
3090c0d06caSMauro Carvalho Chehab };
3100c0d06caSMauro Carvalho Chehab 
3110c0d06caSMauro Carvalho Chehab struct cx231xx_reg_seq {
3120c0d06caSMauro Carvalho Chehab 	unsigned char bit;
3130c0d06caSMauro Carvalho Chehab 	unsigned char val;
3140c0d06caSMauro Carvalho Chehab 	int sleep;
3150c0d06caSMauro Carvalho Chehab };
3160c0d06caSMauro Carvalho Chehab 
3170c0d06caSMauro Carvalho Chehab struct cx231xx_input {
3180c0d06caSMauro Carvalho Chehab 	enum cx231xx_itype type;
3190c0d06caSMauro Carvalho Chehab 	unsigned int vmux;
3200c0d06caSMauro Carvalho Chehab 	enum cx231xx_amux amux;
3210c0d06caSMauro Carvalho Chehab 	struct cx231xx_reg_seq *gpio;
3220c0d06caSMauro Carvalho Chehab };
3230c0d06caSMauro Carvalho Chehab 
3240c0d06caSMauro Carvalho Chehab #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
3250c0d06caSMauro Carvalho Chehab 
3260c0d06caSMauro Carvalho Chehab enum cx231xx_decoder {
3270c0d06caSMauro Carvalho Chehab 	CX231XX_NODECODER,
3280c0d06caSMauro Carvalho Chehab 	CX231XX_AVDECODER
3290c0d06caSMauro Carvalho Chehab };
3300c0d06caSMauro Carvalho Chehab 
3310c0d06caSMauro Carvalho Chehab enum CX231XX_I2C_MASTER_PORT {
3329abe3b89SMatthias Schwarzott 	I2C_0 = 0,       /* master 0 - internal connection */
3339abe3b89SMatthias Schwarzott 	I2C_1 = 1,       /* master 1 - used with mux */
3349abe3b89SMatthias Schwarzott 	I2C_2 = 2,       /* master 2 */
3359abe3b89SMatthias Schwarzott 	I2C_1_MUX_1 = 3, /* master 1 - port 1 (I2C_DEMOD_EN = 0) */
3369abe3b89SMatthias Schwarzott 	I2C_1_MUX_3 = 4  /* master 1 - port 3 (I2C_DEMOD_EN = 1) */
3370c0d06caSMauro Carvalho Chehab };
3380c0d06caSMauro Carvalho Chehab 
3390c0d06caSMauro Carvalho Chehab struct cx231xx_board {
3400c0d06caSMauro Carvalho Chehab 	char *name;
3410c0d06caSMauro Carvalho Chehab 	int vchannels;
3420c0d06caSMauro Carvalho Chehab 	int tuner_type;
3430c0d06caSMauro Carvalho Chehab 	int tuner_addr;
3440c0d06caSMauro Carvalho Chehab 	v4l2_std_id norm;	/* tv norm */
3450c0d06caSMauro Carvalho Chehab 
3460c0d06caSMauro Carvalho Chehab 	/* demod related */
3470c0d06caSMauro Carvalho Chehab 	int demod_addr;
3480c0d06caSMauro Carvalho Chehab 	u8 demod_xfer_mode;	/* 0 - Serial; 1 - parallel */
3490c0d06caSMauro Carvalho Chehab 
3500c0d06caSMauro Carvalho Chehab 	/* GPIO Pins */
3510c0d06caSMauro Carvalho Chehab 	struct cx231xx_reg_seq *dvb_gpio;
3520c0d06caSMauro Carvalho Chehab 	struct cx231xx_reg_seq *suspend_gpio;
3530c0d06caSMauro Carvalho Chehab 	struct cx231xx_reg_seq *tuner_gpio;
3540c0d06caSMauro Carvalho Chehab 		/* Negative means don't use it */
3550c0d06caSMauro Carvalho Chehab 	s8 tuner_sif_gpio;
3560c0d06caSMauro Carvalho Chehab 	s8 tuner_scl_gpio;
3570c0d06caSMauro Carvalho Chehab 	s8 tuner_sda_gpio;
3580c0d06caSMauro Carvalho Chehab 
3590c0d06caSMauro Carvalho Chehab 	/* PIN ctrl */
3600c0d06caSMauro Carvalho Chehab 	u32 ctl_pin_status_mask;
3610c0d06caSMauro Carvalho Chehab 	u8 agc_analog_digital_select_gpio;
3620c0d06caSMauro Carvalho Chehab 	u32 gpio_pin_status_mask;
3630c0d06caSMauro Carvalho Chehab 
3640c0d06caSMauro Carvalho Chehab 	/* i2c masters */
3650c0d06caSMauro Carvalho Chehab 	u8 tuner_i2c_master;
3660c0d06caSMauro Carvalho Chehab 	u8 demod_i2c_master;
3670c0d06caSMauro Carvalho Chehab 	u8 ir_i2c_master;
3680c0d06caSMauro Carvalho Chehab 
3690c0d06caSMauro Carvalho Chehab 	/* for devices with I2C chips for IR */
3700c0d06caSMauro Carvalho Chehab 	char *rc_map_name;
3710c0d06caSMauro Carvalho Chehab 
3720c0d06caSMauro Carvalho Chehab 	unsigned int max_range_640_480:1;
3730c0d06caSMauro Carvalho Chehab 	unsigned int has_dvb:1;
3740c0d06caSMauro Carvalho Chehab 	unsigned int has_417:1;
3750c0d06caSMauro Carvalho Chehab 	unsigned int valid:1;
3760c0d06caSMauro Carvalho Chehab 	unsigned int no_alt_vanc:1;
3770c0d06caSMauro Carvalho Chehab 	unsigned int external_av:1;
3780c0d06caSMauro Carvalho Chehab 
3790c0d06caSMauro Carvalho Chehab 	unsigned char xclk, i2c_speed;
3800c0d06caSMauro Carvalho Chehab 
3810c0d06caSMauro Carvalho Chehab 	enum cx231xx_decoder decoder;
3820c0d06caSMauro Carvalho Chehab 	int output_mode;
3830c0d06caSMauro Carvalho Chehab 
3840c0d06caSMauro Carvalho Chehab 	struct cx231xx_input input[MAX_CX231XX_INPUT];
3850c0d06caSMauro Carvalho Chehab 	struct cx231xx_input radio;
3860c0d06caSMauro Carvalho Chehab 	struct rc_map *ir_codes;
3870c0d06caSMauro Carvalho Chehab };
3880c0d06caSMauro Carvalho Chehab 
3890c0d06caSMauro Carvalho Chehab /* device states */
3900c0d06caSMauro Carvalho Chehab enum cx231xx_dev_state {
3910c0d06caSMauro Carvalho Chehab 	DEV_INITIALIZED = 0x01,
3920c0d06caSMauro Carvalho Chehab 	DEV_DISCONNECTED = 0x02,
3930c0d06caSMauro Carvalho Chehab };
3940c0d06caSMauro Carvalho Chehab 
3950c0d06caSMauro Carvalho Chehab enum AFE_MODE {
3960c0d06caSMauro Carvalho Chehab 	AFE_MODE_LOW_IF,
3970c0d06caSMauro Carvalho Chehab 	AFE_MODE_BASEBAND,
3980c0d06caSMauro Carvalho Chehab 	AFE_MODE_EU_HI_IF,
3990c0d06caSMauro Carvalho Chehab 	AFE_MODE_US_HI_IF,
4000c0d06caSMauro Carvalho Chehab 	AFE_MODE_JAPAN_HI_IF
4010c0d06caSMauro Carvalho Chehab };
4020c0d06caSMauro Carvalho Chehab 
4030c0d06caSMauro Carvalho Chehab enum AUDIO_INPUT {
4040c0d06caSMauro Carvalho Chehab 	AUDIO_INPUT_MUTE,
4050c0d06caSMauro Carvalho Chehab 	AUDIO_INPUT_LINE,
4060c0d06caSMauro Carvalho Chehab 	AUDIO_INPUT_TUNER_TV,
4070c0d06caSMauro Carvalho Chehab 	AUDIO_INPUT_SPDIF,
4080c0d06caSMauro Carvalho Chehab 	AUDIO_INPUT_TUNER_FM
4090c0d06caSMauro Carvalho Chehab };
4100c0d06caSMauro Carvalho Chehab 
4110c0d06caSMauro Carvalho Chehab #define CX231XX_AUDIO_BUFS              5
4120c0d06caSMauro Carvalho Chehab #define CX231XX_NUM_AUDIO_PACKETS       16
4130c0d06caSMauro Carvalho Chehab #define CX231XX_ISO_NUM_AUDIO_PACKETS	64
4140c0d06caSMauro Carvalho Chehab 
4150c0d06caSMauro Carvalho Chehab /* cx231xx extensions */
4160c0d06caSMauro Carvalho Chehab #define CX231XX_AUDIO                   0x10
4170c0d06caSMauro Carvalho Chehab #define CX231XX_DVB                     0x20
4180c0d06caSMauro Carvalho Chehab 
4190c0d06caSMauro Carvalho Chehab struct cx231xx_audio {
4200c0d06caSMauro Carvalho Chehab 	char name[50];
4210c0d06caSMauro Carvalho Chehab 	char *transfer_buffer[CX231XX_AUDIO_BUFS];
4220c0d06caSMauro Carvalho Chehab 	struct urb *urb[CX231XX_AUDIO_BUFS];
4230c0d06caSMauro Carvalho Chehab 	struct usb_device *udev;
4240c0d06caSMauro Carvalho Chehab 	unsigned int capture_transfer_done;
4250c0d06caSMauro Carvalho Chehab 	struct snd_pcm_substream *capture_pcm_substream;
4260c0d06caSMauro Carvalho Chehab 
4270c0d06caSMauro Carvalho Chehab 	unsigned int hwptr_done_capture;
4280c0d06caSMauro Carvalho Chehab 	struct snd_card *sndcard;
4290c0d06caSMauro Carvalho Chehab 
4300c0d06caSMauro Carvalho Chehab 	int users, shutdown;
4310c0d06caSMauro Carvalho Chehab 	/* locks */
4320c0d06caSMauro Carvalho Chehab 	spinlock_t slock;
4330c0d06caSMauro Carvalho Chehab 
4340c0d06caSMauro Carvalho Chehab 	int alt;		/* alternate */
4350c0d06caSMauro Carvalho Chehab 	int max_pkt_size;	/* max packet size of isoc transaction */
4360c0d06caSMauro Carvalho Chehab 	int num_alt;		/* Number of alternative settings */
4370c0d06caSMauro Carvalho Chehab 	unsigned int *alt_max_pkt_size;	/* array of wMaxPacketSize */
4380c0d06caSMauro Carvalho Chehab 	u16 end_point_addr;
4390c0d06caSMauro Carvalho Chehab };
4400c0d06caSMauro Carvalho Chehab 
4410c0d06caSMauro Carvalho Chehab struct cx231xx;
4420c0d06caSMauro Carvalho Chehab 
4430c0d06caSMauro Carvalho Chehab struct cx231xx_fh {
4441d08a4faSHans Verkuil 	struct v4l2_fh fh;
4450c0d06caSMauro Carvalho Chehab 	struct cx231xx *dev;
4460c0d06caSMauro Carvalho Chehab 	unsigned int stream_on:1;	/* Locks streams */
4470c0d06caSMauro Carvalho Chehab 	enum v4l2_buf_type type;
4480c0d06caSMauro Carvalho Chehab 
44971590765SHans Verkuil 	struct videobuf_queue vb_vidq;
4500c0d06caSMauro Carvalho Chehab 
4510c0d06caSMauro Carvalho Chehab 	/* vbi capture */
4520c0d06caSMauro Carvalho Chehab 	struct videobuf_queue      vidq;
4530c0d06caSMauro Carvalho Chehab 	struct videobuf_queue      vbiq;
4540c0d06caSMauro Carvalho Chehab 
4550c0d06caSMauro Carvalho Chehab 	/* MPEG Encoder specifics ONLY */
4560c0d06caSMauro Carvalho Chehab 
4570c0d06caSMauro Carvalho Chehab 	atomic_t                   v4l_reading;
4580c0d06caSMauro Carvalho Chehab };
4590c0d06caSMauro Carvalho Chehab 
4600c0d06caSMauro Carvalho Chehab /*****************************************************************/
4610c0d06caSMauro Carvalho Chehab /* set/get i2c */
4620c0d06caSMauro Carvalho Chehab /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
4630c0d06caSMauro Carvalho Chehab #define I2C_SPEED_1M            0x0
4640c0d06caSMauro Carvalho Chehab #define I2C_SPEED_400K          0x1
4650c0d06caSMauro Carvalho Chehab #define I2C_SPEED_100K          0x2
4660c0d06caSMauro Carvalho Chehab #define I2C_SPEED_5M            0x3
4670c0d06caSMauro Carvalho Chehab 
4680c0d06caSMauro Carvalho Chehab /* 0-- STOP transaction */
4690c0d06caSMauro Carvalho Chehab #define I2C_STOP                0x0
4700c0d06caSMauro Carvalho Chehab /* 1-- do not transmit STOP at end of transaction */
4710c0d06caSMauro Carvalho Chehab #define I2C_NOSTOP              0x1
4720c0d06caSMauro Carvalho Chehab /* 1--allow slave to insert clock wait states */
4730c0d06caSMauro Carvalho Chehab #define I2C_SYNC                0x1
4740c0d06caSMauro Carvalho Chehab 
4750c0d06caSMauro Carvalho Chehab struct cx231xx_i2c {
4760c0d06caSMauro Carvalho Chehab 	struct cx231xx *dev;
4770c0d06caSMauro Carvalho Chehab 
4780c0d06caSMauro Carvalho Chehab 	int nr;
4790c0d06caSMauro Carvalho Chehab 
4800c0d06caSMauro Carvalho Chehab 	/* i2c i/o */
4810c0d06caSMauro Carvalho Chehab 	struct i2c_adapter i2c_adap;
48254b1b41fSPeter Rosin 	int i2c_rc;
4830c0d06caSMauro Carvalho Chehab 
4840c0d06caSMauro Carvalho Chehab 	/* different settings for each bus */
4850c0d06caSMauro Carvalho Chehab 	u8 i2c_period;
4860c0d06caSMauro Carvalho Chehab 	u8 i2c_nostop;
4870c0d06caSMauro Carvalho Chehab 	u8 i2c_reserve;
4880c0d06caSMauro Carvalho Chehab };
4890c0d06caSMauro Carvalho Chehab 
4900c0d06caSMauro Carvalho Chehab struct cx231xx_i2c_xfer_data {
4910c0d06caSMauro Carvalho Chehab 	u8 dev_addr;
4920c0d06caSMauro Carvalho Chehab 	u8 direction;		/* 1 - IN, 0 - OUT */
4930c0d06caSMauro Carvalho Chehab 	u8 saddr_len;		/* sub address len */
4940c0d06caSMauro Carvalho Chehab 	u16 saddr_dat;		/* sub addr data */
4950c0d06caSMauro Carvalho Chehab 	u8 buf_size;		/* buffer size */
4960c0d06caSMauro Carvalho Chehab 	u8 *p_buffer;		/* pointer to the buffer */
4970c0d06caSMauro Carvalho Chehab };
4980c0d06caSMauro Carvalho Chehab 
4990c0d06caSMauro Carvalho Chehab struct VENDOR_REQUEST_IN {
5000c0d06caSMauro Carvalho Chehab 	u8 bRequest;
5010c0d06caSMauro Carvalho Chehab 	u16 wValue;
5020c0d06caSMauro Carvalho Chehab 	u16 wIndex;
5030c0d06caSMauro Carvalho Chehab 	u16 wLength;
5040c0d06caSMauro Carvalho Chehab 	u8 direction;
5050c0d06caSMauro Carvalho Chehab 	u8 bData;
5060c0d06caSMauro Carvalho Chehab 	u8 *pBuff;
5070c0d06caSMauro Carvalho Chehab };
5080c0d06caSMauro Carvalho Chehab 
5090c0d06caSMauro Carvalho Chehab struct cx231xx_tvnorm {
5100c0d06caSMauro Carvalho Chehab 	char		*name;
5110c0d06caSMauro Carvalho Chehab 	v4l2_std_id	id;
5120c0d06caSMauro Carvalho Chehab 	u32		cxiformat;
5130c0d06caSMauro Carvalho Chehab 	u32		cxoformat;
5140c0d06caSMauro Carvalho Chehab };
5150c0d06caSMauro Carvalho Chehab 
5160c0d06caSMauro Carvalho Chehab enum TRANSFER_TYPE {
5170c0d06caSMauro Carvalho Chehab 	Raw_Video = 0,
5180c0d06caSMauro Carvalho Chehab 	Audio,
5190c0d06caSMauro Carvalho Chehab 	Vbi,			/* VANC */
5200c0d06caSMauro Carvalho Chehab 	Sliced_cc,		/* HANC */
5210c0d06caSMauro Carvalho Chehab 	TS1_serial_mode,
5220c0d06caSMauro Carvalho Chehab 	TS2,
5230c0d06caSMauro Carvalho Chehab 	TS1_parallel_mode
5240c0d06caSMauro Carvalho Chehab } ;
5250c0d06caSMauro Carvalho Chehab 
5260c0d06caSMauro Carvalho Chehab struct cx231xx_video_mode {
5270c0d06caSMauro Carvalho Chehab 	/* Isoc control struct */
5280c0d06caSMauro Carvalho Chehab 	struct cx231xx_dmaqueue vidq;
5290c0d06caSMauro Carvalho Chehab 	struct cx231xx_isoc_ctl isoc_ctl;
5300c0d06caSMauro Carvalho Chehab 	struct cx231xx_bulk_ctl bulk_ctl;
5310c0d06caSMauro Carvalho Chehab 	/* locks */
5320c0d06caSMauro Carvalho Chehab 	spinlock_t slock;
5330c0d06caSMauro Carvalho Chehab 
5340c0d06caSMauro Carvalho Chehab 	/* usb transfer */
5350c0d06caSMauro Carvalho Chehab 	int alt;		/* alternate */
5360c0d06caSMauro Carvalho Chehab 	int max_pkt_size;	/* max packet size of isoc transaction */
5370c0d06caSMauro Carvalho Chehab 	int num_alt;		/* Number of alternative settings */
5380c0d06caSMauro Carvalho Chehab 	unsigned int *alt_max_pkt_size;	/* array of wMaxPacketSize */
5390c0d06caSMauro Carvalho Chehab 	u16 end_point_addr;
5400c0d06caSMauro Carvalho Chehab };
5411e451808SHans Verkuil 
5420c0d06caSMauro Carvalho Chehab struct cx231xx_tsport {
5430c0d06caSMauro Carvalho Chehab 	struct cx231xx *dev;
5440c0d06caSMauro Carvalho Chehab 
5450c0d06caSMauro Carvalho Chehab 	int                        nr;
5460c0d06caSMauro Carvalho Chehab 	int                        sram_chno;
5470c0d06caSMauro Carvalho Chehab 
5480c0d06caSMauro Carvalho Chehab 	struct videobuf_dvb_frontends frontends;
5490c0d06caSMauro Carvalho Chehab 
5500c0d06caSMauro Carvalho Chehab 	/* dma queues */
5510c0d06caSMauro Carvalho Chehab 
5520c0d06caSMauro Carvalho Chehab 	u32                        ts_packet_size;
5530c0d06caSMauro Carvalho Chehab 	u32                        ts_packet_count;
5540c0d06caSMauro Carvalho Chehab 
5550c0d06caSMauro Carvalho Chehab 	int                        width;
5560c0d06caSMauro Carvalho Chehab 	int                        height;
5570c0d06caSMauro Carvalho Chehab 
5580c0d06caSMauro Carvalho Chehab 	/* locks */
5590c0d06caSMauro Carvalho Chehab 	spinlock_t                 slock;
5600c0d06caSMauro Carvalho Chehab 
5610c0d06caSMauro Carvalho Chehab 	/* registers */
5620c0d06caSMauro Carvalho Chehab 	u32                        reg_gpcnt;
5630c0d06caSMauro Carvalho Chehab 	u32                        reg_gpcnt_ctl;
5640c0d06caSMauro Carvalho Chehab 	u32                        reg_dma_ctl;
5650c0d06caSMauro Carvalho Chehab 	u32                        reg_lngth;
5660c0d06caSMauro Carvalho Chehab 	u32                        reg_hw_sop_ctrl;
5670c0d06caSMauro Carvalho Chehab 	u32                        reg_gen_ctrl;
5680c0d06caSMauro Carvalho Chehab 	u32                        reg_bd_pkt_status;
5690c0d06caSMauro Carvalho Chehab 	u32                        reg_sop_status;
5700c0d06caSMauro Carvalho Chehab 	u32                        reg_fifo_ovfl_stat;
5710c0d06caSMauro Carvalho Chehab 	u32                        reg_vld_misc;
5720c0d06caSMauro Carvalho Chehab 	u32                        reg_ts_clk_en;
5730c0d06caSMauro Carvalho Chehab 	u32                        reg_ts_int_msk;
5740c0d06caSMauro Carvalho Chehab 	u32                        reg_ts_int_stat;
5750c0d06caSMauro Carvalho Chehab 	u32                        reg_src_sel;
5760c0d06caSMauro Carvalho Chehab 
5770c0d06caSMauro Carvalho Chehab 	/* Default register vals */
5780c0d06caSMauro Carvalho Chehab 	int                        pci_irqmask;
5790c0d06caSMauro Carvalho Chehab 	u32                        dma_ctl_val;
5800c0d06caSMauro Carvalho Chehab 	u32                        ts_int_msk_val;
5810c0d06caSMauro Carvalho Chehab 	u32                        gen_ctrl_val;
5820c0d06caSMauro Carvalho Chehab 	u32                        ts_clk_en_val;
5830c0d06caSMauro Carvalho Chehab 	u32                        src_sel_val;
5840c0d06caSMauro Carvalho Chehab 	u32                        vld_misc_val;
5850c0d06caSMauro Carvalho Chehab 	u32                        hw_sop_ctrl_val;
5860c0d06caSMauro Carvalho Chehab 
5870c0d06caSMauro Carvalho Chehab 	/* Allow a single tsport to have multiple frontends */
5880c0d06caSMauro Carvalho Chehab 	u32                        num_frontends;
5890c0d06caSMauro Carvalho Chehab 	void                       *port_priv;
5900c0d06caSMauro Carvalho Chehab };
5910c0d06caSMauro Carvalho Chehab 
5920c0d06caSMauro Carvalho Chehab /* main device struct */
5930c0d06caSMauro Carvalho Chehab struct cx231xx {
5940c0d06caSMauro Carvalho Chehab 	/* generic device properties */
5950c0d06caSMauro Carvalho Chehab 	char name[30];		/* name (including minor) of the device */
5960c0d06caSMauro Carvalho Chehab 	int model;		/* index in the device_data struct */
5970c0d06caSMauro Carvalho Chehab 	int devno;		/* marks the number of this device */
598336fea92SMauro Carvalho Chehab 	struct device *dev;	/* pointer to USB interface's dev */
5990c0d06caSMauro Carvalho Chehab 
6000c0d06caSMauro Carvalho Chehab 	struct cx231xx_board board;
6010c0d06caSMauro Carvalho Chehab 
6020c0d06caSMauro Carvalho Chehab 	/* For I2C IR support */
6030c0d06caSMauro Carvalho Chehab 	struct IR_i2c_init_data    init_data;
6040c0d06caSMauro Carvalho Chehab 	struct i2c_client          *ir_i2c_client;
6050c0d06caSMauro Carvalho Chehab 
6060c0d06caSMauro Carvalho Chehab 	unsigned int stream_on:1;	/* Locks streams */
6070c0d06caSMauro Carvalho Chehab 	unsigned int vbi_stream_on:1;	/* Locks streams for VBI */
6080c0d06caSMauro Carvalho Chehab 	unsigned int has_audio_class:1;
6090c0d06caSMauro Carvalho Chehab 	unsigned int has_alsa_audio:1;
6100c0d06caSMauro Carvalho Chehab 
61177e97ba2SMauro Carvalho Chehab 	unsigned int i2c_scan_running:1; /* true only during i2c_scan */
61277e97ba2SMauro Carvalho Chehab 
6130c0d06caSMauro Carvalho Chehab 	struct cx231xx_fmt *format;
6140c0d06caSMauro Carvalho Chehab 
6150c0d06caSMauro Carvalho Chehab 	struct v4l2_device v4l2_dev;
6160c0d06caSMauro Carvalho Chehab 	struct v4l2_subdev *sd_cx25840;
6170c0d06caSMauro Carvalho Chehab 	struct v4l2_subdev *sd_tuner;
618d2370f8eSHans Verkuil 	struct v4l2_ctrl_handler ctrl_handler;
619d2370f8eSHans Verkuil 	struct v4l2_ctrl_handler radio_ctrl_handler;
62088b6ffedSHans Verkuil 	struct cx2341x_handler mpeg_ctrl_handler;
6210c0d06caSMauro Carvalho Chehab 
6220c0d06caSMauro Carvalho Chehab 	struct work_struct wq_trigger;		/* Trigger to start/stop audio for alsa module */
6230c0d06caSMauro Carvalho Chehab 	atomic_t	   stream_started;	/* stream should be running if true */
6240c0d06caSMauro Carvalho Chehab 
6250c0d06caSMauro Carvalho Chehab 	struct list_head devlist;
6260c0d06caSMauro Carvalho Chehab 
6270c0d06caSMauro Carvalho Chehab 	int tuner_type;		/* type of the tuner */
6280c0d06caSMauro Carvalho Chehab 	int tuner_addr;		/* tuner address */
6290c0d06caSMauro Carvalho Chehab 
6300c0d06caSMauro Carvalho Chehab 	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
6310c0d06caSMauro Carvalho Chehab 	struct cx231xx_i2c i2c_bus[3];
63205e0dfd0SPeter Rosin 	struct i2c_mux_core *muxc;
63315c212ddSMatthias Schwarzott 	struct i2c_adapter *i2c_mux_adap[2];
63415c212ddSMatthias Schwarzott 
6350c0d06caSMauro Carvalho Chehab 	unsigned int xc_fw_load_done:1;
636a1f26765SMatthias Schwarzott 	unsigned int port_3_switch_enabled:1;
6370c0d06caSMauro Carvalho Chehab 	/* locks */
6380c0d06caSMauro Carvalho Chehab 	struct mutex gpio_i2c_lock;
6390c0d06caSMauro Carvalho Chehab 	struct mutex i2c_lock;
6400c0d06caSMauro Carvalho Chehab 
6410c0d06caSMauro Carvalho Chehab 	/* video for linux */
6420c0d06caSMauro Carvalho Chehab 	int users;		/* user count for exclusive use */
64360acf187SHans Verkuil 	struct video_device vdev;	/* video for linux device struct */
6440c0d06caSMauro Carvalho Chehab 	v4l2_std_id norm;	/* selected tv norm */
6450c0d06caSMauro Carvalho Chehab 	int ctl_freq;		/* selected frequency */
6460c0d06caSMauro Carvalho Chehab 	unsigned int ctl_ainput;	/* selected audio input */
6470c0d06caSMauro Carvalho Chehab 
6480c0d06caSMauro Carvalho Chehab 	/* frame properties */
6490c0d06caSMauro Carvalho Chehab 	int width;		/* current frame width */
6500c0d06caSMauro Carvalho Chehab 	int height;		/* current frame height */
6510c0d06caSMauro Carvalho Chehab 	int interlaced;		/* 1=interlace fileds, 0=just top fileds */
6520c0d06caSMauro Carvalho Chehab 
6530c0d06caSMauro Carvalho Chehab 	struct cx231xx_audio adev;
6540c0d06caSMauro Carvalho Chehab 
6550c0d06caSMauro Carvalho Chehab 	/* states */
6560c0d06caSMauro Carvalho Chehab 	enum cx231xx_dev_state state;
6570c0d06caSMauro Carvalho Chehab 
6580c0d06caSMauro Carvalho Chehab 	struct work_struct request_module_wk;
6590c0d06caSMauro Carvalho Chehab 
6600c0d06caSMauro Carvalho Chehab 	/* locks */
6610c0d06caSMauro Carvalho Chehab 	struct mutex lock;
6620c0d06caSMauro Carvalho Chehab 	struct mutex ctrl_urb_lock;	/* protects urb_buf */
6630c0d06caSMauro Carvalho Chehab 	struct list_head inqueue, outqueue;
6640c0d06caSMauro Carvalho Chehab 	wait_queue_head_t open, wait_frame, wait_stream;
66560acf187SHans Verkuil 	struct video_device vbi_dev;
66660acf187SHans Verkuil 	struct video_device radio_dev;
6670c0d06caSMauro Carvalho Chehab 
6681d058bdcSMauro Carvalho Chehab #if defined(CONFIG_MEDIA_CONTROLLER)
6691d058bdcSMauro Carvalho Chehab 	struct media_device *media_dev;
670b6a40e72SMauro Carvalho Chehab 	struct media_pad video_pad, vbi_pad;
6716168309aSMauro Carvalho Chehab 	struct media_entity input_ent[MAX_CX231XX_INPUT];
6726168309aSMauro Carvalho Chehab 	struct media_pad input_pad[MAX_CX231XX_INPUT];
6731d058bdcSMauro Carvalho Chehab #endif
6741d058bdcSMauro Carvalho Chehab 
6750c0d06caSMauro Carvalho Chehab 	unsigned char eedata[256];
6760c0d06caSMauro Carvalho Chehab 
6770c0d06caSMauro Carvalho Chehab 	struct cx231xx_video_mode video_mode;
6780c0d06caSMauro Carvalho Chehab 	struct cx231xx_video_mode vbi_mode;
6790c0d06caSMauro Carvalho Chehab 	struct cx231xx_video_mode sliced_cc_mode;
6800c0d06caSMauro Carvalho Chehab 	struct cx231xx_video_mode ts1_mode;
6810c0d06caSMauro Carvalho Chehab 
6820c0d06caSMauro Carvalho Chehab 	atomic_t devlist_count;
6830c0d06caSMauro Carvalho Chehab 
6840c0d06caSMauro Carvalho Chehab 	struct usb_device *udev;	/* the usb device */
6850c0d06caSMauro Carvalho Chehab 	char urb_buf[URB_MAX_CTRL_SIZE];	/* urb control msg buffer */
6860c0d06caSMauro Carvalho Chehab 
6870c0d06caSMauro Carvalho Chehab 	/* helper funcs that call usb_control_msg */
6880c0d06caSMauro Carvalho Chehab 	int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
6890c0d06caSMauro Carvalho Chehab 				      char *buf, int len);
6900c0d06caSMauro Carvalho Chehab 	int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
6910c0d06caSMauro Carvalho Chehab 				       char *buf, int len);
6920c0d06caSMauro Carvalho Chehab 	int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
6930c0d06caSMauro Carvalho Chehab 				struct cx231xx_i2c_xfer_data *req_data);
6940c0d06caSMauro Carvalho Chehab 	int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
6950c0d06caSMauro Carvalho Chehab 				      u8 *buf, u8 len);
6960c0d06caSMauro Carvalho Chehab 	int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
6970c0d06caSMauro Carvalho Chehab 				       u8 *buf, u8 len);
6980c0d06caSMauro Carvalho Chehab 
6990c0d06caSMauro Carvalho Chehab 	int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
7000c0d06caSMauro Carvalho Chehab 	int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
7010c0d06caSMauro Carvalho Chehab 
7020c0d06caSMauro Carvalho Chehab 	enum cx231xx_mode mode;
7030c0d06caSMauro Carvalho Chehab 
7040c0d06caSMauro Carvalho Chehab 	struct cx231xx_dvb *dvb;
7050c0d06caSMauro Carvalho Chehab 
7060c0d06caSMauro Carvalho Chehab 	/* Cx231xx supported PCB config's */
7070c0d06caSMauro Carvalho Chehab 	struct pcb_config current_pcb_config;
7080c0d06caSMauro Carvalho Chehab 	u8 current_scenario_idx;
7090c0d06caSMauro Carvalho Chehab 	u8 interface_count;
7100c0d06caSMauro Carvalho Chehab 	u8 max_iad_interface_count;
7110c0d06caSMauro Carvalho Chehab 
7120c0d06caSMauro Carvalho Chehab 	/* GPIO related register direction and values */
7130c0d06caSMauro Carvalho Chehab 	u32 gpio_dir;
7140c0d06caSMauro Carvalho Chehab 	u32 gpio_val;
7150c0d06caSMauro Carvalho Chehab 
7160c0d06caSMauro Carvalho Chehab 	/* Power Modes */
7170c0d06caSMauro Carvalho Chehab 	int power_mode;
7180c0d06caSMauro Carvalho Chehab 
7190c0d06caSMauro Carvalho Chehab 	/* afe parameters */
7200c0d06caSMauro Carvalho Chehab 	enum AFE_MODE afe_mode;
7210c0d06caSMauro Carvalho Chehab 	u32 afe_ref_count;
7220c0d06caSMauro Carvalho Chehab 
7230c0d06caSMauro Carvalho Chehab 	/* video related parameters */
7240c0d06caSMauro Carvalho Chehab 	u32 video_input;
7250c0d06caSMauro Carvalho Chehab 	u32 active_mode;
7260c0d06caSMauro Carvalho Chehab 	u8 vbi_or_sliced_cc_mode;	/* 0 - vbi ; 1 - sliced cc mode */
7270c0d06caSMauro Carvalho Chehab 	enum cx231xx_std_mode std_mode;	/* 0 - Air; 1 - cable */
7280c0d06caSMauro Carvalho Chehab 
7290c0d06caSMauro Carvalho Chehab 	/*mode: digital=1 or analog=0*/
7300c0d06caSMauro Carvalho Chehab 	u8 mode_tv;
7310c0d06caSMauro Carvalho Chehab 
7320c0d06caSMauro Carvalho Chehab 	u8 USE_ISO;
7330c0d06caSMauro Carvalho Chehab 	struct cx231xx_tvnorm      encodernorm;
7340c0d06caSMauro Carvalho Chehab 	struct cx231xx_tsport      ts1, ts2;
73560acf187SHans Verkuil 	struct video_device        v4l_device;
7360c0d06caSMauro Carvalho Chehab 	atomic_t                   v4l_reader_count;
7370c0d06caSMauro Carvalho Chehab 	u32                        freq;
7380c0d06caSMauro Carvalho Chehab 	unsigned int               input;
7390c0d06caSMauro Carvalho Chehab 	u32                        cx23417_mailbox;
7400c0d06caSMauro Carvalho Chehab 	u32                        __iomem *lmmio;
7410c0d06caSMauro Carvalho Chehab 	u8                         __iomem *bmmio;
7420c0d06caSMauro Carvalho Chehab };
7430c0d06caSMauro Carvalho Chehab 
7440c0d06caSMauro Carvalho Chehab extern struct list_head cx231xx_devlist;
7450c0d06caSMauro Carvalho Chehab 
7460c0d06caSMauro Carvalho Chehab #define cx25840_call(cx231xx, o, f, args...) \
7470c0d06caSMauro Carvalho Chehab 	v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
7480c0d06caSMauro Carvalho Chehab #define tuner_call(cx231xx, o, f, args...) \
7490c0d06caSMauro Carvalho Chehab 	v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
7500c0d06caSMauro Carvalho Chehab #define call_all(dev, o, f, args...) \
7510c0d06caSMauro Carvalho Chehab 	v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
7520c0d06caSMauro Carvalho Chehab 
7530c0d06caSMauro Carvalho Chehab struct cx231xx_ops {
7540c0d06caSMauro Carvalho Chehab 	struct list_head next;
7550c0d06caSMauro Carvalho Chehab 	char *name;
7560c0d06caSMauro Carvalho Chehab 	int id;
7570c0d06caSMauro Carvalho Chehab 	int (*init) (struct cx231xx *);
7580c0d06caSMauro Carvalho Chehab 	int (*fini) (struct cx231xx *);
7590c0d06caSMauro Carvalho Chehab };
7600c0d06caSMauro Carvalho Chehab 
7610c0d06caSMauro Carvalho Chehab /* call back functions in dvb module */
7620c0d06caSMauro Carvalho Chehab int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
7630c0d06caSMauro Carvalho Chehab int cx231xx_reset_analog_tuner(struct cx231xx *dev);
7640c0d06caSMauro Carvalho Chehab 
7650c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-i2c.c */
7667c894a3bSMatthias Schwarzott void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port);
7670c0d06caSMauro Carvalho Chehab int cx231xx_i2c_register(struct cx231xx_i2c *bus);
76822469022SPeter Rosin void cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
76905e0dfd0SPeter Rosin int cx231xx_i2c_mux_create(struct cx231xx *dev);
77015c212ddSMatthias Schwarzott int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no);
77105e0dfd0SPeter Rosin void cx231xx_i2c_mux_unregister(struct cx231xx *dev);
772c3c3f1aeSMatthias Schwarzott struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port);
7730c0d06caSMauro Carvalho Chehab 
7740c0d06caSMauro Carvalho Chehab /* Internal block control functions */
7750c0d06caSMauro Carvalho Chehab int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
7760c0d06caSMauro Carvalho Chehab 		 u8 saddr_len, u32 *data, u8 data_len, int master);
7770c0d06caSMauro Carvalho Chehab int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
7780c0d06caSMauro Carvalho Chehab 		 u8 saddr_len, u32 data, u8 data_len, int master);
7790c0d06caSMauro Carvalho Chehab int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
7800c0d06caSMauro Carvalho Chehab 			  u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
7810c0d06caSMauro Carvalho Chehab int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
7820c0d06caSMauro Carvalho Chehab 			   u16 saddr, u8 saddr_len, u32 data, u8 data_len);
7830c0d06caSMauro Carvalho Chehab int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
7840c0d06caSMauro Carvalho Chehab 			   u16 register_address, u8 bit_start, u8 bit_end,
7850c0d06caSMauro Carvalho Chehab 			   u32 value);
7860c0d06caSMauro Carvalho Chehab int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
7870c0d06caSMauro Carvalho Chehab 					u16 saddr, u32 mask, u32 value);
7880c0d06caSMauro Carvalho Chehab u32 cx231xx_set_field(u32 field_mask, u32 data);
7890c0d06caSMauro Carvalho Chehab 
7900c0d06caSMauro Carvalho Chehab /*verve r/w*/
7910c0d06caSMauro Carvalho Chehab void initGPIO(struct cx231xx *dev);
7920c0d06caSMauro Carvalho Chehab void uninitGPIO(struct cx231xx *dev);
7930c0d06caSMauro Carvalho Chehab /* afe related functions */
7940c0d06caSMauro Carvalho Chehab int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
7950c0d06caSMauro Carvalho Chehab int cx231xx_afe_init_channels(struct cx231xx *dev);
7960c0d06caSMauro Carvalho Chehab int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
7970c0d06caSMauro Carvalho Chehab int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
7980c0d06caSMauro Carvalho Chehab int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
7990c0d06caSMauro Carvalho Chehab int cx231xx_afe_update_power_control(struct cx231xx *dev,
8000c0d06caSMauro Carvalho Chehab 					enum AV_MODE avmode);
8010c0d06caSMauro Carvalho Chehab int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
8020c0d06caSMauro Carvalho Chehab 
8030c0d06caSMauro Carvalho Chehab /* i2s block related functions */
8040c0d06caSMauro Carvalho Chehab int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
8050c0d06caSMauro Carvalho Chehab int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
8060c0d06caSMauro Carvalho Chehab 					enum AV_MODE avmode);
8070c0d06caSMauro Carvalho Chehab int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
8080c0d06caSMauro Carvalho Chehab 
8090c0d06caSMauro Carvalho Chehab /* DIF related functions */
8100c0d06caSMauro Carvalho Chehab int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
8110c0d06caSMauro Carvalho Chehab 					  u32 function_mode, u32 standard);
8120c0d06caSMauro Carvalho Chehab void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
8130c0d06caSMauro Carvalho Chehab 					 u8 spectral_invert, u32 mode);
8140c0d06caSMauro Carvalho Chehab u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
8150c0d06caSMauro Carvalho Chehab void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
8160c0d06caSMauro Carvalho Chehab 					 u8 spectral_invert, u32 mode);
8170c0d06caSMauro Carvalho Chehab void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
8180c0d06caSMauro Carvalho Chehab void reset_s5h1432_demod(struct cx231xx *dev);
8190c0d06caSMauro Carvalho Chehab void cx231xx_dump_HH_reg(struct cx231xx *dev);
8200c0d06caSMauro Carvalho Chehab void update_HH_register_after_set_DIF(struct cx231xx *dev);
8210c0d06caSMauro Carvalho Chehab 
8220c0d06caSMauro Carvalho Chehab 
8230c0d06caSMauro Carvalho Chehab 
8240c0d06caSMauro Carvalho Chehab int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
8250c0d06caSMauro Carvalho Chehab int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
8260c0d06caSMauro Carvalho Chehab int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
8270c0d06caSMauro Carvalho Chehab 
8280c0d06caSMauro Carvalho Chehab /* video parser functions */
8290c0d06caSMauro Carvalho Chehab u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
8300c0d06caSMauro Carvalho Chehab 			     u32 *p_bytes_used);
8310c0d06caSMauro Carvalho Chehab u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
8320c0d06caSMauro Carvalho Chehab 				 u32 *p_bytes_used);
8330c0d06caSMauro Carvalho Chehab int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
8340c0d06caSMauro Carvalho Chehab 		    u8 *p_buffer, u32 bytes_to_copy);
8350c0d06caSMauro Carvalho Chehab void cx231xx_reset_video_buffer(struct cx231xx *dev,
8360c0d06caSMauro Carvalho Chehab 				struct cx231xx_dmaqueue *dma_q);
8370c0d06caSMauro Carvalho Chehab u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
8380c0d06caSMauro Carvalho Chehab u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
8390c0d06caSMauro Carvalho Chehab 			    u8 *p_line, u32 length, int field_number);
8400c0d06caSMauro Carvalho Chehab u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
8410c0d06caSMauro Carvalho Chehab 			   u8 sav_eav, u8 *p_buffer, u32 buffer_size);
8420c0d06caSMauro Carvalho Chehab void cx231xx_swab(u16 *from, u16 *to, u16 len);
8430c0d06caSMauro Carvalho Chehab 
8440c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-core.c */
8450c0d06caSMauro Carvalho Chehab 
8460c0d06caSMauro Carvalho Chehab u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
8470c0d06caSMauro Carvalho Chehab void cx231xx_queue_unusedframes(struct cx231xx *dev);
8480c0d06caSMauro Carvalho Chehab void cx231xx_release_buffers(struct cx231xx *dev);
8490c0d06caSMauro Carvalho Chehab 
8500c0d06caSMauro Carvalho Chehab /* read from control pipe */
8510c0d06caSMauro Carvalho Chehab int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
8520c0d06caSMauro Carvalho Chehab 			  char *buf, int len);
8530c0d06caSMauro Carvalho Chehab 
8540c0d06caSMauro Carvalho Chehab /* write to control pipe */
8550c0d06caSMauro Carvalho Chehab int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
8560c0d06caSMauro Carvalho Chehab 			   char *buf, int len);
8570c0d06caSMauro Carvalho Chehab int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
8580c0d06caSMauro Carvalho Chehab 
8590c0d06caSMauro Carvalho Chehab int cx231xx_send_vendor_cmd(struct cx231xx *dev,
8600c0d06caSMauro Carvalho Chehab 				struct VENDOR_REQUEST_IN *ven_req);
8610c0d06caSMauro Carvalho Chehab int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
8620c0d06caSMauro Carvalho Chehab 				struct cx231xx_i2c_xfer_data *req_data);
8630c0d06caSMauro Carvalho Chehab 
8640c0d06caSMauro Carvalho Chehab /* Gpio related functions */
8650c0d06caSMauro Carvalho Chehab int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
8660c0d06caSMauro Carvalho Chehab 			  u8 len, u8 request, u8 direction);
8670c0d06caSMauro Carvalho Chehab int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
8680c0d06caSMauro Carvalho Chehab int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
8690c0d06caSMauro Carvalho Chehab 			       int pin_value);
8700c0d06caSMauro Carvalho Chehab 
8710c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_start(struct cx231xx *dev);
8720c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_end(struct cx231xx *dev);
8730c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
8740c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
8750c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
8760c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
8770c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
8780c0d06caSMauro Carvalho Chehab 
8790c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
8800c0d06caSMauro Carvalho Chehab int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
8810c0d06caSMauro Carvalho Chehab 
8820c0d06caSMauro Carvalho Chehab /* audio related functions */
8830c0d06caSMauro Carvalho Chehab int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
8840c0d06caSMauro Carvalho Chehab 				    enum AUDIO_INPUT audio_input);
8850c0d06caSMauro Carvalho Chehab 
8860c0d06caSMauro Carvalho Chehab int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
8870c0d06caSMauro Carvalho Chehab int cx231xx_set_video_alternate(struct cx231xx *dev);
8880c0d06caSMauro Carvalho Chehab int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
8890c0d06caSMauro Carvalho Chehab int is_fw_load(struct cx231xx *dev);
8900c0d06caSMauro Carvalho Chehab int cx231xx_check_fw(struct cx231xx *dev);
8910c0d06caSMauro Carvalho Chehab int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
8920c0d06caSMauro Carvalho Chehab 		      int num_bufs, int max_pkt_size,
8930c0d06caSMauro Carvalho Chehab 		      int (*isoc_copy) (struct cx231xx *dev,
8940c0d06caSMauro Carvalho Chehab 					struct urb *urb));
8950c0d06caSMauro Carvalho Chehab int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
8960c0d06caSMauro Carvalho Chehab 		      int num_bufs, int max_pkt_size,
8970c0d06caSMauro Carvalho Chehab 		      int (*bulk_copy) (struct cx231xx *dev,
8980c0d06caSMauro Carvalho Chehab 					struct urb *urb));
8990c0d06caSMauro Carvalho Chehab void cx231xx_stop_TS1(struct cx231xx *dev);
9000c0d06caSMauro Carvalho Chehab void cx231xx_start_TS1(struct cx231xx *dev);
9010c0d06caSMauro Carvalho Chehab void cx231xx_uninit_isoc(struct cx231xx *dev);
9020c0d06caSMauro Carvalho Chehab void cx231xx_uninit_bulk(struct cx231xx *dev);
9030c0d06caSMauro Carvalho Chehab int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
9040c0d06caSMauro Carvalho Chehab int cx231xx_unmute_audio(struct cx231xx *dev);
9050c0d06caSMauro Carvalho Chehab int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
9060c0d06caSMauro Carvalho Chehab void cx231xx_disable656(struct cx231xx *dev);
9070c0d06caSMauro Carvalho Chehab void cx231xx_enable656(struct cx231xx *dev);
9080c0d06caSMauro Carvalho Chehab int cx231xx_demod_reset(struct cx231xx *dev);
9090c0d06caSMauro Carvalho Chehab int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
9100c0d06caSMauro Carvalho Chehab 
9110c0d06caSMauro Carvalho Chehab /* Device list functions */
9120c0d06caSMauro Carvalho Chehab void cx231xx_release_resources(struct cx231xx *dev);
9130c0d06caSMauro Carvalho Chehab void cx231xx_release_analog_resources(struct cx231xx *dev);
9140c0d06caSMauro Carvalho Chehab int cx231xx_register_analog_devices(struct cx231xx *dev);
9150c0d06caSMauro Carvalho Chehab void cx231xx_remove_from_devlist(struct cx231xx *dev);
9160c0d06caSMauro Carvalho Chehab void cx231xx_add_into_devlist(struct cx231xx *dev);
9170c0d06caSMauro Carvalho Chehab void cx231xx_init_extension(struct cx231xx *dev);
9180c0d06caSMauro Carvalho Chehab void cx231xx_close_extension(struct cx231xx *dev);
9190c0d06caSMauro Carvalho Chehab 
9200c0d06caSMauro Carvalho Chehab /* hardware init functions */
9210c0d06caSMauro Carvalho Chehab int cx231xx_dev_init(struct cx231xx *dev);
9220c0d06caSMauro Carvalho Chehab void cx231xx_dev_uninit(struct cx231xx *dev);
9230c0d06caSMauro Carvalho Chehab void cx231xx_config_i2c(struct cx231xx *dev);
9240c0d06caSMauro Carvalho Chehab int cx231xx_config(struct cx231xx *dev);
9250c0d06caSMauro Carvalho Chehab 
9260c0d06caSMauro Carvalho Chehab /* Stream control functions */
9270c0d06caSMauro Carvalho Chehab int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
9280c0d06caSMauro Carvalho Chehab int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
9290c0d06caSMauro Carvalho Chehab 
9300c0d06caSMauro Carvalho Chehab int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
9310c0d06caSMauro Carvalho Chehab 
9320c0d06caSMauro Carvalho Chehab /* Power control functions */
9330c0d06caSMauro Carvalho Chehab int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
9340c0d06caSMauro Carvalho Chehab int cx231xx_power_suspend(struct cx231xx *dev);
9350c0d06caSMauro Carvalho Chehab 
9360c0d06caSMauro Carvalho Chehab /* chip specific control functions */
9370c0d06caSMauro Carvalho Chehab int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
9380c0d06caSMauro Carvalho Chehab int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
9390c0d06caSMauro Carvalho Chehab 					      u8 analog_or_digital);
9400c0d06caSMauro Carvalho Chehab int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
9410c0d06caSMauro Carvalho Chehab 
9420c0d06caSMauro Carvalho Chehab /* video audio decoder related functions */
9430c0d06caSMauro Carvalho Chehab void video_mux(struct cx231xx *dev, int index);
9440c0d06caSMauro Carvalho Chehab int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
9450c0d06caSMauro Carvalho Chehab int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
9460c0d06caSMauro Carvalho Chehab int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
9470c0d06caSMauro Carvalho Chehab int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
9480c0d06caSMauro Carvalho Chehab 
9490c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-video.c */
9500c0d06caSMauro Carvalho Chehab int cx231xx_register_extension(struct cx231xx_ops *dev);
9510c0d06caSMauro Carvalho Chehab void cx231xx_unregister_extension(struct cx231xx_ops *dev);
9520c0d06caSMauro Carvalho Chehab void cx231xx_init_extension(struct cx231xx *dev);
9530c0d06caSMauro Carvalho Chehab void cx231xx_close_extension(struct cx231xx *dev);
9546168309aSMauro Carvalho Chehab void cx231xx_v4l2_create_entities(struct cx231xx *dev);
955bc08734cSHans Verkuil int cx231xx_querycap(struct file *file, void *priv,
956bc08734cSHans Verkuil 			   struct v4l2_capability *cap);
957b86d1544SHans Verkuil int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
9582f73c7c5SHans Verkuil int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
959b86d1544SHans Verkuil int cx231xx_g_frequency(struct file *file, void *priv,
960b86d1544SHans Verkuil 			      struct v4l2_frequency *f);
961b86d1544SHans Verkuil int cx231xx_s_frequency(struct file *file, void *priv,
962b530a447SHans Verkuil 			      const struct v4l2_frequency *f);
963b86d1544SHans Verkuil int cx231xx_enum_input(struct file *file, void *priv,
964b86d1544SHans Verkuil 			     struct v4l2_input *i);
965b86d1544SHans Verkuil int cx231xx_g_input(struct file *file, void *priv, unsigned int *i);
966b86d1544SHans Verkuil int cx231xx_s_input(struct file *file, void *priv, unsigned int i);
96708fe9f7dSHans Verkuil int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip);
968b86d1544SHans Verkuil int cx231xx_g_register(struct file *file, void *priv,
969b86d1544SHans Verkuil 			     struct v4l2_dbg_register *reg);
970b86d1544SHans Verkuil int cx231xx_s_register(struct file *file, void *priv,
971977ba3b1SHans Verkuil 			     const struct v4l2_dbg_register *reg);
9720c0d06caSMauro Carvalho Chehab 
9730c0d06caSMauro Carvalho Chehab /* Provided by cx231xx-cards.c */
9740c0d06caSMauro Carvalho Chehab extern void cx231xx_pre_card_setup(struct cx231xx *dev);
9750c0d06caSMauro Carvalho Chehab extern void cx231xx_card_setup(struct cx231xx *dev);
9760c0d06caSMauro Carvalho Chehab extern struct cx231xx_board cx231xx_boards[];
9770c0d06caSMauro Carvalho Chehab extern struct usb_device_id cx231xx_id_table[];
9780c0d06caSMauro Carvalho Chehab extern const unsigned int cx231xx_bcount;
9790c0d06caSMauro Carvalho Chehab int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
9800c0d06caSMauro Carvalho Chehab 
9810c0d06caSMauro Carvalho Chehab /* cx23885-417.c                                               */
9820c0d06caSMauro Carvalho Chehab extern int cx231xx_417_register(struct cx231xx *dev);
9830c0d06caSMauro Carvalho Chehab extern void cx231xx_417_unregister(struct cx231xx *dev);
9840c0d06caSMauro Carvalho Chehab 
9850c0d06caSMauro Carvalho Chehab /* cx23885-input.c                                             */
9860c0d06caSMauro Carvalho Chehab 
9870c0d06caSMauro Carvalho Chehab #if defined(CONFIG_VIDEO_CX231XX_RC)
9880c0d06caSMauro Carvalho Chehab int cx231xx_ir_init(struct cx231xx *dev);
9890c0d06caSMauro Carvalho Chehab void cx231xx_ir_exit(struct cx231xx *dev);
9900c0d06caSMauro Carvalho Chehab #else
99127eb5e24SHans Verkuil static inline int cx231xx_ir_init(struct cx231xx *dev)
99227eb5e24SHans Verkuil {
99327eb5e24SHans Verkuil 	return 0;
99427eb5e24SHans Verkuil }
99527eb5e24SHans Verkuil static inline void cx231xx_ir_exit(struct cx231xx *dev) {}
9960c0d06caSMauro Carvalho Chehab #endif
9970c0d06caSMauro Carvalho Chehab 
9980c0d06caSMauro Carvalho Chehab static inline unsigned int norm_maxw(struct cx231xx *dev)
9990c0d06caSMauro Carvalho Chehab {
10000c0d06caSMauro Carvalho Chehab 	if (dev->board.max_range_640_480)
10010c0d06caSMauro Carvalho Chehab 		return 640;
10020c0d06caSMauro Carvalho Chehab 	else
10030c0d06caSMauro Carvalho Chehab 		return 720;
10040c0d06caSMauro Carvalho Chehab }
10050c0d06caSMauro Carvalho Chehab 
10060c0d06caSMauro Carvalho Chehab static inline unsigned int norm_maxh(struct cx231xx *dev)
10070c0d06caSMauro Carvalho Chehab {
10080c0d06caSMauro Carvalho Chehab 	if (dev->board.max_range_640_480)
10090c0d06caSMauro Carvalho Chehab 		return 480;
10100c0d06caSMauro Carvalho Chehab 	else
10110c0d06caSMauro Carvalho Chehab 		return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
10120c0d06caSMauro Carvalho Chehab }
10130c0d06caSMauro Carvalho Chehab #endif
1014