1f9f51c2cSAkihiro Tsukada // SPDX-License-Identifier: GPL-2.0
2aff0c42aSAkihiro Tsukada /*
3aff0c42aSAkihiro Tsukada * MaxLinear MxL301RF OFDM tuner driver
4aff0c42aSAkihiro Tsukada *
5aff0c42aSAkihiro Tsukada * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
6aff0c42aSAkihiro Tsukada */
7aff0c42aSAkihiro Tsukada
8aff0c42aSAkihiro Tsukada /*
9aff0c42aSAkihiro Tsukada * NOTICE:
10aff0c42aSAkihiro Tsukada * This driver is incomplete and lacks init/config of the chips,
11aff0c42aSAkihiro Tsukada * as the necessary info is not disclosed.
12aff0c42aSAkihiro Tsukada * Other features like get_if_frequency() are missing as well.
13aff0c42aSAkihiro Tsukada * It assumes that users of this driver (such as a PCI bridge of
14aff0c42aSAkihiro Tsukada * DTV receiver cards) properly init and configure the chip
15aff0c42aSAkihiro Tsukada * via I2C *before* calling this driver's init() function.
16aff0c42aSAkihiro Tsukada *
17aff0c42aSAkihiro Tsukada * Currently, PT3 driver is the only one that uses this driver,
18aff0c42aSAkihiro Tsukada * and contains init/config code in its firmware.
19aff0c42aSAkihiro Tsukada * Thus some part of the code might be dependent on PT3 specific config.
20aff0c42aSAkihiro Tsukada */
21aff0c42aSAkihiro Tsukada
22aff0c42aSAkihiro Tsukada #include <linux/kernel.h>
23aff0c42aSAkihiro Tsukada #include "mxl301rf.h"
24aff0c42aSAkihiro Tsukada
25aff0c42aSAkihiro Tsukada struct mxl301rf_state {
26aff0c42aSAkihiro Tsukada struct mxl301rf_config cfg;
27aff0c42aSAkihiro Tsukada struct i2c_client *i2c;
28aff0c42aSAkihiro Tsukada };
29aff0c42aSAkihiro Tsukada
cfg_to_state(struct mxl301rf_config * c)30aff0c42aSAkihiro Tsukada static struct mxl301rf_state *cfg_to_state(struct mxl301rf_config *c)
31aff0c42aSAkihiro Tsukada {
32aff0c42aSAkihiro Tsukada return container_of(c, struct mxl301rf_state, cfg);
33aff0c42aSAkihiro Tsukada }
34aff0c42aSAkihiro Tsukada
raw_write(struct mxl301rf_state * state,const u8 * buf,int len)35aff0c42aSAkihiro Tsukada static int raw_write(struct mxl301rf_state *state, const u8 *buf, int len)
36aff0c42aSAkihiro Tsukada {
37aff0c42aSAkihiro Tsukada int ret;
38aff0c42aSAkihiro Tsukada
39aff0c42aSAkihiro Tsukada ret = i2c_master_send(state->i2c, buf, len);
40aff0c42aSAkihiro Tsukada if (ret >= 0 && ret < len)
41aff0c42aSAkihiro Tsukada ret = -EIO;
42aff0c42aSAkihiro Tsukada return (ret == len) ? 0 : ret;
43aff0c42aSAkihiro Tsukada }
44aff0c42aSAkihiro Tsukada
reg_write(struct mxl301rf_state * state,u8 reg,u8 val)45aff0c42aSAkihiro Tsukada static int reg_write(struct mxl301rf_state *state, u8 reg, u8 val)
46aff0c42aSAkihiro Tsukada {
47aff0c42aSAkihiro Tsukada u8 buf[2] = { reg, val };
48aff0c42aSAkihiro Tsukada
49aff0c42aSAkihiro Tsukada return raw_write(state, buf, 2);
50aff0c42aSAkihiro Tsukada }
51aff0c42aSAkihiro Tsukada
reg_read(struct mxl301rf_state * state,u8 reg,u8 * val)52aff0c42aSAkihiro Tsukada static int reg_read(struct mxl301rf_state *state, u8 reg, u8 *val)
53aff0c42aSAkihiro Tsukada {
54aff0c42aSAkihiro Tsukada u8 wbuf[2] = { 0xfb, reg };
55aff0c42aSAkihiro Tsukada int ret;
56aff0c42aSAkihiro Tsukada
57aff0c42aSAkihiro Tsukada ret = raw_write(state, wbuf, sizeof(wbuf));
58aff0c42aSAkihiro Tsukada if (ret == 0)
59aff0c42aSAkihiro Tsukada ret = i2c_master_recv(state->i2c, val, 1);
60aff0c42aSAkihiro Tsukada if (ret >= 0 && ret < 1)
61aff0c42aSAkihiro Tsukada ret = -EIO;
62aff0c42aSAkihiro Tsukada return (ret == 1) ? 0 : ret;
63aff0c42aSAkihiro Tsukada }
64aff0c42aSAkihiro Tsukada
65aff0c42aSAkihiro Tsukada /* tuner_ops */
66aff0c42aSAkihiro Tsukada
67aff0c42aSAkihiro Tsukada /* get RSSI and update propery cache, set to *out in % */
mxl301rf_get_rf_strength(struct dvb_frontend * fe,u16 * out)68aff0c42aSAkihiro Tsukada static int mxl301rf_get_rf_strength(struct dvb_frontend *fe, u16 *out)
69aff0c42aSAkihiro Tsukada {
70aff0c42aSAkihiro Tsukada struct mxl301rf_state *state;
71aff0c42aSAkihiro Tsukada int ret;
72aff0c42aSAkihiro Tsukada u8 rf_in1, rf_in2, rf_off1, rf_off2;
73aff0c42aSAkihiro Tsukada u16 rf_in, rf_off;
74aff0c42aSAkihiro Tsukada s64 level;
75aff0c42aSAkihiro Tsukada struct dtv_fe_stats *rssi;
76aff0c42aSAkihiro Tsukada
77aff0c42aSAkihiro Tsukada rssi = &fe->dtv_property_cache.strength;
78aff0c42aSAkihiro Tsukada rssi->len = 1;
79aff0c42aSAkihiro Tsukada rssi->stat[0].scale = FE_SCALE_NOT_AVAILABLE;
80aff0c42aSAkihiro Tsukada *out = 0;
81aff0c42aSAkihiro Tsukada
82aff0c42aSAkihiro Tsukada state = fe->tuner_priv;
83aff0c42aSAkihiro Tsukada ret = reg_write(state, 0x14, 0x01);
84aff0c42aSAkihiro Tsukada if (ret < 0)
85aff0c42aSAkihiro Tsukada return ret;
86aff0c42aSAkihiro Tsukada usleep_range(1000, 2000);
87aff0c42aSAkihiro Tsukada
88aff0c42aSAkihiro Tsukada ret = reg_read(state, 0x18, &rf_in1);
89aff0c42aSAkihiro Tsukada if (ret == 0)
90aff0c42aSAkihiro Tsukada ret = reg_read(state, 0x19, &rf_in2);
91aff0c42aSAkihiro Tsukada if (ret == 0)
92aff0c42aSAkihiro Tsukada ret = reg_read(state, 0xd6, &rf_off1);
93aff0c42aSAkihiro Tsukada if (ret == 0)
94aff0c42aSAkihiro Tsukada ret = reg_read(state, 0xd7, &rf_off2);
95aff0c42aSAkihiro Tsukada if (ret != 0)
96aff0c42aSAkihiro Tsukada return ret;
97aff0c42aSAkihiro Tsukada
98aff0c42aSAkihiro Tsukada rf_in = (rf_in2 & 0x07) << 8 | rf_in1;
99aff0c42aSAkihiro Tsukada rf_off = (rf_off2 & 0x0f) << 5 | (rf_off1 >> 3);
100aff0c42aSAkihiro Tsukada level = rf_in - rf_off - (113 << 3); /* x8 dBm */
101aff0c42aSAkihiro Tsukada level = level * 1000 / 8;
102aff0c42aSAkihiro Tsukada rssi->stat[0].svalue = level;
103aff0c42aSAkihiro Tsukada rssi->stat[0].scale = FE_SCALE_DECIBEL;
104aff0c42aSAkihiro Tsukada /* *out = (level - min) * 100 / (max - min) */
105aff0c42aSAkihiro Tsukada *out = (rf_in - rf_off + (1 << 9) - 1) * 100 / ((5 << 9) - 2);
106aff0c42aSAkihiro Tsukada return 0;
107aff0c42aSAkihiro Tsukada }
108aff0c42aSAkihiro Tsukada
109aff0c42aSAkihiro Tsukada /* spur shift parameters */
110aff0c42aSAkihiro Tsukada struct shf {
111aff0c42aSAkihiro Tsukada u32 freq; /* Channel center frequency */
112aff0c42aSAkihiro Tsukada u32 ofst_th; /* Offset frequency threshold */
113aff0c42aSAkihiro Tsukada u8 shf_val; /* Spur shift value */
114aff0c42aSAkihiro Tsukada u8 shf_dir; /* Spur shift direction */
115aff0c42aSAkihiro Tsukada };
116aff0c42aSAkihiro Tsukada
117aff0c42aSAkihiro Tsukada static const struct shf shf_tab[] = {
118aff0c42aSAkihiro Tsukada { 64500, 500, 0x92, 0x07 },
119aff0c42aSAkihiro Tsukada { 191500, 300, 0xe2, 0x07 },
120aff0c42aSAkihiro Tsukada { 205500, 500, 0x2c, 0x04 },
121aff0c42aSAkihiro Tsukada { 212500, 500, 0x1e, 0x04 },
122aff0c42aSAkihiro Tsukada { 226500, 500, 0xd4, 0x07 },
123aff0c42aSAkihiro Tsukada { 99143, 500, 0x9c, 0x07 },
124aff0c42aSAkihiro Tsukada { 173143, 500, 0xd4, 0x07 },
125aff0c42aSAkihiro Tsukada { 191143, 300, 0xd4, 0x07 },
126aff0c42aSAkihiro Tsukada { 207143, 500, 0xce, 0x07 },
127aff0c42aSAkihiro Tsukada { 225143, 500, 0xce, 0x07 },
128aff0c42aSAkihiro Tsukada { 243143, 500, 0xd4, 0x07 },
129aff0c42aSAkihiro Tsukada { 261143, 500, 0xd4, 0x07 },
130aff0c42aSAkihiro Tsukada { 291143, 500, 0xd4, 0x07 },
131aff0c42aSAkihiro Tsukada { 339143, 500, 0x2c, 0x04 },
132aff0c42aSAkihiro Tsukada { 117143, 500, 0x7a, 0x07 },
133aff0c42aSAkihiro Tsukada { 135143, 300, 0x7a, 0x07 },
134aff0c42aSAkihiro Tsukada { 153143, 500, 0x01, 0x07 }
135aff0c42aSAkihiro Tsukada };
136aff0c42aSAkihiro Tsukada
137aff0c42aSAkihiro Tsukada struct reg_val {
138aff0c42aSAkihiro Tsukada u8 reg;
139aff0c42aSAkihiro Tsukada u8 val;
140aff0c42aSAkihiro Tsukada } __attribute__ ((__packed__));
141aff0c42aSAkihiro Tsukada
142aff0c42aSAkihiro Tsukada static const struct reg_val set_idac[] = {
143aff0c42aSAkihiro Tsukada { 0x0d, 0x00 },
144aff0c42aSAkihiro Tsukada { 0x0c, 0x67 },
145aff0c42aSAkihiro Tsukada { 0x6f, 0x89 },
146aff0c42aSAkihiro Tsukada { 0x70, 0x0c },
147aff0c42aSAkihiro Tsukada { 0x6f, 0x8a },
148aff0c42aSAkihiro Tsukada { 0x70, 0x0e },
149aff0c42aSAkihiro Tsukada { 0x6f, 0x8b },
150aff0c42aSAkihiro Tsukada { 0x70, 0x1c },
151aff0c42aSAkihiro Tsukada };
152aff0c42aSAkihiro Tsukada
mxl301rf_set_params(struct dvb_frontend * fe)153aff0c42aSAkihiro Tsukada static int mxl301rf_set_params(struct dvb_frontend *fe)
154aff0c42aSAkihiro Tsukada {
155aff0c42aSAkihiro Tsukada struct reg_val tune0[] = {
156aff0c42aSAkihiro Tsukada { 0x13, 0x00 }, /* abort tuning */
157aff0c42aSAkihiro Tsukada { 0x3b, 0xc0 },
158aff0c42aSAkihiro Tsukada { 0x3b, 0x80 },
159aff0c42aSAkihiro Tsukada { 0x10, 0x95 }, /* BW */
160aff0c42aSAkihiro Tsukada { 0x1a, 0x05 },
161aff0c42aSAkihiro Tsukada { 0x61, 0x00 }, /* spur shift value (placeholder) */
162aff0c42aSAkihiro Tsukada { 0x62, 0xa0 } /* spur shift direction (placeholder) */
163aff0c42aSAkihiro Tsukada };
164aff0c42aSAkihiro Tsukada
165aff0c42aSAkihiro Tsukada struct reg_val tune1[] = {
166aff0c42aSAkihiro Tsukada { 0x11, 0x40 }, /* RF frequency L (placeholder) */
167aff0c42aSAkihiro Tsukada { 0x12, 0x0e }, /* RF frequency H (placeholder) */
168aff0c42aSAkihiro Tsukada { 0x13, 0x01 } /* start tune */
169aff0c42aSAkihiro Tsukada };
170aff0c42aSAkihiro Tsukada
171aff0c42aSAkihiro Tsukada struct mxl301rf_state *state;
172aff0c42aSAkihiro Tsukada u32 freq;
173aff0c42aSAkihiro Tsukada u16 f;
174aff0c42aSAkihiro Tsukada u32 tmp, div;
175aff0c42aSAkihiro Tsukada int i, ret;
176aff0c42aSAkihiro Tsukada
177aff0c42aSAkihiro Tsukada state = fe->tuner_priv;
178aff0c42aSAkihiro Tsukada freq = fe->dtv_property_cache.frequency;
179aff0c42aSAkihiro Tsukada
180aff0c42aSAkihiro Tsukada /* spur shift function (for analog) */
181aff0c42aSAkihiro Tsukada for (i = 0; i < ARRAY_SIZE(shf_tab); i++) {
182aff0c42aSAkihiro Tsukada if (freq >= (shf_tab[i].freq - shf_tab[i].ofst_th) * 1000 &&
183aff0c42aSAkihiro Tsukada freq <= (shf_tab[i].freq + shf_tab[i].ofst_th) * 1000) {
184aff0c42aSAkihiro Tsukada tune0[5].val = shf_tab[i].shf_val;
185aff0c42aSAkihiro Tsukada tune0[6].val = 0xa0 | shf_tab[i].shf_dir;
186aff0c42aSAkihiro Tsukada break;
187aff0c42aSAkihiro Tsukada }
188aff0c42aSAkihiro Tsukada }
189aff0c42aSAkihiro Tsukada ret = raw_write(state, (u8 *) tune0, sizeof(tune0));
190aff0c42aSAkihiro Tsukada if (ret < 0)
191aff0c42aSAkihiro Tsukada goto failed;
192aff0c42aSAkihiro Tsukada usleep_range(3000, 4000);
193aff0c42aSAkihiro Tsukada
194aff0c42aSAkihiro Tsukada /* convert freq to 10.6 fixed point float [MHz] */
195aff0c42aSAkihiro Tsukada f = freq / 1000000;
196aff0c42aSAkihiro Tsukada tmp = freq % 1000000;
197aff0c42aSAkihiro Tsukada div = 1000000;
198aff0c42aSAkihiro Tsukada for (i = 0; i < 6; i++) {
199aff0c42aSAkihiro Tsukada f <<= 1;
200aff0c42aSAkihiro Tsukada div >>= 1;
201aff0c42aSAkihiro Tsukada if (tmp > div) {
202aff0c42aSAkihiro Tsukada tmp -= div;
203aff0c42aSAkihiro Tsukada f |= 1;
204aff0c42aSAkihiro Tsukada }
205aff0c42aSAkihiro Tsukada }
206aff0c42aSAkihiro Tsukada if (tmp > 7812)
207aff0c42aSAkihiro Tsukada f++;
208aff0c42aSAkihiro Tsukada tune1[0].val = f & 0xff;
209aff0c42aSAkihiro Tsukada tune1[1].val = f >> 8;
210aff0c42aSAkihiro Tsukada ret = raw_write(state, (u8 *) tune1, sizeof(tune1));
211aff0c42aSAkihiro Tsukada if (ret < 0)
212aff0c42aSAkihiro Tsukada goto failed;
213aff0c42aSAkihiro Tsukada msleep(31);
214aff0c42aSAkihiro Tsukada
215aff0c42aSAkihiro Tsukada ret = reg_write(state, 0x1a, 0x0d);
216aff0c42aSAkihiro Tsukada if (ret < 0)
217aff0c42aSAkihiro Tsukada goto failed;
218aff0c42aSAkihiro Tsukada ret = raw_write(state, (u8 *) set_idac, sizeof(set_idac));
219aff0c42aSAkihiro Tsukada if (ret < 0)
220aff0c42aSAkihiro Tsukada goto failed;
221aff0c42aSAkihiro Tsukada return 0;
222aff0c42aSAkihiro Tsukada
223aff0c42aSAkihiro Tsukada failed:
224aff0c42aSAkihiro Tsukada dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
225aff0c42aSAkihiro Tsukada __func__, fe->dvb->num, fe->id);
226aff0c42aSAkihiro Tsukada return ret;
227aff0c42aSAkihiro Tsukada }
228aff0c42aSAkihiro Tsukada
229aff0c42aSAkihiro Tsukada static const struct reg_val standby_data[] = {
230aff0c42aSAkihiro Tsukada { 0x01, 0x00 },
231aff0c42aSAkihiro Tsukada { 0x13, 0x00 }
232aff0c42aSAkihiro Tsukada };
233aff0c42aSAkihiro Tsukada
mxl301rf_sleep(struct dvb_frontend * fe)234aff0c42aSAkihiro Tsukada static int mxl301rf_sleep(struct dvb_frontend *fe)
235aff0c42aSAkihiro Tsukada {
236aff0c42aSAkihiro Tsukada struct mxl301rf_state *state;
237aff0c42aSAkihiro Tsukada int ret;
238aff0c42aSAkihiro Tsukada
239aff0c42aSAkihiro Tsukada state = fe->tuner_priv;
240aff0c42aSAkihiro Tsukada ret = raw_write(state, (u8 *)standby_data, sizeof(standby_data));
241aff0c42aSAkihiro Tsukada if (ret < 0)
242aff0c42aSAkihiro Tsukada dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
243aff0c42aSAkihiro Tsukada __func__, fe->dvb->num, fe->id);
244aff0c42aSAkihiro Tsukada return ret;
245aff0c42aSAkihiro Tsukada }
246aff0c42aSAkihiro Tsukada
247aff0c42aSAkihiro Tsukada
248aff0c42aSAkihiro Tsukada /* init sequence is not public.
249aff0c42aSAkihiro Tsukada * the parent must have init'ed the device.
250aff0c42aSAkihiro Tsukada * just wake up here.
251aff0c42aSAkihiro Tsukada */
mxl301rf_init(struct dvb_frontend * fe)252aff0c42aSAkihiro Tsukada static int mxl301rf_init(struct dvb_frontend *fe)
253aff0c42aSAkihiro Tsukada {
254aff0c42aSAkihiro Tsukada struct mxl301rf_state *state;
255aff0c42aSAkihiro Tsukada int ret;
256aff0c42aSAkihiro Tsukada
257aff0c42aSAkihiro Tsukada state = fe->tuner_priv;
258aff0c42aSAkihiro Tsukada
259aff0c42aSAkihiro Tsukada ret = reg_write(state, 0x01, 0x01);
260aff0c42aSAkihiro Tsukada if (ret < 0) {
261aff0c42aSAkihiro Tsukada dev_warn(&state->i2c->dev, "(%s) failed. [adap%d-fe%d]\n",
262aff0c42aSAkihiro Tsukada __func__, fe->dvb->num, fe->id);
263aff0c42aSAkihiro Tsukada return ret;
264aff0c42aSAkihiro Tsukada }
265aff0c42aSAkihiro Tsukada return 0;
266aff0c42aSAkihiro Tsukada }
267aff0c42aSAkihiro Tsukada
268aff0c42aSAkihiro Tsukada /* I2C driver functions */
269aff0c42aSAkihiro Tsukada
270aff0c42aSAkihiro Tsukada static const struct dvb_tuner_ops mxl301rf_ops = {
271aff0c42aSAkihiro Tsukada .info = {
272aff0c42aSAkihiro Tsukada .name = "MaxLinear MxL301RF",
273aff0c42aSAkihiro Tsukada
274a3f90c75SMauro Carvalho Chehab .frequency_min_hz = 93 * MHz,
275a3f90c75SMauro Carvalho Chehab .frequency_max_hz = 803 * MHz + 142857,
276aff0c42aSAkihiro Tsukada },
277aff0c42aSAkihiro Tsukada
278aff0c42aSAkihiro Tsukada .init = mxl301rf_init,
279aff0c42aSAkihiro Tsukada .sleep = mxl301rf_sleep,
280aff0c42aSAkihiro Tsukada
281aff0c42aSAkihiro Tsukada .set_params = mxl301rf_set_params,
282aff0c42aSAkihiro Tsukada .get_rf_strength = mxl301rf_get_rf_strength,
283aff0c42aSAkihiro Tsukada };
284aff0c42aSAkihiro Tsukada
285aff0c42aSAkihiro Tsukada
mxl301rf_probe(struct i2c_client * client)28635923dcdSUwe Kleine-König static int mxl301rf_probe(struct i2c_client *client)
287aff0c42aSAkihiro Tsukada {
288aff0c42aSAkihiro Tsukada struct mxl301rf_state *state;
289aff0c42aSAkihiro Tsukada struct mxl301rf_config *cfg;
290aff0c42aSAkihiro Tsukada struct dvb_frontend *fe;
291aff0c42aSAkihiro Tsukada
292aff0c42aSAkihiro Tsukada state = kzalloc(sizeof(*state), GFP_KERNEL);
293aff0c42aSAkihiro Tsukada if (!state)
294aff0c42aSAkihiro Tsukada return -ENOMEM;
295aff0c42aSAkihiro Tsukada
296aff0c42aSAkihiro Tsukada state->i2c = client;
297aff0c42aSAkihiro Tsukada cfg = client->dev.platform_data;
298aff0c42aSAkihiro Tsukada
299aff0c42aSAkihiro Tsukada memcpy(&state->cfg, cfg, sizeof(state->cfg));
300aff0c42aSAkihiro Tsukada fe = cfg->fe;
301aff0c42aSAkihiro Tsukada fe->tuner_priv = state;
302aff0c42aSAkihiro Tsukada memcpy(&fe->ops.tuner_ops, &mxl301rf_ops, sizeof(mxl301rf_ops));
303aff0c42aSAkihiro Tsukada
304aff0c42aSAkihiro Tsukada i2c_set_clientdata(client, &state->cfg);
305aff0c42aSAkihiro Tsukada dev_info(&client->dev, "MaxLinear MxL301RF attached.\n");
306aff0c42aSAkihiro Tsukada return 0;
307aff0c42aSAkihiro Tsukada }
308aff0c42aSAkihiro Tsukada
mxl301rf_remove(struct i2c_client * client)309ed5c2f5fSUwe Kleine-König static void mxl301rf_remove(struct i2c_client *client)
310aff0c42aSAkihiro Tsukada {
311aff0c42aSAkihiro Tsukada struct mxl301rf_state *state;
312aff0c42aSAkihiro Tsukada
313aff0c42aSAkihiro Tsukada state = cfg_to_state(i2c_get_clientdata(client));
314aff0c42aSAkihiro Tsukada state->cfg.fe->tuner_priv = NULL;
315aff0c42aSAkihiro Tsukada kfree(state);
316aff0c42aSAkihiro Tsukada }
317aff0c42aSAkihiro Tsukada
318aff0c42aSAkihiro Tsukada
319aff0c42aSAkihiro Tsukada static const struct i2c_device_id mxl301rf_id[] = {
320aff0c42aSAkihiro Tsukada {"mxl301rf", 0},
321aff0c42aSAkihiro Tsukada {}
322aff0c42aSAkihiro Tsukada };
323aff0c42aSAkihiro Tsukada MODULE_DEVICE_TABLE(i2c, mxl301rf_id);
324aff0c42aSAkihiro Tsukada
325aff0c42aSAkihiro Tsukada static struct i2c_driver mxl301rf_driver = {
326aff0c42aSAkihiro Tsukada .driver = {
327aff0c42aSAkihiro Tsukada .name = "mxl301rf",
328aff0c42aSAkihiro Tsukada },
329*aaeb31c0SUwe Kleine-König .probe = mxl301rf_probe,
330aff0c42aSAkihiro Tsukada .remove = mxl301rf_remove,
331aff0c42aSAkihiro Tsukada .id_table = mxl301rf_id,
332aff0c42aSAkihiro Tsukada };
333aff0c42aSAkihiro Tsukada
334aff0c42aSAkihiro Tsukada module_i2c_driver(mxl301rf_driver);
335aff0c42aSAkihiro Tsukada
336aff0c42aSAkihiro Tsukada MODULE_DESCRIPTION("MaxLinear MXL301RF tuner");
337aff0c42aSAkihiro Tsukada MODULE_AUTHOR("Akihiro TSUKADA");
338aff0c42aSAkihiro Tsukada MODULE_LICENSE("GPL");
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