1*ceafdaacSMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0-only
2*ceafdaacSMauro Carvalho Chehab /*
3*ceafdaacSMauro Carvalho Chehab * isph3a_af.c
4*ceafdaacSMauro Carvalho Chehab *
5*ceafdaacSMauro Carvalho Chehab * TI OMAP3 ISP - H3A AF module
6*ceafdaacSMauro Carvalho Chehab *
7*ceafdaacSMauro Carvalho Chehab * Copyright (C) 2010 Nokia Corporation
8*ceafdaacSMauro Carvalho Chehab * Copyright (C) 2009 Texas Instruments, Inc.
9*ceafdaacSMauro Carvalho Chehab *
10*ceafdaacSMauro Carvalho Chehab * Contacts: David Cohen <dacohen@gmail.com>
11*ceafdaacSMauro Carvalho Chehab * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
12*ceafdaacSMauro Carvalho Chehab * Sakari Ailus <sakari.ailus@iki.fi>
13*ceafdaacSMauro Carvalho Chehab */
14*ceafdaacSMauro Carvalho Chehab
15*ceafdaacSMauro Carvalho Chehab /* Linux specific include files */
16*ceafdaacSMauro Carvalho Chehab #include <linux/device.h>
17*ceafdaacSMauro Carvalho Chehab #include <linux/slab.h>
18*ceafdaacSMauro Carvalho Chehab
19*ceafdaacSMauro Carvalho Chehab #include "isp.h"
20*ceafdaacSMauro Carvalho Chehab #include "isph3a.h"
21*ceafdaacSMauro Carvalho Chehab #include "ispstat.h"
22*ceafdaacSMauro Carvalho Chehab
23*ceafdaacSMauro Carvalho Chehab #define IS_OUT_OF_BOUNDS(value, min, max) \
24*ceafdaacSMauro Carvalho Chehab ((((unsigned int)value) < (min)) || (((unsigned int)value) > (max)))
25*ceafdaacSMauro Carvalho Chehab
h3a_af_setup_regs(struct ispstat * af,void * priv)26*ceafdaacSMauro Carvalho Chehab static void h3a_af_setup_regs(struct ispstat *af, void *priv)
27*ceafdaacSMauro Carvalho Chehab {
28*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_config *conf = priv;
29*ceafdaacSMauro Carvalho Chehab u32 pcr;
30*ceafdaacSMauro Carvalho Chehab u32 pax1;
31*ceafdaacSMauro Carvalho Chehab u32 pax2;
32*ceafdaacSMauro Carvalho Chehab u32 paxstart;
33*ceafdaacSMauro Carvalho Chehab u32 coef;
34*ceafdaacSMauro Carvalho Chehab u32 base_coef_set0;
35*ceafdaacSMauro Carvalho Chehab u32 base_coef_set1;
36*ceafdaacSMauro Carvalho Chehab int index;
37*ceafdaacSMauro Carvalho Chehab
38*ceafdaacSMauro Carvalho Chehab if (af->state == ISPSTAT_DISABLED)
39*ceafdaacSMauro Carvalho Chehab return;
40*ceafdaacSMauro Carvalho Chehab
41*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, af->active_buf->dma_addr, OMAP3_ISP_IOMEM_H3A,
42*ceafdaacSMauro Carvalho Chehab ISPH3A_AFBUFST);
43*ceafdaacSMauro Carvalho Chehab
44*ceafdaacSMauro Carvalho Chehab if (!af->update)
45*ceafdaacSMauro Carvalho Chehab return;
46*ceafdaacSMauro Carvalho Chehab
47*ceafdaacSMauro Carvalho Chehab /* Configure Hardware Registers */
48*ceafdaacSMauro Carvalho Chehab pax1 = ((conf->paxel.width >> 1) - 1) << AF_PAXW_SHIFT;
49*ceafdaacSMauro Carvalho Chehab /* Set height in AFPAX1 */
50*ceafdaacSMauro Carvalho Chehab pax1 |= (conf->paxel.height >> 1) - 1;
51*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, pax1, OMAP3_ISP_IOMEM_H3A, ISPH3A_AFPAX1);
52*ceafdaacSMauro Carvalho Chehab
53*ceafdaacSMauro Carvalho Chehab /* Configure AFPAX2 Register */
54*ceafdaacSMauro Carvalho Chehab /* Set Line Increment in AFPAX2 Register */
55*ceafdaacSMauro Carvalho Chehab pax2 = ((conf->paxel.line_inc >> 1) - 1) << AF_LINE_INCR_SHIFT;
56*ceafdaacSMauro Carvalho Chehab /* Set Vertical Count */
57*ceafdaacSMauro Carvalho Chehab pax2 |= (conf->paxel.v_cnt - 1) << AF_VT_COUNT_SHIFT;
58*ceafdaacSMauro Carvalho Chehab /* Set Horizontal Count */
59*ceafdaacSMauro Carvalho Chehab pax2 |= (conf->paxel.h_cnt - 1);
60*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, pax2, OMAP3_ISP_IOMEM_H3A, ISPH3A_AFPAX2);
61*ceafdaacSMauro Carvalho Chehab
62*ceafdaacSMauro Carvalho Chehab /* Configure PAXSTART Register */
63*ceafdaacSMauro Carvalho Chehab /*Configure Horizontal Start */
64*ceafdaacSMauro Carvalho Chehab paxstart = conf->paxel.h_start << AF_HZ_START_SHIFT;
65*ceafdaacSMauro Carvalho Chehab /* Configure Vertical Start */
66*ceafdaacSMauro Carvalho Chehab paxstart |= conf->paxel.v_start;
67*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, paxstart, OMAP3_ISP_IOMEM_H3A,
68*ceafdaacSMauro Carvalho Chehab ISPH3A_AFPAXSTART);
69*ceafdaacSMauro Carvalho Chehab
70*ceafdaacSMauro Carvalho Chehab /*SetIIRSH Register */
71*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, conf->iir.h_start,
72*ceafdaacSMauro Carvalho Chehab OMAP3_ISP_IOMEM_H3A, ISPH3A_AFIIRSH);
73*ceafdaacSMauro Carvalho Chehab
74*ceafdaacSMauro Carvalho Chehab base_coef_set0 = ISPH3A_AFCOEF010;
75*ceafdaacSMauro Carvalho Chehab base_coef_set1 = ISPH3A_AFCOEF110;
76*ceafdaacSMauro Carvalho Chehab for (index = 0; index <= 8; index += 2) {
77*ceafdaacSMauro Carvalho Chehab /*Set IIR Filter0 Coefficients */
78*ceafdaacSMauro Carvalho Chehab coef = 0;
79*ceafdaacSMauro Carvalho Chehab coef |= conf->iir.coeff_set0[index];
80*ceafdaacSMauro Carvalho Chehab coef |= conf->iir.coeff_set0[index + 1] <<
81*ceafdaacSMauro Carvalho Chehab AF_COEF_SHIFT;
82*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, coef, OMAP3_ISP_IOMEM_H3A,
83*ceafdaacSMauro Carvalho Chehab base_coef_set0);
84*ceafdaacSMauro Carvalho Chehab base_coef_set0 += AFCOEF_OFFSET;
85*ceafdaacSMauro Carvalho Chehab
86*ceafdaacSMauro Carvalho Chehab /*Set IIR Filter1 Coefficients */
87*ceafdaacSMauro Carvalho Chehab coef = 0;
88*ceafdaacSMauro Carvalho Chehab coef |= conf->iir.coeff_set1[index];
89*ceafdaacSMauro Carvalho Chehab coef |= conf->iir.coeff_set1[index + 1] <<
90*ceafdaacSMauro Carvalho Chehab AF_COEF_SHIFT;
91*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, coef, OMAP3_ISP_IOMEM_H3A,
92*ceafdaacSMauro Carvalho Chehab base_coef_set1);
93*ceafdaacSMauro Carvalho Chehab base_coef_set1 += AFCOEF_OFFSET;
94*ceafdaacSMauro Carvalho Chehab }
95*ceafdaacSMauro Carvalho Chehab /* set AFCOEF0010 Register */
96*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, conf->iir.coeff_set0[10],
97*ceafdaacSMauro Carvalho Chehab OMAP3_ISP_IOMEM_H3A, ISPH3A_AFCOEF0010);
98*ceafdaacSMauro Carvalho Chehab /* set AFCOEF1010 Register */
99*ceafdaacSMauro Carvalho Chehab isp_reg_writel(af->isp, conf->iir.coeff_set1[10],
100*ceafdaacSMauro Carvalho Chehab OMAP3_ISP_IOMEM_H3A, ISPH3A_AFCOEF1010);
101*ceafdaacSMauro Carvalho Chehab
102*ceafdaacSMauro Carvalho Chehab /* PCR Register */
103*ceafdaacSMauro Carvalho Chehab /* Set RGB Position */
104*ceafdaacSMauro Carvalho Chehab pcr = conf->rgb_pos << AF_RGBPOS_SHIFT;
105*ceafdaacSMauro Carvalho Chehab /* Set Accumulator Mode */
106*ceafdaacSMauro Carvalho Chehab if (conf->fvmode == OMAP3ISP_AF_MODE_PEAK)
107*ceafdaacSMauro Carvalho Chehab pcr |= AF_FVMODE;
108*ceafdaacSMauro Carvalho Chehab /* Set A-law */
109*ceafdaacSMauro Carvalho Chehab if (conf->alaw_enable)
110*ceafdaacSMauro Carvalho Chehab pcr |= AF_ALAW_EN;
111*ceafdaacSMauro Carvalho Chehab /* HMF Configurations */
112*ceafdaacSMauro Carvalho Chehab if (conf->hmf.enable) {
113*ceafdaacSMauro Carvalho Chehab /* Enable HMF */
114*ceafdaacSMauro Carvalho Chehab pcr |= AF_MED_EN;
115*ceafdaacSMauro Carvalho Chehab /* Set Median Threshold */
116*ceafdaacSMauro Carvalho Chehab pcr |= conf->hmf.threshold << AF_MED_TH_SHIFT;
117*ceafdaacSMauro Carvalho Chehab }
118*ceafdaacSMauro Carvalho Chehab /* Set PCR Register */
119*ceafdaacSMauro Carvalho Chehab isp_reg_clr_set(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
120*ceafdaacSMauro Carvalho Chehab AF_PCR_MASK, pcr);
121*ceafdaacSMauro Carvalho Chehab
122*ceafdaacSMauro Carvalho Chehab af->update = 0;
123*ceafdaacSMauro Carvalho Chehab af->config_counter += af->inc_config;
124*ceafdaacSMauro Carvalho Chehab af->inc_config = 0;
125*ceafdaacSMauro Carvalho Chehab af->buf_size = conf->buf_size;
126*ceafdaacSMauro Carvalho Chehab }
127*ceafdaacSMauro Carvalho Chehab
h3a_af_enable(struct ispstat * af,int enable)128*ceafdaacSMauro Carvalho Chehab static void h3a_af_enable(struct ispstat *af, int enable)
129*ceafdaacSMauro Carvalho Chehab {
130*ceafdaacSMauro Carvalho Chehab if (enable) {
131*ceafdaacSMauro Carvalho Chehab isp_reg_set(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
132*ceafdaacSMauro Carvalho Chehab ISPH3A_PCR_AF_EN);
133*ceafdaacSMauro Carvalho Chehab omap3isp_subclk_enable(af->isp, OMAP3_ISP_SUBCLK_AF);
134*ceafdaacSMauro Carvalho Chehab } else {
135*ceafdaacSMauro Carvalho Chehab isp_reg_clr(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
136*ceafdaacSMauro Carvalho Chehab ISPH3A_PCR_AF_EN);
137*ceafdaacSMauro Carvalho Chehab omap3isp_subclk_disable(af->isp, OMAP3_ISP_SUBCLK_AF);
138*ceafdaacSMauro Carvalho Chehab }
139*ceafdaacSMauro Carvalho Chehab }
140*ceafdaacSMauro Carvalho Chehab
h3a_af_busy(struct ispstat * af)141*ceafdaacSMauro Carvalho Chehab static int h3a_af_busy(struct ispstat *af)
142*ceafdaacSMauro Carvalho Chehab {
143*ceafdaacSMauro Carvalho Chehab return isp_reg_readl(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR)
144*ceafdaacSMauro Carvalho Chehab & ISPH3A_PCR_BUSYAF;
145*ceafdaacSMauro Carvalho Chehab }
146*ceafdaacSMauro Carvalho Chehab
h3a_af_get_buf_size(struct omap3isp_h3a_af_config * conf)147*ceafdaacSMauro Carvalho Chehab static u32 h3a_af_get_buf_size(struct omap3isp_h3a_af_config *conf)
148*ceafdaacSMauro Carvalho Chehab {
149*ceafdaacSMauro Carvalho Chehab return conf->paxel.h_cnt * conf->paxel.v_cnt * OMAP3ISP_AF_PAXEL_SIZE;
150*ceafdaacSMauro Carvalho Chehab }
151*ceafdaacSMauro Carvalho Chehab
152*ceafdaacSMauro Carvalho Chehab /* Function to check paxel parameters */
h3a_af_validate_params(struct ispstat * af,void * new_conf)153*ceafdaacSMauro Carvalho Chehab static int h3a_af_validate_params(struct ispstat *af, void *new_conf)
154*ceafdaacSMauro Carvalho Chehab {
155*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_config *user_cfg = new_conf;
156*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_paxel *paxel_cfg = &user_cfg->paxel;
157*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_iir *iir_cfg = &user_cfg->iir;
158*ceafdaacSMauro Carvalho Chehab int index;
159*ceafdaacSMauro Carvalho Chehab u32 buf_size;
160*ceafdaacSMauro Carvalho Chehab
161*ceafdaacSMauro Carvalho Chehab /* Check horizontal Count */
162*ceafdaacSMauro Carvalho Chehab if (IS_OUT_OF_BOUNDS(paxel_cfg->h_cnt,
163*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MIN,
164*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MAX))
165*ceafdaacSMauro Carvalho Chehab return -EINVAL;
166*ceafdaacSMauro Carvalho Chehab
167*ceafdaacSMauro Carvalho Chehab /* Check Vertical Count */
168*ceafdaacSMauro Carvalho Chehab if (IS_OUT_OF_BOUNDS(paxel_cfg->v_cnt,
169*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MIN,
170*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MAX))
171*ceafdaacSMauro Carvalho Chehab return -EINVAL;
172*ceafdaacSMauro Carvalho Chehab
173*ceafdaacSMauro Carvalho Chehab if (IS_OUT_OF_BOUNDS(paxel_cfg->height, OMAP3ISP_AF_PAXEL_HEIGHT_MIN,
174*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_HEIGHT_MAX) ||
175*ceafdaacSMauro Carvalho Chehab paxel_cfg->height % 2)
176*ceafdaacSMauro Carvalho Chehab return -EINVAL;
177*ceafdaacSMauro Carvalho Chehab
178*ceafdaacSMauro Carvalho Chehab /* Check width */
179*ceafdaacSMauro Carvalho Chehab if (IS_OUT_OF_BOUNDS(paxel_cfg->width, OMAP3ISP_AF_PAXEL_WIDTH_MIN,
180*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_WIDTH_MAX) ||
181*ceafdaacSMauro Carvalho Chehab paxel_cfg->width % 2)
182*ceafdaacSMauro Carvalho Chehab return -EINVAL;
183*ceafdaacSMauro Carvalho Chehab
184*ceafdaacSMauro Carvalho Chehab /* Check Line Increment */
185*ceafdaacSMauro Carvalho Chehab if (IS_OUT_OF_BOUNDS(paxel_cfg->line_inc,
186*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_INCREMENT_MIN,
187*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_INCREMENT_MAX) ||
188*ceafdaacSMauro Carvalho Chehab paxel_cfg->line_inc % 2)
189*ceafdaacSMauro Carvalho Chehab return -EINVAL;
190*ceafdaacSMauro Carvalho Chehab
191*ceafdaacSMauro Carvalho Chehab /* Check Horizontal Start */
192*ceafdaacSMauro Carvalho Chehab if ((paxel_cfg->h_start < iir_cfg->h_start) ||
193*ceafdaacSMauro Carvalho Chehab IS_OUT_OF_BOUNDS(paxel_cfg->h_start,
194*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_HZSTART_MIN,
195*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_PAXEL_HZSTART_MAX))
196*ceafdaacSMauro Carvalho Chehab return -EINVAL;
197*ceafdaacSMauro Carvalho Chehab
198*ceafdaacSMauro Carvalho Chehab /* Check IIR */
199*ceafdaacSMauro Carvalho Chehab for (index = 0; index < OMAP3ISP_AF_NUM_COEF; index++) {
200*ceafdaacSMauro Carvalho Chehab if ((iir_cfg->coeff_set0[index]) > OMAP3ISP_AF_COEF_MAX)
201*ceafdaacSMauro Carvalho Chehab return -EINVAL;
202*ceafdaacSMauro Carvalho Chehab
203*ceafdaacSMauro Carvalho Chehab if ((iir_cfg->coeff_set1[index]) > OMAP3ISP_AF_COEF_MAX)
204*ceafdaacSMauro Carvalho Chehab return -EINVAL;
205*ceafdaacSMauro Carvalho Chehab }
206*ceafdaacSMauro Carvalho Chehab
207*ceafdaacSMauro Carvalho Chehab if (IS_OUT_OF_BOUNDS(iir_cfg->h_start, OMAP3ISP_AF_IIRSH_MIN,
208*ceafdaacSMauro Carvalho Chehab OMAP3ISP_AF_IIRSH_MAX))
209*ceafdaacSMauro Carvalho Chehab return -EINVAL;
210*ceafdaacSMauro Carvalho Chehab
211*ceafdaacSMauro Carvalho Chehab /* Hack: If paxel size is 12, the 10th AF window may be corrupted */
212*ceafdaacSMauro Carvalho Chehab if ((paxel_cfg->h_cnt * paxel_cfg->v_cnt > 9) &&
213*ceafdaacSMauro Carvalho Chehab (paxel_cfg->width * paxel_cfg->height == 12))
214*ceafdaacSMauro Carvalho Chehab return -EINVAL;
215*ceafdaacSMauro Carvalho Chehab
216*ceafdaacSMauro Carvalho Chehab buf_size = h3a_af_get_buf_size(user_cfg);
217*ceafdaacSMauro Carvalho Chehab if (buf_size > user_cfg->buf_size)
218*ceafdaacSMauro Carvalho Chehab /* User buf_size request wasn't enough */
219*ceafdaacSMauro Carvalho Chehab user_cfg->buf_size = buf_size;
220*ceafdaacSMauro Carvalho Chehab else if (user_cfg->buf_size > OMAP3ISP_AF_MAX_BUF_SIZE)
221*ceafdaacSMauro Carvalho Chehab user_cfg->buf_size = OMAP3ISP_AF_MAX_BUF_SIZE;
222*ceafdaacSMauro Carvalho Chehab
223*ceafdaacSMauro Carvalho Chehab return 0;
224*ceafdaacSMauro Carvalho Chehab }
225*ceafdaacSMauro Carvalho Chehab
226*ceafdaacSMauro Carvalho Chehab /* Update local parameters */
h3a_af_set_params(struct ispstat * af,void * new_conf)227*ceafdaacSMauro Carvalho Chehab static void h3a_af_set_params(struct ispstat *af, void *new_conf)
228*ceafdaacSMauro Carvalho Chehab {
229*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_config *user_cfg = new_conf;
230*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_config *cur_cfg = af->priv;
231*ceafdaacSMauro Carvalho Chehab int update = 0;
232*ceafdaacSMauro Carvalho Chehab int index;
233*ceafdaacSMauro Carvalho Chehab
234*ceafdaacSMauro Carvalho Chehab /* alaw */
235*ceafdaacSMauro Carvalho Chehab if (cur_cfg->alaw_enable != user_cfg->alaw_enable) {
236*ceafdaacSMauro Carvalho Chehab update = 1;
237*ceafdaacSMauro Carvalho Chehab goto out;
238*ceafdaacSMauro Carvalho Chehab }
239*ceafdaacSMauro Carvalho Chehab
240*ceafdaacSMauro Carvalho Chehab /* hmf */
241*ceafdaacSMauro Carvalho Chehab if (cur_cfg->hmf.enable != user_cfg->hmf.enable) {
242*ceafdaacSMauro Carvalho Chehab update = 1;
243*ceafdaacSMauro Carvalho Chehab goto out;
244*ceafdaacSMauro Carvalho Chehab }
245*ceafdaacSMauro Carvalho Chehab if (cur_cfg->hmf.threshold != user_cfg->hmf.threshold) {
246*ceafdaacSMauro Carvalho Chehab update = 1;
247*ceafdaacSMauro Carvalho Chehab goto out;
248*ceafdaacSMauro Carvalho Chehab }
249*ceafdaacSMauro Carvalho Chehab
250*ceafdaacSMauro Carvalho Chehab /* rgbpos */
251*ceafdaacSMauro Carvalho Chehab if (cur_cfg->rgb_pos != user_cfg->rgb_pos) {
252*ceafdaacSMauro Carvalho Chehab update = 1;
253*ceafdaacSMauro Carvalho Chehab goto out;
254*ceafdaacSMauro Carvalho Chehab }
255*ceafdaacSMauro Carvalho Chehab
256*ceafdaacSMauro Carvalho Chehab /* iir */
257*ceafdaacSMauro Carvalho Chehab if (cur_cfg->iir.h_start != user_cfg->iir.h_start) {
258*ceafdaacSMauro Carvalho Chehab update = 1;
259*ceafdaacSMauro Carvalho Chehab goto out;
260*ceafdaacSMauro Carvalho Chehab }
261*ceafdaacSMauro Carvalho Chehab for (index = 0; index < OMAP3ISP_AF_NUM_COEF; index++) {
262*ceafdaacSMauro Carvalho Chehab if (cur_cfg->iir.coeff_set0[index] !=
263*ceafdaacSMauro Carvalho Chehab user_cfg->iir.coeff_set0[index]) {
264*ceafdaacSMauro Carvalho Chehab update = 1;
265*ceafdaacSMauro Carvalho Chehab goto out;
266*ceafdaacSMauro Carvalho Chehab }
267*ceafdaacSMauro Carvalho Chehab if (cur_cfg->iir.coeff_set1[index] !=
268*ceafdaacSMauro Carvalho Chehab user_cfg->iir.coeff_set1[index]) {
269*ceafdaacSMauro Carvalho Chehab update = 1;
270*ceafdaacSMauro Carvalho Chehab goto out;
271*ceafdaacSMauro Carvalho Chehab }
272*ceafdaacSMauro Carvalho Chehab }
273*ceafdaacSMauro Carvalho Chehab
274*ceafdaacSMauro Carvalho Chehab /* paxel */
275*ceafdaacSMauro Carvalho Chehab if ((cur_cfg->paxel.width != user_cfg->paxel.width) ||
276*ceafdaacSMauro Carvalho Chehab (cur_cfg->paxel.height != user_cfg->paxel.height) ||
277*ceafdaacSMauro Carvalho Chehab (cur_cfg->paxel.h_start != user_cfg->paxel.h_start) ||
278*ceafdaacSMauro Carvalho Chehab (cur_cfg->paxel.v_start != user_cfg->paxel.v_start) ||
279*ceafdaacSMauro Carvalho Chehab (cur_cfg->paxel.h_cnt != user_cfg->paxel.h_cnt) ||
280*ceafdaacSMauro Carvalho Chehab (cur_cfg->paxel.v_cnt != user_cfg->paxel.v_cnt) ||
281*ceafdaacSMauro Carvalho Chehab (cur_cfg->paxel.line_inc != user_cfg->paxel.line_inc)) {
282*ceafdaacSMauro Carvalho Chehab update = 1;
283*ceafdaacSMauro Carvalho Chehab goto out;
284*ceafdaacSMauro Carvalho Chehab }
285*ceafdaacSMauro Carvalho Chehab
286*ceafdaacSMauro Carvalho Chehab /* af_mode */
287*ceafdaacSMauro Carvalho Chehab if (cur_cfg->fvmode != user_cfg->fvmode)
288*ceafdaacSMauro Carvalho Chehab update = 1;
289*ceafdaacSMauro Carvalho Chehab
290*ceafdaacSMauro Carvalho Chehab out:
291*ceafdaacSMauro Carvalho Chehab if (update || !af->configured) {
292*ceafdaacSMauro Carvalho Chehab memcpy(cur_cfg, user_cfg, sizeof(*cur_cfg));
293*ceafdaacSMauro Carvalho Chehab af->inc_config++;
294*ceafdaacSMauro Carvalho Chehab af->update = 1;
295*ceafdaacSMauro Carvalho Chehab /*
296*ceafdaacSMauro Carvalho Chehab * User might be asked for a bigger buffer than necessary for
297*ceafdaacSMauro Carvalho Chehab * this configuration. In order to return the right amount of
298*ceafdaacSMauro Carvalho Chehab * data during buffer request, let's calculate the size here
299*ceafdaacSMauro Carvalho Chehab * instead of stick with user_cfg->buf_size.
300*ceafdaacSMauro Carvalho Chehab */
301*ceafdaacSMauro Carvalho Chehab cur_cfg->buf_size = h3a_af_get_buf_size(cur_cfg);
302*ceafdaacSMauro Carvalho Chehab }
303*ceafdaacSMauro Carvalho Chehab }
304*ceafdaacSMauro Carvalho Chehab
h3a_af_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)305*ceafdaacSMauro Carvalho Chehab static long h3a_af_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
306*ceafdaacSMauro Carvalho Chehab {
307*ceafdaacSMauro Carvalho Chehab struct ispstat *stat = v4l2_get_subdevdata(sd);
308*ceafdaacSMauro Carvalho Chehab
309*ceafdaacSMauro Carvalho Chehab switch (cmd) {
310*ceafdaacSMauro Carvalho Chehab case VIDIOC_OMAP3ISP_AF_CFG:
311*ceafdaacSMauro Carvalho Chehab return omap3isp_stat_config(stat, arg);
312*ceafdaacSMauro Carvalho Chehab case VIDIOC_OMAP3ISP_STAT_REQ:
313*ceafdaacSMauro Carvalho Chehab return omap3isp_stat_request_statistics(stat, arg);
314*ceafdaacSMauro Carvalho Chehab case VIDIOC_OMAP3ISP_STAT_REQ_TIME32:
315*ceafdaacSMauro Carvalho Chehab return omap3isp_stat_request_statistics_time32(stat, arg);
316*ceafdaacSMauro Carvalho Chehab case VIDIOC_OMAP3ISP_STAT_EN: {
317*ceafdaacSMauro Carvalho Chehab int *en = arg;
318*ceafdaacSMauro Carvalho Chehab return omap3isp_stat_enable(stat, !!*en);
319*ceafdaacSMauro Carvalho Chehab }
320*ceafdaacSMauro Carvalho Chehab }
321*ceafdaacSMauro Carvalho Chehab
322*ceafdaacSMauro Carvalho Chehab return -ENOIOCTLCMD;
323*ceafdaacSMauro Carvalho Chehab
324*ceafdaacSMauro Carvalho Chehab }
325*ceafdaacSMauro Carvalho Chehab
326*ceafdaacSMauro Carvalho Chehab static const struct ispstat_ops h3a_af_ops = {
327*ceafdaacSMauro Carvalho Chehab .validate_params = h3a_af_validate_params,
328*ceafdaacSMauro Carvalho Chehab .set_params = h3a_af_set_params,
329*ceafdaacSMauro Carvalho Chehab .setup_regs = h3a_af_setup_regs,
330*ceafdaacSMauro Carvalho Chehab .enable = h3a_af_enable,
331*ceafdaacSMauro Carvalho Chehab .busy = h3a_af_busy,
332*ceafdaacSMauro Carvalho Chehab };
333*ceafdaacSMauro Carvalho Chehab
334*ceafdaacSMauro Carvalho Chehab static const struct v4l2_subdev_core_ops h3a_af_subdev_core_ops = {
335*ceafdaacSMauro Carvalho Chehab .ioctl = h3a_af_ioctl,
336*ceafdaacSMauro Carvalho Chehab .subscribe_event = omap3isp_stat_subscribe_event,
337*ceafdaacSMauro Carvalho Chehab .unsubscribe_event = omap3isp_stat_unsubscribe_event,
338*ceafdaacSMauro Carvalho Chehab };
339*ceafdaacSMauro Carvalho Chehab
340*ceafdaacSMauro Carvalho Chehab static const struct v4l2_subdev_video_ops h3a_af_subdev_video_ops = {
341*ceafdaacSMauro Carvalho Chehab .s_stream = omap3isp_stat_s_stream,
342*ceafdaacSMauro Carvalho Chehab };
343*ceafdaacSMauro Carvalho Chehab
344*ceafdaacSMauro Carvalho Chehab static const struct v4l2_subdev_ops h3a_af_subdev_ops = {
345*ceafdaacSMauro Carvalho Chehab .core = &h3a_af_subdev_core_ops,
346*ceafdaacSMauro Carvalho Chehab .video = &h3a_af_subdev_video_ops,
347*ceafdaacSMauro Carvalho Chehab };
348*ceafdaacSMauro Carvalho Chehab
349*ceafdaacSMauro Carvalho Chehab /* Function to register the AF character device driver. */
omap3isp_h3a_af_init(struct isp_device * isp)350*ceafdaacSMauro Carvalho Chehab int omap3isp_h3a_af_init(struct isp_device *isp)
351*ceafdaacSMauro Carvalho Chehab {
352*ceafdaacSMauro Carvalho Chehab struct ispstat *af = &isp->isp_af;
353*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_config *af_cfg;
354*ceafdaacSMauro Carvalho Chehab struct omap3isp_h3a_af_config *af_recover_cfg = NULL;
355*ceafdaacSMauro Carvalho Chehab int ret;
356*ceafdaacSMauro Carvalho Chehab
357*ceafdaacSMauro Carvalho Chehab af_cfg = kzalloc(sizeof(*af_cfg), GFP_KERNEL);
358*ceafdaacSMauro Carvalho Chehab if (af_cfg == NULL)
359*ceafdaacSMauro Carvalho Chehab return -ENOMEM;
360*ceafdaacSMauro Carvalho Chehab
361*ceafdaacSMauro Carvalho Chehab af->ops = &h3a_af_ops;
362*ceafdaacSMauro Carvalho Chehab af->priv = af_cfg;
363*ceafdaacSMauro Carvalho Chehab af->event_type = V4L2_EVENT_OMAP3ISP_AF;
364*ceafdaacSMauro Carvalho Chehab af->isp = isp;
365*ceafdaacSMauro Carvalho Chehab
366*ceafdaacSMauro Carvalho Chehab /* Set recover state configuration */
367*ceafdaacSMauro Carvalho Chehab af_recover_cfg = kzalloc(sizeof(*af_recover_cfg), GFP_KERNEL);
368*ceafdaacSMauro Carvalho Chehab if (!af_recover_cfg) {
369*ceafdaacSMauro Carvalho Chehab dev_err(af->isp->dev,
370*ceafdaacSMauro Carvalho Chehab "AF: cannot allocate memory for recover configuration.\n");
371*ceafdaacSMauro Carvalho Chehab ret = -ENOMEM;
372*ceafdaacSMauro Carvalho Chehab goto err;
373*ceafdaacSMauro Carvalho Chehab }
374*ceafdaacSMauro Carvalho Chehab
375*ceafdaacSMauro Carvalho Chehab af_recover_cfg->paxel.h_start = OMAP3ISP_AF_PAXEL_HZSTART_MIN;
376*ceafdaacSMauro Carvalho Chehab af_recover_cfg->paxel.width = OMAP3ISP_AF_PAXEL_WIDTH_MIN;
377*ceafdaacSMauro Carvalho Chehab af_recover_cfg->paxel.height = OMAP3ISP_AF_PAXEL_HEIGHT_MIN;
378*ceafdaacSMauro Carvalho Chehab af_recover_cfg->paxel.h_cnt = OMAP3ISP_AF_PAXEL_HORIZONTAL_COUNT_MIN;
379*ceafdaacSMauro Carvalho Chehab af_recover_cfg->paxel.v_cnt = OMAP3ISP_AF_PAXEL_VERTICAL_COUNT_MIN;
380*ceafdaacSMauro Carvalho Chehab af_recover_cfg->paxel.line_inc = OMAP3ISP_AF_PAXEL_INCREMENT_MIN;
381*ceafdaacSMauro Carvalho Chehab if (h3a_af_validate_params(af, af_recover_cfg)) {
382*ceafdaacSMauro Carvalho Chehab dev_err(af->isp->dev,
383*ceafdaacSMauro Carvalho Chehab "AF: recover configuration is invalid.\n");
384*ceafdaacSMauro Carvalho Chehab ret = -EINVAL;
385*ceafdaacSMauro Carvalho Chehab goto err;
386*ceafdaacSMauro Carvalho Chehab }
387*ceafdaacSMauro Carvalho Chehab
388*ceafdaacSMauro Carvalho Chehab af_recover_cfg->buf_size = h3a_af_get_buf_size(af_recover_cfg);
389*ceafdaacSMauro Carvalho Chehab af->recover_priv = af_recover_cfg;
390*ceafdaacSMauro Carvalho Chehab
391*ceafdaacSMauro Carvalho Chehab ret = omap3isp_stat_init(af, "AF", &h3a_af_subdev_ops);
392*ceafdaacSMauro Carvalho Chehab
393*ceafdaacSMauro Carvalho Chehab err:
394*ceafdaacSMauro Carvalho Chehab if (ret) {
395*ceafdaacSMauro Carvalho Chehab kfree(af_cfg);
396*ceafdaacSMauro Carvalho Chehab kfree(af_recover_cfg);
397*ceafdaacSMauro Carvalho Chehab }
398*ceafdaacSMauro Carvalho Chehab
399*ceafdaacSMauro Carvalho Chehab return ret;
400*ceafdaacSMauro Carvalho Chehab }
401*ceafdaacSMauro Carvalho Chehab
omap3isp_h3a_af_cleanup(struct isp_device * isp)402*ceafdaacSMauro Carvalho Chehab void omap3isp_h3a_af_cleanup(struct isp_device *isp)
403*ceafdaacSMauro Carvalho Chehab {
404*ceafdaacSMauro Carvalho Chehab omap3isp_stat_cleanup(&isp->isp_af);
405*ceafdaacSMauro Carvalho Chehab }
406