xref: /openbmc/linux/drivers/media/platform/ti/omap/omap_voutdef.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1*012e3ca3SMauro Carvalho Chehab /*
2*012e3ca3SMauro Carvalho Chehab  * omap_voutdef.h
3*012e3ca3SMauro Carvalho Chehab  *
4*012e3ca3SMauro Carvalho Chehab  * Copyright (C) 2010 Texas Instruments.
5*012e3ca3SMauro Carvalho Chehab  *
6*012e3ca3SMauro Carvalho Chehab  * This file is licensed under the terms of the GNU General Public License
7*012e3ca3SMauro Carvalho Chehab  * version 2. This program is licensed "as is" without any warranty of any
8*012e3ca3SMauro Carvalho Chehab  * kind, whether express or implied.
9*012e3ca3SMauro Carvalho Chehab  */
10*012e3ca3SMauro Carvalho Chehab 
11*012e3ca3SMauro Carvalho Chehab #ifndef OMAP_VOUTDEF_H
12*012e3ca3SMauro Carvalho Chehab #define OMAP_VOUTDEF_H
13*012e3ca3SMauro Carvalho Chehab 
14*012e3ca3SMauro Carvalho Chehab #include <media/videobuf2-dma-contig.h>
15*012e3ca3SMauro Carvalho Chehab #include <media/v4l2-ctrls.h>
16*012e3ca3SMauro Carvalho Chehab #include <video/omapfb_dss.h>
17*012e3ca3SMauro Carvalho Chehab #include <video/omapvrfb.h>
18*012e3ca3SMauro Carvalho Chehab #include <linux/dmaengine.h>
19*012e3ca3SMauro Carvalho Chehab 
20*012e3ca3SMauro Carvalho Chehab #define YUYV_BPP        2
21*012e3ca3SMauro Carvalho Chehab #define RGB565_BPP      2
22*012e3ca3SMauro Carvalho Chehab #define RGB24_BPP       3
23*012e3ca3SMauro Carvalho Chehab #define RGB32_BPP       4
24*012e3ca3SMauro Carvalho Chehab #define TILE_SIZE       32
25*012e3ca3SMauro Carvalho Chehab #define YUYV_VRFB_BPP   2
26*012e3ca3SMauro Carvalho Chehab #define RGB_VRFB_BPP    1
27*012e3ca3SMauro Carvalho Chehab #define MAX_CID		3
28*012e3ca3SMauro Carvalho Chehab #define MAC_VRFB_CTXS	4
29*012e3ca3SMauro Carvalho Chehab #define MAX_VOUT_DEV	2
30*012e3ca3SMauro Carvalho Chehab #define MAX_OVLS	3
31*012e3ca3SMauro Carvalho Chehab #define MAX_DISPLAYS	10
32*012e3ca3SMauro Carvalho Chehab #define MAX_MANAGERS	3
33*012e3ca3SMauro Carvalho Chehab 
34*012e3ca3SMauro Carvalho Chehab #define QQVGA_WIDTH		160
35*012e3ca3SMauro Carvalho Chehab #define QQVGA_HEIGHT		120
36*012e3ca3SMauro Carvalho Chehab 
37*012e3ca3SMauro Carvalho Chehab /* Max Resolution supported by the driver */
38*012e3ca3SMauro Carvalho Chehab #define VID_MAX_WIDTH		1280	/* Largest width */
39*012e3ca3SMauro Carvalho Chehab #define VID_MAX_HEIGHT		720	/* Largest height */
40*012e3ca3SMauro Carvalho Chehab 
41*012e3ca3SMauro Carvalho Chehab /* Minimum requirement is 2x2 for DSS */
42*012e3ca3SMauro Carvalho Chehab #define VID_MIN_WIDTH		2
43*012e3ca3SMauro Carvalho Chehab #define VID_MIN_HEIGHT		2
44*012e3ca3SMauro Carvalho Chehab 
45*012e3ca3SMauro Carvalho Chehab /* 2048 x 2048 is max res supported by OMAP display controller */
46*012e3ca3SMauro Carvalho Chehab #define MAX_PIXELS_PER_LINE     2048
47*012e3ca3SMauro Carvalho Chehab 
48*012e3ca3SMauro Carvalho Chehab #define VRFB_TX_TIMEOUT         1000
49*012e3ca3SMauro Carvalho Chehab #define VRFB_NUM_BUFS		4
50*012e3ca3SMauro Carvalho Chehab 
51*012e3ca3SMauro Carvalho Chehab /* Max buffer size tobe allocated during init */
52*012e3ca3SMauro Carvalho Chehab #define OMAP_VOUT_MAX_BUF_SIZE (VID_MAX_WIDTH*VID_MAX_HEIGHT*4)
53*012e3ca3SMauro Carvalho Chehab 
54*012e3ca3SMauro Carvalho Chehab enum dma_channel_state {
55*012e3ca3SMauro Carvalho Chehab 	DMA_CHAN_NOT_ALLOTED,
56*012e3ca3SMauro Carvalho Chehab 	DMA_CHAN_ALLOTED,
57*012e3ca3SMauro Carvalho Chehab };
58*012e3ca3SMauro Carvalho Chehab 
59*012e3ca3SMauro Carvalho Chehab /* Enum for Rotation
60*012e3ca3SMauro Carvalho Chehab  * DSS understands rotation in 0, 1, 2, 3 context
61*012e3ca3SMauro Carvalho Chehab  * while V4L2 driver understands it as 0, 90, 180, 270
62*012e3ca3SMauro Carvalho Chehab  */
63*012e3ca3SMauro Carvalho Chehab enum dss_rotation {
64*012e3ca3SMauro Carvalho Chehab 	dss_rotation_0_degree	= 0,
65*012e3ca3SMauro Carvalho Chehab 	dss_rotation_90_degree	= 1,
66*012e3ca3SMauro Carvalho Chehab 	dss_rotation_180_degree	= 2,
67*012e3ca3SMauro Carvalho Chehab 	dss_rotation_270_degree = 3,
68*012e3ca3SMauro Carvalho Chehab };
69*012e3ca3SMauro Carvalho Chehab 
70*012e3ca3SMauro Carvalho Chehab /* Enum for choosing rotation type for vout
71*012e3ca3SMauro Carvalho Chehab  * DSS2 doesn't understand no rotation as an
72*012e3ca3SMauro Carvalho Chehab  * option while V4L2 driver doesn't support
73*012e3ca3SMauro Carvalho Chehab  * rotation in the case where VRFB is not built in
74*012e3ca3SMauro Carvalho Chehab  * the kernel
75*012e3ca3SMauro Carvalho Chehab  */
76*012e3ca3SMauro Carvalho Chehab enum vout_rotaion_type {
77*012e3ca3SMauro Carvalho Chehab 	VOUT_ROT_NONE	= 0,
78*012e3ca3SMauro Carvalho Chehab 	VOUT_ROT_VRFB	= 1,
79*012e3ca3SMauro Carvalho Chehab };
80*012e3ca3SMauro Carvalho Chehab 
81*012e3ca3SMauro Carvalho Chehab /*
82*012e3ca3SMauro Carvalho Chehab  * This structure is used to store the DMA transfer parameters
83*012e3ca3SMauro Carvalho Chehab  * for VRFB hidden buffer
84*012e3ca3SMauro Carvalho Chehab  */
85*012e3ca3SMauro Carvalho Chehab struct vid_vrfb_dma {
86*012e3ca3SMauro Carvalho Chehab 	struct dma_chan *chan;
87*012e3ca3SMauro Carvalho Chehab 	struct dma_interleaved_template *xt;
88*012e3ca3SMauro Carvalho Chehab 
89*012e3ca3SMauro Carvalho Chehab 	int req_status;
90*012e3ca3SMauro Carvalho Chehab 	int tx_status;
91*012e3ca3SMauro Carvalho Chehab 	wait_queue_head_t wait;
92*012e3ca3SMauro Carvalho Chehab };
93*012e3ca3SMauro Carvalho Chehab 
94*012e3ca3SMauro Carvalho Chehab struct omapvideo_info {
95*012e3ca3SMauro Carvalho Chehab 	int id;
96*012e3ca3SMauro Carvalho Chehab 	int num_overlays;
97*012e3ca3SMauro Carvalho Chehab 	struct omap_overlay *overlays[MAX_OVLS];
98*012e3ca3SMauro Carvalho Chehab 	enum vout_rotaion_type rotation_type;
99*012e3ca3SMauro Carvalho Chehab };
100*012e3ca3SMauro Carvalho Chehab 
101*012e3ca3SMauro Carvalho Chehab struct omap2video_device {
102*012e3ca3SMauro Carvalho Chehab 	struct mutex  mtx;
103*012e3ca3SMauro Carvalho Chehab 
104*012e3ca3SMauro Carvalho Chehab 	int state;
105*012e3ca3SMauro Carvalho Chehab 
106*012e3ca3SMauro Carvalho Chehab 	struct v4l2_device v4l2_dev;
107*012e3ca3SMauro Carvalho Chehab 	struct omap_vout_device *vouts[MAX_VOUT_DEV];
108*012e3ca3SMauro Carvalho Chehab 
109*012e3ca3SMauro Carvalho Chehab 	int num_displays;
110*012e3ca3SMauro Carvalho Chehab 	struct omap_dss_device *displays[MAX_DISPLAYS];
111*012e3ca3SMauro Carvalho Chehab 	int num_overlays;
112*012e3ca3SMauro Carvalho Chehab 	struct omap_overlay *overlays[MAX_OVLS];
113*012e3ca3SMauro Carvalho Chehab 	int num_managers;
114*012e3ca3SMauro Carvalho Chehab 	struct omap_overlay_manager *managers[MAX_MANAGERS];
115*012e3ca3SMauro Carvalho Chehab };
116*012e3ca3SMauro Carvalho Chehab 
117*012e3ca3SMauro Carvalho Chehab /* buffer for one video frame */
118*012e3ca3SMauro Carvalho Chehab struct omap_vout_buffer {
119*012e3ca3SMauro Carvalho Chehab 	/* common v4l buffer stuff -- must be first */
120*012e3ca3SMauro Carvalho Chehab 	struct vb2_v4l2_buffer		vbuf;
121*012e3ca3SMauro Carvalho Chehab 	struct list_head		queue;
122*012e3ca3SMauro Carvalho Chehab };
123*012e3ca3SMauro Carvalho Chehab 
vb2_to_omap_vout_buffer(struct vb2_buffer * vb)124*012e3ca3SMauro Carvalho Chehab static inline struct omap_vout_buffer *vb2_to_omap_vout_buffer(struct vb2_buffer *vb)
125*012e3ca3SMauro Carvalho Chehab {
126*012e3ca3SMauro Carvalho Chehab 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
127*012e3ca3SMauro Carvalho Chehab 
128*012e3ca3SMauro Carvalho Chehab 	return container_of(vbuf, struct omap_vout_buffer, vbuf);
129*012e3ca3SMauro Carvalho Chehab }
130*012e3ca3SMauro Carvalho Chehab 
131*012e3ca3SMauro Carvalho Chehab /* per-device data structure */
132*012e3ca3SMauro Carvalho Chehab struct omap_vout_device {
133*012e3ca3SMauro Carvalho Chehab 
134*012e3ca3SMauro Carvalho Chehab 	struct omapvideo_info vid_info;
135*012e3ca3SMauro Carvalho Chehab 	struct video_device *vfd;
136*012e3ca3SMauro Carvalho Chehab 	struct omap2video_device *vid_dev;
137*012e3ca3SMauro Carvalho Chehab 	struct v4l2_ctrl_handler ctrl_handler;
138*012e3ca3SMauro Carvalho Chehab 	int vid;
139*012e3ca3SMauro Carvalho Chehab 
140*012e3ca3SMauro Carvalho Chehab 	/* allow to reuse previously allocated buffer which is big enough */
141*012e3ca3SMauro Carvalho Chehab 	int buffer_size;
142*012e3ca3SMauro Carvalho Chehab 	enum omap_color_mode dss_mode;
143*012e3ca3SMauro Carvalho Chehab 
144*012e3ca3SMauro Carvalho Chehab 	u32 sequence;
145*012e3ca3SMauro Carvalho Chehab 
146*012e3ca3SMauro Carvalho Chehab 	struct v4l2_pix_format pix;
147*012e3ca3SMauro Carvalho Chehab 	struct v4l2_rect crop;
148*012e3ca3SMauro Carvalho Chehab 	struct v4l2_window win;
149*012e3ca3SMauro Carvalho Chehab 	struct v4l2_framebuffer fbuf;
150*012e3ca3SMauro Carvalho Chehab 
151*012e3ca3SMauro Carvalho Chehab 	/* Lock to protect the shared data structures in ioctl */
152*012e3ca3SMauro Carvalho Chehab 	struct mutex lock;
153*012e3ca3SMauro Carvalho Chehab 
154*012e3ca3SMauro Carvalho Chehab 	enum dss_rotation rotation;
155*012e3ca3SMauro Carvalho Chehab 	bool mirror;
156*012e3ca3SMauro Carvalho Chehab 	int flicker_filter;
157*012e3ca3SMauro Carvalho Chehab 
158*012e3ca3SMauro Carvalho Chehab 	int bpp; /* bytes per pixel */
159*012e3ca3SMauro Carvalho Chehab 	int vrfb_bpp; /* bytes per pixel with respect to VRFB */
160*012e3ca3SMauro Carvalho Chehab 
161*012e3ca3SMauro Carvalho Chehab 	struct vid_vrfb_dma vrfb_dma_tx;
162*012e3ca3SMauro Carvalho Chehab 	unsigned int smsshado_phy_addr[MAC_VRFB_CTXS];
163*012e3ca3SMauro Carvalho Chehab 	unsigned int smsshado_virt_addr[MAC_VRFB_CTXS];
164*012e3ca3SMauro Carvalho Chehab 	struct vrfb vrfb_context[MAC_VRFB_CTXS];
165*012e3ca3SMauro Carvalho Chehab 	bool vrfb_static_allocation;
166*012e3ca3SMauro Carvalho Chehab 	unsigned int smsshado_size;
167*012e3ca3SMauro Carvalho Chehab 	unsigned char pos;
168*012e3ca3SMauro Carvalho Chehab 
169*012e3ca3SMauro Carvalho Chehab 	int ps, vr_ps, line_length, first_int, field_id;
170*012e3ca3SMauro Carvalho Chehab 	struct omap_vout_buffer *cur_frm, *next_frm;
171*012e3ca3SMauro Carvalho Chehab 	spinlock_t vbq_lock;            /* spinlock for dma_queue */
172*012e3ca3SMauro Carvalho Chehab 	struct list_head dma_queue;
173*012e3ca3SMauro Carvalho Chehab 	dma_addr_t queued_buf_addr[VIDEO_MAX_FRAME];
174*012e3ca3SMauro Carvalho Chehab 	u32 cropped_offset;
175*012e3ca3SMauro Carvalho Chehab 	s32 tv_field1_offset;
176*012e3ca3SMauro Carvalho Chehab 	void *isr_handle;
177*012e3ca3SMauro Carvalho Chehab 	struct vb2_queue vq;
178*012e3ca3SMauro Carvalho Chehab 
179*012e3ca3SMauro Carvalho Chehab };
180*012e3ca3SMauro Carvalho Chehab 
181*012e3ca3SMauro Carvalho Chehab /*
182*012e3ca3SMauro Carvalho Chehab  * Return true if rotation is 90 or 270
183*012e3ca3SMauro Carvalho Chehab  */
is_rotation_90_or_270(const struct omap_vout_device * vout)184*012e3ca3SMauro Carvalho Chehab static inline int is_rotation_90_or_270(const struct omap_vout_device *vout)
185*012e3ca3SMauro Carvalho Chehab {
186*012e3ca3SMauro Carvalho Chehab 	return (vout->rotation == dss_rotation_90_degree ||
187*012e3ca3SMauro Carvalho Chehab 			vout->rotation == dss_rotation_270_degree);
188*012e3ca3SMauro Carvalho Chehab }
189*012e3ca3SMauro Carvalho Chehab 
190*012e3ca3SMauro Carvalho Chehab /*
191*012e3ca3SMauro Carvalho Chehab  * Return true if rotation is enabled
192*012e3ca3SMauro Carvalho Chehab  */
is_rotation_enabled(const struct omap_vout_device * vout)193*012e3ca3SMauro Carvalho Chehab static inline int is_rotation_enabled(const struct omap_vout_device *vout)
194*012e3ca3SMauro Carvalho Chehab {
195*012e3ca3SMauro Carvalho Chehab 	return vout->rotation || vout->mirror;
196*012e3ca3SMauro Carvalho Chehab }
197*012e3ca3SMauro Carvalho Chehab 
198*012e3ca3SMauro Carvalho Chehab /*
199*012e3ca3SMauro Carvalho Chehab  * Reverse the rotation degree if mirroring is enabled
200*012e3ca3SMauro Carvalho Chehab  */
calc_rotation(const struct omap_vout_device * vout)201*012e3ca3SMauro Carvalho Chehab static inline int calc_rotation(const struct omap_vout_device *vout)
202*012e3ca3SMauro Carvalho Chehab {
203*012e3ca3SMauro Carvalho Chehab 	if (!vout->mirror)
204*012e3ca3SMauro Carvalho Chehab 		return vout->rotation;
205*012e3ca3SMauro Carvalho Chehab 
206*012e3ca3SMauro Carvalho Chehab 	switch (vout->rotation) {
207*012e3ca3SMauro Carvalho Chehab 	case dss_rotation_90_degree:
208*012e3ca3SMauro Carvalho Chehab 		return dss_rotation_270_degree;
209*012e3ca3SMauro Carvalho Chehab 	case dss_rotation_270_degree:
210*012e3ca3SMauro Carvalho Chehab 		return dss_rotation_90_degree;
211*012e3ca3SMauro Carvalho Chehab 	case dss_rotation_180_degree:
212*012e3ca3SMauro Carvalho Chehab 		return dss_rotation_0_degree;
213*012e3ca3SMauro Carvalho Chehab 	default:
214*012e3ca3SMauro Carvalho Chehab 		return dss_rotation_180_degree;
215*012e3ca3SMauro Carvalho Chehab 	}
216*012e3ca3SMauro Carvalho Chehab }
217*012e3ca3SMauro Carvalho Chehab 
218*012e3ca3SMauro Carvalho Chehab void omap_vout_free_buffers(struct omap_vout_device *vout);
219*012e3ca3SMauro Carvalho Chehab #endif	/* ifndef OMAP_VOUTDEF_H */
220