161890ccaSMoudy Ho /* SPDX-License-Identifier: GPL-2.0-only */ 261890ccaSMoudy Ho /* 361890ccaSMoudy Ho * Copyright (c) 2022 MediaTek Inc. 461890ccaSMoudy Ho * Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com> 561890ccaSMoudy Ho */ 661890ccaSMoudy Ho 761890ccaSMoudy Ho #ifndef __MTK_MDP3_VPU_H__ 861890ccaSMoudy Ho #define __MTK_MDP3_VPU_H__ 961890ccaSMoudy Ho 1061890ccaSMoudy Ho #include <linux/platform_device.h> 1161890ccaSMoudy Ho #include "mtk-img-ipi.h" 1261890ccaSMoudy Ho 1361890ccaSMoudy Ho enum mdp_ipi_result { 1461890ccaSMoudy Ho MDP_IPI_SUCCESS = 0, 1561890ccaSMoudy Ho MDP_IPI_ENOMEM = 12, 1661890ccaSMoudy Ho MDP_IPI_EBUSY = 16, 1761890ccaSMoudy Ho MDP_IPI_EINVAL = 22, 1861890ccaSMoudy Ho MDP_IPI_EMINST = 24, 1961890ccaSMoudy Ho MDP_IPI_ERANGE = 34, 2061890ccaSMoudy Ho MDP_IPI_NR_ERRNO, 2161890ccaSMoudy Ho 2261890ccaSMoudy Ho MDP_IPI_EOTHER = MDP_IPI_NR_ERRNO, 2361890ccaSMoudy Ho MDP_IPI_PATH_CANT_MERGE, 2461890ccaSMoudy Ho MDP_IPI_OP_FAIL, 2561890ccaSMoudy Ho }; 2661890ccaSMoudy Ho 2761890ccaSMoudy Ho struct mdp_ipi_init_msg { 2861890ccaSMoudy Ho u32 status; 2961890ccaSMoudy Ho u64 drv_data; 3061890ccaSMoudy Ho u32 work_addr; /* [in] working buffer address */ 3161890ccaSMoudy Ho u32 work_size; /* [in] working buffer size */ 3261890ccaSMoudy Ho } __packed; 3361890ccaSMoudy Ho 3461890ccaSMoudy Ho struct mdp_ipi_deinit_msg { 3561890ccaSMoudy Ho u32 status; 3661890ccaSMoudy Ho u64 drv_data; 3761890ccaSMoudy Ho u32 work_addr; 3861890ccaSMoudy Ho } __packed; 3961890ccaSMoudy Ho 4061890ccaSMoudy Ho struct mdp_vpu_dev { 4161890ccaSMoudy Ho /* synchronization protect for accessing vpu working buffer info */ 4261890ccaSMoudy Ho struct mutex *lock; 4361890ccaSMoudy Ho struct mtk_scp *scp; 4461890ccaSMoudy Ho struct completion ipi_acked; 45*b4e52199SMoudy Ho void *param; 46*b4e52199SMoudy Ho dma_addr_t param_addr; 47*b4e52199SMoudy Ho size_t param_size; 4861890ccaSMoudy Ho void *work; 4961890ccaSMoudy Ho dma_addr_t work_addr; 5061890ccaSMoudy Ho size_t work_size; 51*b4e52199SMoudy Ho void *config; 52*b4e52199SMoudy Ho dma_addr_t config_addr; 53*b4e52199SMoudy Ho size_t config_size; 5461890ccaSMoudy Ho u32 status; 5561890ccaSMoudy Ho }; 5661890ccaSMoudy Ho 5761890ccaSMoudy Ho void mdp_vpu_shared_mem_free(struct mdp_vpu_dev *vpu); 5861890ccaSMoudy Ho int mdp_vpu_dev_init(struct mdp_vpu_dev *vpu, struct mtk_scp *scp, 5961890ccaSMoudy Ho struct mutex *lock /* for sync */); 6061890ccaSMoudy Ho int mdp_vpu_dev_deinit(struct mdp_vpu_dev *vpu); 61*b4e52199SMoudy Ho int mdp_vpu_process(struct mdp_vpu_dev *vpu, struct img_ipi_frameparam *param); 6261890ccaSMoudy Ho 6361890ccaSMoudy Ho #endif /* __MTK_MDP3_VPU_H__ */ 64