xref: /openbmc/linux/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.h (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1*61890ccaSMoudy Ho /* SPDX-License-Identifier: GPL-2.0-only */
2*61890ccaSMoudy Ho /*
3*61890ccaSMoudy Ho  * Copyright (c) 2022 MediaTek Inc.
4*61890ccaSMoudy Ho  * Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
5*61890ccaSMoudy Ho  */
6*61890ccaSMoudy Ho 
7*61890ccaSMoudy Ho #ifndef __MTK_MDP3_M2M_H__
8*61890ccaSMoudy Ho #define __MTK_MDP3_M2M_H__
9*61890ccaSMoudy Ho 
10*61890ccaSMoudy Ho #include <media/v4l2-ctrls.h>
11*61890ccaSMoudy Ho #include "mtk-mdp3-core.h"
12*61890ccaSMoudy Ho #include "mtk-mdp3-vpu.h"
13*61890ccaSMoudy Ho #include "mtk-mdp3-regs.h"
14*61890ccaSMoudy Ho 
15*61890ccaSMoudy Ho #define MDP_MAX_CTRLS	10
16*61890ccaSMoudy Ho 
17*61890ccaSMoudy Ho enum {
18*61890ccaSMoudy Ho 	MDP_M2M_SRC = 0,
19*61890ccaSMoudy Ho 	MDP_M2M_DST = 1,
20*61890ccaSMoudy Ho 	MDP_M2M_MAX,
21*61890ccaSMoudy Ho };
22*61890ccaSMoudy Ho 
23*61890ccaSMoudy Ho struct mdp_m2m_ctrls {
24*61890ccaSMoudy Ho 	struct v4l2_ctrl	*hflip;
25*61890ccaSMoudy Ho 	struct v4l2_ctrl	*vflip;
26*61890ccaSMoudy Ho 	struct v4l2_ctrl	*rotate;
27*61890ccaSMoudy Ho };
28*61890ccaSMoudy Ho 
29*61890ccaSMoudy Ho struct mdp_m2m_ctx {
30*61890ccaSMoudy Ho 	u32				id;
31*61890ccaSMoudy Ho 	struct mdp_dev			*mdp_dev;
32*61890ccaSMoudy Ho 	struct v4l2_fh			fh;
33*61890ccaSMoudy Ho 	struct v4l2_ctrl_handler	ctrl_handler;
34*61890ccaSMoudy Ho 	struct mdp_m2m_ctrls		ctrls;
35*61890ccaSMoudy Ho 	struct v4l2_m2m_ctx		*m2m_ctx;
36*61890ccaSMoudy Ho 	u32				frame_count[MDP_M2M_MAX];
37*61890ccaSMoudy Ho 
38*61890ccaSMoudy Ho 	struct mdp_frameparam		curr_param;
39*61890ccaSMoudy Ho 	/* synchronization protect for mdp m2m context */
40*61890ccaSMoudy Ho 	struct mutex			ctx_lock;
41*61890ccaSMoudy Ho };
42*61890ccaSMoudy Ho 
43*61890ccaSMoudy Ho int mdp_m2m_device_register(struct mdp_dev *mdp);
44*61890ccaSMoudy Ho void mdp_m2m_device_unregister(struct mdp_dev *mdp);
45*61890ccaSMoudy Ho void mdp_m2m_job_finish(struct mdp_m2m_ctx *ctx);
46*61890ccaSMoudy Ho 
47*61890ccaSMoudy Ho #endif  /* __MTK_MDP3_M2M_H__ */
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