1dc7bbea9SMauro Carvalho Chehab // SPDX-License-Identifier: GPL-2.0-only
2dc7bbea9SMauro Carvalho Chehab /*
3dc7bbea9SMauro Carvalho Chehab * Support for the camera device found on Marvell MMP processors; known
4dc7bbea9SMauro Carvalho Chehab * to work with the Armada 610 as used in the OLPC 1.75 system.
5dc7bbea9SMauro Carvalho Chehab *
6dc7bbea9SMauro Carvalho Chehab * Copyright 2011 Jonathan Corbet <corbet@lwn.net>
7dc7bbea9SMauro Carvalho Chehab * Copyright 2018 Lubomir Rintel <lkundrak@v3.sk>
8dc7bbea9SMauro Carvalho Chehab */
9dc7bbea9SMauro Carvalho Chehab
10dc7bbea9SMauro Carvalho Chehab #include <linux/init.h>
11dc7bbea9SMauro Carvalho Chehab #include <linux/kernel.h>
12dc7bbea9SMauro Carvalho Chehab #include <linux/module.h>
13dc7bbea9SMauro Carvalho Chehab #include <linux/interrupt.h>
14dc7bbea9SMauro Carvalho Chehab #include <linux/spinlock.h>
15dc7bbea9SMauro Carvalho Chehab #include <linux/slab.h>
16dc7bbea9SMauro Carvalho Chehab #include <linux/videodev2.h>
17dc7bbea9SMauro Carvalho Chehab #include <media/v4l2-device.h>
18dc7bbea9SMauro Carvalho Chehab #include <linux/platform_data/media/mmp-camera.h>
19dc7bbea9SMauro Carvalho Chehab #include <linux/device.h>
20dc7bbea9SMauro Carvalho Chehab #include <linux/of.h>
21dc7bbea9SMauro Carvalho Chehab #include <linux/of_platform.h>
22dc7bbea9SMauro Carvalho Chehab #include <linux/platform_device.h>
23dc7bbea9SMauro Carvalho Chehab #include <linux/pm_runtime.h>
24dc7bbea9SMauro Carvalho Chehab #include <linux/io.h>
25dc7bbea9SMauro Carvalho Chehab #include <linux/list.h>
26dc7bbea9SMauro Carvalho Chehab #include <linux/pm.h>
27dc7bbea9SMauro Carvalho Chehab #include <linux/clk.h>
28dc7bbea9SMauro Carvalho Chehab
29dc7bbea9SMauro Carvalho Chehab #include "mcam-core.h"
30dc7bbea9SMauro Carvalho Chehab
31dc7bbea9SMauro Carvalho Chehab MODULE_ALIAS("platform:mmp-camera");
32dc7bbea9SMauro Carvalho Chehab MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
33dc7bbea9SMauro Carvalho Chehab MODULE_LICENSE("GPL");
34dc7bbea9SMauro Carvalho Chehab
35dc7bbea9SMauro Carvalho Chehab static char *mcam_clks[] = {"axi", "func", "phy"};
36dc7bbea9SMauro Carvalho Chehab
37dc7bbea9SMauro Carvalho Chehab struct mmp_camera {
38dc7bbea9SMauro Carvalho Chehab struct platform_device *pdev;
39dc7bbea9SMauro Carvalho Chehab struct mcam_camera mcam;
40dc7bbea9SMauro Carvalho Chehab struct list_head devlist;
41dc7bbea9SMauro Carvalho Chehab struct clk *mipi_clk;
42dc7bbea9SMauro Carvalho Chehab int irq;
43dc7bbea9SMauro Carvalho Chehab };
44dc7bbea9SMauro Carvalho Chehab
mcam_to_cam(struct mcam_camera * mcam)45dc7bbea9SMauro Carvalho Chehab static inline struct mmp_camera *mcam_to_cam(struct mcam_camera *mcam)
46dc7bbea9SMauro Carvalho Chehab {
47dc7bbea9SMauro Carvalho Chehab return container_of(mcam, struct mmp_camera, mcam);
48dc7bbea9SMauro Carvalho Chehab }
49dc7bbea9SMauro Carvalho Chehab
50dc7bbea9SMauro Carvalho Chehab /*
51dc7bbea9SMauro Carvalho Chehab * calc the dphy register values
52dc7bbea9SMauro Carvalho Chehab * There are three dphy registers being used.
53dc7bbea9SMauro Carvalho Chehab * dphy[0] - CSI2_DPHY3
54dc7bbea9SMauro Carvalho Chehab * dphy[1] - CSI2_DPHY5
55dc7bbea9SMauro Carvalho Chehab * dphy[2] - CSI2_DPHY6
56dc7bbea9SMauro Carvalho Chehab * CSI2_DPHY3 and CSI2_DPHY6 can be set with a default value
57dc7bbea9SMauro Carvalho Chehab * or be calculated dynamically
58dc7bbea9SMauro Carvalho Chehab */
mmpcam_calc_dphy(struct mcam_camera * mcam)59dc7bbea9SMauro Carvalho Chehab static void mmpcam_calc_dphy(struct mcam_camera *mcam)
60dc7bbea9SMauro Carvalho Chehab {
61dc7bbea9SMauro Carvalho Chehab struct mmp_camera *cam = mcam_to_cam(mcam);
62dc7bbea9SMauro Carvalho Chehab struct mmp_camera_platform_data *pdata = cam->pdev->dev.platform_data;
63dc7bbea9SMauro Carvalho Chehab struct device *dev = &cam->pdev->dev;
64dc7bbea9SMauro Carvalho Chehab unsigned long tx_clk_esc;
65dc7bbea9SMauro Carvalho Chehab
66dc7bbea9SMauro Carvalho Chehab /*
67dc7bbea9SMauro Carvalho Chehab * If CSI2_DPHY3 is calculated dynamically,
68dc7bbea9SMauro Carvalho Chehab * pdata->lane_clk should be already set
69dc7bbea9SMauro Carvalho Chehab * either in the board driver statically
70dc7bbea9SMauro Carvalho Chehab * or in the sensor driver dynamically.
71dc7bbea9SMauro Carvalho Chehab */
72dc7bbea9SMauro Carvalho Chehab /*
73dc7bbea9SMauro Carvalho Chehab * dphy[0] - CSI2_DPHY3:
74dc7bbea9SMauro Carvalho Chehab * bit 0 ~ bit 7: HS Term Enable.
75dc7bbea9SMauro Carvalho Chehab * defines the time that the DPHY
76dc7bbea9SMauro Carvalho Chehab * wait before enabling the data
77dc7bbea9SMauro Carvalho Chehab * lane termination after detecting
78dc7bbea9SMauro Carvalho Chehab * that the sensor has driven the data
79dc7bbea9SMauro Carvalho Chehab * lanes to the LP00 bridge state.
80dc7bbea9SMauro Carvalho Chehab * The value is calculated by:
81dc7bbea9SMauro Carvalho Chehab * (Max T(D_TERM_EN)/Period(DDR)) - 1
82dc7bbea9SMauro Carvalho Chehab * bit 8 ~ bit 15: HS_SETTLE
83dc7bbea9SMauro Carvalho Chehab * Time interval during which the HS
84dc7bbea9SMauro Carvalho Chehab * receiver shall ignore any Data Lane
85dc7bbea9SMauro Carvalho Chehab * HS transitions.
86dc7bbea9SMauro Carvalho Chehab * The value has been calibrated on
87dc7bbea9SMauro Carvalho Chehab * different boards. It seems to work well.
88dc7bbea9SMauro Carvalho Chehab *
89dc7bbea9SMauro Carvalho Chehab * More detail please refer
90dc7bbea9SMauro Carvalho Chehab * MIPI Alliance Spectification for D-PHY
91dc7bbea9SMauro Carvalho Chehab * document for explanation of HS-SETTLE
92dc7bbea9SMauro Carvalho Chehab * and D-TERM-EN.
93dc7bbea9SMauro Carvalho Chehab */
94dc7bbea9SMauro Carvalho Chehab switch (pdata->dphy3_algo) {
95dc7bbea9SMauro Carvalho Chehab case DPHY3_ALGO_PXA910:
96dc7bbea9SMauro Carvalho Chehab /*
97dc7bbea9SMauro Carvalho Chehab * Calculate CSI2_DPHY3 algo for PXA910
98dc7bbea9SMauro Carvalho Chehab */
99dc7bbea9SMauro Carvalho Chehab pdata->dphy[0] =
100dc7bbea9SMauro Carvalho Chehab (((1 + (pdata->lane_clk * 80) / 1000) & 0xff) << 8)
101dc7bbea9SMauro Carvalho Chehab | (1 + pdata->lane_clk * 35 / 1000);
102dc7bbea9SMauro Carvalho Chehab break;
103dc7bbea9SMauro Carvalho Chehab case DPHY3_ALGO_PXA2128:
104dc7bbea9SMauro Carvalho Chehab /*
105dc7bbea9SMauro Carvalho Chehab * Calculate CSI2_DPHY3 algo for PXA2128
106dc7bbea9SMauro Carvalho Chehab */
107dc7bbea9SMauro Carvalho Chehab pdata->dphy[0] =
108dc7bbea9SMauro Carvalho Chehab (((2 + (pdata->lane_clk * 110) / 1000) & 0xff) << 8)
109dc7bbea9SMauro Carvalho Chehab | (1 + pdata->lane_clk * 35 / 1000);
110dc7bbea9SMauro Carvalho Chehab break;
111dc7bbea9SMauro Carvalho Chehab default:
112dc7bbea9SMauro Carvalho Chehab /*
113dc7bbea9SMauro Carvalho Chehab * Use default CSI2_DPHY3 value for PXA688/PXA988
114dc7bbea9SMauro Carvalho Chehab */
115dc7bbea9SMauro Carvalho Chehab dev_dbg(dev, "camera: use the default CSI2_DPHY3 value\n");
116dc7bbea9SMauro Carvalho Chehab }
117dc7bbea9SMauro Carvalho Chehab
118dc7bbea9SMauro Carvalho Chehab /*
119dc7bbea9SMauro Carvalho Chehab * mipi_clk will never be changed, it is a fixed value on MMP
120dc7bbea9SMauro Carvalho Chehab */
121dc7bbea9SMauro Carvalho Chehab if (IS_ERR(cam->mipi_clk))
122dc7bbea9SMauro Carvalho Chehab return;
123dc7bbea9SMauro Carvalho Chehab
124dc7bbea9SMauro Carvalho Chehab /* get the escape clk, this is hard coded */
125dc7bbea9SMauro Carvalho Chehab clk_prepare_enable(cam->mipi_clk);
126dc7bbea9SMauro Carvalho Chehab tx_clk_esc = (clk_get_rate(cam->mipi_clk) / 1000000) / 12;
127dc7bbea9SMauro Carvalho Chehab clk_disable_unprepare(cam->mipi_clk);
128dc7bbea9SMauro Carvalho Chehab /*
129dc7bbea9SMauro Carvalho Chehab * dphy[2] - CSI2_DPHY6:
130dc7bbea9SMauro Carvalho Chehab * bit 0 ~ bit 7: CK Term Enable
131dc7bbea9SMauro Carvalho Chehab * Time for the Clock Lane receiver to enable the HS line
132dc7bbea9SMauro Carvalho Chehab * termination. The value is calculated similarly with
133dc7bbea9SMauro Carvalho Chehab * HS Term Enable
134dc7bbea9SMauro Carvalho Chehab * bit 8 ~ bit 15: CK Settle
135dc7bbea9SMauro Carvalho Chehab * Time interval during which the HS receiver shall ignore
136dc7bbea9SMauro Carvalho Chehab * any Clock Lane HS transitions.
137dc7bbea9SMauro Carvalho Chehab * The value is calibrated on the boards.
138dc7bbea9SMauro Carvalho Chehab */
139dc7bbea9SMauro Carvalho Chehab pdata->dphy[2] =
140dc7bbea9SMauro Carvalho Chehab ((((534 * tx_clk_esc) / 2000 - 1) & 0xff) << 8)
141dc7bbea9SMauro Carvalho Chehab | (((38 * tx_clk_esc) / 1000 - 1) & 0xff);
142dc7bbea9SMauro Carvalho Chehab
143dc7bbea9SMauro Carvalho Chehab dev_dbg(dev, "camera: DPHY sets: dphy3=0x%x, dphy5=0x%x, dphy6=0x%x\n",
144dc7bbea9SMauro Carvalho Chehab pdata->dphy[0], pdata->dphy[1], pdata->dphy[2]);
145dc7bbea9SMauro Carvalho Chehab }
146dc7bbea9SMauro Carvalho Chehab
mmpcam_irq(int irq,void * data)147dc7bbea9SMauro Carvalho Chehab static irqreturn_t mmpcam_irq(int irq, void *data)
148dc7bbea9SMauro Carvalho Chehab {
149dc7bbea9SMauro Carvalho Chehab struct mcam_camera *mcam = data;
150dc7bbea9SMauro Carvalho Chehab unsigned int irqs, handled;
151dc7bbea9SMauro Carvalho Chehab
152dc7bbea9SMauro Carvalho Chehab spin_lock(&mcam->dev_lock);
153dc7bbea9SMauro Carvalho Chehab irqs = mcam_reg_read(mcam, REG_IRQSTAT);
154dc7bbea9SMauro Carvalho Chehab handled = mccic_irq(mcam, irqs);
155dc7bbea9SMauro Carvalho Chehab spin_unlock(&mcam->dev_lock);
156dc7bbea9SMauro Carvalho Chehab return IRQ_RETVAL(handled);
157dc7bbea9SMauro Carvalho Chehab }
158dc7bbea9SMauro Carvalho Chehab
mcam_init_clk(struct mcam_camera * mcam)159dc7bbea9SMauro Carvalho Chehab static void mcam_init_clk(struct mcam_camera *mcam)
160dc7bbea9SMauro Carvalho Chehab {
161dc7bbea9SMauro Carvalho Chehab unsigned int i;
162dc7bbea9SMauro Carvalho Chehab
163dc7bbea9SMauro Carvalho Chehab for (i = 0; i < NR_MCAM_CLK; i++) {
164dc7bbea9SMauro Carvalho Chehab if (mcam_clks[i] != NULL) {
165dc7bbea9SMauro Carvalho Chehab /* Some clks are not necessary on some boards
166dc7bbea9SMauro Carvalho Chehab * We still try to run even it fails getting clk
167dc7bbea9SMauro Carvalho Chehab */
168dc7bbea9SMauro Carvalho Chehab mcam->clk[i] = devm_clk_get(mcam->dev, mcam_clks[i]);
169dc7bbea9SMauro Carvalho Chehab if (IS_ERR(mcam->clk[i]))
170dc7bbea9SMauro Carvalho Chehab dev_warn(mcam->dev, "Could not get clk: %s\n",
171dc7bbea9SMauro Carvalho Chehab mcam_clks[i]);
172dc7bbea9SMauro Carvalho Chehab }
173dc7bbea9SMauro Carvalho Chehab }
174dc7bbea9SMauro Carvalho Chehab }
175dc7bbea9SMauro Carvalho Chehab
mmpcam_probe(struct platform_device * pdev)176dc7bbea9SMauro Carvalho Chehab static int mmpcam_probe(struct platform_device *pdev)
177dc7bbea9SMauro Carvalho Chehab {
178dc7bbea9SMauro Carvalho Chehab struct mmp_camera *cam;
179dc7bbea9SMauro Carvalho Chehab struct mcam_camera *mcam;
180dc7bbea9SMauro Carvalho Chehab struct resource *res;
181dc7bbea9SMauro Carvalho Chehab struct fwnode_handle *ep;
182dc7bbea9SMauro Carvalho Chehab struct mmp_camera_platform_data *pdata;
183adb2dcd5SSakari Ailus struct v4l2_async_connection *asd;
184dc7bbea9SMauro Carvalho Chehab int ret;
185dc7bbea9SMauro Carvalho Chehab
186dc7bbea9SMauro Carvalho Chehab cam = devm_kzalloc(&pdev->dev, sizeof(*cam), GFP_KERNEL);
187dc7bbea9SMauro Carvalho Chehab if (cam == NULL)
188dc7bbea9SMauro Carvalho Chehab return -ENOMEM;
189dc7bbea9SMauro Carvalho Chehab platform_set_drvdata(pdev, cam);
190dc7bbea9SMauro Carvalho Chehab cam->pdev = pdev;
191dc7bbea9SMauro Carvalho Chehab INIT_LIST_HEAD(&cam->devlist);
192dc7bbea9SMauro Carvalho Chehab
193dc7bbea9SMauro Carvalho Chehab mcam = &cam->mcam;
194dc7bbea9SMauro Carvalho Chehab mcam->calc_dphy = mmpcam_calc_dphy;
195dc7bbea9SMauro Carvalho Chehab mcam->dev = &pdev->dev;
196dc7bbea9SMauro Carvalho Chehab pdata = pdev->dev.platform_data;
197dc7bbea9SMauro Carvalho Chehab if (pdata) {
198dc7bbea9SMauro Carvalho Chehab mcam->mclk_src = pdata->mclk_src;
199dc7bbea9SMauro Carvalho Chehab mcam->mclk_div = pdata->mclk_div;
200dc7bbea9SMauro Carvalho Chehab mcam->bus_type = pdata->bus_type;
201dc7bbea9SMauro Carvalho Chehab mcam->dphy = pdata->dphy;
202dc7bbea9SMauro Carvalho Chehab mcam->lane = pdata->lane;
203dc7bbea9SMauro Carvalho Chehab } else {
204dc7bbea9SMauro Carvalho Chehab /*
205dc7bbea9SMauro Carvalho Chehab * These are values that used to be hardcoded in mcam-core and
206dc7bbea9SMauro Carvalho Chehab * work well on a OLPC XO 1.75 with a parallel bus sensor.
207dc7bbea9SMauro Carvalho Chehab * If it turns out other setups make sense, the values should
208dc7bbea9SMauro Carvalho Chehab * be obtained from the device tree.
209dc7bbea9SMauro Carvalho Chehab */
210dc7bbea9SMauro Carvalho Chehab mcam->mclk_src = 3;
211dc7bbea9SMauro Carvalho Chehab mcam->mclk_div = 2;
212dc7bbea9SMauro Carvalho Chehab }
213dc7bbea9SMauro Carvalho Chehab if (mcam->bus_type == V4L2_MBUS_CSI2_DPHY) {
214dc7bbea9SMauro Carvalho Chehab cam->mipi_clk = devm_clk_get(mcam->dev, "mipi");
215dc7bbea9SMauro Carvalho Chehab if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0))
216dc7bbea9SMauro Carvalho Chehab return PTR_ERR(cam->mipi_clk);
217dc7bbea9SMauro Carvalho Chehab }
218dc7bbea9SMauro Carvalho Chehab mcam->mipi_enabled = false;
219dc7bbea9SMauro Carvalho Chehab mcam->chip_id = MCAM_ARMADA610;
220dc7bbea9SMauro Carvalho Chehab mcam->buffer_mode = B_DMA_sg;
221dc7bbea9SMauro Carvalho Chehab strscpy(mcam->bus_info, "platform:mmp-camera", sizeof(mcam->bus_info));
222dc7bbea9SMauro Carvalho Chehab spin_lock_init(&mcam->dev_lock);
223dc7bbea9SMauro Carvalho Chehab /*
224dc7bbea9SMauro Carvalho Chehab * Get our I/O memory.
225dc7bbea9SMauro Carvalho Chehab */
226d9a88c7cSYangtao Li mcam->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
227dc7bbea9SMauro Carvalho Chehab if (IS_ERR(mcam->regs))
228dc7bbea9SMauro Carvalho Chehab return PTR_ERR(mcam->regs);
229dc7bbea9SMauro Carvalho Chehab mcam->regs_size = resource_size(res);
230dc7bbea9SMauro Carvalho Chehab
231dc7bbea9SMauro Carvalho Chehab mcam_init_clk(mcam);
232dc7bbea9SMauro Carvalho Chehab
233dc7bbea9SMauro Carvalho Chehab /*
234*4ab7185aSLubomir Rintel * Register with V4L.
235*4ab7185aSLubomir Rintel */
236*4ab7185aSLubomir Rintel
237*4ab7185aSLubomir Rintel ret = v4l2_device_register(mcam->dev, &mcam->v4l2_dev);
238*4ab7185aSLubomir Rintel if (ret)
239*4ab7185aSLubomir Rintel return ret;
240*4ab7185aSLubomir Rintel
241*4ab7185aSLubomir Rintel /*
242dc7bbea9SMauro Carvalho Chehab * Create a match of the sensor against its OF node.
243dc7bbea9SMauro Carvalho Chehab */
244dc7bbea9SMauro Carvalho Chehab ep = fwnode_graph_get_next_endpoint(of_fwnode_handle(pdev->dev.of_node),
245dc7bbea9SMauro Carvalho Chehab NULL);
246*4ab7185aSLubomir Rintel if (!ep) {
247*4ab7185aSLubomir Rintel ret = -ENODEV;
248*4ab7185aSLubomir Rintel goto out_v4l2_device_unregister;
249*4ab7185aSLubomir Rintel }
250dc7bbea9SMauro Carvalho Chehab
251b8ec754aSSakari Ailus v4l2_async_nf_init(&mcam->notifier, &mcam->v4l2_dev);
252dc7bbea9SMauro Carvalho Chehab
253dc7bbea9SMauro Carvalho Chehab asd = v4l2_async_nf_add_fwnode_remote(&mcam->notifier, ep,
254adb2dcd5SSakari Ailus struct v4l2_async_connection);
255dc7bbea9SMauro Carvalho Chehab fwnode_handle_put(ep);
256dc7bbea9SMauro Carvalho Chehab if (IS_ERR(asd)) {
257dc7bbea9SMauro Carvalho Chehab ret = PTR_ERR(asd);
258*4ab7185aSLubomir Rintel goto out_v4l2_device_unregister;
259dc7bbea9SMauro Carvalho Chehab }
260dc7bbea9SMauro Carvalho Chehab
261dc7bbea9SMauro Carvalho Chehab /*
262dc7bbea9SMauro Carvalho Chehab * Register the device with the core.
263dc7bbea9SMauro Carvalho Chehab */
264dc7bbea9SMauro Carvalho Chehab ret = mccic_register(mcam);
265dc7bbea9SMauro Carvalho Chehab if (ret)
266*4ab7185aSLubomir Rintel goto out_v4l2_device_unregister;
267dc7bbea9SMauro Carvalho Chehab
268dc7bbea9SMauro Carvalho Chehab /*
269dc7bbea9SMauro Carvalho Chehab * Add OF clock provider.
270dc7bbea9SMauro Carvalho Chehab */
271dc7bbea9SMauro Carvalho Chehab ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
272dc7bbea9SMauro Carvalho Chehab mcam->mclk);
273dc7bbea9SMauro Carvalho Chehab if (ret) {
274dc7bbea9SMauro Carvalho Chehab dev_err(&pdev->dev, "can't add DT clock provider\n");
275dc7bbea9SMauro Carvalho Chehab goto out;
276dc7bbea9SMauro Carvalho Chehab }
277dc7bbea9SMauro Carvalho Chehab
278dc7bbea9SMauro Carvalho Chehab /*
279dc7bbea9SMauro Carvalho Chehab * Finally, set up our IRQ now that the core is ready to
280dc7bbea9SMauro Carvalho Chehab * deal with it.
281dc7bbea9SMauro Carvalho Chehab */
282dc7bbea9SMauro Carvalho Chehab ret = platform_get_irq(pdev, 0);
283dc7bbea9SMauro Carvalho Chehab if (ret < 0)
284dc7bbea9SMauro Carvalho Chehab goto out;
285dc7bbea9SMauro Carvalho Chehab cam->irq = ret;
286dc7bbea9SMauro Carvalho Chehab ret = devm_request_irq(&pdev->dev, cam->irq, mmpcam_irq, IRQF_SHARED,
287dc7bbea9SMauro Carvalho Chehab "mmp-camera", mcam);
288dc7bbea9SMauro Carvalho Chehab if (ret)
289dc7bbea9SMauro Carvalho Chehab goto out;
290dc7bbea9SMauro Carvalho Chehab
291dc7bbea9SMauro Carvalho Chehab pm_runtime_enable(&pdev->dev);
292dc7bbea9SMauro Carvalho Chehab return 0;
293dc7bbea9SMauro Carvalho Chehab out:
294dc7bbea9SMauro Carvalho Chehab mccic_shutdown(mcam);
295*4ab7185aSLubomir Rintel out_v4l2_device_unregister:
296*4ab7185aSLubomir Rintel v4l2_device_unregister(&mcam->v4l2_dev);
297dc7bbea9SMauro Carvalho Chehab
298dc7bbea9SMauro Carvalho Chehab return ret;
299dc7bbea9SMauro Carvalho Chehab }
300dc7bbea9SMauro Carvalho Chehab
mmpcam_remove(struct platform_device * pdev)301100290bfSUwe Kleine-König static void mmpcam_remove(struct platform_device *pdev)
302dc7bbea9SMauro Carvalho Chehab {
30394eca0c0SUwe Kleine-König struct mmp_camera *cam = platform_get_drvdata(pdev);
304dc7bbea9SMauro Carvalho Chehab struct mcam_camera *mcam = &cam->mcam;
305dc7bbea9SMauro Carvalho Chehab
306dc7bbea9SMauro Carvalho Chehab mccic_shutdown(mcam);
307*4ab7185aSLubomir Rintel v4l2_device_unregister(&mcam->v4l2_dev);
308dc7bbea9SMauro Carvalho Chehab pm_runtime_force_suspend(mcam->dev);
309dc7bbea9SMauro Carvalho Chehab }
310dc7bbea9SMauro Carvalho Chehab
311dc7bbea9SMauro Carvalho Chehab /*
312dc7bbea9SMauro Carvalho Chehab * Suspend/resume support.
313dc7bbea9SMauro Carvalho Chehab */
314dc7bbea9SMauro Carvalho Chehab
mmpcam_runtime_resume(struct device * dev)315dc7bbea9SMauro Carvalho Chehab static int __maybe_unused mmpcam_runtime_resume(struct device *dev)
316dc7bbea9SMauro Carvalho Chehab {
317dc7bbea9SMauro Carvalho Chehab struct mmp_camera *cam = dev_get_drvdata(dev);
318dc7bbea9SMauro Carvalho Chehab struct mcam_camera *mcam = &cam->mcam;
319dc7bbea9SMauro Carvalho Chehab unsigned int i;
320dc7bbea9SMauro Carvalho Chehab
321dc7bbea9SMauro Carvalho Chehab for (i = 0; i < NR_MCAM_CLK; i++) {
322dc7bbea9SMauro Carvalho Chehab if (!IS_ERR(mcam->clk[i]))
323dc7bbea9SMauro Carvalho Chehab clk_prepare_enable(mcam->clk[i]);
324dc7bbea9SMauro Carvalho Chehab }
325dc7bbea9SMauro Carvalho Chehab
326dc7bbea9SMauro Carvalho Chehab return 0;
327dc7bbea9SMauro Carvalho Chehab }
328dc7bbea9SMauro Carvalho Chehab
mmpcam_runtime_suspend(struct device * dev)329dc7bbea9SMauro Carvalho Chehab static int __maybe_unused mmpcam_runtime_suspend(struct device *dev)
330dc7bbea9SMauro Carvalho Chehab {
331dc7bbea9SMauro Carvalho Chehab struct mmp_camera *cam = dev_get_drvdata(dev);
332dc7bbea9SMauro Carvalho Chehab struct mcam_camera *mcam = &cam->mcam;
333dc7bbea9SMauro Carvalho Chehab int i;
334dc7bbea9SMauro Carvalho Chehab
335dc7bbea9SMauro Carvalho Chehab for (i = NR_MCAM_CLK - 1; i >= 0; i--) {
336dc7bbea9SMauro Carvalho Chehab if (!IS_ERR(mcam->clk[i]))
337dc7bbea9SMauro Carvalho Chehab clk_disable_unprepare(mcam->clk[i]);
338dc7bbea9SMauro Carvalho Chehab }
339dc7bbea9SMauro Carvalho Chehab
340dc7bbea9SMauro Carvalho Chehab return 0;
341dc7bbea9SMauro Carvalho Chehab }
342dc7bbea9SMauro Carvalho Chehab
mmpcam_suspend(struct device * dev)343dc7bbea9SMauro Carvalho Chehab static int __maybe_unused mmpcam_suspend(struct device *dev)
344dc7bbea9SMauro Carvalho Chehab {
345dc7bbea9SMauro Carvalho Chehab struct mmp_camera *cam = dev_get_drvdata(dev);
346dc7bbea9SMauro Carvalho Chehab
347dc7bbea9SMauro Carvalho Chehab if (!pm_runtime_suspended(dev))
348dc7bbea9SMauro Carvalho Chehab mccic_suspend(&cam->mcam);
349dc7bbea9SMauro Carvalho Chehab return 0;
350dc7bbea9SMauro Carvalho Chehab }
351dc7bbea9SMauro Carvalho Chehab
mmpcam_resume(struct device * dev)352dc7bbea9SMauro Carvalho Chehab static int __maybe_unused mmpcam_resume(struct device *dev)
353dc7bbea9SMauro Carvalho Chehab {
354dc7bbea9SMauro Carvalho Chehab struct mmp_camera *cam = dev_get_drvdata(dev);
355dc7bbea9SMauro Carvalho Chehab
356dc7bbea9SMauro Carvalho Chehab if (!pm_runtime_suspended(dev))
357dc7bbea9SMauro Carvalho Chehab return mccic_resume(&cam->mcam);
358dc7bbea9SMauro Carvalho Chehab return 0;
359dc7bbea9SMauro Carvalho Chehab }
360dc7bbea9SMauro Carvalho Chehab
361dc7bbea9SMauro Carvalho Chehab static const struct dev_pm_ops mmpcam_pm_ops = {
362dc7bbea9SMauro Carvalho Chehab SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL)
363dc7bbea9SMauro Carvalho Chehab SET_SYSTEM_SLEEP_PM_OPS(mmpcam_suspend, mmpcam_resume)
364dc7bbea9SMauro Carvalho Chehab };
365dc7bbea9SMauro Carvalho Chehab
366dc7bbea9SMauro Carvalho Chehab static const struct of_device_id mmpcam_of_match[] = {
367dc7bbea9SMauro Carvalho Chehab { .compatible = "marvell,mmp2-ccic", },
368dc7bbea9SMauro Carvalho Chehab {},
369dc7bbea9SMauro Carvalho Chehab };
370dc7bbea9SMauro Carvalho Chehab MODULE_DEVICE_TABLE(of, mmpcam_of_match);
371dc7bbea9SMauro Carvalho Chehab
372dc7bbea9SMauro Carvalho Chehab static struct platform_driver mmpcam_driver = {
373dc7bbea9SMauro Carvalho Chehab .probe = mmpcam_probe,
374100290bfSUwe Kleine-König .remove_new = mmpcam_remove,
375dc7bbea9SMauro Carvalho Chehab .driver = {
376dc7bbea9SMauro Carvalho Chehab .name = "mmp-camera",
377ef7aa3a7SKrzysztof Kozlowski .of_match_table = mmpcam_of_match,
378dc7bbea9SMauro Carvalho Chehab .pm = &mmpcam_pm_ops,
379dc7bbea9SMauro Carvalho Chehab }
380dc7bbea9SMauro Carvalho Chehab };
381dc7bbea9SMauro Carvalho Chehab
382dc7bbea9SMauro Carvalho Chehab module_platform_driver(mmpcam_driver);
383