1*2a0c2806SHans Verkuil /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*2a0c2806SHans Verkuil /* 3*2a0c2806SHans Verkuil * Zoran ZR36016 basic configuration functions - header file 4*2a0c2806SHans Verkuil * 5*2a0c2806SHans Verkuil * Copyright (C) 2001 Wolfgang Scherr <scherr@net4you.at> 6*2a0c2806SHans Verkuil */ 7*2a0c2806SHans Verkuil 8*2a0c2806SHans Verkuil #ifndef ZR36016_H 9*2a0c2806SHans Verkuil #define ZR36016_H 10*2a0c2806SHans Verkuil 11*2a0c2806SHans Verkuil /* data stored for each zoran jpeg codec chip */ 12*2a0c2806SHans Verkuil struct zr36016 { 13*2a0c2806SHans Verkuil char name[32]; 14*2a0c2806SHans Verkuil int num; 15*2a0c2806SHans Verkuil /* io datastructure */ 16*2a0c2806SHans Verkuil struct videocodec *codec; 17*2a0c2806SHans Verkuil // coder status 18*2a0c2806SHans Verkuil __u8 version; 19*2a0c2806SHans Verkuil // actual coder setup 20*2a0c2806SHans Verkuil int mode; 21*2a0c2806SHans Verkuil 22*2a0c2806SHans Verkuil __u16 xoff; 23*2a0c2806SHans Verkuil __u16 yoff; 24*2a0c2806SHans Verkuil __u16 width; 25*2a0c2806SHans Verkuil __u16 height; 26*2a0c2806SHans Verkuil __u16 xdec; 27*2a0c2806SHans Verkuil __u16 ydec; 28*2a0c2806SHans Verkuil }; 29*2a0c2806SHans Verkuil 30*2a0c2806SHans Verkuil /* direct register addresses */ 31*2a0c2806SHans Verkuil #define ZR016_GOSTOP 0x00 32*2a0c2806SHans Verkuil #define ZR016_MODE 0x01 33*2a0c2806SHans Verkuil #define ZR016_IADDR 0x02 34*2a0c2806SHans Verkuil #define ZR016_IDATA 0x03 35*2a0c2806SHans Verkuil 36*2a0c2806SHans Verkuil /* indirect register addresses */ 37*2a0c2806SHans Verkuil #define ZR016I_SETUP1 0x00 38*2a0c2806SHans Verkuil #define ZR016I_SETUP2 0x01 39*2a0c2806SHans Verkuil #define ZR016I_NAX_LO 0x02 40*2a0c2806SHans Verkuil #define ZR016I_NAX_HI 0x03 41*2a0c2806SHans Verkuil #define ZR016I_PAX_LO 0x04 42*2a0c2806SHans Verkuil #define ZR016I_PAX_HI 0x05 43*2a0c2806SHans Verkuil #define ZR016I_NAY_LO 0x06 44*2a0c2806SHans Verkuil #define ZR016I_NAY_HI 0x07 45*2a0c2806SHans Verkuil #define ZR016I_PAY_LO 0x08 46*2a0c2806SHans Verkuil #define ZR016I_PAY_HI 0x09 47*2a0c2806SHans Verkuil #define ZR016I_NOL_LO 0x0a 48*2a0c2806SHans Verkuil #define ZR016I_NOL_HI 0x0b 49*2a0c2806SHans Verkuil 50*2a0c2806SHans Verkuil /* possible values for mode register */ 51*2a0c2806SHans Verkuil #define ZR016_RGB444_YUV444 0x00 52*2a0c2806SHans Verkuil #define ZR016_RGB444_YUV422 0x01 53*2a0c2806SHans Verkuil #define ZR016_RGB444_YUV411 0x02 54*2a0c2806SHans Verkuil #define ZR016_RGB444_Y400 0x03 55*2a0c2806SHans Verkuil #define ZR016_RGB444_RGB444 0x04 56*2a0c2806SHans Verkuil #define ZR016_YUV444_YUV444 0x08 57*2a0c2806SHans Verkuil #define ZR016_YUV444_YUV422 0x09 58*2a0c2806SHans Verkuil #define ZR016_YUV444_YUV411 0x0a 59*2a0c2806SHans Verkuil #define ZR016_YUV444_Y400 0x0b 60*2a0c2806SHans Verkuil #define ZR016_YUV444_RGB444 0x0c 61*2a0c2806SHans Verkuil #define ZR016_YUV422_YUV422 0x11 62*2a0c2806SHans Verkuil #define ZR016_YUV422_YUV411 0x12 63*2a0c2806SHans Verkuil #define ZR016_YUV422_Y400 0x13 64*2a0c2806SHans Verkuil #define ZR016_YUV411_YUV411 0x16 65*2a0c2806SHans Verkuil #define ZR016_YUV411_Y400 0x17 66*2a0c2806SHans Verkuil #define ZR016_4444_4444 0x19 67*2a0c2806SHans Verkuil #define ZR016_100_100 0x1b 68*2a0c2806SHans Verkuil 69*2a0c2806SHans Verkuil #define ZR016_RGB444 0x00 70*2a0c2806SHans Verkuil #define ZR016_YUV444 0x20 71*2a0c2806SHans Verkuil #define ZR016_YUV422 0x40 72*2a0c2806SHans Verkuil 73*2a0c2806SHans Verkuil #define ZR016_COMPRESSION 0x80 74*2a0c2806SHans Verkuil #define ZR016_EXPANSION 0x80 75*2a0c2806SHans Verkuil 76*2a0c2806SHans Verkuil /* possible values for setup 1 register */ 77*2a0c2806SHans Verkuil #define ZR016_CKRT 0x80 78*2a0c2806SHans Verkuil #define ZR016_VERT 0x40 79*2a0c2806SHans Verkuil #define ZR016_HORZ 0x20 80*2a0c2806SHans Verkuil #define ZR016_HRFL 0x10 81*2a0c2806SHans Verkuil #define ZR016_DSFL 0x08 82*2a0c2806SHans Verkuil #define ZR016_SBFL 0x04 83*2a0c2806SHans Verkuil #define ZR016_RSTR 0x02 84*2a0c2806SHans Verkuil #define ZR016_CNTI 0x01 85*2a0c2806SHans Verkuil 86*2a0c2806SHans Verkuil /* possible values for setup 2 register */ 87*2a0c2806SHans Verkuil #define ZR016_SYEN 0x40 88*2a0c2806SHans Verkuil #define ZR016_CCIR 0x04 89*2a0c2806SHans Verkuil #define ZR016_SIGN 0x02 90*2a0c2806SHans Verkuil #define ZR016_YMCS 0x01 91*2a0c2806SHans Verkuil 92*2a0c2806SHans Verkuil int zr36016_init_module(void); 93*2a0c2806SHans Verkuil void zr36016_cleanup_module(void); 94*2a0c2806SHans Verkuil #endif /*fndef ZR36016_H */ 95