1c942fddfSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 228cae868SHans Verkuil /* 3*cf293a4fSAlexander A. Klimov * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com> 428cae868SHans Verkuil * 528cae868SHans Verkuil * Original author: 628cae868SHans Verkuil * Ben Collins <bcollins@ubuntu.com> 728cae868SHans Verkuil * 828cae868SHans Verkuil * Additional work by: 928cae868SHans Verkuil * John Brooks <john.brooks@bluecherry.net> 1028cae868SHans Verkuil */ 1128cae868SHans Verkuil 1228cae868SHans Verkuil #ifndef __SOLO6X10_REGISTERS_H 1328cae868SHans Verkuil #define __SOLO6X10_REGISTERS_H 1428cae868SHans Verkuil 15cce8cccaSMauro Carvalho Chehab #include <linux/bitops.h> 16cce8cccaSMauro Carvalho Chehab 1728cae868SHans Verkuil #include "solo6x10-offsets.h" 1828cae868SHans Verkuil 1928cae868SHans Verkuil /* Global 6010 system configuration */ 2028cae868SHans Verkuil #define SOLO_SYS_CFG 0x0000 2128cae868SHans Verkuil #define SOLO_SYS_CFG_FOUT_EN 0x00000001 2228cae868SHans Verkuil #define SOLO_SYS_CFG_PLL_BYPASS 0x00000002 2328cae868SHans Verkuil #define SOLO_SYS_CFG_PLL_PWDN 0x00000004 2428cae868SHans Verkuil #define SOLO_SYS_CFG_OUTDIV(__n) (((__n) & 0x003) << 3) 2528cae868SHans Verkuil #define SOLO_SYS_CFG_FEEDBACKDIV(__n) (((__n) & 0x1ff) << 5) 2628cae868SHans Verkuil #define SOLO_SYS_CFG_INPUTDIV(__n) (((__n) & 0x01f) << 14) 2728cae868SHans Verkuil #define SOLO_SYS_CFG_CLOCK_DIV 0x00080000 2828cae868SHans Verkuil #define SOLO_SYS_CFG_NCLK_DELAY(__n) (((__n) & 0x003) << 24) 2928cae868SHans Verkuil #define SOLO_SYS_CFG_PCLK_DELAY(__n) (((__n) & 0x00f) << 26) 3028cae868SHans Verkuil #define SOLO_SYS_CFG_SDRAM64BIT 0x40000000 3128cae868SHans Verkuil #define SOLO_SYS_CFG_RESET 0x80000000 3228cae868SHans Verkuil 3328cae868SHans Verkuil #define SOLO_DMA_CTRL 0x0004 3428cae868SHans Verkuil #define SOLO_DMA_CTRL_REFRESH_CYCLE(n) ((n)<<8) 3528cae868SHans Verkuil /* 0=16/32MB, 1=32/64MB, 2=64/128MB, 3=128/256MB */ 3628cae868SHans Verkuil #define SOLO_DMA_CTRL_SDRAM_SIZE(n) ((n)<<6) 37cce8cccaSMauro Carvalho Chehab #define SOLO_DMA_CTRL_SDRAM_CLK_INVERT BIT(5) 38cce8cccaSMauro Carvalho Chehab #define SOLO_DMA_CTRL_STROBE_SELECT BIT(4) 39cce8cccaSMauro Carvalho Chehab #define SOLO_DMA_CTRL_READ_DATA_SELECT BIT(3) 40cce8cccaSMauro Carvalho Chehab #define SOLO_DMA_CTRL_READ_CLK_SELECT BIT(2) 4128cae868SHans Verkuil #define SOLO_DMA_CTRL_LATENCY(n) ((n)<<0) 4228cae868SHans Verkuil 4328cae868SHans Verkuil /* Some things we set in this are undocumented. Why Softlogic?!?! */ 4428cae868SHans Verkuil #define SOLO_DMA_CTRL1 0x0008 4528cae868SHans Verkuil 4628cae868SHans Verkuil #define SOLO_SYS_VCLK 0x000C 47cce8cccaSMauro Carvalho Chehab #define SOLO_VCLK_INVERT BIT(22) 4828cae868SHans Verkuil /* 0=sys_clk/4, 1=sys_clk/2, 2=clk_in/2 of system input */ 4928cae868SHans Verkuil #define SOLO_VCLK_SELECT(n) ((n)<<20) 5028cae868SHans Verkuil #define SOLO_VCLK_VIN1415_DELAY(n) ((n)<<14) 5128cae868SHans Verkuil #define SOLO_VCLK_VIN1213_DELAY(n) ((n)<<12) 5228cae868SHans Verkuil #define SOLO_VCLK_VIN1011_DELAY(n) ((n)<<10) 5328cae868SHans Verkuil #define SOLO_VCLK_VIN0809_DELAY(n) ((n)<<8) 5428cae868SHans Verkuil #define SOLO_VCLK_VIN0607_DELAY(n) ((n)<<6) 5528cae868SHans Verkuil #define SOLO_VCLK_VIN0405_DELAY(n) ((n)<<4) 5628cae868SHans Verkuil #define SOLO_VCLK_VIN0203_DELAY(n) ((n)<<2) 5728cae868SHans Verkuil #define SOLO_VCLK_VIN0001_DELAY(n) ((n)<<0) 5828cae868SHans Verkuil 5928cae868SHans Verkuil #define SOLO_IRQ_STAT 0x0010 6028cae868SHans Verkuil #define SOLO_IRQ_MASK 0x0014 61cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_P2M(n) BIT((n) + 17) 62cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_GPIO BIT(16) 63cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_VIDEO_LOSS BIT(15) 64cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_VIDEO_IN BIT(14) 65cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_MOTION BIT(13) 66cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_ATA_CMD BIT(12) 67cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_ATA_DIR BIT(11) 68cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_PCI_ERR BIT(10) 69cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_PS2_1 BIT(9) 70cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_PS2_0 BIT(8) 71cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_SPI BIT(7) 72cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_IIC BIT(6) 73cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_UART(n) BIT((n) + 4) 74cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_G723 BIT(3) 75cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_DECODER BIT(1) 76cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_ENCODER BIT(0) 7728cae868SHans Verkuil 7828cae868SHans Verkuil #define SOLO_CHIP_OPTION 0x001C 7928cae868SHans Verkuil #define SOLO_CHIP_ID_MASK 0x00000007 8028cae868SHans Verkuil 8128cae868SHans Verkuil #define SOLO_PLL_CONFIG 0x0020 /* 6110 Only */ 8228cae868SHans Verkuil 8328cae868SHans Verkuil #define SOLO_EEPROM_CTRL 0x0060 84cce8cccaSMauro Carvalho Chehab #define SOLO_EEPROM_ACCESS_EN BIT(7) 85cce8cccaSMauro Carvalho Chehab #define SOLO_EEPROM_CS BIT(3) 86cce8cccaSMauro Carvalho Chehab #define SOLO_EEPROM_CLK BIT(2) 87cce8cccaSMauro Carvalho Chehab #define SOLO_EEPROM_DO BIT(1) 88cce8cccaSMauro Carvalho Chehab #define SOLO_EEPROM_DI BIT(0) 8928cae868SHans Verkuil #define SOLO_EEPROM_ENABLE (SOLO_EEPROM_ACCESS_EN | SOLO_EEPROM_CS) 9028cae868SHans Verkuil 9128cae868SHans Verkuil #define SOLO_PCI_ERR 0x0070 9228cae868SHans Verkuil #define SOLO_PCI_ERR_FATAL 0x00000001 9328cae868SHans Verkuil #define SOLO_PCI_ERR_PARITY 0x00000002 9428cae868SHans Verkuil #define SOLO_PCI_ERR_TARGET 0x00000004 9528cae868SHans Verkuil #define SOLO_PCI_ERR_TIMEOUT 0x00000008 9628cae868SHans Verkuil #define SOLO_PCI_ERR_P2M 0x00000010 9728cae868SHans Verkuil #define SOLO_PCI_ERR_ATA 0x00000020 9828cae868SHans Verkuil #define SOLO_PCI_ERR_P2M_DESC 0x00000040 9928cae868SHans Verkuil #define SOLO_PCI_ERR_FSM0(__s) (((__s) >> 16) & 0x0f) 10028cae868SHans Verkuil #define SOLO_PCI_ERR_FSM1(__s) (((__s) >> 20) & 0x0f) 10128cae868SHans Verkuil #define SOLO_PCI_ERR_FSM2(__s) (((__s) >> 24) & 0x1f) 10228cae868SHans Verkuil 10328cae868SHans Verkuil #define SOLO_P2M_BASE 0x0080 10428cae868SHans Verkuil 10528cae868SHans Verkuil #define SOLO_P2M_CONFIG(n) (0x0080 + ((n)*0x20)) 10628cae868SHans Verkuil #define SOLO_P2M_DMA_INTERVAL(n) ((n)<<6)/* N*32 clocks */ 107cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_CSC_BYTE_REORDER BIT(5) /* BGR -> RGB */ 10828cae868SHans Verkuil /* 0:r=[14:10] g=[9:5] b=[4:0], 1:r=[15:11] g=[10:5] b=[4:0] */ 109cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_CSC_16BIT_565 BIT(4) 110cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_UV_SWAP BIT(3) 111cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_PCI_MASTER_MODE BIT(2) 112cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_DESC_INTR_OPT BIT(1) /* 1:Empty, 0:Each */ 113cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_DESC_MODE BIT(0) 11428cae868SHans Verkuil 11528cae868SHans Verkuil #define SOLO_P2M_DES_ADR(n) (0x0084 + ((n)*0x20)) 11628cae868SHans Verkuil 11728cae868SHans Verkuil #define SOLO_P2M_DESC_ID(n) (0x0088 + ((n)*0x20)) 11828cae868SHans Verkuil #define SOLO_P2M_UPDATE_ID(n) ((n)<<0) 11928cae868SHans Verkuil 12028cae868SHans Verkuil #define SOLO_P2M_STATUS(n) (0x008C + ((n)*0x20)) 121cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_COMMAND_DONE BIT(8) 12228cae868SHans Verkuil #define SOLO_P2M_CURRENT_ID(stat) (0xff & (stat)) 12328cae868SHans Verkuil 12428cae868SHans Verkuil #define SOLO_P2M_CONTROL(n) (0x0090 + ((n)*0x20)) 12528cae868SHans Verkuil #define SOLO_P2M_PCI_INC(n) ((n)<<20) 12628cae868SHans Verkuil #define SOLO_P2M_REPEAT(n) ((n)<<10) 12728cae868SHans Verkuil /* 0:512, 1:256, 2:128, 3:64, 4:32, 5:128(2page) */ 12828cae868SHans Verkuil #define SOLO_P2M_BURST_SIZE(n) ((n)<<7) 12928cae868SHans Verkuil #define SOLO_P2M_BURST_512 0 13028cae868SHans Verkuil #define SOLO_P2M_BURST_256 1 13128cae868SHans Verkuil #define SOLO_P2M_BURST_128 2 13228cae868SHans Verkuil #define SOLO_P2M_BURST_64 3 13328cae868SHans Verkuil #define SOLO_P2M_BURST_32 4 134cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_CSC_16BIT BIT(6) /* 0:24bit, 1:16bit */ 13528cae868SHans Verkuil /* 0:Y[0]<-0(OFF), 1:Y[0]<-1(ON), 2:Y[0]<-G[0], 3:Y[0]<-Bit[15] */ 13628cae868SHans Verkuil #define SOLO_P2M_ALPHA_MODE(n) ((n)<<4) 137cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_CSC_ON BIT(3) 138cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_INTERRUPT_REQ BIT(2) 139cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_WRITE BIT(1) 140cce8cccaSMauro Carvalho Chehab #define SOLO_P2M_TRANS_ON BIT(0) 14128cae868SHans Verkuil 14228cae868SHans Verkuil #define SOLO_P2M_EXT_CFG(n) (0x0094 + ((n)*0x20)) 14328cae868SHans Verkuil #define SOLO_P2M_EXT_INC(n) ((n)<<20) 14428cae868SHans Verkuil #define SOLO_P2M_COPY_SIZE(n) ((n)<<0) 14528cae868SHans Verkuil 14628cae868SHans Verkuil #define SOLO_P2M_TAR_ADR(n) (0x0098 + ((n)*0x20)) 14728cae868SHans Verkuil 14828cae868SHans Verkuil #define SOLO_P2M_EXT_ADR(n) (0x009C + ((n)*0x20)) 14928cae868SHans Verkuil 15028cae868SHans Verkuil #define SOLO_P2M_BUFFER(i) (0x2000 + ((i)*4)) 15128cae868SHans Verkuil 15228cae868SHans Verkuil #define SOLO_VI_CH_SWITCH_0 0x0100 15328cae868SHans Verkuil #define SOLO_VI_CH_SWITCH_1 0x0104 15428cae868SHans Verkuil #define SOLO_VI_CH_SWITCH_2 0x0108 15528cae868SHans Verkuil 15628cae868SHans Verkuil #define SOLO_VI_CH_ENA 0x010C 15728cae868SHans Verkuil #define SOLO_VI_CH_FORMAT 0x0110 15828cae868SHans Verkuil #define SOLO_VI_FD_SEL_MASK(n) ((n)<<16) 15928cae868SHans Verkuil #define SOLO_VI_PROG_MASK(n) ((n)<<0) 16028cae868SHans Verkuil 16128cae868SHans Verkuil #define SOLO_VI_FMT_CFG 0x0114 162cce8cccaSMauro Carvalho Chehab #define SOLO_VI_FMT_CHECK_VCOUNT BIT(31) 163cce8cccaSMauro Carvalho Chehab #define SOLO_VI_FMT_CHECK_HCOUNT BIT(30) 164cce8cccaSMauro Carvalho Chehab #define SOLO_VI_FMT_TEST_SIGNAL BIT(28) 16528cae868SHans Verkuil 16628cae868SHans Verkuil #define SOLO_VI_PAGE_SW 0x0118 16728cae868SHans Verkuil #define SOLO_FI_INV_DISP_LIVE(n) ((n)<<8) 16828cae868SHans Verkuil #define SOLO_FI_INV_DISP_OUT(n) ((n)<<7) 16928cae868SHans Verkuil #define SOLO_DISP_SYNC_FI(n) ((n)<<6) 17028cae868SHans Verkuil #define SOLO_PIP_PAGE_ADD(n) ((n)<<3) 17128cae868SHans Verkuil #define SOLO_NORMAL_PAGE_ADD(n) ((n)<<0) 17228cae868SHans Verkuil 17328cae868SHans Verkuil #define SOLO_VI_ACT_I_P 0x011C 17428cae868SHans Verkuil #define SOLO_VI_ACT_I_S 0x0120 17528cae868SHans Verkuil #define SOLO_VI_ACT_P 0x0124 176cce8cccaSMauro Carvalho Chehab #define SOLO_VI_FI_INVERT BIT(31) 17728cae868SHans Verkuil #define SOLO_VI_H_START(n) ((n)<<21) 17828cae868SHans Verkuil #define SOLO_VI_V_START(n) ((n)<<11) 17928cae868SHans Verkuil #define SOLO_VI_V_STOP(n) ((n)<<0) 18028cae868SHans Verkuil 18128cae868SHans Verkuil #define SOLO_VI_STATUS0 0x0128 18228cae868SHans Verkuil #define SOLO_VI_STATUS0_PAGE(__n) ((__n) & 0x07) 18328cae868SHans Verkuil #define SOLO_VI_STATUS1 0x012C 18428cae868SHans Verkuil 18528cae868SHans Verkuil /* XXX: Might be better off in kernel level disp.h */ 18628cae868SHans Verkuil #define DISP_PAGE(stat) ((stat) & 0x07) 18728cae868SHans Verkuil 18828cae868SHans Verkuil #define SOLO_VI_PB_CONFIG 0x0130 189cce8cccaSMauro Carvalho Chehab #define SOLO_VI_PB_USER_MODE BIT(1) 190cce8cccaSMauro Carvalho Chehab #define SOLO_VI_PB_PAL BIT(0) 19128cae868SHans Verkuil #define SOLO_VI_PB_RANGE_HV 0x0134 19228cae868SHans Verkuil #define SOLO_VI_PB_HSIZE(h) ((h)<<12) 19328cae868SHans Verkuil #define SOLO_VI_PB_VSIZE(v) ((v)<<0) 19428cae868SHans Verkuil #define SOLO_VI_PB_ACT_H 0x0138 19528cae868SHans Verkuil #define SOLO_VI_PB_HSTART(n) ((n)<<12) 19628cae868SHans Verkuil #define SOLO_VI_PB_HSTOP(n) ((n)<<0) 19728cae868SHans Verkuil #define SOLO_VI_PB_ACT_V 0x013C 19828cae868SHans Verkuil #define SOLO_VI_PB_VSTART(n) ((n)<<12) 19928cae868SHans Verkuil #define SOLO_VI_PB_VSTOP(n) ((n)<<0) 20028cae868SHans Verkuil 20128cae868SHans Verkuil #define SOLO_VI_MOSAIC(ch) (0x0140 + ((ch)*4)) 20228cae868SHans Verkuil #define SOLO_VI_MOSAIC_SX(x) ((x)<<24) 20328cae868SHans Verkuil #define SOLO_VI_MOSAIC_EX(x) ((x)<<16) 20428cae868SHans Verkuil #define SOLO_VI_MOSAIC_SY(x) ((x)<<8) 20528cae868SHans Verkuil #define SOLO_VI_MOSAIC_EY(x) ((x)<<0) 20628cae868SHans Verkuil 20728cae868SHans Verkuil #define SOLO_VI_WIN_CTRL0(ch) (0x0180 + ((ch)*4)) 20828cae868SHans Verkuil #define SOLO_VI_WIN_CTRL1(ch) (0x01C0 + ((ch)*4)) 20928cae868SHans Verkuil 21028cae868SHans Verkuil #define SOLO_VI_WIN_CHANNEL(n) ((n)<<28) 21128cae868SHans Verkuil 21228cae868SHans Verkuil #define SOLO_VI_WIN_PIP(n) ((n)<<27) 21328cae868SHans Verkuil #define SOLO_VI_WIN_SCALE(n) ((n)<<24) 21428cae868SHans Verkuil 21528cae868SHans Verkuil #define SOLO_VI_WIN_SX(x) ((x)<<12) 21628cae868SHans Verkuil #define SOLO_VI_WIN_EX(x) ((x)<<0) 21728cae868SHans Verkuil 21828cae868SHans Verkuil #define SOLO_VI_WIN_SY(x) ((x)<<12) 21928cae868SHans Verkuil #define SOLO_VI_WIN_EY(x) ((x)<<0) 22028cae868SHans Verkuil 22128cae868SHans Verkuil #define SOLO_VI_WIN_ON(ch) (0x0200 + ((ch)*4)) 22228cae868SHans Verkuil 22328cae868SHans Verkuil #define SOLO_VI_WIN_SW 0x0240 22428cae868SHans Verkuil #define SOLO_VI_WIN_LIVE_AUTO_MUTE 0x0244 22528cae868SHans Verkuil 22628cae868SHans Verkuil #define SOLO_VI_MOT_ADR 0x0260 22728cae868SHans Verkuil #define SOLO_VI_MOTION_EN(mask) ((mask)<<16) 22828cae868SHans Verkuil #define SOLO_VI_MOT_CTRL 0x0264 22928cae868SHans Verkuil #define SOLO_VI_MOTION_FRAME_COUNT(n) ((n)<<24) 23028cae868SHans Verkuil #define SOLO_VI_MOTION_SAMPLE_LENGTH(n) ((n)<<16) 231cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_INTR_START_STOP BIT(15) 232cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_FREEZE_DATA BIT(14) 23328cae868SHans Verkuil #define SOLO_VI_MOTION_SAMPLE_COUNT(n) ((n)<<0) 23428cae868SHans Verkuil #define SOLO_VI_MOT_CLEAR 0x0268 23528cae868SHans Verkuil #define SOLO_VI_MOT_STATUS 0x026C 23628cae868SHans Verkuil #define SOLO_VI_MOTION_CNT(n) ((n)<<0) 23728cae868SHans Verkuil #define SOLO_VI_MOTION_BORDER 0x0270 23828cae868SHans Verkuil #define SOLO_VI_MOTION_BAR 0x0274 239cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_Y_SET BIT(29) 240cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_Y_ADD BIT(28) 241cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_CB_SET BIT(27) 242cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_CB_ADD BIT(26) 243cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_CR_SET BIT(25) 244cce8cccaSMauro Carvalho Chehab #define SOLO_VI_MOTION_CR_ADD BIT(24) 24528cae868SHans Verkuil #define SOLO_VI_MOTION_Y_VALUE(v) ((v)<<16) 24628cae868SHans Verkuil #define SOLO_VI_MOTION_CB_VALUE(v) ((v)<<8) 24728cae868SHans Verkuil #define SOLO_VI_MOTION_CR_VALUE(v) ((v)<<0) 24828cae868SHans Verkuil 24928cae868SHans Verkuil #define SOLO_VO_FMT_ENC 0x0300 250cce8cccaSMauro Carvalho Chehab #define SOLO_VO_SCAN_MODE_PROGRESSIVE BIT(31) 251cce8cccaSMauro Carvalho Chehab #define SOLO_VO_FMT_TYPE_PAL BIT(30) 25228cae868SHans Verkuil #define SOLO_VO_FMT_TYPE_NTSC 0 253cce8cccaSMauro Carvalho Chehab #define SOLO_VO_USER_SET BIT(29) 25428cae868SHans Verkuil 255cce8cccaSMauro Carvalho Chehab #define SOLO_VO_FI_CHANGE BIT(20) 256cce8cccaSMauro Carvalho Chehab #define SOLO_VO_USER_COLOR_SET_VSYNC BIT(19) 257cce8cccaSMauro Carvalho Chehab #define SOLO_VO_USER_COLOR_SET_HSYNC BIT(18) 258cce8cccaSMauro Carvalho Chehab #define SOLO_VO_USER_COLOR_SET_NAH BIT(17) 259cce8cccaSMauro Carvalho Chehab #define SOLO_VO_USER_COLOR_SET_NAV BIT(16) 26028cae868SHans Verkuil #define SOLO_VO_NA_COLOR_Y(Y) ((Y)<<8) 26128cae868SHans Verkuil #define SOLO_VO_NA_COLOR_CB(CB) (((CB)/16)<<4) 26228cae868SHans Verkuil #define SOLO_VO_NA_COLOR_CR(CR) (((CR)/16)<<0) 26328cae868SHans Verkuil 26428cae868SHans Verkuil #define SOLO_VO_ACT_H 0x0304 26528cae868SHans Verkuil #define SOLO_VO_H_BLANK(n) ((n)<<22) 26628cae868SHans Verkuil #define SOLO_VO_H_START(n) ((n)<<11) 26728cae868SHans Verkuil #define SOLO_VO_H_STOP(n) ((n)<<0) 26828cae868SHans Verkuil 26928cae868SHans Verkuil #define SOLO_VO_ACT_V 0x0308 27028cae868SHans Verkuil #define SOLO_VO_V_BLANK(n) ((n)<<22) 27128cae868SHans Verkuil #define SOLO_VO_V_START(n) ((n)<<11) 27228cae868SHans Verkuil #define SOLO_VO_V_STOP(n) ((n)<<0) 27328cae868SHans Verkuil 27428cae868SHans Verkuil #define SOLO_VO_RANGE_HV 0x030C 275cce8cccaSMauro Carvalho Chehab #define SOLO_VO_SYNC_INVERT BIT(24) 276cce8cccaSMauro Carvalho Chehab #define SOLO_VO_HSYNC_INVERT BIT(23) 277cce8cccaSMauro Carvalho Chehab #define SOLO_VO_VSYNC_INVERT BIT(22) 27828cae868SHans Verkuil #define SOLO_VO_H_LEN(n) ((n)<<11) 27928cae868SHans Verkuil #define SOLO_VO_V_LEN(n) ((n)<<0) 28028cae868SHans Verkuil 28128cae868SHans Verkuil #define SOLO_VO_DISP_CTRL 0x0310 282cce8cccaSMauro Carvalho Chehab #define SOLO_VO_DISP_ON BIT(31) 28328cae868SHans Verkuil #define SOLO_VO_DISP_ERASE_COUNT(n) ((n&0xf)<<24) 284cce8cccaSMauro Carvalho Chehab #define SOLO_VO_DISP_DOUBLE_SCAN BIT(22) 285cce8cccaSMauro Carvalho Chehab #define SOLO_VO_DISP_SINGLE_PAGE BIT(21) 28628cae868SHans Verkuil #define SOLO_VO_DISP_BASE(n) (((n)>>16) & 0xffff) 28728cae868SHans Verkuil 28828cae868SHans Verkuil #define SOLO_VO_DISP_ERASE 0x0314 289cce8cccaSMauro Carvalho Chehab #define SOLO_VO_DISP_ERASE_ON BIT(0) 29028cae868SHans Verkuil 29128cae868SHans Verkuil #define SOLO_VO_ZOOM_CTRL 0x0318 292cce8cccaSMauro Carvalho Chehab #define SOLO_VO_ZOOM_VER_ON BIT(24) 293cce8cccaSMauro Carvalho Chehab #define SOLO_VO_ZOOM_HOR_ON BIT(23) 294cce8cccaSMauro Carvalho Chehab #define SOLO_VO_ZOOM_V_COMP BIT(22) 29528cae868SHans Verkuil #define SOLO_VO_ZOOM_SX(h) (((h)/2)<<11) 29628cae868SHans Verkuil #define SOLO_VO_ZOOM_SY(v) (((v)/2)<<0) 29728cae868SHans Verkuil 29828cae868SHans Verkuil #define SOLO_VO_FREEZE_CTRL 0x031C 299cce8cccaSMauro Carvalho Chehab #define SOLO_VO_FREEZE_ON BIT(1) 300cce8cccaSMauro Carvalho Chehab #define SOLO_VO_FREEZE_INTERPOLATION BIT(0) 30128cae868SHans Verkuil 30228cae868SHans Verkuil #define SOLO_VO_BKG_COLOR 0x0320 30328cae868SHans Verkuil #define SOLO_BG_Y(y) ((y)<<16) 30428cae868SHans Verkuil #define SOLO_BG_U(u) ((u)<<8) 30528cae868SHans Verkuil #define SOLO_BG_V(v) ((v)<<0) 30628cae868SHans Verkuil 30728cae868SHans Verkuil #define SOLO_VO_DEINTERLACE 0x0324 30828cae868SHans Verkuil #define SOLO_VO_DEINTERLACE_THRESHOLD(n) ((n)<<8) 30928cae868SHans Verkuil #define SOLO_VO_DEINTERLACE_EDGE_VALUE(n) ((n)<<0) 31028cae868SHans Verkuil 31128cae868SHans Verkuil #define SOLO_VO_BORDER_LINE_COLOR 0x0330 31228cae868SHans Verkuil #define SOLO_VO_BORDER_FILL_COLOR 0x0334 31328cae868SHans Verkuil #define SOLO_VO_BORDER_LINE_MASK 0x0338 31428cae868SHans Verkuil #define SOLO_VO_BORDER_FILL_MASK 0x033c 31528cae868SHans Verkuil 31628cae868SHans Verkuil #define SOLO_VO_BORDER_X(n) (0x0340+((n)*4)) 31728cae868SHans Verkuil #define SOLO_VO_BORDER_Y(n) (0x0354+((n)*4)) 31828cae868SHans Verkuil 31928cae868SHans Verkuil #define SOLO_VO_CELL_EXT_SET 0x0368 32028cae868SHans Verkuil #define SOLO_VO_CELL_EXT_START 0x036c 32128cae868SHans Verkuil #define SOLO_VO_CELL_EXT_STOP 0x0370 32228cae868SHans Verkuil 32328cae868SHans Verkuil #define SOLO_VO_CELL_EXT_SET2 0x0374 32428cae868SHans Verkuil #define SOLO_VO_CELL_EXT_START2 0x0378 32528cae868SHans Verkuil #define SOLO_VO_CELL_EXT_STOP2 0x037c 32628cae868SHans Verkuil 32728cae868SHans Verkuil #define SOLO_VO_RECTANGLE_CTRL(n) (0x0368+((n)*12)) 32828cae868SHans Verkuil #define SOLO_VO_RECTANGLE_START(n) (0x036c+((n)*12)) 32928cae868SHans Verkuil #define SOLO_VO_RECTANGLE_STOP(n) (0x0370+((n)*12)) 33028cae868SHans Verkuil 33128cae868SHans Verkuil #define SOLO_VO_CURSOR_POS (0x0380) 33228cae868SHans Verkuil #define SOLO_VO_CURSOR_CLR (0x0384) 33328cae868SHans Verkuil #define SOLO_VO_CURSOR_CLR2 (0x0388) 33428cae868SHans Verkuil #define SOLO_VO_CURSOR_MASK(id) (0x0390+((id)*4)) 33528cae868SHans Verkuil 33628cae868SHans Verkuil #define SOLO_VO_EXPANSION(id) (0x0250+((id)*4)) 33728cae868SHans Verkuil 33828cae868SHans Verkuil #define SOLO_OSG_CONFIG 0x03E0 339cce8cccaSMauro Carvalho Chehab #define SOLO_VO_OSG_ON BIT(31) 340cce8cccaSMauro Carvalho Chehab #define SOLO_VO_OSG_COLOR_MUTE BIT(28) 34128cae868SHans Verkuil #define SOLO_VO_OSG_ALPHA_RATE(n) ((n)<<22) 34228cae868SHans Verkuil #define SOLO_VO_OSG_ALPHA_BG_RATE(n) ((n)<<16) 34328cae868SHans Verkuil #define SOLO_VO_OSG_BASE(offset) (((offset)>>16)&0xffff) 34428cae868SHans Verkuil 34528cae868SHans Verkuil #define SOLO_OSG_ERASE 0x03E4 34628cae868SHans Verkuil #define SOLO_OSG_ERASE_ON (0x80) 34728cae868SHans Verkuil #define SOLO_OSG_ERASE_OFF (0x00) 34828cae868SHans Verkuil 34928cae868SHans Verkuil #define SOLO_VO_OSG_BLINK 0x03E8 350cce8cccaSMauro Carvalho Chehab #define SOLO_VO_OSG_BLINK_ON BIT(1) 351cce8cccaSMauro Carvalho Chehab #define SOLO_VO_OSG_BLINK_INTREVAL18 BIT(0) 35228cae868SHans Verkuil 35328cae868SHans Verkuil #define SOLO_CAP_BASE 0x0400 35428cae868SHans Verkuil #define SOLO_CAP_MAX_PAGE(n) ((n)<<16) 35528cae868SHans Verkuil #define SOLO_CAP_BASE_ADDR(n) ((n)<<0) 35628cae868SHans Verkuil #define SOLO_CAP_BTW 0x0404 35728cae868SHans Verkuil #define SOLO_CAP_PROG_BANDWIDTH(n) ((n)<<8) 35828cae868SHans Verkuil #define SOLO_CAP_MAX_BANDWIDTH(n) ((n)<<0) 35928cae868SHans Verkuil 36028cae868SHans Verkuil #define SOLO_DIM_SCALE1 0x0408 36128cae868SHans Verkuil #define SOLO_DIM_SCALE2 0x040C 36228cae868SHans Verkuil #define SOLO_DIM_SCALE3 0x0410 36328cae868SHans Verkuil #define SOLO_DIM_SCALE4 0x0414 36428cae868SHans Verkuil #define SOLO_DIM_SCALE5 0x0418 36528cae868SHans Verkuil #define SOLO_DIM_V_MB_NUM_FRAME(n) ((n)<<16) 36628cae868SHans Verkuil #define SOLO_DIM_V_MB_NUM_FIELD(n) ((n)<<8) 36728cae868SHans Verkuil #define SOLO_DIM_H_MB_NUM(n) ((n)<<0) 36828cae868SHans Verkuil 36928cae868SHans Verkuil #define SOLO_DIM_PROG 0x041C 37028cae868SHans Verkuil #define SOLO_CAP_STATUS 0x0420 37128cae868SHans Verkuil 37228cae868SHans Verkuil #define SOLO_CAP_CH_SCALE(ch) (0x0440+((ch)*4)) 37328cae868SHans Verkuil #define SOLO_CAP_CH_COMP_ENA_E(ch) (0x0480+((ch)*4)) 37428cae868SHans Verkuil #define SOLO_CAP_CH_INTV(ch) (0x04C0+((ch)*4)) 37528cae868SHans Verkuil #define SOLO_CAP_CH_INTV_E(ch) (0x0500+((ch)*4)) 37628cae868SHans Verkuil 37728cae868SHans Verkuil 37828cae868SHans Verkuil #define SOLO_VE_CFG0 0x0610 379cce8cccaSMauro Carvalho Chehab #define SOLO_VE_TWO_PAGE_MODE BIT(31) 38028cae868SHans Verkuil #define SOLO_VE_INTR_CTRL(n) ((n)<<24) 38128cae868SHans Verkuil #define SOLO_VE_BLOCK_SIZE(n) ((n)<<16) 38228cae868SHans Verkuil #define SOLO_VE_BLOCK_BASE(n) ((n)<<0) 38328cae868SHans Verkuil 38428cae868SHans Verkuil #define SOLO_VE_CFG1 0x0614 38528cae868SHans Verkuil #define SOLO_VE_BYTE_ALIGN(n) ((n)<<24) 386cce8cccaSMauro Carvalho Chehab #define SOLO_VE_INSERT_INDEX BIT(18) 38728cae868SHans Verkuil #define SOLO_VE_MOTION_MODE(n) ((n)<<16) 38828cae868SHans Verkuil #define SOLO_VE_MOTION_BASE(n) ((n)<<0) 38928cae868SHans Verkuil #define SOLO_VE_MPEG_SIZE_H(n) ((n)<<28) /* 6110 Only */ 39028cae868SHans Verkuil #define SOLO_VE_JPEG_SIZE_H(n) ((n)<<20) /* 6110 Only */ 391cce8cccaSMauro Carvalho Chehab #define SOLO_VE_INSERT_INDEX_JPEG BIT(19) /* 6110 Only */ 39228cae868SHans Verkuil 39328cae868SHans Verkuil #define SOLO_VE_WMRK_POLY 0x061C 39428cae868SHans Verkuil #define SOLO_VE_VMRK_INIT_KEY 0x0620 39528cae868SHans Verkuil #define SOLO_VE_WMRK_STRL 0x0624 39628cae868SHans Verkuil #define SOLO_VE_ENCRYP_POLY 0x0628 39728cae868SHans Verkuil #define SOLO_VE_ENCRYP_INIT 0x062C 39828cae868SHans Verkuil #define SOLO_VE_ATTR 0x0630 399cce8cccaSMauro Carvalho Chehab #define SOLO_VE_LITTLE_ENDIAN BIT(31) 400cce8cccaSMauro Carvalho Chehab #define SOLO_COMP_ATTR_RN BIT(30) 40128cae868SHans Verkuil #define SOLO_COMP_ATTR_FCODE(n) ((n)<<27) 40228cae868SHans Verkuil #define SOLO_COMP_TIME_INC(n) ((n)<<25) 40328cae868SHans Verkuil #define SOLO_COMP_TIME_WIDTH(n) ((n)<<21) 40428cae868SHans Verkuil #define SOLO_DCT_INTERVAL(n) ((n)<<16) 40528cae868SHans Verkuil #define SOLO_VE_COMPT_MOT 0x0634 /* 6110 Only */ 40628cae868SHans Verkuil 40728cae868SHans Verkuil #define SOLO_VE_STATE(n) (0x0640+((n)*4)) 40828cae868SHans Verkuil 40928cae868SHans Verkuil #define SOLO_VE_JPEG_QP_TBL 0x0670 41028cae868SHans Verkuil #define SOLO_VE_JPEG_QP_CH_L 0x0674 41128cae868SHans Verkuil #define SOLO_VE_JPEG_QP_CH_H 0x0678 41228cae868SHans Verkuil #define SOLO_VE_JPEG_CFG 0x067C 41328cae868SHans Verkuil #define SOLO_VE_JPEG_CTRL 0x0680 41428cae868SHans Verkuil #define SOLO_VE_CODE_ENCRYPT 0x0684 /* 6110 Only */ 41528cae868SHans Verkuil #define SOLO_VE_JPEG_CFG1 0x0688 /* 6110 Only */ 41628cae868SHans Verkuil #define SOLO_VE_WMRK_ENABLE 0x068C /* 6110 Only */ 41728cae868SHans Verkuil #define SOLO_VE_OSD_CH 0x0690 41828cae868SHans Verkuil #define SOLO_VE_OSD_BASE 0x0694 41928cae868SHans Verkuil #define SOLO_VE_OSD_CLR 0x0698 42028cae868SHans Verkuil #define SOLO_VE_OSD_OPT 0x069C 421cce8cccaSMauro Carvalho Chehab #define SOLO_VE_OSD_V_DOUBLE BIT(16) /* 6110 Only */ 422cce8cccaSMauro Carvalho Chehab #define SOLO_VE_OSD_H_SHADOW BIT(15) 423cce8cccaSMauro Carvalho Chehab #define SOLO_VE_OSD_V_SHADOW BIT(14) 42428cae868SHans Verkuil #define SOLO_VE_OSD_H_OFFSET(n) ((n & 0x7f)<<7) 42528cae868SHans Verkuil #define SOLO_VE_OSD_V_OFFSET(n) (n & 0x7f) 42628cae868SHans Verkuil 42728cae868SHans Verkuil #define SOLO_VE_CH_INTL(ch) (0x0700+((ch)*4)) 42828cae868SHans Verkuil #define SOLO_VE_CH_MOT(ch) (0x0740+((ch)*4)) 42928cae868SHans Verkuil #define SOLO_VE_CH_QP(ch) (0x0780+((ch)*4)) 43028cae868SHans Verkuil #define SOLO_VE_CH_QP_E(ch) (0x07C0+((ch)*4)) 43128cae868SHans Verkuil #define SOLO_VE_CH_GOP(ch) (0x0800+((ch)*4)) 43228cae868SHans Verkuil #define SOLO_VE_CH_GOP_E(ch) (0x0840+((ch)*4)) 43328cae868SHans Verkuil #define SOLO_VE_CH_REF_BASE(ch) (0x0880+((ch)*4)) 43428cae868SHans Verkuil #define SOLO_VE_CH_REF_BASE_E(ch) (0x08C0+((ch)*4)) 43528cae868SHans Verkuil 43628cae868SHans Verkuil #define SOLO_VE_MPEG4_QUE(n) (0x0A00+((n)*8)) 43728cae868SHans Verkuil #define SOLO_VE_JPEG_QUE(n) (0x0A04+((n)*8)) 43828cae868SHans Verkuil 43928cae868SHans Verkuil #define SOLO_VD_CFG0 0x0900 440cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_NO_WRITE_NO_WINDOW BIT(24) 441cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_BUSY_WIAT_CODE BIT(23) 442cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_BUSY_WIAT_REF BIT(22) 443cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_BUSY_WIAT_RES BIT(21) 444cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_BUSY_WIAT_MS BIT(20) 445cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_SINGLE_MODE BIT(18) 446cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_SCAL_MANUAL BIT(17) 447cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_USER_PAGE_CTRL BIT(16) 448cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_LITTLE_ENDIAN BIT(15) 449cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_START_FI BIT(14) 450cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_ERR_LOCK BIT(13) 451cce8cccaSMauro Carvalho Chehab #define SOLO_VD_CFG_ERR_INT_ENA BIT(12) 45228cae868SHans Verkuil #define SOLO_VD_CFG_TIME_WIDTH(n) ((n)<<8) 45328cae868SHans Verkuil #define SOLO_VD_CFG_DCT_INTERVAL(n) ((n)<<0) 45428cae868SHans Verkuil 45528cae868SHans Verkuil #define SOLO_VD_CFG1 0x0904 45628cae868SHans Verkuil 45728cae868SHans Verkuil #define SOLO_VD_DEINTERLACE 0x0908 45828cae868SHans Verkuil #define SOLO_VD_DEINTERLACE_THRESHOLD(n) ((n)<<8) 45928cae868SHans Verkuil #define SOLO_VD_DEINTERLACE_EDGE_VALUE(n) ((n)<<0) 46028cae868SHans Verkuil 46128cae868SHans Verkuil #define SOLO_VD_CODE_ADR 0x090C 46228cae868SHans Verkuil 46328cae868SHans Verkuil #define SOLO_VD_CTRL 0x0910 464cce8cccaSMauro Carvalho Chehab #define SOLO_VD_OPER_ON BIT(31) 46528cae868SHans Verkuil #define SOLO_VD_MAX_ITEM(n) ((n)<<0) 46628cae868SHans Verkuil 46728cae868SHans Verkuil #define SOLO_VD_STATUS0 0x0920 468cce8cccaSMauro Carvalho Chehab #define SOLO_VD_STATUS0_INTR_ACK BIT(22) 469cce8cccaSMauro Carvalho Chehab #define SOLO_VD_STATUS0_INTR_EMPTY BIT(21) 470cce8cccaSMauro Carvalho Chehab #define SOLO_VD_STATUS0_INTR_ERR BIT(20) 47128cae868SHans Verkuil 47228cae868SHans Verkuil #define SOLO_VD_STATUS1 0x0924 47328cae868SHans Verkuil 47428cae868SHans Verkuil #define SOLO_VD_IDX0 0x0930 475cce8cccaSMauro Carvalho Chehab #define SOLO_VD_IDX_INTERLACE BIT(30) 47628cae868SHans Verkuil #define SOLO_VD_IDX_CHANNEL(n) ((n)<<24) 47728cae868SHans Verkuil #define SOLO_VD_IDX_SIZE(n) ((n)<<0) 47828cae868SHans Verkuil 47928cae868SHans Verkuil #define SOLO_VD_IDX1 0x0934 48028cae868SHans Verkuil #define SOLO_VD_IDX_SRC_SCALE(n) ((n)<<28) 48128cae868SHans Verkuil #define SOLO_VD_IDX_WINDOW(n) ((n)<<24) 482cce8cccaSMauro Carvalho Chehab #define SOLO_VD_IDX_DEINTERLACE BIT(16) 48328cae868SHans Verkuil #define SOLO_VD_IDX_H_BLOCK(n) ((n)<<8) 48428cae868SHans Verkuil #define SOLO_VD_IDX_V_BLOCK(n) ((n)<<0) 48528cae868SHans Verkuil 48628cae868SHans Verkuil #define SOLO_VD_IDX2 0x0938 487cce8cccaSMauro Carvalho Chehab #define SOLO_VD_IDX_REF_BASE_SIDE BIT(31) 48828cae868SHans Verkuil #define SOLO_VD_IDX_REF_BASE(n) (((n)>>16)&0xffff) 48928cae868SHans Verkuil 49028cae868SHans Verkuil #define SOLO_VD_IDX3 0x093C 49128cae868SHans Verkuil #define SOLO_VD_IDX_DISP_SCALE(n) ((n)<<28) 492cce8cccaSMauro Carvalho Chehab #define SOLO_VD_IDX_INTERLACE_WR BIT(27) 493cce8cccaSMauro Carvalho Chehab #define SOLO_VD_IDX_INTERPOL BIT(26) 494cce8cccaSMauro Carvalho Chehab #define SOLO_VD_IDX_HOR2X BIT(25) 49528cae868SHans Verkuil #define SOLO_VD_IDX_OFFSET_X(n) ((n)<<12) 49628cae868SHans Verkuil #define SOLO_VD_IDX_OFFSET_Y(n) ((n)<<0) 49728cae868SHans Verkuil 49828cae868SHans Verkuil #define SOLO_VD_IDX4 0x0940 49928cae868SHans Verkuil #define SOLO_VD_IDX_DEC_WR_PAGE(n) ((n)<<8) 50028cae868SHans Verkuil #define SOLO_VD_IDX_DISP_RD_PAGE(n) ((n)<<0) 50128cae868SHans Verkuil 50228cae868SHans Verkuil #define SOLO_VD_WR_PAGE(n) (0x03F0 + ((n) * 4)) 50328cae868SHans Verkuil 50428cae868SHans Verkuil 50528cae868SHans Verkuil #define SOLO_GPIO_CONFIG_0 0x0B00 50628cae868SHans Verkuil #define SOLO_GPIO_CONFIG_1 0x0B04 50728cae868SHans Verkuil #define SOLO_GPIO_DATA_OUT 0x0B08 50828cae868SHans Verkuil #define SOLO_GPIO_DATA_IN 0x0B0C 50928cae868SHans Verkuil #define SOLO_GPIO_INT_ACK_STA 0x0B10 51028cae868SHans Verkuil #define SOLO_GPIO_INT_ENA 0x0B14 51128cae868SHans Verkuil #define SOLO_GPIO_INT_CFG_0 0x0B18 51228cae868SHans Verkuil #define SOLO_GPIO_INT_CFG_1 0x0B1C 51328cae868SHans Verkuil 51428cae868SHans Verkuil 51528cae868SHans Verkuil #define SOLO_IIC_CFG 0x0B20 516cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_ENABLE BIT(8) 51728cae868SHans Verkuil #define SOLO_IIC_PRESCALE(n) ((n)<<0) 51828cae868SHans Verkuil 51928cae868SHans Verkuil #define SOLO_IIC_CTRL 0x0B24 520cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_AUTO_CLEAR BIT(20) 521cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_STATE_RX_ACK BIT(19) 522cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_STATE_BUSY BIT(18) 523cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_STATE_SIG_ERR BIT(17) 524cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_STATE_TRNS BIT(16) 52528cae868SHans Verkuil #define SOLO_IIC_CH_SET(n) ((n)<<5) 526cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_ACK_EN BIT(4) 527cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_START BIT(3) 528cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_STOP BIT(2) 529cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_READ BIT(1) 530cce8cccaSMauro Carvalho Chehab #define SOLO_IIC_WRITE BIT(0) 53128cae868SHans Verkuil 53228cae868SHans Verkuil #define SOLO_IIC_TXD 0x0B28 53328cae868SHans Verkuil #define SOLO_IIC_RXD 0x0B2C 53428cae868SHans Verkuil 53528cae868SHans Verkuil /* 53628cae868SHans Verkuil * UART REGISTER 53728cae868SHans Verkuil */ 53828cae868SHans Verkuil #define SOLO_UART_CONTROL(n) (0x0BA0 + ((n)*0x20)) 53928cae868SHans Verkuil #define SOLO_UART_CLK_DIV(n) ((n)<<24) 540cce8cccaSMauro Carvalho Chehab #define SOLO_MODEM_CTRL_EN BIT(20) 541cce8cccaSMauro Carvalho Chehab #define SOLO_PARITY_ERROR_DROP BIT(18) 542cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_ERR_EN BIT(17) 543cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_RX_EN BIT(16) 544cce8cccaSMauro Carvalho Chehab #define SOLO_IRQ_TX_EN BIT(15) 545cce8cccaSMauro Carvalho Chehab #define SOLO_RX_EN BIT(14) 546cce8cccaSMauro Carvalho Chehab #define SOLO_TX_EN BIT(13) 547cce8cccaSMauro Carvalho Chehab #define SOLO_UART_HALF_DUPLEX BIT(12) 548cce8cccaSMauro Carvalho Chehab #define SOLO_UART_LOOPBACK BIT(11) 54928cae868SHans Verkuil 55028cae868SHans Verkuil #define SOLO_BAUDRATE_230400 ((0<<9)|(0<<6)) 55128cae868SHans Verkuil #define SOLO_BAUDRATE_115200 ((0<<9)|(1<<6)) 55228cae868SHans Verkuil #define SOLO_BAUDRATE_57600 ((0<<9)|(2<<6)) 55328cae868SHans Verkuil #define SOLO_BAUDRATE_38400 ((0<<9)|(3<<6)) 55428cae868SHans Verkuil #define SOLO_BAUDRATE_19200 ((0<<9)|(4<<6)) 55528cae868SHans Verkuil #define SOLO_BAUDRATE_9600 ((0<<9)|(5<<6)) 55628cae868SHans Verkuil #define SOLO_BAUDRATE_4800 ((0<<9)|(6<<6)) 55728cae868SHans Verkuil #define SOLO_BAUDRATE_2400 ((1<<9)|(6<<6)) 55828cae868SHans Verkuil #define SOLO_BAUDRATE_1200 ((2<<9)|(6<<6)) 55928cae868SHans Verkuil #define SOLO_BAUDRATE_300 ((3<<9)|(6<<6)) 56028cae868SHans Verkuil 56128cae868SHans Verkuil #define SOLO_UART_DATA_BIT_8 (3<<4) 56228cae868SHans Verkuil #define SOLO_UART_DATA_BIT_7 (2<<4) 56328cae868SHans Verkuil #define SOLO_UART_DATA_BIT_6 (1<<4) 56428cae868SHans Verkuil #define SOLO_UART_DATA_BIT_5 (0<<4) 56528cae868SHans Verkuil 56628cae868SHans Verkuil #define SOLO_UART_STOP_BIT_1 (0<<2) 56728cae868SHans Verkuil #define SOLO_UART_STOP_BIT_2 (1<<2) 56828cae868SHans Verkuil 56928cae868SHans Verkuil #define SOLO_UART_PARITY_NONE (0<<0) 57028cae868SHans Verkuil #define SOLO_UART_PARITY_EVEN (2<<0) 57128cae868SHans Verkuil #define SOLO_UART_PARITY_ODD (3<<0) 57228cae868SHans Verkuil 57328cae868SHans Verkuil #define SOLO_UART_STATUS(n) (0x0BA4 + ((n)*0x20)) 574cce8cccaSMauro Carvalho Chehab #define SOLO_UART_CTS BIT(15) 575cce8cccaSMauro Carvalho Chehab #define SOLO_UART_RX_BUSY BIT(14) 576cce8cccaSMauro Carvalho Chehab #define SOLO_UART_OVERRUN BIT(13) 577cce8cccaSMauro Carvalho Chehab #define SOLO_UART_FRAME_ERR BIT(12) 578cce8cccaSMauro Carvalho Chehab #define SOLO_UART_PARITY_ERR BIT(11) 579cce8cccaSMauro Carvalho Chehab #define SOLO_UART_TX_BUSY BIT(5) 58028cae868SHans Verkuil 58128cae868SHans Verkuil #define SOLO_UART_RX_BUFF_CNT(stat) (((stat)>>6) & 0x1f) 58228cae868SHans Verkuil #define SOLO_UART_RX_BUFF_SIZE 8 58328cae868SHans Verkuil #define SOLO_UART_TX_BUFF_CNT(stat) (((stat)>>0) & 0x1f) 58428cae868SHans Verkuil #define SOLO_UART_TX_BUFF_SIZE 8 58528cae868SHans Verkuil 58628cae868SHans Verkuil #define SOLO_UART_TX_DATA(n) (0x0BA8 + ((n)*0x20)) 587cce8cccaSMauro Carvalho Chehab #define SOLO_UART_TX_DATA_PUSH BIT(8) 58828cae868SHans Verkuil #define SOLO_UART_RX_DATA(n) (0x0BAC + ((n)*0x20)) 589cce8cccaSMauro Carvalho Chehab #define SOLO_UART_RX_DATA_POP BIT(8) 59028cae868SHans Verkuil 59128cae868SHans Verkuil #define SOLO_TIMER_CLOCK_NUM 0x0be0 59228cae868SHans Verkuil #define SOLO_TIMER_USEC 0x0be8 59328cae868SHans Verkuil #define SOLO_TIMER_SEC 0x0bec 59428cae868SHans Verkuil #define SOLO_TIMER_USEC_LSB 0x0d20 /* 6110 Only */ 59528cae868SHans Verkuil 59628cae868SHans Verkuil #define SOLO_AUDIO_CONTROL 0x0D00 597cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_ENABLE BIT(31) 598cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_MASTER_MODE BIT(30) 599cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_I2S_MODE BIT(29) 600cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_I2S_LR_SWAP BIT(27) 601cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_I2S_8BIT BIT(26) 60228cae868SHans Verkuil #define SOLO_AUDIO_I2S_MULTI(n) ((n)<<24) 603cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_MIX_9TO0 BIT(23) 60428cae868SHans Verkuil #define SOLO_AUDIO_DEC_9TO0_VOL(n) ((n)<<20) 605cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_MIX_19TO10 BIT(19) 60628cae868SHans Verkuil #define SOLO_AUDIO_DEC_19TO10_VOL(n) ((n)<<16) 60728cae868SHans Verkuil #define SOLO_AUDIO_MODE(n) ((n)<<0) 60828cae868SHans Verkuil #define SOLO_AUDIO_SAMPLE 0x0D04 609cce8cccaSMauro Carvalho Chehab #define SOLO_AUDIO_EE_MODE_ON BIT(30) 61028cae868SHans Verkuil #define SOLO_AUDIO_EE_ENC_CH(ch) ((ch)<<25) 61128cae868SHans Verkuil #define SOLO_AUDIO_BITRATE(n) ((n)<<16) 61228cae868SHans Verkuil #define SOLO_AUDIO_CLK_DIV(n) ((n)<<0) 61328cae868SHans Verkuil #define SOLO_AUDIO_FDMA_INTR 0x0D08 61428cae868SHans Verkuil #define SOLO_AUDIO_FDMA_INTERVAL(n) ((n)<<19) 61528cae868SHans Verkuil #define SOLO_AUDIO_INTR_ORDER(n) ((n)<<16) 61628cae868SHans Verkuil #define SOLO_AUDIO_FDMA_BASE(n) ((n)<<0) 61728cae868SHans Verkuil #define SOLO_AUDIO_EVOL_0 0x0D0C 61828cae868SHans Verkuil #define SOLO_AUDIO_EVOL_1 0x0D10 61928cae868SHans Verkuil #define SOLO_AUDIO_EVOL(ch, value) ((value)<<((ch)%10)) 62028cae868SHans Verkuil #define SOLO_AUDIO_STA 0x0D14 62128cae868SHans Verkuil 62228cae868SHans Verkuil /* 62328cae868SHans Verkuil * Watchdog configuration 62428cae868SHans Verkuil */ 62528cae868SHans Verkuil #define SOLO_WATCHDOG 0x0be4 62628cae868SHans Verkuil #define SOLO_WATCHDOG_SET(status, sec) (status << 8 | (sec & 0xff)) 62728cae868SHans Verkuil 62828cae868SHans Verkuil #endif /* __SOLO6X10_REGISTERS_H */ 629