1*74ba9207SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
225aee3deSMauro Carvalho Chehab /*
325aee3deSMauro Carvalho Chehab Mantis PCI bridge driver
425aee3deSMauro Carvalho Chehab
525aee3deSMauro Carvalho Chehab Copyright (C) Manu Abraham (abraham.manu@gmail.com)
625aee3deSMauro Carvalho Chehab
725aee3deSMauro Carvalho Chehab */
825aee3deSMauro Carvalho Chehab
925aee3deSMauro Carvalho Chehab #include <linux/kernel.h>
1025aee3deSMauro Carvalho Chehab #include <linux/signal.h>
1125aee3deSMauro Carvalho Chehab #include <linux/sched.h>
1225aee3deSMauro Carvalho Chehab
1325aee3deSMauro Carvalho Chehab #include <linux/interrupt.h>
1425aee3deSMauro Carvalho Chehab #include <asm/io.h>
1525aee3deSMauro Carvalho Chehab
16fada1935SMauro Carvalho Chehab #include <media/dmxdev.h>
17fada1935SMauro Carvalho Chehab #include <media/dvbdev.h>
18fada1935SMauro Carvalho Chehab #include <media/dvb_demux.h>
19fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
20fada1935SMauro Carvalho Chehab #include <media/dvb_net.h>
2125aee3deSMauro Carvalho Chehab
2225aee3deSMauro Carvalho Chehab #include "mantis_common.h"
2325aee3deSMauro Carvalho Chehab
2425aee3deSMauro Carvalho Chehab #include "mantis_hif.h"
2525aee3deSMauro Carvalho Chehab #include "mantis_link.h" /* temporary due to physical layer stuff */
2625aee3deSMauro Carvalho Chehab
2725aee3deSMauro Carvalho Chehab #include "mantis_reg.h"
2825aee3deSMauro Carvalho Chehab
2925aee3deSMauro Carvalho Chehab
mantis_hif_sbuf_opdone_wait(struct mantis_ca * ca)3025aee3deSMauro Carvalho Chehab static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
3125aee3deSMauro Carvalho Chehab {
3225aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
3325aee3deSMauro Carvalho Chehab int rc = 0;
3425aee3deSMauro Carvalho Chehab
3525aee3deSMauro Carvalho Chehab if (wait_event_timeout(ca->hif_opdone_wq,
3625aee3deSMauro Carvalho Chehab ca->hif_event & MANTIS_SBUF_OPDONE,
3725aee3deSMauro Carvalho Chehab msecs_to_jiffies(500)) == -ERESTARTSYS) {
3825aee3deSMauro Carvalho Chehab
3925aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
4025aee3deSMauro Carvalho Chehab rc = -EREMOTEIO;
4125aee3deSMauro Carvalho Chehab }
4225aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
4325aee3deSMauro Carvalho Chehab ca->hif_event &= ~MANTIS_SBUF_OPDONE;
4425aee3deSMauro Carvalho Chehab return rc;
4525aee3deSMauro Carvalho Chehab }
4625aee3deSMauro Carvalho Chehab
mantis_hif_write_wait(struct mantis_ca * ca)4725aee3deSMauro Carvalho Chehab static int mantis_hif_write_wait(struct mantis_ca *ca)
4825aee3deSMauro Carvalho Chehab {
4925aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
5025aee3deSMauro Carvalho Chehab u32 opdone = 0, timeout = 0;
5125aee3deSMauro Carvalho Chehab int rc = 0;
5225aee3deSMauro Carvalho Chehab
5325aee3deSMauro Carvalho Chehab if (wait_event_timeout(ca->hif_write_wq,
5425aee3deSMauro Carvalho Chehab mantis->gpif_status & MANTIS_GPIF_WRACK,
5525aee3deSMauro Carvalho Chehab msecs_to_jiffies(500)) == -ERESTARTSYS) {
5625aee3deSMauro Carvalho Chehab
5725aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write ACK timed out !", mantis->num);
5825aee3deSMauro Carvalho Chehab rc = -EREMOTEIO;
5925aee3deSMauro Carvalho Chehab }
6025aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Write Acknowledged");
6125aee3deSMauro Carvalho Chehab mantis->gpif_status &= ~MANTIS_GPIF_WRACK;
6225aee3deSMauro Carvalho Chehab while (!opdone) {
6325aee3deSMauro Carvalho Chehab opdone = (mmread(MANTIS_GPIF_STATUS) & MANTIS_SBUF_OPDONE);
6425aee3deSMauro Carvalho Chehab udelay(500);
6525aee3deSMauro Carvalho Chehab timeout++;
6625aee3deSMauro Carvalho Chehab if (timeout > 100) {
6725aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write operation timed out!", mantis->num);
6825aee3deSMauro Carvalho Chehab rc = -ETIMEDOUT;
6925aee3deSMauro Carvalho Chehab break;
7025aee3deSMauro Carvalho Chehab }
7125aee3deSMauro Carvalho Chehab }
7225aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "HIF Write success");
7325aee3deSMauro Carvalho Chehab return rc;
7425aee3deSMauro Carvalho Chehab }
7525aee3deSMauro Carvalho Chehab
7625aee3deSMauro Carvalho Chehab
mantis_hif_read_mem(struct mantis_ca * ca,u32 addr)7725aee3deSMauro Carvalho Chehab int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
7825aee3deSMauro Carvalho Chehab {
7925aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
8025aee3deSMauro Carvalho Chehab u32 hif_addr = 0, data, count = 4;
8125aee3deSMauro Carvalho Chehab
8225aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
8325aee3deSMauro Carvalho Chehab mutex_lock(&ca->ca_lock);
8425aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
8525aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
8625aee3deSMauro Carvalho Chehab hif_addr |= MANTIS_HIF_STATUS;
8725aee3deSMauro Carvalho Chehab hif_addr |= addr;
8825aee3deSMauro Carvalho Chehab
8925aee3deSMauro Carvalho Chehab mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
9025aee3deSMauro Carvalho Chehab mmwrite(count, MANTIS_GPIF_BRBYTES);
9125aee3deSMauro Carvalho Chehab udelay(20);
9225aee3deSMauro Carvalho Chehab mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
9325aee3deSMauro Carvalho Chehab
9425aee3deSMauro Carvalho Chehab if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
9525aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
9625aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
9725aee3deSMauro Carvalho Chehab return -EREMOTEIO;
9825aee3deSMauro Carvalho Chehab }
9925aee3deSMauro Carvalho Chehab data = mmread(MANTIS_GPIF_DIN);
10025aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
10125aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
10225aee3deSMauro Carvalho Chehab return (data >> 24) & 0xff;
10325aee3deSMauro Carvalho Chehab }
10425aee3deSMauro Carvalho Chehab
mantis_hif_write_mem(struct mantis_ca * ca,u32 addr,u8 data)10525aee3deSMauro Carvalho Chehab int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
10625aee3deSMauro Carvalho Chehab {
10725aee3deSMauro Carvalho Chehab struct mantis_slot *slot = ca->slot;
10825aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
10925aee3deSMauro Carvalho Chehab u32 hif_addr = 0;
11025aee3deSMauro Carvalho Chehab
11125aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
11225aee3deSMauro Carvalho Chehab mutex_lock(&ca->ca_lock);
11325aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
11425aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
11525aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
11625aee3deSMauro Carvalho Chehab hif_addr |= MANTIS_HIF_STATUS;
11725aee3deSMauro Carvalho Chehab hif_addr |= addr;
11825aee3deSMauro Carvalho Chehab
11925aee3deSMauro Carvalho Chehab mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
12025aee3deSMauro Carvalho Chehab mmwrite(hif_addr, MANTIS_GPIF_ADDR);
12125aee3deSMauro Carvalho Chehab mmwrite(data, MANTIS_GPIF_DOUT);
12225aee3deSMauro Carvalho Chehab
12325aee3deSMauro Carvalho Chehab if (mantis_hif_write_wait(ca) != 0) {
12425aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
12525aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
12625aee3deSMauro Carvalho Chehab return -EREMOTEIO;
12725aee3deSMauro Carvalho Chehab }
12825aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
12925aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
13025aee3deSMauro Carvalho Chehab
13125aee3deSMauro Carvalho Chehab return 0;
13225aee3deSMauro Carvalho Chehab }
13325aee3deSMauro Carvalho Chehab
mantis_hif_read_iom(struct mantis_ca * ca,u32 addr)13425aee3deSMauro Carvalho Chehab int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
13525aee3deSMauro Carvalho Chehab {
13625aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
13725aee3deSMauro Carvalho Chehab u32 data, hif_addr = 0;
13825aee3deSMauro Carvalho Chehab
13925aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
14025aee3deSMauro Carvalho Chehab mutex_lock(&ca->ca_lock);
14125aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
14225aee3deSMauro Carvalho Chehab hif_addr |= MANTIS_GPIF_PCMCIAIOM;
14325aee3deSMauro Carvalho Chehab hif_addr |= MANTIS_HIF_STATUS;
14425aee3deSMauro Carvalho Chehab hif_addr |= addr;
14525aee3deSMauro Carvalho Chehab
14625aee3deSMauro Carvalho Chehab mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
14725aee3deSMauro Carvalho Chehab mmwrite(1, MANTIS_GPIF_BRBYTES);
14825aee3deSMauro Carvalho Chehab udelay(20);
14925aee3deSMauro Carvalho Chehab mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
15025aee3deSMauro Carvalho Chehab
15125aee3deSMauro Carvalho Chehab if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
15225aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
15325aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
15425aee3deSMauro Carvalho Chehab return -EREMOTEIO;
15525aee3deSMauro Carvalho Chehab }
15625aee3deSMauro Carvalho Chehab data = mmread(MANTIS_GPIF_DIN);
15725aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
15825aee3deSMauro Carvalho Chehab udelay(50);
15925aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
16025aee3deSMauro Carvalho Chehab
16125aee3deSMauro Carvalho Chehab return (u8) data;
16225aee3deSMauro Carvalho Chehab }
16325aee3deSMauro Carvalho Chehab
mantis_hif_write_iom(struct mantis_ca * ca,u32 addr,u8 data)16425aee3deSMauro Carvalho Chehab int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
16525aee3deSMauro Carvalho Chehab {
16625aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
16725aee3deSMauro Carvalho Chehab u32 hif_addr = 0;
16825aee3deSMauro Carvalho Chehab
16925aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
17025aee3deSMauro Carvalho Chehab mutex_lock(&ca->ca_lock);
17125aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
17225aee3deSMauro Carvalho Chehab hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
17325aee3deSMauro Carvalho Chehab hif_addr |= MANTIS_GPIF_PCMCIAIOM;
17425aee3deSMauro Carvalho Chehab hif_addr |= MANTIS_HIF_STATUS;
17525aee3deSMauro Carvalho Chehab hif_addr |= addr;
17625aee3deSMauro Carvalho Chehab
17725aee3deSMauro Carvalho Chehab mmwrite(hif_addr, MANTIS_GPIF_ADDR);
17825aee3deSMauro Carvalho Chehab mmwrite(data, MANTIS_GPIF_DOUT);
17925aee3deSMauro Carvalho Chehab
18025aee3deSMauro Carvalho Chehab if (mantis_hif_write_wait(ca) != 0) {
18125aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
18225aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
18325aee3deSMauro Carvalho Chehab return -EREMOTEIO;
18425aee3deSMauro Carvalho Chehab }
18525aee3deSMauro Carvalho Chehab dprintk(MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
18625aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
18725aee3deSMauro Carvalho Chehab udelay(50);
18825aee3deSMauro Carvalho Chehab
18925aee3deSMauro Carvalho Chehab return 0;
19025aee3deSMauro Carvalho Chehab }
19125aee3deSMauro Carvalho Chehab
mantis_hif_init(struct mantis_ca * ca)19225aee3deSMauro Carvalho Chehab int mantis_hif_init(struct mantis_ca *ca)
19325aee3deSMauro Carvalho Chehab {
19425aee3deSMauro Carvalho Chehab struct mantis_slot *slot = ca->slot;
19525aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
19625aee3deSMauro Carvalho Chehab u32 irqcfg;
19725aee3deSMauro Carvalho Chehab
19825aee3deSMauro Carvalho Chehab slot[0].slave_cfg = 0x70773028;
19925aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
20025aee3deSMauro Carvalho Chehab
20125aee3deSMauro Carvalho Chehab mutex_lock(&ca->ca_lock);
20225aee3deSMauro Carvalho Chehab irqcfg = mmread(MANTIS_GPIF_IRQCFG);
20325aee3deSMauro Carvalho Chehab irqcfg = MANTIS_MASK_BRRDY |
20425aee3deSMauro Carvalho Chehab MANTIS_MASK_WRACK |
20525aee3deSMauro Carvalho Chehab MANTIS_MASK_EXTIRQ |
20625aee3deSMauro Carvalho Chehab MANTIS_MASK_WSTO |
20725aee3deSMauro Carvalho Chehab MANTIS_MASK_OTHERR |
20825aee3deSMauro Carvalho Chehab MANTIS_MASK_OVFLW;
20925aee3deSMauro Carvalho Chehab
21025aee3deSMauro Carvalho Chehab mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
21125aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
21225aee3deSMauro Carvalho Chehab
21325aee3deSMauro Carvalho Chehab return 0;
21425aee3deSMauro Carvalho Chehab }
21525aee3deSMauro Carvalho Chehab
mantis_hif_exit(struct mantis_ca * ca)21625aee3deSMauro Carvalho Chehab void mantis_hif_exit(struct mantis_ca *ca)
21725aee3deSMauro Carvalho Chehab {
21825aee3deSMauro Carvalho Chehab struct mantis_pci *mantis = ca->ca_priv;
21925aee3deSMauro Carvalho Chehab u32 irqcfg;
22025aee3deSMauro Carvalho Chehab
22125aee3deSMauro Carvalho Chehab dprintk(MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
22225aee3deSMauro Carvalho Chehab mutex_lock(&ca->ca_lock);
22325aee3deSMauro Carvalho Chehab irqcfg = mmread(MANTIS_GPIF_IRQCFG);
22425aee3deSMauro Carvalho Chehab irqcfg &= ~MANTIS_MASK_BRRDY;
22525aee3deSMauro Carvalho Chehab mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
22625aee3deSMauro Carvalho Chehab mutex_unlock(&ca->ca_lock);
22725aee3deSMauro Carvalho Chehab }
228