1*b285192aSMauro Carvalho Chehab /* 2*b285192aSMauro Carvalho Chehab * cx18 header containing common defines. 3*b285192aSMauro Carvalho Chehab * 4*b285192aSMauro Carvalho Chehab * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 5*b285192aSMauro Carvalho Chehab * 6*b285192aSMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify 7*b285192aSMauro Carvalho Chehab * it under the terms of the GNU General Public License as published by 8*b285192aSMauro Carvalho Chehab * the Free Software Foundation; either version 2 of the License, or 9*b285192aSMauro Carvalho Chehab * (at your option) any later version. 10*b285192aSMauro Carvalho Chehab * 11*b285192aSMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, 12*b285192aSMauro Carvalho Chehab * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*b285192aSMauro Carvalho Chehab * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*b285192aSMauro Carvalho Chehab * GNU General Public License for more details. 15*b285192aSMauro Carvalho Chehab * 16*b285192aSMauro Carvalho Chehab * You should have received a copy of the GNU General Public License 17*b285192aSMauro Carvalho Chehab * along with this program; if not, write to the Free Software 18*b285192aSMauro Carvalho Chehab * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 19*b285192aSMauro Carvalho Chehab * 02111-1307 USA 20*b285192aSMauro Carvalho Chehab */ 21*b285192aSMauro Carvalho Chehab 22*b285192aSMauro Carvalho Chehab #ifndef CX23418_H 23*b285192aSMauro Carvalho Chehab #define CX23418_H 24*b285192aSMauro Carvalho Chehab 25*b285192aSMauro Carvalho Chehab #include <media/cx2341x.h> 26*b285192aSMauro Carvalho Chehab 27*b285192aSMauro Carvalho Chehab #define MGR_CMD_MASK 0x40000000 28*b285192aSMauro Carvalho Chehab /* The MSB of the command code indicates that this is the completion of a 29*b285192aSMauro Carvalho Chehab command */ 30*b285192aSMauro Carvalho Chehab #define MGR_CMD_MASK_ACK (MGR_CMD_MASK | 0x80000000) 31*b285192aSMauro Carvalho Chehab 32*b285192aSMauro Carvalho Chehab /* Description: This command creates a new instance of a certain task 33*b285192aSMauro Carvalho Chehab IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is 34*b285192aSMauro Carvalho Chehab the processor on which the task YYY will be created 35*b285192aSMauro Carvalho Chehab OUT[0] - Task handle. This handle is passed along with commands to 36*b285192aSMauro Carvalho Chehab dispatch to the right instance of the task 37*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_SYS_... */ 38*b285192aSMauro Carvalho Chehab #define CX18_CREATE_TASK (MGR_CMD_MASK | 0x0001) 39*b285192aSMauro Carvalho Chehab 40*b285192aSMauro Carvalho Chehab /* Description: This command destroys an instance of a task 41*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Hanlde of the task to destroy 42*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_SYS_... */ 43*b285192aSMauro Carvalho Chehab #define CX18_DESTROY_TASK (MGR_CMD_MASK | 0x0002) 44*b285192aSMauro Carvalho Chehab 45*b285192aSMauro Carvalho Chehab /* All commands for CPU have the following mask set */ 46*b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK 0x20000000 47*b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_DEBUG (CPU_CMD_MASK | 0x00000000) 48*b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_ACK (CPU_CMD_MASK | 0x80000000) 49*b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_CAPTURE (CPU_CMD_MASK | 0x00020000) 50*b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_TS (CPU_CMD_MASK | 0x00040000) 51*b285192aSMauro Carvalho Chehab 52*b285192aSMauro Carvalho Chehab #define EPU_CMD_MASK 0x02000000 53*b285192aSMauro Carvalho Chehab #define EPU_CMD_MASK_DEBUG (EPU_CMD_MASK | 0x000000) 54*b285192aSMauro Carvalho Chehab #define EPU_CMD_MASK_DE (EPU_CMD_MASK | 0x040000) 55*b285192aSMauro Carvalho Chehab 56*b285192aSMauro Carvalho Chehab #define APU_CMD_MASK 0x10000000 57*b285192aSMauro Carvalho Chehab #define APU_CMD_MASK_ACK (APU_CMD_MASK | 0x80000000) 58*b285192aSMauro Carvalho Chehab 59*b285192aSMauro Carvalho Chehab #define CX18_APU_ENCODING_METHOD_MPEG (0 << 28) 60*b285192aSMauro Carvalho Chehab #define CX18_APU_ENCODING_METHOD_AC3 (1 << 28) 61*b285192aSMauro Carvalho Chehab 62*b285192aSMauro Carvalho Chehab /* Description: Command APU to start audio 63*b285192aSMauro Carvalho Chehab IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?) 64*b285192aSMauro Carvalho Chehab IN[1] - caller buffer address, or 0 65*b285192aSMauro Carvalho Chehab ReturnCode - ??? */ 66*b285192aSMauro Carvalho Chehab #define CX18_APU_START (APU_CMD_MASK | 0x01) 67*b285192aSMauro Carvalho Chehab 68*b285192aSMauro Carvalho Chehab /* Description: Command APU to stop audio 69*b285192aSMauro Carvalho Chehab IN[0] - encoding method to stop 70*b285192aSMauro Carvalho Chehab ReturnCode - ??? */ 71*b285192aSMauro Carvalho Chehab #define CX18_APU_STOP (APU_CMD_MASK | 0x02) 72*b285192aSMauro Carvalho Chehab 73*b285192aSMauro Carvalho Chehab /* Description: Command APU to reset the AI 74*b285192aSMauro Carvalho Chehab ReturnCode - ??? */ 75*b285192aSMauro Carvalho Chehab #define CX18_APU_RESETAI (APU_CMD_MASK | 0x05) 76*b285192aSMauro Carvalho Chehab 77*b285192aSMauro Carvalho Chehab /* Description: This command indicates that a Memory Descriptor List has been 78*b285192aSMauro Carvalho Chehab filled with the requested channel type 79*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task 80*b285192aSMauro Carvalho Chehab IN[1] - Offset of the MDL_ACK from the beginning of the local DDR. 81*b285192aSMauro Carvalho Chehab IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1] 82*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_DE_... */ 83*b285192aSMauro Carvalho Chehab #define CX18_EPU_DMA_DONE (EPU_CMD_MASK_DE | 0x0001) 84*b285192aSMauro Carvalho Chehab 85*b285192aSMauro Carvalho Chehab /* Something interesting happened 86*b285192aSMauro Carvalho Chehab IN[0] - A value to log 87*b285192aSMauro Carvalho Chehab IN[1] - An offset of a string in the MiniMe memory; 88*b285192aSMauro Carvalho Chehab 0/zero/NULL means "I have nothing to say" */ 89*b285192aSMauro Carvalho Chehab #define CX18_EPU_DEBUG (EPU_CMD_MASK_DEBUG | 0x0003) 90*b285192aSMauro Carvalho Chehab 91*b285192aSMauro Carvalho Chehab /* Reads memory/registers (32-bit) 92*b285192aSMauro Carvalho Chehab IN[0] - Address 93*b285192aSMauro Carvalho Chehab OUT[1] - Value */ 94*b285192aSMauro Carvalho Chehab #define CX18_CPU_DEBUG_PEEK32 (CPU_CMD_MASK_DEBUG | 0x0003) 95*b285192aSMauro Carvalho Chehab 96*b285192aSMauro Carvalho Chehab /* Description: This command starts streaming with the set channel type 97*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to start 98*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 99*b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_START (CPU_CMD_MASK_CAPTURE | 0x0002) 100*b285192aSMauro Carvalho Chehab 101*b285192aSMauro Carvalho Chehab /* Description: This command stops streaming with the set channel type 102*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to stop 103*b285192aSMauro Carvalho Chehab IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only) 104*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 105*b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_STOP (CPU_CMD_MASK_CAPTURE | 0x0003) 106*b285192aSMauro Carvalho Chehab 107*b285192aSMauro Carvalho Chehab /* Description: This command pauses streaming with the set channel type 108*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to pause 109*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 110*b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_PAUSE (CPU_CMD_MASK_CAPTURE | 0x0007) 111*b285192aSMauro Carvalho Chehab 112*b285192aSMauro Carvalho Chehab /* Description: This command resumes streaming with the set channel type 113*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to resume 114*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 115*b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_RESUME (CPU_CMD_MASK_CAPTURE | 0x0008) 116*b285192aSMauro Carvalho Chehab 117*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_NONE 0 118*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_MPEG 1 119*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_INDEX 2 120*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_YUV 3 121*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_PCM 4 122*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_VBI 5 123*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_SLICED_VBI 6 124*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_TS 7 125*b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_MAX 15 126*b285192aSMauro Carvalho Chehab 127*b285192aSMauro Carvalho Chehab /* Description: This command sets the channel type. This can only be done 128*b285192aSMauro Carvalho Chehab when stopped. 129*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to start 130*b285192aSMauro Carvalho Chehab IN[1] - Channel Type. See Below. 131*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 132*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_CHANNEL_TYPE (CPU_CMD_MASK_CAPTURE + 1) 133*b285192aSMauro Carvalho Chehab 134*b285192aSMauro Carvalho Chehab /* Description: Set stream output type 135*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 136*b285192aSMauro Carvalho Chehab IN[1] - type 137*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 138*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_STREAM_OUTPUT_TYPE (CPU_CMD_MASK_CAPTURE | 0x0012) 139*b285192aSMauro Carvalho Chehab 140*b285192aSMauro Carvalho Chehab /* Description: Set video input resolution and frame rate 141*b285192aSMauro Carvalho Chehab IN[0] - task handle 142*b285192aSMauro Carvalho Chehab IN[1] - reserved 143*b285192aSMauro Carvalho Chehab IN[2] - reserved 144*b285192aSMauro Carvalho Chehab IN[3] - reserved 145*b285192aSMauro Carvalho Chehab IN[4] - reserved 146*b285192aSMauro Carvalho Chehab IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s 147*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 148*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_IN (CPU_CMD_MASK_CAPTURE | 0x0004) 149*b285192aSMauro Carvalho Chehab 150*b285192aSMauro Carvalho Chehab /* Description: Set video frame rate 151*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 152*b285192aSMauro Carvalho Chehab IN[1] - video bit rate mode 153*b285192aSMauro Carvalho Chehab IN[2] - video average rate 154*b285192aSMauro Carvalho Chehab IN[3] - video peak rate 155*b285192aSMauro Carvalho Chehab IN[4] - system mux rate 156*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 157*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_RATE (CPU_CMD_MASK_CAPTURE | 0x0005) 158*b285192aSMauro Carvalho Chehab 159*b285192aSMauro Carvalho Chehab /* Description: Set video output resolution 160*b285192aSMauro Carvalho Chehab IN[0] - task handle 161*b285192aSMauro Carvalho Chehab IN[1] - horizontal size 162*b285192aSMauro Carvalho Chehab IN[2] - vertical size 163*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 164*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_RESOLUTION (CPU_CMD_MASK_CAPTURE | 0x0006) 165*b285192aSMauro Carvalho Chehab 166*b285192aSMauro Carvalho Chehab /* Description: This command set filter parameters 167*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task 168*b285192aSMauro Carvalho Chehab IN[1] - type, 0 - temporal, 1 - spatial, 2 - median 169*b285192aSMauro Carvalho Chehab IN[2] - mode, temporal/spatial: 0 - disable, 1 - static, 2 - dynamic 170*b285192aSMauro Carvalho Chehab median: 0 = disable, 1 = horizontal, 2 = vertical, 171*b285192aSMauro Carvalho Chehab 3 = horizontal/vertical, 4 = diagonal 172*b285192aSMauro Carvalho Chehab IN[3] - strength, temporal 0 - 31, spatial 0 - 15 173*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 174*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_FILTER_PARAM (CPU_CMD_MASK_CAPTURE | 0x0009) 175*b285192aSMauro Carvalho Chehab 176*b285192aSMauro Carvalho Chehab /* Description: This command set spatial filter type 177*b285192aSMauro Carvalho Chehab IN[0] - Task handle. 178*b285192aSMauro Carvalho Chehab IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only, 179*b285192aSMauro Carvalho Chehab 3 = 2D H/V separable, 4 = 2D symmetric non-separable 180*b285192aSMauro Carvalho Chehab IN[2] - chroma type: 0 - disable, 1 = 1D horizontal 181*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 182*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SPATIAL_FILTER_TYPE (CPU_CMD_MASK_CAPTURE | 0x000C) 183*b285192aSMauro Carvalho Chehab 184*b285192aSMauro Carvalho Chehab /* Description: This command set coring levels for median filter 185*b285192aSMauro Carvalho Chehab IN[0] - Task handle. 186*b285192aSMauro Carvalho Chehab IN[1] - luma_high 187*b285192aSMauro Carvalho Chehab IN[2] - luma_low 188*b285192aSMauro Carvalho Chehab IN[3] - chroma_high 189*b285192aSMauro Carvalho Chehab IN[4] - chroma_low 190*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 191*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E) 192*b285192aSMauro Carvalho Chehab 193*b285192aSMauro Carvalho Chehab /* Description: This command set the picture type mask for index file 194*b285192aSMauro Carvalho Chehab IN[0] - Task handle (ignored by firmware) 195*b285192aSMauro Carvalho Chehab IN[1] - 0 = disable index file output 196*b285192aSMauro Carvalho Chehab 1 = output I picture 197*b285192aSMauro Carvalho Chehab 2 = P picture 198*b285192aSMauro Carvalho Chehab 4 = B picture 199*b285192aSMauro Carvalho Chehab other = illegal */ 200*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_INDEXTABLE (CPU_CMD_MASK_CAPTURE | 0x0010) 201*b285192aSMauro Carvalho Chehab 202*b285192aSMauro Carvalho Chehab /* Description: Set audio parameters 203*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 204*b285192aSMauro Carvalho Chehab IN[1] - audio parameter 205*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 206*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_AUDIO_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0011) 207*b285192aSMauro Carvalho Chehab 208*b285192aSMauro Carvalho Chehab /* Description: Set video mute 209*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 210*b285192aSMauro Carvalho Chehab IN[1] - bit31-24: muteYvalue 211*b285192aSMauro Carvalho Chehab bit23-16: muteUvalue 212*b285192aSMauro Carvalho Chehab bit15-8: muteVvalue 213*b285192aSMauro Carvalho Chehab bit0: 1:mute, 0: unmute 214*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 215*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0013) 216*b285192aSMauro Carvalho Chehab 217*b285192aSMauro Carvalho Chehab /* Description: Set audio mute 218*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 219*b285192aSMauro Carvalho Chehab IN[1] - mute/unmute 220*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 221*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_AUDIO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0014) 222*b285192aSMauro Carvalho Chehab 223*b285192aSMauro Carvalho Chehab /* Description: Set stream output type 224*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 225*b285192aSMauro Carvalho Chehab IN[1] - subType 226*b285192aSMauro Carvalho Chehab SET_INITIAL_SCR 1 227*b285192aSMauro Carvalho Chehab SET_QUALITY_MODE 2 228*b285192aSMauro Carvalho Chehab SET_VIM_PROTECT_MODE 3 229*b285192aSMauro Carvalho Chehab SET_PTS_CORRECTION 4 230*b285192aSMauro Carvalho Chehab SET_USB_FLUSH_MODE 5 231*b285192aSMauro Carvalho Chehab SET_MERAQPAR_ENABLE 6 232*b285192aSMauro Carvalho Chehab SET_NAV_PACK_INSERTION 7 233*b285192aSMauro Carvalho Chehab SET_SCENE_CHANGE_ENABLE 8 234*b285192aSMauro Carvalho Chehab IN[2] - parameter 1 235*b285192aSMauro Carvalho Chehab IN[3] - parameter 2 236*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 237*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_MISC_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0015) 238*b285192aSMauro Carvalho Chehab 239*b285192aSMauro Carvalho Chehab /* Description: Set raw VBI parameters 240*b285192aSMauro Carvalho Chehab IN[0] - Task handle 241*b285192aSMauro Carvalho Chehab IN[1] - No. of input lines per field: 242*b285192aSMauro Carvalho Chehab bit[15:0]: field 1, 243*b285192aSMauro Carvalho Chehab bit[31:16]: field 2 244*b285192aSMauro Carvalho Chehab IN[2] - No. of input bytes per line 245*b285192aSMauro Carvalho Chehab IN[3] - No. of output frames per transfer 246*b285192aSMauro Carvalho Chehab IN[4] - start code 247*b285192aSMauro Carvalho Chehab IN[5] - stop code 248*b285192aSMauro Carvalho Chehab ReturnCode */ 249*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_RAW_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0016) 250*b285192aSMauro Carvalho Chehab 251*b285192aSMauro Carvalho Chehab /* Description: Set capture line No. 252*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 253*b285192aSMauro Carvalho Chehab IN[1] - height1 254*b285192aSMauro Carvalho Chehab IN[2] - height2 255*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 256*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_CAPTURE_LINE_NO (CPU_CMD_MASK_CAPTURE | 0x0017) 257*b285192aSMauro Carvalho Chehab 258*b285192aSMauro Carvalho Chehab /* Description: Set copyright 259*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 260*b285192aSMauro Carvalho Chehab IN[1] - copyright 261*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 262*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_COPYRIGHT (CPU_CMD_MASK_CAPTURE | 0x0018) 263*b285192aSMauro Carvalho Chehab 264*b285192aSMauro Carvalho Chehab /* Description: Set audio PID 265*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 266*b285192aSMauro Carvalho Chehab IN[1] - PID 267*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 268*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_AUDIO_PID (CPU_CMD_MASK_CAPTURE | 0x0019) 269*b285192aSMauro Carvalho Chehab 270*b285192aSMauro Carvalho Chehab /* Description: Set video PID 271*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 272*b285192aSMauro Carvalho Chehab IN[1] - PID 273*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 274*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_PID (CPU_CMD_MASK_CAPTURE | 0x001A) 275*b285192aSMauro Carvalho Chehab 276*b285192aSMauro Carvalho Chehab /* Description: Set Vertical Crop Line 277*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 278*b285192aSMauro Carvalho Chehab IN[1] - Line 279*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 280*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VER_CROP_LINE (CPU_CMD_MASK_CAPTURE | 0x001B) 281*b285192aSMauro Carvalho Chehab 282*b285192aSMauro Carvalho Chehab /* Description: Set COP structure 283*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 284*b285192aSMauro Carvalho Chehab IN[1] - M 285*b285192aSMauro Carvalho Chehab IN[2] - N 286*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 287*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_GOP_STRUCTURE (CPU_CMD_MASK_CAPTURE | 0x001C) 288*b285192aSMauro Carvalho Chehab 289*b285192aSMauro Carvalho Chehab /* Description: Set Scene Change Detection 290*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 291*b285192aSMauro Carvalho Chehab IN[1] - scene change 292*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 293*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SCENE_CHANGE_DETECTION (CPU_CMD_MASK_CAPTURE | 0x001D) 294*b285192aSMauro Carvalho Chehab 295*b285192aSMauro Carvalho Chehab /* Description: Set Aspect Ratio 296*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 297*b285192aSMauro Carvalho Chehab IN[1] - AspectRatio 298*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 299*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_ASPECT_RATIO (CPU_CMD_MASK_CAPTURE | 0x001E) 300*b285192aSMauro Carvalho Chehab 301*b285192aSMauro Carvalho Chehab /* Description: Set Skip Input Frame 302*b285192aSMauro Carvalho Chehab IN[0] - task handle. Handle of the task to start 303*b285192aSMauro Carvalho Chehab IN[1] - skip input frames 304*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_CAPTURE_... */ 305*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SKIP_INPUT_FRAME (CPU_CMD_MASK_CAPTURE | 0x001F) 306*b285192aSMauro Carvalho Chehab 307*b285192aSMauro Carvalho Chehab /* Description: Set sliced VBI parameters - 308*b285192aSMauro Carvalho Chehab Note This API will only apply to MPEG and Sliced VBI Channels 309*b285192aSMauro Carvalho Chehab IN[0] - Task handle 310*b285192aSMauro Carvalho Chehab IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext 311*b285192aSMauro Carvalho Chehab IN[2] - start / stop line 312*b285192aSMauro Carvalho Chehab bit[15:0] start line number 313*b285192aSMauro Carvalho Chehab bit[31:16] stop line number 314*b285192aSMauro Carvalho Chehab IN[3] - number of output frames per interrupt 315*b285192aSMauro Carvalho Chehab IN[4] - VBI insertion mode 316*b285192aSMauro Carvalho Chehab bit 0: output user data, 1 - enable 317*b285192aSMauro Carvalho Chehab bit 1: output private stream, 1 - enable 318*b285192aSMauro Carvalho Chehab bit 2: mux option, 0 - in GOP, 1 - in picture 319*b285192aSMauro Carvalho Chehab bit[7:0] private stream ID 320*b285192aSMauro Carvalho Chehab IN[5] - insertion period while mux option is in picture 321*b285192aSMauro Carvalho Chehab ReturnCode - VBI data offset */ 322*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SLICED_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0020) 323*b285192aSMauro Carvalho Chehab 324*b285192aSMauro Carvalho Chehab /* Description: Set the user data place holder 325*b285192aSMauro Carvalho Chehab IN[0] - type of data (0 for user) 326*b285192aSMauro Carvalho Chehab IN[1] - Stuffing period 327*b285192aSMauro Carvalho Chehab IN[2] - ID data size in word (less than 10) 328*b285192aSMauro Carvalho Chehab IN[3] - Pointer to ID buffer */ 329*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_USERDATA_PLACE_HOLDER (CPU_CMD_MASK_CAPTURE | 0x0021) 330*b285192aSMauro Carvalho Chehab 331*b285192aSMauro Carvalho Chehab 332*b285192aSMauro Carvalho Chehab /* Description: 333*b285192aSMauro Carvalho Chehab In[0] Task Handle 334*b285192aSMauro Carvalho Chehab return parameter: 335*b285192aSMauro Carvalho Chehab Out[0] Reserved 336*b285192aSMauro Carvalho Chehab Out[1] Video PTS bit[32:2] of last output video frame. 337*b285192aSMauro Carvalho Chehab Out[2] Video PTS bit[ 1:0] of last output video frame. 338*b285192aSMauro Carvalho Chehab Out[3] Hardware Video PTS counter bit[31:0], 339*b285192aSMauro Carvalho Chehab these bits get incremented on every 90kHz clock tick. 340*b285192aSMauro Carvalho Chehab Out[4] Hardware Video PTS counter bit32, 341*b285192aSMauro Carvalho Chehab these bits get incremented on every 90kHz clock tick. 342*b285192aSMauro Carvalho Chehab ReturnCode */ 343*b285192aSMauro Carvalho Chehab #define CX18_CPU_GET_ENC_PTS (CPU_CMD_MASK_CAPTURE | 0x0022) 344*b285192aSMauro Carvalho Chehab 345*b285192aSMauro Carvalho Chehab /* Description: Set VFC parameters 346*b285192aSMauro Carvalho Chehab IN[0] - task handle 347*b285192aSMauro Carvalho Chehab IN[1] - VFC enable flag, 1 - enable, 0 - disable 348*b285192aSMauro Carvalho Chehab */ 349*b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VFC_PARAM (CPU_CMD_MASK_CAPTURE | 0x0023) 350*b285192aSMauro Carvalho Chehab 351*b285192aSMauro Carvalho Chehab /* Below is the list of commands related to the data exchange */ 352*b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_DE (CPU_CMD_MASK | 0x040000) 353*b285192aSMauro Carvalho Chehab 354*b285192aSMauro Carvalho Chehab /* Description: This command provides the physical base address of the local 355*b285192aSMauro Carvalho Chehab DDR as viewed by EPU 356*b285192aSMauro Carvalho Chehab IN[0] - Physical offset where EPU has the local DDR mapped 357*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_DE_... */ 358*b285192aSMauro Carvalho Chehab #define CPU_CMD_DE_SetBase (CPU_CMD_MASK_DE | 0x0001) 359*b285192aSMauro Carvalho Chehab 360*b285192aSMauro Carvalho Chehab /* Description: This command provides the offsets in the device memory where 361*b285192aSMauro Carvalho Chehab the 2 cx18_mdl_ack blocks reside 362*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to start 363*b285192aSMauro Carvalho Chehab IN[1] - Offset of the first cx18_mdl_ack from the beginning of the 364*b285192aSMauro Carvalho Chehab local DDR. 365*b285192aSMauro Carvalho Chehab IN[2] - Offset of the second cx18_mdl_ack from the beginning of the 366*b285192aSMauro Carvalho Chehab local DDR. 367*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_DE_... */ 368*b285192aSMauro Carvalho Chehab #define CX18_CPU_DE_SET_MDL_ACK (CPU_CMD_MASK_DE | 0x0002) 369*b285192aSMauro Carvalho Chehab 370*b285192aSMauro Carvalho Chehab /* Description: This command provides the offset to a Memory Descriptor List 371*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to start 372*b285192aSMauro Carvalho Chehab IN[1] - Offset of the MDL from the beginning of the local DDR. 373*b285192aSMauro Carvalho Chehab IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1] 374*b285192aSMauro Carvalho Chehab IN[3] - Buffer ID 375*b285192aSMauro Carvalho Chehab IN[4] - Total buffer length 376*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_DE_... */ 377*b285192aSMauro Carvalho Chehab #define CX18_CPU_DE_SET_MDL (CPU_CMD_MASK_DE | 0x0005) 378*b285192aSMauro Carvalho Chehab 379*b285192aSMauro Carvalho Chehab /* Description: This command requests return of all current Memory 380*b285192aSMauro Carvalho Chehab Descriptor Lists to the driver 381*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task to start 382*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_DE_... */ 383*b285192aSMauro Carvalho Chehab #define CX18_CPU_DE_RELEASE_MDL (CPU_CMD_MASK_DE | 0x0006) 384*b285192aSMauro Carvalho Chehab 385*b285192aSMauro Carvalho Chehab /* Description: This command signals the cpu that the dat buffer has been 386*b285192aSMauro Carvalho Chehab consumed and ready for re-use. 387*b285192aSMauro Carvalho Chehab IN[0] - Task handle. Handle of the task 388*b285192aSMauro Carvalho Chehab IN[1] - Offset of the data block from the beginning of the local DDR. 389*b285192aSMauro Carvalho Chehab IN[2] - Number of bytes in the data block 390*b285192aSMauro Carvalho Chehab ReturnCode - One of the ERR_DE_... */ 391*b285192aSMauro Carvalho Chehab /* #define CX18_CPU_DE_RELEASE_BUFFER (CPU_CMD_MASK_DE | 0x0007) */ 392*b285192aSMauro Carvalho Chehab 393*b285192aSMauro Carvalho Chehab /* No Error / Success */ 394*b285192aSMauro Carvalho Chehab #define CNXT_OK 0x000000 395*b285192aSMauro Carvalho Chehab 396*b285192aSMauro Carvalho Chehab /* Received unknown command */ 397*b285192aSMauro Carvalho Chehab #define CXERR_UNK_CMD 0x000001 398*b285192aSMauro Carvalho Chehab 399*b285192aSMauro Carvalho Chehab /* First parameter in the command is invalid */ 400*b285192aSMauro Carvalho Chehab #define CXERR_INVALID_PARAM1 0x000002 401*b285192aSMauro Carvalho Chehab 402*b285192aSMauro Carvalho Chehab /* Second parameter in the command is invalid */ 403*b285192aSMauro Carvalho Chehab #define CXERR_INVALID_PARAM2 0x000003 404*b285192aSMauro Carvalho Chehab 405*b285192aSMauro Carvalho Chehab /* Device interface is not open/found */ 406*b285192aSMauro Carvalho Chehab #define CXERR_DEV_NOT_FOUND 0x000004 407*b285192aSMauro Carvalho Chehab 408*b285192aSMauro Carvalho Chehab /* Requested function is not implemented/available */ 409*b285192aSMauro Carvalho Chehab #define CXERR_NOTSUPPORTED 0x000005 410*b285192aSMauro Carvalho Chehab 411*b285192aSMauro Carvalho Chehab /* Invalid pointer is provided */ 412*b285192aSMauro Carvalho Chehab #define CXERR_BADPTR 0x000006 413*b285192aSMauro Carvalho Chehab 414*b285192aSMauro Carvalho Chehab /* Unable to allocate memory */ 415*b285192aSMauro Carvalho Chehab #define CXERR_NOMEM 0x000007 416*b285192aSMauro Carvalho Chehab 417*b285192aSMauro Carvalho Chehab /* Object/Link not found */ 418*b285192aSMauro Carvalho Chehab #define CXERR_LINK 0x000008 419*b285192aSMauro Carvalho Chehab 420*b285192aSMauro Carvalho Chehab /* Device busy, command cannot be executed */ 421*b285192aSMauro Carvalho Chehab #define CXERR_BUSY 0x000009 422*b285192aSMauro Carvalho Chehab 423*b285192aSMauro Carvalho Chehab /* File/device/handle is not open. */ 424*b285192aSMauro Carvalho Chehab #define CXERR_NOT_OPEN 0x00000A 425*b285192aSMauro Carvalho Chehab 426*b285192aSMauro Carvalho Chehab /* Value is out of range */ 427*b285192aSMauro Carvalho Chehab #define CXERR_OUTOFRANGE 0x00000B 428*b285192aSMauro Carvalho Chehab 429*b285192aSMauro Carvalho Chehab /* Buffer overflow */ 430*b285192aSMauro Carvalho Chehab #define CXERR_OVERFLOW 0x00000C 431*b285192aSMauro Carvalho Chehab 432*b285192aSMauro Carvalho Chehab /* Version mismatch */ 433*b285192aSMauro Carvalho Chehab #define CXERR_BADVER 0x00000D 434*b285192aSMauro Carvalho Chehab 435*b285192aSMauro Carvalho Chehab /* Operation timed out */ 436*b285192aSMauro Carvalho Chehab #define CXERR_TIMEOUT 0x00000E 437*b285192aSMauro Carvalho Chehab 438*b285192aSMauro Carvalho Chehab /* Operation aborted */ 439*b285192aSMauro Carvalho Chehab #define CXERR_ABORT 0x00000F 440*b285192aSMauro Carvalho Chehab 441*b285192aSMauro Carvalho Chehab /* Specified I2C device not found for read/write */ 442*b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_NOTFOUND 0x000010 443*b285192aSMauro Carvalho Chehab 444*b285192aSMauro Carvalho Chehab /* Error in I2C data xfer (but I2C device is present) */ 445*b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_XFERERR 0x000011 446*b285192aSMauro Carvalho Chehab 447*b285192aSMauro Carvalho Chehab /* Chanel changing component not ready */ 448*b285192aSMauro Carvalho Chehab #define CXERR_CHANNELNOTREADY 0x000012 449*b285192aSMauro Carvalho Chehab 450*b285192aSMauro Carvalho Chehab /* PPU (Presensation/Decoder) mail box is corrupted */ 451*b285192aSMauro Carvalho Chehab #define CXERR_PPU_MB_CORRUPT 0x000013 452*b285192aSMauro Carvalho Chehab 453*b285192aSMauro Carvalho Chehab /* CPU (Capture/Encoder) mail box is corrupted */ 454*b285192aSMauro Carvalho Chehab #define CXERR_CPU_MB_CORRUPT 0x000014 455*b285192aSMauro Carvalho Chehab 456*b285192aSMauro Carvalho Chehab /* APU (Audio) mail box is corrupted */ 457*b285192aSMauro Carvalho Chehab #define CXERR_APU_MB_CORRUPT 0x000015 458*b285192aSMauro Carvalho Chehab 459*b285192aSMauro Carvalho Chehab /* Unable to open file for reading */ 460*b285192aSMauro Carvalho Chehab #define CXERR_FILE_OPEN_READ 0x000016 461*b285192aSMauro Carvalho Chehab 462*b285192aSMauro Carvalho Chehab /* Unable to open file for writing */ 463*b285192aSMauro Carvalho Chehab #define CXERR_FILE_OPEN_WRITE 0x000017 464*b285192aSMauro Carvalho Chehab 465*b285192aSMauro Carvalho Chehab /* Unable to find the I2C section specified */ 466*b285192aSMauro Carvalho Chehab #define CXERR_I2C_BADSECTION 0x000018 467*b285192aSMauro Carvalho Chehab 468*b285192aSMauro Carvalho Chehab /* Error in I2C data xfer (but I2C device is present) */ 469*b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_DATALOW 0x000019 470*b285192aSMauro Carvalho Chehab 471*b285192aSMauro Carvalho Chehab /* Error in I2C data xfer (but I2C device is present) */ 472*b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_CLOCKLOW 0x00001A 473*b285192aSMauro Carvalho Chehab 474*b285192aSMauro Carvalho Chehab /* No Interrupt received from HW (for I2C access) */ 475*b285192aSMauro Carvalho Chehab #define CXERR_NO_HW_I2C_INTR 0x00001B 476*b285192aSMauro Carvalho Chehab 477*b285192aSMauro Carvalho Chehab /* RPU is not ready to accept commands! */ 478*b285192aSMauro Carvalho Chehab #define CXERR_RPU_NOT_READY 0x00001C 479*b285192aSMauro Carvalho Chehab 480*b285192aSMauro Carvalho Chehab /* RPU is not ready to accept commands! */ 481*b285192aSMauro Carvalho Chehab #define CXERR_RPU_NO_ACK 0x00001D 482*b285192aSMauro Carvalho Chehab 483*b285192aSMauro Carvalho Chehab /* The are no buffers ready. Try again soon! */ 484*b285192aSMauro Carvalho Chehab #define CXERR_NODATA_AGAIN 0x00001E 485*b285192aSMauro Carvalho Chehab 486*b285192aSMauro Carvalho Chehab /* The stream is stopping. Function not allowed now! */ 487*b285192aSMauro Carvalho Chehab #define CXERR_STOPPING_STATUS 0x00001F 488*b285192aSMauro Carvalho Chehab 489*b285192aSMauro Carvalho Chehab /* Trying to access hardware when the power is turned OFF */ 490*b285192aSMauro Carvalho Chehab #define CXERR_DEVPOWER_OFF 0x000020 491*b285192aSMauro Carvalho Chehab 492*b285192aSMauro Carvalho Chehab #endif /* CX23418_H */ 493