xref: /openbmc/linux/drivers/media/pci/cx18/cx23418.h (revision 167905540e08e37162adc24066427944f71bf7a4)
1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *  cx18 header containing common defines.
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
15b285192aSMauro Carvalho Chehab  */
16b285192aSMauro Carvalho Chehab 
17b285192aSMauro Carvalho Chehab #ifndef CX23418_H
18b285192aSMauro Carvalho Chehab #define CX23418_H
19b285192aSMauro Carvalho Chehab 
20d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx2341x.h>
21b285192aSMauro Carvalho Chehab 
22b285192aSMauro Carvalho Chehab #define MGR_CMD_MASK				0x40000000
23b285192aSMauro Carvalho Chehab /* The MSB of the command code indicates that this is the completion of a
24b285192aSMauro Carvalho Chehab    command */
25b285192aSMauro Carvalho Chehab #define MGR_CMD_MASK_ACK			(MGR_CMD_MASK | 0x80000000)
26b285192aSMauro Carvalho Chehab 
27b285192aSMauro Carvalho Chehab /* Description: This command creates a new instance of a certain task
28b285192aSMauro Carvalho Chehab    IN[0]  - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
29b285192aSMauro Carvalho Chehab 	    the processor on which the task YYY will be created
30b285192aSMauro Carvalho Chehab    OUT[0] - Task handle. This handle is passed along with commands to
31b285192aSMauro Carvalho Chehab 	    dispatch to the right instance of the task
32b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_SYS_... */
33b285192aSMauro Carvalho Chehab #define CX18_CREATE_TASK			(MGR_CMD_MASK | 0x0001)
34b285192aSMauro Carvalho Chehab 
35b285192aSMauro Carvalho Chehab /* Description: This command destroys an instance of a task
36b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Hanlde of the task to destroy
37b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_SYS_... */
38b285192aSMauro Carvalho Chehab #define CX18_DESTROY_TASK			(MGR_CMD_MASK | 0x0002)
39b285192aSMauro Carvalho Chehab 
40b285192aSMauro Carvalho Chehab /* All commands for CPU have the following mask set */
41b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK				0x20000000
42b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_DEBUG			(CPU_CMD_MASK | 0x00000000)
43b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_ACK			(CPU_CMD_MASK | 0x80000000)
44b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_CAPTURE			(CPU_CMD_MASK | 0x00020000)
45b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_TS				(CPU_CMD_MASK | 0x00040000)
46b285192aSMauro Carvalho Chehab 
47b285192aSMauro Carvalho Chehab #define EPU_CMD_MASK				0x02000000
48b285192aSMauro Carvalho Chehab #define EPU_CMD_MASK_DEBUG			(EPU_CMD_MASK | 0x000000)
49b285192aSMauro Carvalho Chehab #define EPU_CMD_MASK_DE				(EPU_CMD_MASK | 0x040000)
50b285192aSMauro Carvalho Chehab 
51b285192aSMauro Carvalho Chehab #define APU_CMD_MASK				0x10000000
52b285192aSMauro Carvalho Chehab #define APU_CMD_MASK_ACK			(APU_CMD_MASK | 0x80000000)
53b285192aSMauro Carvalho Chehab 
54b285192aSMauro Carvalho Chehab #define CX18_APU_ENCODING_METHOD_MPEG		(0 << 28)
55b285192aSMauro Carvalho Chehab #define CX18_APU_ENCODING_METHOD_AC3		(1 << 28)
56b285192aSMauro Carvalho Chehab 
57b285192aSMauro Carvalho Chehab /* Description: Command APU to start audio
58b285192aSMauro Carvalho Chehab    IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
59b285192aSMauro Carvalho Chehab    IN[1] - caller buffer address, or 0
60b285192aSMauro Carvalho Chehab    ReturnCode - ??? */
61b285192aSMauro Carvalho Chehab #define CX18_APU_START				(APU_CMD_MASK | 0x01)
62b285192aSMauro Carvalho Chehab 
63b285192aSMauro Carvalho Chehab /* Description: Command APU to stop audio
64b285192aSMauro Carvalho Chehab    IN[0] - encoding method to stop
65b285192aSMauro Carvalho Chehab    ReturnCode - ??? */
66b285192aSMauro Carvalho Chehab #define CX18_APU_STOP				(APU_CMD_MASK | 0x02)
67b285192aSMauro Carvalho Chehab 
68b285192aSMauro Carvalho Chehab /* Description: Command APU to reset the AI
69b285192aSMauro Carvalho Chehab    ReturnCode - ??? */
70b285192aSMauro Carvalho Chehab #define CX18_APU_RESETAI			(APU_CMD_MASK | 0x05)
71b285192aSMauro Carvalho Chehab 
72b285192aSMauro Carvalho Chehab /* Description: This command indicates that a Memory Descriptor List has been
73b285192aSMauro Carvalho Chehab    filled with the requested channel type
74b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task
75b285192aSMauro Carvalho Chehab    IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
76b285192aSMauro Carvalho Chehab    IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
77b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_DE_... */
78b285192aSMauro Carvalho Chehab #define CX18_EPU_DMA_DONE			(EPU_CMD_MASK_DE | 0x0001)
79b285192aSMauro Carvalho Chehab 
80b285192aSMauro Carvalho Chehab /* Something interesting happened
81b285192aSMauro Carvalho Chehab    IN[0] - A value to log
82b285192aSMauro Carvalho Chehab    IN[1] - An offset of a string in the MiniMe memory;
83b285192aSMauro Carvalho Chehab 	   0/zero/NULL means "I have nothing to say" */
84b285192aSMauro Carvalho Chehab #define CX18_EPU_DEBUG				(EPU_CMD_MASK_DEBUG | 0x0003)
85b285192aSMauro Carvalho Chehab 
86b285192aSMauro Carvalho Chehab /* Reads memory/registers (32-bit)
87b285192aSMauro Carvalho Chehab    IN[0] - Address
88b285192aSMauro Carvalho Chehab    OUT[1] - Value */
89b285192aSMauro Carvalho Chehab #define CX18_CPU_DEBUG_PEEK32			(CPU_CMD_MASK_DEBUG | 0x0003)
90b285192aSMauro Carvalho Chehab 
91b285192aSMauro Carvalho Chehab /* Description: This command starts streaming with the set channel type
92b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to start
93b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
94b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_START			(CPU_CMD_MASK_CAPTURE | 0x0002)
95b285192aSMauro Carvalho Chehab 
96b285192aSMauro Carvalho Chehab /* Description: This command stops streaming with the set channel type
97b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to stop
98b285192aSMauro Carvalho Chehab    IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
99b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
100b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_STOP			(CPU_CMD_MASK_CAPTURE | 0x0003)
101b285192aSMauro Carvalho Chehab 
102b285192aSMauro Carvalho Chehab /* Description: This command pauses streaming with the set channel type
103b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to pause
104b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
105b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_PAUSE			(CPU_CMD_MASK_CAPTURE | 0x0007)
106b285192aSMauro Carvalho Chehab 
107b285192aSMauro Carvalho Chehab /* Description: This command resumes streaming with the set channel type
108b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to resume
109b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
110b285192aSMauro Carvalho Chehab #define CX18_CPU_CAPTURE_RESUME			(CPU_CMD_MASK_CAPTURE | 0x0008)
111b285192aSMauro Carvalho Chehab 
112b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_NONE		0
113b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_MPEG		1
114b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_INDEX		2
115b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_YUV		3
116b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_PCM		4
117b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_VBI		5
118b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_SLICED_VBI		6
119b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_TS			7
120b285192aSMauro Carvalho Chehab #define CAPTURE_CHANNEL_TYPE_MAX		15
121b285192aSMauro Carvalho Chehab 
122b285192aSMauro Carvalho Chehab /* Description: This command sets the channel type. This can only be done
123b285192aSMauro Carvalho Chehab    when stopped.
124b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to start
125b285192aSMauro Carvalho Chehab    IN[1] - Channel Type. See Below.
126b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
127b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_CHANNEL_TYPE		(CPU_CMD_MASK_CAPTURE + 1)
128b285192aSMauro Carvalho Chehab 
129b285192aSMauro Carvalho Chehab /* Description: Set stream output type
130b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
131b285192aSMauro Carvalho Chehab    IN[1] - type
132b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
133b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_STREAM_OUTPUT_TYPE		(CPU_CMD_MASK_CAPTURE | 0x0012)
134b285192aSMauro Carvalho Chehab 
135b285192aSMauro Carvalho Chehab /* Description: Set video input resolution and frame rate
136b285192aSMauro Carvalho Chehab    IN[0] - task handle
137b285192aSMauro Carvalho Chehab    IN[1] - reserved
138b285192aSMauro Carvalho Chehab    IN[2] - reserved
139b285192aSMauro Carvalho Chehab    IN[3] - reserved
140b285192aSMauro Carvalho Chehab    IN[4] - reserved
141b285192aSMauro Carvalho Chehab    IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
142b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
143b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_IN			(CPU_CMD_MASK_CAPTURE | 0x0004)
144b285192aSMauro Carvalho Chehab 
145b285192aSMauro Carvalho Chehab /* Description: Set video frame rate
146b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
147b285192aSMauro Carvalho Chehab    IN[1] - video bit rate mode
148b285192aSMauro Carvalho Chehab    IN[2] - video average rate
149b285192aSMauro Carvalho Chehab    IN[3] - video peak rate
150b285192aSMauro Carvalho Chehab    IN[4] - system mux rate
151b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
152b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_RATE			(CPU_CMD_MASK_CAPTURE | 0x0005)
153b285192aSMauro Carvalho Chehab 
154b285192aSMauro Carvalho Chehab /* Description: Set video output resolution
155b285192aSMauro Carvalho Chehab    IN[0] - task handle
156b285192aSMauro Carvalho Chehab    IN[1] - horizontal size
157b285192aSMauro Carvalho Chehab    IN[2] - vertical size
158b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
159b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_RESOLUTION		(CPU_CMD_MASK_CAPTURE | 0x0006)
160b285192aSMauro Carvalho Chehab 
161b285192aSMauro Carvalho Chehab /* Description: This command set filter parameters
162b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task
163b285192aSMauro Carvalho Chehab    IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
164b285192aSMauro Carvalho Chehab    IN[2] - mode,  temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
165b285192aSMauro Carvalho Chehab 			median:	0 = disable, 1 = horizontal, 2 = vertical,
166b285192aSMauro Carvalho Chehab 				3 = horizontal/vertical, 4 = diagonal
167b285192aSMauro Carvalho Chehab    IN[3] - strength, temporal 0 - 31, spatial 0 - 15
168b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
169b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_FILTER_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0009)
170b285192aSMauro Carvalho Chehab 
171b285192aSMauro Carvalho Chehab /* Description: This command set spatial filter type
172b285192aSMauro Carvalho Chehab    IN[0] - Task handle.
173b285192aSMauro Carvalho Chehab    IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
174b285192aSMauro Carvalho Chehab 		      3 = 2D H/V separable, 4 = 2D symmetric non-separable
175b285192aSMauro Carvalho Chehab    IN[2] - chroma type: 0 - disable, 1 = 1D horizontal
176b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
177b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SPATIAL_FILTER_TYPE	(CPU_CMD_MASK_CAPTURE | 0x000C)
178b285192aSMauro Carvalho Chehab 
179b285192aSMauro Carvalho Chehab /* Description: This command set coring levels for median filter
180b285192aSMauro Carvalho Chehab    IN[0] - Task handle.
181b285192aSMauro Carvalho Chehab    IN[1] - luma_high
182b285192aSMauro Carvalho Chehab    IN[2] - luma_low
183b285192aSMauro Carvalho Chehab    IN[3] - chroma_high
184b285192aSMauro Carvalho Chehab    IN[4] - chroma_low
185b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
186b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_MEDIAN_CORING		(CPU_CMD_MASK_CAPTURE | 0x000E)
187b285192aSMauro Carvalho Chehab 
188b285192aSMauro Carvalho Chehab /* Description: This command set the picture type mask for index file
189b285192aSMauro Carvalho Chehab    IN[0] - Task handle (ignored by firmware)
190b285192aSMauro Carvalho Chehab    IN[1] -	0 = disable index file output
191b285192aSMauro Carvalho Chehab 			1 = output I picture
192b285192aSMauro Carvalho Chehab 			2 = P picture
193b285192aSMauro Carvalho Chehab 			4 = B picture
194b285192aSMauro Carvalho Chehab 			other = illegal */
195b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_INDEXTABLE			(CPU_CMD_MASK_CAPTURE | 0x0010)
196b285192aSMauro Carvalho Chehab 
197b285192aSMauro Carvalho Chehab /* Description: Set audio parameters
198b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
199b285192aSMauro Carvalho Chehab    IN[1] - audio parameter
200b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
201b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_AUDIO_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0011)
202b285192aSMauro Carvalho Chehab 
203b285192aSMauro Carvalho Chehab /* Description: Set video mute
204b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
205b285192aSMauro Carvalho Chehab    IN[1] - bit31-24: muteYvalue
206b285192aSMauro Carvalho Chehab 	   bit23-16: muteUvalue
207b285192aSMauro Carvalho Chehab 	   bit15-8:  muteVvalue
208b285192aSMauro Carvalho Chehab 	   bit0:     1:mute, 0: unmute
209b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
210b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0013)
211b285192aSMauro Carvalho Chehab 
212b285192aSMauro Carvalho Chehab /* Description: Set audio mute
213b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
214b285192aSMauro Carvalho Chehab    IN[1] - mute/unmute
215b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
216b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_AUDIO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0014)
217b285192aSMauro Carvalho Chehab 
218b285192aSMauro Carvalho Chehab /* Description: Set stream output type
219b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
220b285192aSMauro Carvalho Chehab    IN[1] - subType
221b285192aSMauro Carvalho Chehab 	    SET_INITIAL_SCR			1
222b285192aSMauro Carvalho Chehab 	    SET_QUALITY_MODE            2
223b285192aSMauro Carvalho Chehab 	    SET_VIM_PROTECT_MODE        3
224b285192aSMauro Carvalho Chehab 	    SET_PTS_CORRECTION          4
225b285192aSMauro Carvalho Chehab 	    SET_USB_FLUSH_MODE          5
226b285192aSMauro Carvalho Chehab 	    SET_MERAQPAR_ENABLE         6
227b285192aSMauro Carvalho Chehab 	    SET_NAV_PACK_INSERTION      7
228b285192aSMauro Carvalho Chehab 	    SET_SCENE_CHANGE_ENABLE     8
229b285192aSMauro Carvalho Chehab    IN[2] - parameter 1
230b285192aSMauro Carvalho Chehab    IN[3] - parameter 2
231b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
232b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_MISC_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0015)
233b285192aSMauro Carvalho Chehab 
234b285192aSMauro Carvalho Chehab /* Description: Set raw VBI parameters
235b285192aSMauro Carvalho Chehab    IN[0] - Task handle
236b285192aSMauro Carvalho Chehab    IN[1] - No. of input lines per field:
237b285192aSMauro Carvalho Chehab 				bit[15:0]: field 1,
238b285192aSMauro Carvalho Chehab 				bit[31:16]: field 2
239b285192aSMauro Carvalho Chehab    IN[2] - No. of input bytes per line
240b285192aSMauro Carvalho Chehab    IN[3] - No. of output frames per transfer
241b285192aSMauro Carvalho Chehab    IN[4] - start code
242b285192aSMauro Carvalho Chehab    IN[5] - stop code
243b285192aSMauro Carvalho Chehab    ReturnCode */
244b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_RAW_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0016)
245b285192aSMauro Carvalho Chehab 
246b285192aSMauro Carvalho Chehab /* Description: Set capture line No.
247b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
248b285192aSMauro Carvalho Chehab    IN[1] - height1
249b285192aSMauro Carvalho Chehab    IN[2] - height2
250b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
251b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_CAPTURE_LINE_NO		(CPU_CMD_MASK_CAPTURE | 0x0017)
252b285192aSMauro Carvalho Chehab 
253b285192aSMauro Carvalho Chehab /* Description: Set copyright
254b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
255b285192aSMauro Carvalho Chehab    IN[1] - copyright
256b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
257b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_COPYRIGHT			(CPU_CMD_MASK_CAPTURE | 0x0018)
258b285192aSMauro Carvalho Chehab 
259b285192aSMauro Carvalho Chehab /* Description: Set audio PID
260b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
261b285192aSMauro Carvalho Chehab    IN[1] - PID
262b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
263b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_AUDIO_PID			(CPU_CMD_MASK_CAPTURE | 0x0019)
264b285192aSMauro Carvalho Chehab 
265b285192aSMauro Carvalho Chehab /* Description: Set video PID
266b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
267b285192aSMauro Carvalho Chehab    IN[1] - PID
268b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
269b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VIDEO_PID			(CPU_CMD_MASK_CAPTURE | 0x001A)
270b285192aSMauro Carvalho Chehab 
271b285192aSMauro Carvalho Chehab /* Description: Set Vertical Crop Line
272b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
273b285192aSMauro Carvalho Chehab    IN[1] - Line
274b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
275b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VER_CROP_LINE		(CPU_CMD_MASK_CAPTURE | 0x001B)
276b285192aSMauro Carvalho Chehab 
277b285192aSMauro Carvalho Chehab /* Description: Set COP structure
278b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
279b285192aSMauro Carvalho Chehab    IN[1] - M
280b285192aSMauro Carvalho Chehab    IN[2] - N
281b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
282b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_GOP_STRUCTURE		(CPU_CMD_MASK_CAPTURE | 0x001C)
283b285192aSMauro Carvalho Chehab 
284b285192aSMauro Carvalho Chehab /* Description: Set Scene Change Detection
285b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
286b285192aSMauro Carvalho Chehab    IN[1] - scene change
287b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
288b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SCENE_CHANGE_DETECTION	(CPU_CMD_MASK_CAPTURE | 0x001D)
289b285192aSMauro Carvalho Chehab 
290b285192aSMauro Carvalho Chehab /* Description: Set Aspect Ratio
291b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
292b285192aSMauro Carvalho Chehab    IN[1] - AspectRatio
293b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
294b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_ASPECT_RATIO		(CPU_CMD_MASK_CAPTURE | 0x001E)
295b285192aSMauro Carvalho Chehab 
296b285192aSMauro Carvalho Chehab /* Description: Set Skip Input Frame
297b285192aSMauro Carvalho Chehab    IN[0] - task handle. Handle of the task to start
298b285192aSMauro Carvalho Chehab    IN[1] - skip input frames
299b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_CAPTURE_... */
300b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SKIP_INPUT_FRAME		(CPU_CMD_MASK_CAPTURE | 0x001F)
301b285192aSMauro Carvalho Chehab 
302b285192aSMauro Carvalho Chehab /* Description: Set sliced VBI parameters -
303b285192aSMauro Carvalho Chehab    Note This API will only apply to MPEG and Sliced VBI Channels
304b285192aSMauro Carvalho Chehab    IN[0] - Task handle
305b285192aSMauro Carvalho Chehab    IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
306b285192aSMauro Carvalho Chehab    IN[2] - start / stop line
307b285192aSMauro Carvalho Chehab 			bit[15:0] start line number
308b285192aSMauro Carvalho Chehab 			bit[31:16] stop line number
309b285192aSMauro Carvalho Chehab    IN[3] - number of output frames per interrupt
310b285192aSMauro Carvalho Chehab    IN[4] - VBI insertion mode
311b285192aSMauro Carvalho Chehab 			bit 0:	output user data, 1 - enable
312b285192aSMauro Carvalho Chehab 			bit 1:	output private stream, 1 - enable
313b285192aSMauro Carvalho Chehab 			bit 2:	mux option, 0 - in GOP, 1 - in picture
314b285192aSMauro Carvalho Chehab 			bit[7:0]	private stream ID
315b285192aSMauro Carvalho Chehab    IN[5] - insertion period while mux option is in picture
316b285192aSMauro Carvalho Chehab    ReturnCode - VBI data offset */
317b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_SLICED_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0020)
318b285192aSMauro Carvalho Chehab 
319b285192aSMauro Carvalho Chehab /* Description: Set the user data place holder
320b285192aSMauro Carvalho Chehab    IN[0] - type of data (0 for user)
321b285192aSMauro Carvalho Chehab    IN[1] - Stuffing period
322b285192aSMauro Carvalho Chehab    IN[2] - ID data size in word (less than 10)
323b285192aSMauro Carvalho Chehab    IN[3] - Pointer to ID buffer */
324b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_USERDATA_PLACE_HOLDER	(CPU_CMD_MASK_CAPTURE | 0x0021)
325b285192aSMauro Carvalho Chehab 
326b285192aSMauro Carvalho Chehab 
327b285192aSMauro Carvalho Chehab /* Description:
328b285192aSMauro Carvalho Chehab    In[0] Task Handle
329b285192aSMauro Carvalho Chehab    return parameter:
330b285192aSMauro Carvalho Chehab    Out[0]  Reserved
331b285192aSMauro Carvalho Chehab    Out[1]  Video PTS bit[32:2] of last output video frame.
332b285192aSMauro Carvalho Chehab    Out[2]  Video PTS bit[ 1:0] of last output video frame.
333b285192aSMauro Carvalho Chehab    Out[3]  Hardware Video PTS counter bit[31:0],
334b285192aSMauro Carvalho Chehab 	     these bits get incremented on every 90kHz clock tick.
335b285192aSMauro Carvalho Chehab    Out[4]  Hardware Video PTS counter bit32,
336b285192aSMauro Carvalho Chehab 	     these bits get incremented on every 90kHz clock tick.
337b285192aSMauro Carvalho Chehab    ReturnCode */
338b285192aSMauro Carvalho Chehab #define CX18_CPU_GET_ENC_PTS			(CPU_CMD_MASK_CAPTURE | 0x0022)
339b285192aSMauro Carvalho Chehab 
340b285192aSMauro Carvalho Chehab /* Description: Set VFC parameters
341b285192aSMauro Carvalho Chehab    IN[0] - task handle
342b285192aSMauro Carvalho Chehab    IN[1] - VFC enable flag, 1 - enable, 0 - disable
343b285192aSMauro Carvalho Chehab */
344b285192aSMauro Carvalho Chehab #define CX18_CPU_SET_VFC_PARAM                  (CPU_CMD_MASK_CAPTURE | 0x0023)
345b285192aSMauro Carvalho Chehab 
346b285192aSMauro Carvalho Chehab /* Below is the list of commands related to the data exchange */
347b285192aSMauro Carvalho Chehab #define CPU_CMD_MASK_DE				(CPU_CMD_MASK | 0x040000)
348b285192aSMauro Carvalho Chehab 
349b285192aSMauro Carvalho Chehab /* Description: This command provides the physical base address of the local
350b285192aSMauro Carvalho Chehab    DDR as viewed by EPU
351b285192aSMauro Carvalho Chehab    IN[0] - Physical offset where EPU has the local DDR mapped
352b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_DE_... */
353b285192aSMauro Carvalho Chehab #define CPU_CMD_DE_SetBase			(CPU_CMD_MASK_DE | 0x0001)
354b285192aSMauro Carvalho Chehab 
355b285192aSMauro Carvalho Chehab /* Description: This command provides the offsets in the device memory where
356b285192aSMauro Carvalho Chehab    the 2 cx18_mdl_ack blocks reside
357b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to start
358b285192aSMauro Carvalho Chehab    IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
359b285192aSMauro Carvalho Chehab 	   local DDR.
360b285192aSMauro Carvalho Chehab    IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
361b285192aSMauro Carvalho Chehab 	   local DDR.
362b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_DE_... */
363b285192aSMauro Carvalho Chehab #define CX18_CPU_DE_SET_MDL_ACK			(CPU_CMD_MASK_DE | 0x0002)
364b285192aSMauro Carvalho Chehab 
365b285192aSMauro Carvalho Chehab /* Description: This command provides the offset to a Memory Descriptor List
366b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to start
367b285192aSMauro Carvalho Chehab    IN[1] - Offset of the MDL from the beginning of the local DDR.
368b285192aSMauro Carvalho Chehab    IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1]
369b285192aSMauro Carvalho Chehab    IN[3] - Buffer ID
370b285192aSMauro Carvalho Chehab    IN[4] - Total buffer length
371b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_DE_... */
372b285192aSMauro Carvalho Chehab #define CX18_CPU_DE_SET_MDL			(CPU_CMD_MASK_DE | 0x0005)
373b285192aSMauro Carvalho Chehab 
374b285192aSMauro Carvalho Chehab /* Description: This command requests return of all current Memory
375b285192aSMauro Carvalho Chehab    Descriptor Lists to the driver
376b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task to start
377b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_DE_... */
378b285192aSMauro Carvalho Chehab #define CX18_CPU_DE_RELEASE_MDL			(CPU_CMD_MASK_DE | 0x0006)
379b285192aSMauro Carvalho Chehab 
380b285192aSMauro Carvalho Chehab /* Description: This command signals the cpu that the dat buffer has been
381b285192aSMauro Carvalho Chehab    consumed and ready for re-use.
382b285192aSMauro Carvalho Chehab    IN[0] - Task handle. Handle of the task
383b285192aSMauro Carvalho Chehab    IN[1] - Offset of the data block from the beginning of the local DDR.
384b285192aSMauro Carvalho Chehab    IN[2] - Number of bytes in the data block
385b285192aSMauro Carvalho Chehab    ReturnCode - One of the ERR_DE_... */
386b285192aSMauro Carvalho Chehab /* #define CX18_CPU_DE_RELEASE_BUFFER           (CPU_CMD_MASK_DE | 0x0007) */
387b285192aSMauro Carvalho Chehab 
388b285192aSMauro Carvalho Chehab /* No Error / Success */
389b285192aSMauro Carvalho Chehab #define CNXT_OK                 0x000000
390b285192aSMauro Carvalho Chehab 
391b285192aSMauro Carvalho Chehab /* Received unknown command */
392b285192aSMauro Carvalho Chehab #define CXERR_UNK_CMD           0x000001
393b285192aSMauro Carvalho Chehab 
394b285192aSMauro Carvalho Chehab /* First parameter in the command is invalid */
395b285192aSMauro Carvalho Chehab #define CXERR_INVALID_PARAM1    0x000002
396b285192aSMauro Carvalho Chehab 
397b285192aSMauro Carvalho Chehab /* Second parameter in the command is invalid */
398b285192aSMauro Carvalho Chehab #define CXERR_INVALID_PARAM2    0x000003
399b285192aSMauro Carvalho Chehab 
400b285192aSMauro Carvalho Chehab /* Device interface is not open/found */
401b285192aSMauro Carvalho Chehab #define CXERR_DEV_NOT_FOUND     0x000004
402b285192aSMauro Carvalho Chehab 
403b285192aSMauro Carvalho Chehab /* Requested function is not implemented/available */
404b285192aSMauro Carvalho Chehab #define CXERR_NOTSUPPORTED      0x000005
405b285192aSMauro Carvalho Chehab 
406b285192aSMauro Carvalho Chehab /* Invalid pointer is provided */
407b285192aSMauro Carvalho Chehab #define CXERR_BADPTR            0x000006
408b285192aSMauro Carvalho Chehab 
409b285192aSMauro Carvalho Chehab /* Unable to allocate memory */
410b285192aSMauro Carvalho Chehab #define CXERR_NOMEM             0x000007
411b285192aSMauro Carvalho Chehab 
412b285192aSMauro Carvalho Chehab /* Object/Link not found */
413b285192aSMauro Carvalho Chehab #define CXERR_LINK              0x000008
414b285192aSMauro Carvalho Chehab 
415b285192aSMauro Carvalho Chehab /* Device busy, command cannot be executed */
416b285192aSMauro Carvalho Chehab #define CXERR_BUSY              0x000009
417b285192aSMauro Carvalho Chehab 
418b285192aSMauro Carvalho Chehab /* File/device/handle is not open. */
419b285192aSMauro Carvalho Chehab #define CXERR_NOT_OPEN          0x00000A
420b285192aSMauro Carvalho Chehab 
421b285192aSMauro Carvalho Chehab /* Value is out of range */
422b285192aSMauro Carvalho Chehab #define CXERR_OUTOFRANGE        0x00000B
423b285192aSMauro Carvalho Chehab 
424b285192aSMauro Carvalho Chehab /* Buffer overflow */
425b285192aSMauro Carvalho Chehab #define CXERR_OVERFLOW          0x00000C
426b285192aSMauro Carvalho Chehab 
427b285192aSMauro Carvalho Chehab /* Version mismatch */
428b285192aSMauro Carvalho Chehab #define CXERR_BADVER            0x00000D
429b285192aSMauro Carvalho Chehab 
430b285192aSMauro Carvalho Chehab /* Operation timed out */
431b285192aSMauro Carvalho Chehab #define CXERR_TIMEOUT           0x00000E
432b285192aSMauro Carvalho Chehab 
433b285192aSMauro Carvalho Chehab /* Operation aborted */
434b285192aSMauro Carvalho Chehab #define CXERR_ABORT             0x00000F
435b285192aSMauro Carvalho Chehab 
436b285192aSMauro Carvalho Chehab /* Specified I2C device not found for read/write */
437b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_NOTFOUND   0x000010
438b285192aSMauro Carvalho Chehab 
439b285192aSMauro Carvalho Chehab /* Error in I2C data xfer (but I2C device is present) */
440b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_XFERERR    0x000011
441b285192aSMauro Carvalho Chehab 
442*16790554SMauro Carvalho Chehab /* Channel changing component not ready */
443b285192aSMauro Carvalho Chehab #define CXERR_CHANNELNOTREADY   0x000012
444b285192aSMauro Carvalho Chehab 
445b285192aSMauro Carvalho Chehab /* PPU (Presensation/Decoder) mail box is corrupted */
446b285192aSMauro Carvalho Chehab #define CXERR_PPU_MB_CORRUPT    0x000013
447b285192aSMauro Carvalho Chehab 
448b285192aSMauro Carvalho Chehab /* CPU (Capture/Encoder) mail box is corrupted */
449b285192aSMauro Carvalho Chehab #define CXERR_CPU_MB_CORRUPT    0x000014
450b285192aSMauro Carvalho Chehab 
451b285192aSMauro Carvalho Chehab /* APU (Audio) mail box is corrupted */
452b285192aSMauro Carvalho Chehab #define CXERR_APU_MB_CORRUPT    0x000015
453b285192aSMauro Carvalho Chehab 
454b285192aSMauro Carvalho Chehab /* Unable to open file for reading */
455b285192aSMauro Carvalho Chehab #define CXERR_FILE_OPEN_READ    0x000016
456b285192aSMauro Carvalho Chehab 
457b285192aSMauro Carvalho Chehab /* Unable to open file for writing */
458b285192aSMauro Carvalho Chehab #define CXERR_FILE_OPEN_WRITE   0x000017
459b285192aSMauro Carvalho Chehab 
460b285192aSMauro Carvalho Chehab /* Unable to find the I2C section specified */
461b285192aSMauro Carvalho Chehab #define CXERR_I2C_BADSECTION    0x000018
462b285192aSMauro Carvalho Chehab 
463b285192aSMauro Carvalho Chehab /* Error in I2C data xfer (but I2C device is present) */
464b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_DATALOW    0x000019
465b285192aSMauro Carvalho Chehab 
466b285192aSMauro Carvalho Chehab /* Error in I2C data xfer (but I2C device is present) */
467b285192aSMauro Carvalho Chehab #define CXERR_I2CDEV_CLOCKLOW   0x00001A
468b285192aSMauro Carvalho Chehab 
469b285192aSMauro Carvalho Chehab /* No Interrupt received from HW (for I2C access) */
470b285192aSMauro Carvalho Chehab #define CXERR_NO_HW_I2C_INTR    0x00001B
471b285192aSMauro Carvalho Chehab 
472b285192aSMauro Carvalho Chehab /* RPU is not ready to accept commands! */
473b285192aSMauro Carvalho Chehab #define CXERR_RPU_NOT_READY     0x00001C
474b285192aSMauro Carvalho Chehab 
475b285192aSMauro Carvalho Chehab /* RPU is not ready to accept commands! */
476b285192aSMauro Carvalho Chehab #define CXERR_RPU_NO_ACK        0x00001D
477b285192aSMauro Carvalho Chehab 
478b285192aSMauro Carvalho Chehab /* The are no buffers ready. Try again soon! */
479b285192aSMauro Carvalho Chehab #define CXERR_NODATA_AGAIN      0x00001E
480b285192aSMauro Carvalho Chehab 
481b285192aSMauro Carvalho Chehab /* The stream is stopping. Function not allowed now! */
482b285192aSMauro Carvalho Chehab #define CXERR_STOPPING_STATUS   0x00001F
483b285192aSMauro Carvalho Chehab 
484b285192aSMauro Carvalho Chehab /* Trying to access hardware when the power is turned OFF */
485b285192aSMauro Carvalho Chehab #define CXERR_DEVPOWER_OFF      0x000020
486b285192aSMauro Carvalho Chehab 
487b285192aSMauro Carvalho Chehab #endif /* CX23418_H */
488