13ee47cadSRui Miguel Silva // SPDX-License-Identifier: GPL-2.0 23ee47cadSRui Miguel Silva /* 33ee47cadSRui Miguel Silva * Omnivision OV2680 CMOS Image Sensor driver 43ee47cadSRui Miguel Silva * 53ee47cadSRui Miguel Silva * Copyright (C) 2018 Linaro Ltd 63ee47cadSRui Miguel Silva * 73ee47cadSRui Miguel Silva * Based on OV5640 Sensor Driver 83ee47cadSRui Miguel Silva * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. 93ee47cadSRui Miguel Silva * Copyright (C) 2014-2017 Mentor Graphics Inc. 103ee47cadSRui Miguel Silva * 113ee47cadSRui Miguel Silva */ 123ee47cadSRui Miguel Silva 133ee47cadSRui Miguel Silva #include <linux/clk.h> 143ee47cadSRui Miguel Silva #include <linux/delay.h> 153ee47cadSRui Miguel Silva #include <linux/err.h> 169289998eSHans de Goede #include <linux/gpio/consumer.h> 173ee47cadSRui Miguel Silva #include <linux/i2c.h> 183ee47cadSRui Miguel Silva #include <linux/init.h> 197c7e33b7SRob Herring #include <linux/mod_devicetable.h> 203ee47cadSRui Miguel Silva #include <linux/module.h> 21990732a6SHans de Goede #include <linux/pm_runtime.h> 229289998eSHans de Goede #include <linux/regmap.h> 233ee47cadSRui Miguel Silva #include <linux/regulator/consumer.h> 243ee47cadSRui Miguel Silva 259289998eSHans de Goede #include <media/v4l2-cci.h> 263ee47cadSRui Miguel Silva #include <media/v4l2-common.h> 273ee47cadSRui Miguel Silva #include <media/v4l2-ctrls.h> 283ee47cadSRui Miguel Silva #include <media/v4l2-subdev.h> 293ee47cadSRui Miguel Silva 303ee47cadSRui Miguel Silva #define OV2680_CHIP_ID 0x2680 313ee47cadSRui Miguel Silva 329289998eSHans de Goede #define OV2680_REG_STREAM_CTRL CCI_REG8(0x0100) 339289998eSHans de Goede #define OV2680_REG_SOFT_RESET CCI_REG8(0x0103) 343ee47cadSRui Miguel Silva 359289998eSHans de Goede #define OV2680_REG_CHIP_ID CCI_REG16(0x300a) 368e50a122SHans de Goede #define OV2680_REG_PLL_MULTIPLIER CCI_REG16(0x3081) 373ee47cadSRui Miguel Silva 389289998eSHans de Goede #define OV2680_REG_EXPOSURE_PK CCI_REG24(0x3500) 399289998eSHans de Goede #define OV2680_REG_R_MANUAL CCI_REG8(0x3503) 409289998eSHans de Goede #define OV2680_REG_GAIN_PK CCI_REG16(0x350a) 4163f47529SHans de Goede 4263f47529SHans de Goede #define OV2680_REG_SENSOR_CTRL_0A CCI_REG8(0x370a) 4363f47529SHans de Goede 4463f47529SHans de Goede #define OV2680_REG_HORIZONTAL_START CCI_REG16(0x3800) 4563f47529SHans de Goede #define OV2680_REG_VERTICAL_START CCI_REG16(0x3802) 4663f47529SHans de Goede #define OV2680_REG_HORIZONTAL_END CCI_REG16(0x3804) 4763f47529SHans de Goede #define OV2680_REG_VERTICAL_END CCI_REG16(0x3806) 4863f47529SHans de Goede #define OV2680_REG_HORIZONTAL_OUTPUT_SIZE CCI_REG16(0x3808) 4963f47529SHans de Goede #define OV2680_REG_VERTICAL_OUTPUT_SIZE CCI_REG16(0x380a) 509289998eSHans de Goede #define OV2680_REG_TIMING_HTS CCI_REG16(0x380c) 519289998eSHans de Goede #define OV2680_REG_TIMING_VTS CCI_REG16(0x380e) 5263f47529SHans de Goede #define OV2680_REG_ISP_X_WIN CCI_REG16(0x3810) 5363f47529SHans de Goede #define OV2680_REG_ISP_Y_WIN CCI_REG16(0x3812) 5463f47529SHans de Goede #define OV2680_REG_X_INC CCI_REG8(0x3814) 5563f47529SHans de Goede #define OV2680_REG_Y_INC CCI_REG8(0x3815) 569289998eSHans de Goede #define OV2680_REG_FORMAT1 CCI_REG8(0x3820) 579289998eSHans de Goede #define OV2680_REG_FORMAT2 CCI_REG8(0x3821) 583ee47cadSRui Miguel Silva 599289998eSHans de Goede #define OV2680_REG_ISP_CTRL00 CCI_REG8(0x5080) 603ee47cadSRui Miguel Silva 6163f47529SHans de Goede #define OV2680_REG_X_WIN CCI_REG16(0x5704) 6263f47529SHans de Goede #define OV2680_REG_Y_WIN CCI_REG16(0x5706) 6363f47529SHans de Goede 643ee47cadSRui Miguel Silva #define OV2680_FRAME_RATE 30 653ee47cadSRui Miguel Silva 6663f47529SHans de Goede #define OV2680_NATIVE_WIDTH 1616 6763f47529SHans de Goede #define OV2680_NATIVE_HEIGHT 1216 683b378b35SHans de Goede #define OV2680_NATIVE_START_LEFT 0 693b378b35SHans de Goede #define OV2680_NATIVE_START_TOP 0 7063f47529SHans de Goede #define OV2680_ACTIVE_WIDTH 1600 7163f47529SHans de Goede #define OV2680_ACTIVE_HEIGHT 1200 723b378b35SHans de Goede #define OV2680_ACTIVE_START_LEFT 8 733b378b35SHans de Goede #define OV2680_ACTIVE_START_TOP 8 743b378b35SHans de Goede #define OV2680_MIN_CROP_WIDTH 2 753b378b35SHans de Goede #define OV2680_MIN_CROP_HEIGHT 2 7663f47529SHans de Goede 7763f47529SHans de Goede /* 66MHz pixel clock: 66MHz / 1704 * 1294 = 30fps */ 7863f47529SHans de Goede #define OV2680_PIXELS_PER_LINE 1704 7963f47529SHans de Goede #define OV2680_LINES_PER_FRAME 1294 8063f47529SHans de Goede 8163f47529SHans de Goede /* If possible send 16 extra rows / lines to the ISP as padding */ 8263f47529SHans de Goede #define OV2680_END_MARGIN 16 833ee47cadSRui Miguel Silva 8405d6bd86SHans de Goede /* Max exposure time is VTS - 8 */ 8505d6bd86SHans de Goede #define OV2680_INTEGRATION_TIME_MARGIN 8 8605d6bd86SHans de Goede 876d6849b2SHans de Goede #define OV2680_DEFAULT_WIDTH 800 886d6849b2SHans de Goede #define OV2680_DEFAULT_HEIGHT 600 896d6849b2SHans de Goede 9063f47529SHans de Goede /* For enum_frame_size() full-size + binned-/quarter-size */ 9163f47529SHans de Goede #define OV2680_FRAME_SIZES 2 923ee47cadSRui Miguel Silva 933ee47cadSRui Miguel Silva static const char * const ov2680_supply_name[] = { 943ee47cadSRui Miguel Silva "DOVDD", 953ee47cadSRui Miguel Silva "DVDD", 963ee47cadSRui Miguel Silva "AVDD", 973ee47cadSRui Miguel Silva }; 983ee47cadSRui Miguel Silva 993ee47cadSRui Miguel Silva #define OV2680_NUM_SUPPLIES ARRAY_SIZE(ov2680_supply_name) 1003ee47cadSRui Miguel Silva 1018e50a122SHans de Goede enum { 1028e50a122SHans de Goede OV2680_19_2_MHZ, 1038e50a122SHans de Goede OV2680_24_MHZ, 1048e50a122SHans de Goede }; 1058e50a122SHans de Goede 1068e50a122SHans de Goede static const unsigned long ov2680_xvclk_freqs[] = { 1078e50a122SHans de Goede [OV2680_19_2_MHZ] = 19200000, 1088e50a122SHans de Goede [OV2680_24_MHZ] = 24000000, 1098e50a122SHans de Goede }; 1108e50a122SHans de Goede 1118e50a122SHans de Goede static const u8 ov2680_pll_multipliers[] = { 1128e50a122SHans de Goede [OV2680_19_2_MHZ] = 69, 1138e50a122SHans de Goede [OV2680_24_MHZ] = 55, 1148e50a122SHans de Goede }; 1158e50a122SHans de Goede 1163ee47cadSRui Miguel Silva struct ov2680_ctrls { 1173ee47cadSRui Miguel Silva struct v4l2_ctrl_handler handler; 1183ee47cadSRui Miguel Silva struct v4l2_ctrl *exposure; 1193ee47cadSRui Miguel Silva struct v4l2_ctrl *gain; 1203ee47cadSRui Miguel Silva struct v4l2_ctrl *hflip; 1213ee47cadSRui Miguel Silva struct v4l2_ctrl *vflip; 1223ee47cadSRui Miguel Silva struct v4l2_ctrl *test_pattern; 1233ee47cadSRui Miguel Silva }; 1243ee47cadSRui Miguel Silva 125f614dfb8SHans de Goede struct ov2680_mode { 1263b378b35SHans de Goede struct v4l2_rect crop; 127f614dfb8SHans de Goede struct v4l2_mbus_framefmt fmt; 128f614dfb8SHans de Goede struct v4l2_fract frame_interval; 12963f47529SHans de Goede bool binning; 13063f47529SHans de Goede u16 h_start; 13163f47529SHans de Goede u16 v_start; 13263f47529SHans de Goede u16 h_end; 13363f47529SHans de Goede u16 v_end; 13463f47529SHans de Goede u16 h_output_size; 13563f47529SHans de Goede u16 v_output_size; 13663f47529SHans de Goede u16 hts; 13763f47529SHans de Goede u16 vts; 138f614dfb8SHans de Goede }; 139f614dfb8SHans de Goede 1403ee47cadSRui Miguel Silva struct ov2680_dev { 1417adfdecbSHans de Goede struct device *dev; 1429289998eSHans de Goede struct regmap *regmap; 1433ee47cadSRui Miguel Silva struct v4l2_subdev sd; 1443ee47cadSRui Miguel Silva 1453ee47cadSRui Miguel Silva struct media_pad pad; 1463ee47cadSRui Miguel Silva struct clk *xvclk; 1473ee47cadSRui Miguel Silva u32 xvclk_freq; 1488e50a122SHans de Goede u8 pll_mult; 1493ee47cadSRui Miguel Silva struct regulator_bulk_data supplies[OV2680_NUM_SUPPLIES]; 1503ee47cadSRui Miguel Silva 151e9305a23SHans de Goede struct gpio_desc *pwdn_gpio; 1523ee47cadSRui Miguel Silva struct mutex lock; /* protect members */ 1533ee47cadSRui Miguel Silva 1543ee47cadSRui Miguel Silva bool is_streaming; 1553ee47cadSRui Miguel Silva 1563ee47cadSRui Miguel Silva struct ov2680_ctrls ctrls; 157f614dfb8SHans de Goede struct ov2680_mode mode; 1583ee47cadSRui Miguel Silva }; 1593ee47cadSRui Miguel Silva 1603b378b35SHans de Goede static const struct v4l2_rect ov2680_default_crop = { 1613b378b35SHans de Goede .left = OV2680_ACTIVE_START_LEFT, 1623b378b35SHans de Goede .top = OV2680_ACTIVE_START_TOP, 1633b378b35SHans de Goede .width = OV2680_ACTIVE_WIDTH, 1643b378b35SHans de Goede .height = OV2680_ACTIVE_HEIGHT, 1653b378b35SHans de Goede }; 1663b378b35SHans de Goede 1673ee47cadSRui Miguel Silva static const char * const test_pattern_menu[] = { 1683ee47cadSRui Miguel Silva "Disabled", 1693ee47cadSRui Miguel Silva "Color Bars", 1703ee47cadSRui Miguel Silva "Random Data", 1713ee47cadSRui Miguel Silva "Square", 1723ee47cadSRui Miguel Silva "Black Image", 1733ee47cadSRui Miguel Silva }; 1743ee47cadSRui Miguel Silva 1753ee47cadSRui Miguel Silva static const int ov2680_hv_flip_bayer_order[] = { 1763ee47cadSRui Miguel Silva MEDIA_BUS_FMT_SBGGR10_1X10, 1773ee47cadSRui Miguel Silva MEDIA_BUS_FMT_SGRBG10_1X10, 1783ee47cadSRui Miguel Silva MEDIA_BUS_FMT_SGBRG10_1X10, 1793ee47cadSRui Miguel Silva MEDIA_BUS_FMT_SRGGB10_1X10, 1803ee47cadSRui Miguel Silva }; 1813ee47cadSRui Miguel Silva 18263f47529SHans de Goede static const struct reg_sequence ov2680_global_setting[] = { 183*9b8e6ee8SHans de Goede /* MIPI PHY, 0x10 -> 0x1c enable bp_c_hs_en_lat and bp_d_hs_en_lat */ 184*9b8e6ee8SHans de Goede {0x3016, 0x1c}, 185*9b8e6ee8SHans de Goede 18663f47529SHans de Goede /* R MANUAL set exposure and gain to manual (hw does not do auto) */ 18763f47529SHans de Goede {0x3503, 0x03}, 1880a61cf33SHans de Goede 189*9b8e6ee8SHans de Goede /* Analog control register tweaks */ 190*9b8e6ee8SHans de Goede {0x3603, 0x39}, /* Reset value 0x99 */ 191*9b8e6ee8SHans de Goede {0x3604, 0x24}, /* Reset value 0x74 */ 192*9b8e6ee8SHans de Goede {0x3621, 0x37}, /* Reset value 0x44 */ 193*9b8e6ee8SHans de Goede 194*9b8e6ee8SHans de Goede /* Sensor control register tweaks */ 195*9b8e6ee8SHans de Goede {0x3701, 0x64}, /* Reset value 0x61 */ 196*9b8e6ee8SHans de Goede {0x3705, 0x3c}, /* Reset value 0x21 */ 197*9b8e6ee8SHans de Goede {0x370c, 0x50}, /* Reset value 0x10 */ 198*9b8e6ee8SHans de Goede {0x370d, 0xc0}, /* Reset value 0x00 */ 199*9b8e6ee8SHans de Goede {0x3718, 0x88}, /* Reset value 0x80 */ 200*9b8e6ee8SHans de Goede 201*9b8e6ee8SHans de Goede /* PSRAM tweaks */ 202*9b8e6ee8SHans de Goede {0x3781, 0x80}, /* Reset value 0x00 */ 203*9b8e6ee8SHans de Goede {0x3784, 0x0c}, /* Reset value 0x00, based on OV2680_R1A_AM10.ovt */ 204*9b8e6ee8SHans de Goede {0x3789, 0x60}, /* Reset value 0x50 */ 205*9b8e6ee8SHans de Goede 206*9b8e6ee8SHans de Goede /* BLC CTRL00 0x01 -> 0x81 set avg_weight to 8 */ 207*9b8e6ee8SHans de Goede {0x4000, 0x81}, 208*9b8e6ee8SHans de Goede 2090a61cf33SHans de Goede /* Set black level compensation range to 0 - 3 (default 0 - 11) */ 2100a61cf33SHans de Goede {0x4008, 0x00}, 2110a61cf33SHans de Goede {0x4009, 0x03}, 2120a61cf33SHans de Goede 213*9b8e6ee8SHans de Goede /* VFIFO R2 0x00 -> 0x02 set Frame reset enable */ 214*9b8e6ee8SHans de Goede {0x4602, 0x02}, 215*9b8e6ee8SHans de Goede 216*9b8e6ee8SHans de Goede /* MIPI ctrl CLK PREPARE MIN change from 0x26 (38) -> 0x36 (54) */ 217*9b8e6ee8SHans de Goede {0x481f, 0x36}, 218*9b8e6ee8SHans de Goede 219*9b8e6ee8SHans de Goede /* MIPI ctrl CLK LPX P MIN change from 0x32 (50) -> 0x36 (54) */ 220*9b8e6ee8SHans de Goede {0x4825, 0x36}, 221*9b8e6ee8SHans de Goede 222*9b8e6ee8SHans de Goede /* R ISP CTRL2 0x20 -> 0x30, set sof_sel bit */ 223*9b8e6ee8SHans de Goede {0x5002, 0x30}, 224*9b8e6ee8SHans de Goede 22563f47529SHans de Goede /* 22663f47529SHans de Goede * Window CONTROL 0x00 -> 0x01, enable manual window control, 22763f47529SHans de Goede * this is necessary for full size flip and mirror support. 22863f47529SHans de Goede */ 22963f47529SHans de Goede {0x5708, 0x01}, 230*9b8e6ee8SHans de Goede 231*9b8e6ee8SHans de Goede /* 232*9b8e6ee8SHans de Goede * DPC CTRL0 0x14 -> 0x3e, set enable_tail, enable_3x3_cluster 233*9b8e6ee8SHans de Goede * and enable_general_tail bits based OV2680_R1A_AM10.ovt. 234*9b8e6ee8SHans de Goede */ 235*9b8e6ee8SHans de Goede {0x5780, 0x3e}, 236*9b8e6ee8SHans de Goede 237*9b8e6ee8SHans de Goede /* DPC MORE CONNECTION CASE THRE 0x0c (12) -> 0x02 (2) */ 238*9b8e6ee8SHans de Goede {0x5788, 0x02}, 239*9b8e6ee8SHans de Goede 240*9b8e6ee8SHans de Goede /* DPC GAIN LIST1 0x0f (15) -> 0x08 (8) */ 241*9b8e6ee8SHans de Goede {0x578e, 0x08}, 242*9b8e6ee8SHans de Goede 243*9b8e6ee8SHans de Goede /* DPC GAIN LIST2 0x3f (63) -> 0x0c (12) */ 244*9b8e6ee8SHans de Goede {0x578f, 0x0c}, 245*9b8e6ee8SHans de Goede 246*9b8e6ee8SHans de Goede /* DPC THRE RATIO 0x04 (4) -> 0x00 (0) */ 247*9b8e6ee8SHans de Goede {0x5792, 0x00}, 2483ee47cadSRui Miguel Silva }; 2493ee47cadSRui Miguel Silva 2503ee47cadSRui Miguel Silva static struct ov2680_dev *to_ov2680_dev(struct v4l2_subdev *sd) 2513ee47cadSRui Miguel Silva { 2523ee47cadSRui Miguel Silva return container_of(sd, struct ov2680_dev, sd); 2533ee47cadSRui Miguel Silva } 2543ee47cadSRui Miguel Silva 2553ee47cadSRui Miguel Silva static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) 2563ee47cadSRui Miguel Silva { 2573ee47cadSRui Miguel Silva return &container_of(ctrl->handler, struct ov2680_dev, 2583ee47cadSRui Miguel Silva ctrls.handler)->sd; 2593ee47cadSRui Miguel Silva } 2603ee47cadSRui Miguel Silva 2613ee47cadSRui Miguel Silva static void ov2680_power_up(struct ov2680_dev *sensor) 2623ee47cadSRui Miguel Silva { 263e9305a23SHans de Goede if (!sensor->pwdn_gpio) 2643ee47cadSRui Miguel Silva return; 2653ee47cadSRui Miguel Silva 266e9305a23SHans de Goede gpiod_set_value(sensor->pwdn_gpio, 0); 2673ee47cadSRui Miguel Silva usleep_range(5000, 10000); 2683ee47cadSRui Miguel Silva } 2693ee47cadSRui Miguel Silva 2703ee47cadSRui Miguel Silva static void ov2680_power_down(struct ov2680_dev *sensor) 2713ee47cadSRui Miguel Silva { 272e9305a23SHans de Goede if (!sensor->pwdn_gpio) 2733ee47cadSRui Miguel Silva return; 2743ee47cadSRui Miguel Silva 275e9305a23SHans de Goede gpiod_set_value(sensor->pwdn_gpio, 1); 2763ee47cadSRui Miguel Silva usleep_range(5000, 10000); 2773ee47cadSRui Miguel Silva } 2783ee47cadSRui Miguel Silva 2796d6849b2SHans de Goede static void ov2680_set_bayer_order(struct ov2680_dev *sensor, 2806d6849b2SHans de Goede struct v4l2_mbus_framefmt *fmt) 2813ee47cadSRui Miguel Silva { 28250a7bad4SHans de Goede int hv_flip = 0; 2833ee47cadSRui Miguel Silva 28450a7bad4SHans de Goede if (sensor->ctrls.vflip && sensor->ctrls.vflip->val) 28550a7bad4SHans de Goede hv_flip += 1; 2863ee47cadSRui Miguel Silva 28750a7bad4SHans de Goede if (sensor->ctrls.hflip && sensor->ctrls.hflip->val) 28850a7bad4SHans de Goede hv_flip += 2; 2893ee47cadSRui Miguel Silva 2906d6849b2SHans de Goede fmt->code = ov2680_hv_flip_bayer_order[hv_flip]; 2916d6849b2SHans de Goede } 2926d6849b2SHans de Goede 29323321b91SHans de Goede static struct v4l2_mbus_framefmt * 29423321b91SHans de Goede __ov2680_get_pad_format(struct ov2680_dev *sensor, 29523321b91SHans de Goede struct v4l2_subdev_state *state, 29623321b91SHans de Goede unsigned int pad, 29723321b91SHans de Goede enum v4l2_subdev_format_whence which) 29823321b91SHans de Goede { 29923321b91SHans de Goede if (which == V4L2_SUBDEV_FORMAT_TRY) 30023321b91SHans de Goede return v4l2_subdev_get_try_format(&sensor->sd, state, pad); 30123321b91SHans de Goede 30223321b91SHans de Goede return &sensor->mode.fmt; 30323321b91SHans de Goede } 30423321b91SHans de Goede 3053b378b35SHans de Goede static struct v4l2_rect * 3063b378b35SHans de Goede __ov2680_get_pad_crop(struct ov2680_dev *sensor, 3073b378b35SHans de Goede struct v4l2_subdev_state *state, 3083b378b35SHans de Goede unsigned int pad, 3093b378b35SHans de Goede enum v4l2_subdev_format_whence which) 3103b378b35SHans de Goede { 3113b378b35SHans de Goede if (which == V4L2_SUBDEV_FORMAT_TRY) 3123b378b35SHans de Goede return v4l2_subdev_get_try_crop(&sensor->sd, state, pad); 3133b378b35SHans de Goede 3143b378b35SHans de Goede return &sensor->mode.crop; 3153b378b35SHans de Goede } 3163b378b35SHans de Goede 3176d6849b2SHans de Goede static void ov2680_fill_format(struct ov2680_dev *sensor, 3186d6849b2SHans de Goede struct v4l2_mbus_framefmt *fmt, 3196d6849b2SHans de Goede unsigned int width, unsigned int height) 3206d6849b2SHans de Goede { 3216d6849b2SHans de Goede memset(fmt, 0, sizeof(*fmt)); 3226d6849b2SHans de Goede fmt->width = width; 3236d6849b2SHans de Goede fmt->height = height; 3246d6849b2SHans de Goede fmt->field = V4L2_FIELD_NONE; 3256d6849b2SHans de Goede fmt->colorspace = V4L2_COLORSPACE_SRGB; 3266d6849b2SHans de Goede ov2680_set_bayer_order(sensor, fmt); 3273ee47cadSRui Miguel Silva } 3283ee47cadSRui Miguel Silva 32963f47529SHans de Goede static void ov2680_calc_mode(struct ov2680_dev *sensor) 33063f47529SHans de Goede { 33163f47529SHans de Goede int width = sensor->mode.fmt.width; 33263f47529SHans de Goede int height = sensor->mode.fmt.height; 33363f47529SHans de Goede int orig_width = width; 33463f47529SHans de Goede int orig_height = height; 33563f47529SHans de Goede 3363b378b35SHans de Goede if (width <= (sensor->mode.crop.width / 2) && 3373b378b35SHans de Goede height <= (sensor->mode.crop.height / 2)) { 33863f47529SHans de Goede sensor->mode.binning = true; 33963f47529SHans de Goede width *= 2; 34063f47529SHans de Goede height *= 2; 34163f47529SHans de Goede } else { 34263f47529SHans de Goede sensor->mode.binning = false; 34363f47529SHans de Goede } 34463f47529SHans de Goede 3453b378b35SHans de Goede sensor->mode.h_start = (sensor->mode.crop.left + 3463b378b35SHans de Goede (sensor->mode.crop.width - width) / 2) & ~1; 3473b378b35SHans de Goede sensor->mode.v_start = (sensor->mode.crop.top + 3483b378b35SHans de Goede (sensor->mode.crop.height - height) / 2) & ~1; 34963f47529SHans de Goede sensor->mode.h_end = 35063f47529SHans de Goede min(sensor->mode.h_start + width + OV2680_END_MARGIN - 1, 35163f47529SHans de Goede OV2680_NATIVE_WIDTH - 1); 35263f47529SHans de Goede sensor->mode.v_end = 35363f47529SHans de Goede min(sensor->mode.v_start + height + OV2680_END_MARGIN - 1, 35463f47529SHans de Goede OV2680_NATIVE_HEIGHT - 1); 35563f47529SHans de Goede sensor->mode.h_output_size = orig_width; 35663f47529SHans de Goede sensor->mode.v_output_size = orig_height; 35763f47529SHans de Goede sensor->mode.hts = OV2680_PIXELS_PER_LINE; 35863f47529SHans de Goede sensor->mode.vts = OV2680_LINES_PER_FRAME; 35963f47529SHans de Goede } 36063f47529SHans de Goede 36163f47529SHans de Goede static int ov2680_set_mode(struct ov2680_dev *sensor) 36263f47529SHans de Goede { 36363f47529SHans de Goede u8 sensor_ctrl_0a, inc, fmt1, fmt2; 36463f47529SHans de Goede int ret = 0; 36563f47529SHans de Goede 36663f47529SHans de Goede if (sensor->mode.binning) { 36763f47529SHans de Goede sensor_ctrl_0a = 0x23; 36863f47529SHans de Goede inc = 0x31; 36963f47529SHans de Goede fmt1 = 0xc2; 37063f47529SHans de Goede fmt2 = 0x01; 37163f47529SHans de Goede } else { 37263f47529SHans de Goede sensor_ctrl_0a = 0x21; 37363f47529SHans de Goede inc = 0x11; 37463f47529SHans de Goede fmt1 = 0xc0; 37563f47529SHans de Goede fmt2 = 0x00; 37663f47529SHans de Goede } 37763f47529SHans de Goede 37863f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_SENSOR_CTRL_0A, 37963f47529SHans de Goede sensor_ctrl_0a, &ret); 38063f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_START, 38163f47529SHans de Goede sensor->mode.h_start, &ret); 38263f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_VERTICAL_START, 38363f47529SHans de Goede sensor->mode.v_start, &ret); 38463f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_END, 38563f47529SHans de Goede sensor->mode.h_end, &ret); 38663f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_VERTICAL_END, 38763f47529SHans de Goede sensor->mode.v_end, &ret); 38863f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_HORIZONTAL_OUTPUT_SIZE, 38963f47529SHans de Goede sensor->mode.h_output_size, &ret); 39063f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_VERTICAL_OUTPUT_SIZE, 39163f47529SHans de Goede sensor->mode.v_output_size, &ret); 39263f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_TIMING_HTS, 39363f47529SHans de Goede sensor->mode.hts, &ret); 39463f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_TIMING_VTS, 39563f47529SHans de Goede sensor->mode.vts, &ret); 39663f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_ISP_X_WIN, 0, &ret); 39763f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_ISP_Y_WIN, 0, &ret); 39863f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_X_INC, inc, &ret); 39963f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_Y_INC, inc, &ret); 40063f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_X_WIN, 40163f47529SHans de Goede sensor->mode.h_output_size, &ret); 40263f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_Y_WIN, 40363f47529SHans de Goede sensor->mode.v_output_size, &ret); 40463f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_FORMAT1, fmt1, &ret); 40563f47529SHans de Goede cci_write(sensor->regmap, OV2680_REG_FORMAT2, fmt2, &ret); 40663f47529SHans de Goede 40763f47529SHans de Goede return ret; 40863f47529SHans de Goede } 40963f47529SHans de Goede 410d5d08ad3SHans de Goede static int ov2680_set_vflip(struct ov2680_dev *sensor, s32 val) 4113ee47cadSRui Miguel Silva { 4123ee47cadSRui Miguel Silva int ret; 4133ee47cadSRui Miguel Silva 414d5d08ad3SHans de Goede if (sensor->is_streaming) 415d5d08ad3SHans de Goede return -EBUSY; 416d5d08ad3SHans de Goede 4179289998eSHans de Goede ret = cci_update_bits(sensor->regmap, OV2680_REG_FORMAT1, 4189289998eSHans de Goede BIT(2), val ? BIT(2) : 0, NULL); 4193ee47cadSRui Miguel Silva if (ret < 0) 4203ee47cadSRui Miguel Silva return ret; 4213ee47cadSRui Miguel Silva 422f614dfb8SHans de Goede ov2680_set_bayer_order(sensor, &sensor->mode.fmt); 42350a7bad4SHans de Goede return 0; 4243ee47cadSRui Miguel Silva } 4253ee47cadSRui Miguel Silva 426d5d08ad3SHans de Goede static int ov2680_set_hflip(struct ov2680_dev *sensor, s32 val) 4273ee47cadSRui Miguel Silva { 4283ee47cadSRui Miguel Silva int ret; 4293ee47cadSRui Miguel Silva 430d5d08ad3SHans de Goede if (sensor->is_streaming) 431d5d08ad3SHans de Goede return -EBUSY; 4323ee47cadSRui Miguel Silva 4339289998eSHans de Goede ret = cci_update_bits(sensor->regmap, OV2680_REG_FORMAT2, 4349289998eSHans de Goede BIT(2), val ? BIT(2) : 0, NULL); 4353ee47cadSRui Miguel Silva if (ret < 0) 4363ee47cadSRui Miguel Silva return ret; 4373ee47cadSRui Miguel Silva 438f614dfb8SHans de Goede ov2680_set_bayer_order(sensor, &sensor->mode.fmt); 43950a7bad4SHans de Goede return 0; 4403ee47cadSRui Miguel Silva } 4413ee47cadSRui Miguel Silva 4423ee47cadSRui Miguel Silva static int ov2680_test_pattern_set(struct ov2680_dev *sensor, int value) 4433ee47cadSRui Miguel Silva { 4449289998eSHans de Goede int ret = 0; 4453ee47cadSRui Miguel Silva 4463ee47cadSRui Miguel Silva if (!value) 4479289998eSHans de Goede return cci_update_bits(sensor->regmap, OV2680_REG_ISP_CTRL00, 4489289998eSHans de Goede BIT(7), 0, NULL); 4493ee47cadSRui Miguel Silva 4509289998eSHans de Goede cci_update_bits(sensor->regmap, OV2680_REG_ISP_CTRL00, 4519289998eSHans de Goede 0x03, value - 1, &ret); 4529289998eSHans de Goede cci_update_bits(sensor->regmap, OV2680_REG_ISP_CTRL00, 4539289998eSHans de Goede BIT(7), BIT(7), &ret); 4549289998eSHans de Goede 4553ee47cadSRui Miguel Silva return ret; 4563ee47cadSRui Miguel Silva } 4573ee47cadSRui Miguel Silva 4587b5a42e6SHans de Goede static int ov2680_gain_set(struct ov2680_dev *sensor, u32 gain) 4593ee47cadSRui Miguel Silva { 4609289998eSHans de Goede return cci_write(sensor->regmap, OV2680_REG_GAIN_PK, gain, NULL); 4613ee47cadSRui Miguel Silva } 4623ee47cadSRui Miguel Silva 4637b5a42e6SHans de Goede static int ov2680_exposure_set(struct ov2680_dev *sensor, u32 exp) 4643ee47cadSRui Miguel Silva { 4659289998eSHans de Goede return cci_write(sensor->regmap, OV2680_REG_EXPOSURE_PK, exp << 4, 4669289998eSHans de Goede NULL); 4673ee47cadSRui Miguel Silva } 4683ee47cadSRui Miguel Silva 4693ee47cadSRui Miguel Silva static int ov2680_stream_enable(struct ov2680_dev *sensor) 4703ee47cadSRui Miguel Silva { 4713ee47cadSRui Miguel Silva int ret; 4723ee47cadSRui Miguel Silva 4738e50a122SHans de Goede ret = cci_write(sensor->regmap, OV2680_REG_PLL_MULTIPLIER, 4748e50a122SHans de Goede sensor->pll_mult, NULL); 4758e50a122SHans de Goede if (ret < 0) 4768e50a122SHans de Goede return ret; 4778e50a122SHans de Goede 4789289998eSHans de Goede ret = regmap_multi_reg_write(sensor->regmap, 47963f47529SHans de Goede ov2680_global_setting, 48063f47529SHans de Goede ARRAY_SIZE(ov2680_global_setting)); 481990732a6SHans de Goede if (ret < 0) 482990732a6SHans de Goede return ret; 483990732a6SHans de Goede 48463f47529SHans de Goede ret = ov2680_set_mode(sensor); 4853ee47cadSRui Miguel Silva if (ret < 0) 4863ee47cadSRui Miguel Silva return ret; 4873ee47cadSRui Miguel Silva 4887b5a42e6SHans de Goede /* Restore value of all ctrls */ 4897b5a42e6SHans de Goede ret = __v4l2_ctrl_handler_setup(&sensor->ctrls.handler); 4903ee47cadSRui Miguel Silva if (ret < 0) 4913ee47cadSRui Miguel Silva return ret; 4923ee47cadSRui Miguel Silva 493990732a6SHans de Goede return cci_write(sensor->regmap, OV2680_REG_STREAM_CTRL, 1, NULL); 4943ee47cadSRui Miguel Silva } 4953ee47cadSRui Miguel Silva 496990732a6SHans de Goede static int ov2680_stream_disable(struct ov2680_dev *sensor) 4973ee47cadSRui Miguel Silva { 498990732a6SHans de Goede return cci_write(sensor->regmap, OV2680_REG_STREAM_CTRL, 0, NULL); 4993ee47cadSRui Miguel Silva } 5003ee47cadSRui Miguel Silva 5013ee47cadSRui Miguel Silva static int ov2680_power_off(struct ov2680_dev *sensor) 5023ee47cadSRui Miguel Silva { 5033ee47cadSRui Miguel Silva clk_disable_unprepare(sensor->xvclk); 5043ee47cadSRui Miguel Silva ov2680_power_down(sensor); 5053ee47cadSRui Miguel Silva regulator_bulk_disable(OV2680_NUM_SUPPLIES, sensor->supplies); 5063ee47cadSRui Miguel Silva return 0; 5073ee47cadSRui Miguel Silva } 5083ee47cadSRui Miguel Silva 5093ee47cadSRui Miguel Silva static int ov2680_power_on(struct ov2680_dev *sensor) 5103ee47cadSRui Miguel Silva { 5113ee47cadSRui Miguel Silva int ret; 5123ee47cadSRui Miguel Silva 5133ee47cadSRui Miguel Silva ret = regulator_bulk_enable(OV2680_NUM_SUPPLIES, sensor->supplies); 5143ee47cadSRui Miguel Silva if (ret < 0) { 5157adfdecbSHans de Goede dev_err(sensor->dev, "failed to enable regulators: %d\n", ret); 5163ee47cadSRui Miguel Silva return ret; 5173ee47cadSRui Miguel Silva } 5183ee47cadSRui Miguel Silva 519e9305a23SHans de Goede if (!sensor->pwdn_gpio) { 5209289998eSHans de Goede ret = cci_write(sensor->regmap, OV2680_REG_SOFT_RESET, 0x01, 5219289998eSHans de Goede NULL); 5223ee47cadSRui Miguel Silva if (ret != 0) { 5237adfdecbSHans de Goede dev_err(sensor->dev, "sensor soft reset failed\n"); 52484b4bd7eSHans de Goede goto err_disable_regulators; 5253ee47cadSRui Miguel Silva } 5263ee47cadSRui Miguel Silva usleep_range(1000, 2000); 5273ee47cadSRui Miguel Silva } else { 5283ee47cadSRui Miguel Silva ov2680_power_down(sensor); 5293ee47cadSRui Miguel Silva ov2680_power_up(sensor); 5303ee47cadSRui Miguel Silva } 5313ee47cadSRui Miguel Silva 5323ee47cadSRui Miguel Silva ret = clk_prepare_enable(sensor->xvclk); 5333ee47cadSRui Miguel Silva if (ret < 0) 53484b4bd7eSHans de Goede goto err_disable_regulators; 5353ee47cadSRui Miguel Silva 5363ee47cadSRui Miguel Silva return 0; 53784b4bd7eSHans de Goede 53884b4bd7eSHans de Goede err_disable_regulators: 53984b4bd7eSHans de Goede regulator_bulk_disable(OV2680_NUM_SUPPLIES, sensor->supplies); 54084b4bd7eSHans de Goede return ret; 5413ee47cadSRui Miguel Silva } 5423ee47cadSRui Miguel Silva 5433ee47cadSRui Miguel Silva static int ov2680_s_g_frame_interval(struct v4l2_subdev *sd, 5443ee47cadSRui Miguel Silva struct v4l2_subdev_frame_interval *fi) 5453ee47cadSRui Miguel Silva { 5463ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 5473ee47cadSRui Miguel Silva 5483ee47cadSRui Miguel Silva mutex_lock(&sensor->lock); 549f614dfb8SHans de Goede fi->interval = sensor->mode.frame_interval; 5503ee47cadSRui Miguel Silva mutex_unlock(&sensor->lock); 5513ee47cadSRui Miguel Silva 5523ee47cadSRui Miguel Silva return 0; 5533ee47cadSRui Miguel Silva } 5543ee47cadSRui Miguel Silva 5553ee47cadSRui Miguel Silva static int ov2680_s_stream(struct v4l2_subdev *sd, int enable) 5563ee47cadSRui Miguel Silva { 5573ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 5583ee47cadSRui Miguel Silva int ret = 0; 5593ee47cadSRui Miguel Silva 5603ee47cadSRui Miguel Silva mutex_lock(&sensor->lock); 5613ee47cadSRui Miguel Silva 5623ee47cadSRui Miguel Silva if (sensor->is_streaming == !!enable) 5633ee47cadSRui Miguel Silva goto unlock; 5643ee47cadSRui Miguel Silva 565990732a6SHans de Goede if (enable) { 566990732a6SHans de Goede ret = pm_runtime_resume_and_get(sensor->sd.dev); 5673ee47cadSRui Miguel Silva if (ret < 0) 5683ee47cadSRui Miguel Silva goto unlock; 5693ee47cadSRui Miguel Silva 5703ee47cadSRui Miguel Silva ret = ov2680_stream_enable(sensor); 571990732a6SHans de Goede if (ret < 0) { 572990732a6SHans de Goede pm_runtime_put(sensor->sd.dev); 573990732a6SHans de Goede goto unlock; 574990732a6SHans de Goede } 575990732a6SHans de Goede } else { 5763ee47cadSRui Miguel Silva ret = ov2680_stream_disable(sensor); 577990732a6SHans de Goede pm_runtime_put(sensor->sd.dev); 578990732a6SHans de Goede } 5793ee47cadSRui Miguel Silva 5803ee47cadSRui Miguel Silva sensor->is_streaming = !!enable; 5813ee47cadSRui Miguel Silva 5823ee47cadSRui Miguel Silva unlock: 5833ee47cadSRui Miguel Silva mutex_unlock(&sensor->lock); 5843ee47cadSRui Miguel Silva 5853ee47cadSRui Miguel Silva return ret; 5863ee47cadSRui Miguel Silva } 5873ee47cadSRui Miguel Silva 5883ee47cadSRui Miguel Silva static int ov2680_enum_mbus_code(struct v4l2_subdev *sd, 5890d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 5903ee47cadSRui Miguel Silva struct v4l2_subdev_mbus_code_enum *code) 5913ee47cadSRui Miguel Silva { 5923ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 5933ee47cadSRui Miguel Silva 5943ee47cadSRui Miguel Silva if (code->pad != 0 || code->index != 0) 5953ee47cadSRui Miguel Silva return -EINVAL; 5963ee47cadSRui Miguel Silva 597f614dfb8SHans de Goede code->code = sensor->mode.fmt.code; 5983ee47cadSRui Miguel Silva 5993ee47cadSRui Miguel Silva return 0; 6003ee47cadSRui Miguel Silva } 6013ee47cadSRui Miguel Silva 6023ee47cadSRui Miguel Silva static int ov2680_get_fmt(struct v4l2_subdev *sd, 6030d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 6043ee47cadSRui Miguel Silva struct v4l2_subdev_format *format) 6053ee47cadSRui Miguel Silva { 6063ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 60723321b91SHans de Goede struct v4l2_mbus_framefmt *fmt; 6083ee47cadSRui Miguel Silva 6093ee47cadSRui Miguel Silva if (format->pad != 0) 6103ee47cadSRui Miguel Silva return -EINVAL; 6113ee47cadSRui Miguel Silva 61223321b91SHans de Goede fmt = __ov2680_get_pad_format(sensor, sd_state, format->pad, 61323321b91SHans de Goede format->which); 61423321b91SHans de Goede 6153ee47cadSRui Miguel Silva mutex_lock(&sensor->lock); 6163ee47cadSRui Miguel Silva format->format = *fmt; 6173ee47cadSRui Miguel Silva mutex_unlock(&sensor->lock); 6183ee47cadSRui Miguel Silva 61949c282d5SHans de Goede return 0; 6203ee47cadSRui Miguel Silva } 6213ee47cadSRui Miguel Silva 6223ee47cadSRui Miguel Silva static int ov2680_set_fmt(struct v4l2_subdev *sd, 6230d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 6243ee47cadSRui Miguel Silva struct v4l2_subdev_format *format) 6253ee47cadSRui Miguel Silva { 6263ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 6273ee47cadSRui Miguel Silva struct v4l2_mbus_framefmt *try_fmt; 6283b378b35SHans de Goede const struct v4l2_rect *crop; 62963f47529SHans de Goede unsigned int width, height; 6303ee47cadSRui Miguel Silva int ret = 0; 6313ee47cadSRui Miguel Silva 6323ee47cadSRui Miguel Silva if (format->pad != 0) 6333ee47cadSRui Miguel Silva return -EINVAL; 6343ee47cadSRui Miguel Silva 6353b378b35SHans de Goede crop = __ov2680_get_pad_crop(sensor, sd_state, format->pad, 6363b378b35SHans de Goede format->which); 6373b378b35SHans de Goede 6383b378b35SHans de Goede /* Limit set_fmt max size to crop width / height */ 6393b378b35SHans de Goede width = clamp_val(ALIGN(format->format.width, 2), 6403b378b35SHans de Goede OV2680_MIN_CROP_WIDTH, crop->width); 6413b378b35SHans de Goede height = clamp_val(ALIGN(format->format.height, 2), 6423b378b35SHans de Goede OV2680_MIN_CROP_HEIGHT, crop->height); 6433ee47cadSRui Miguel Silva 64463f47529SHans de Goede ov2680_fill_format(sensor, &format->format, width, height); 645c0e97a4bSHans de Goede 6463ee47cadSRui Miguel Silva if (format->which == V4L2_SUBDEV_FORMAT_TRY) { 6470d346d2aSTomi Valkeinen try_fmt = v4l2_subdev_get_try_format(sd, sd_state, 0); 648c0e97a4bSHans de Goede *try_fmt = format->format; 649e521b9ccSHans de Goede return 0; 650e521b9ccSHans de Goede } 651e521b9ccSHans de Goede 652e521b9ccSHans de Goede mutex_lock(&sensor->lock); 653e521b9ccSHans de Goede 654e521b9ccSHans de Goede if (sensor->is_streaming) { 655e521b9ccSHans de Goede ret = -EBUSY; 6563ee47cadSRui Miguel Silva goto unlock; 6573ee47cadSRui Miguel Silva } 6583ee47cadSRui Miguel Silva 659f614dfb8SHans de Goede sensor->mode.fmt = format->format; 66063f47529SHans de Goede ov2680_calc_mode(sensor); 6613ee47cadSRui Miguel Silva 6623ee47cadSRui Miguel Silva unlock: 6633ee47cadSRui Miguel Silva mutex_unlock(&sensor->lock); 6643ee47cadSRui Miguel Silva 6653ee47cadSRui Miguel Silva return ret; 6663ee47cadSRui Miguel Silva } 6673ee47cadSRui Miguel Silva 6683b378b35SHans de Goede static int ov2680_get_selection(struct v4l2_subdev *sd, 6693b378b35SHans de Goede struct v4l2_subdev_state *state, 6703b378b35SHans de Goede struct v4l2_subdev_selection *sel) 6713b378b35SHans de Goede { 6723b378b35SHans de Goede struct ov2680_dev *sensor = to_ov2680_dev(sd); 6733b378b35SHans de Goede 6743b378b35SHans de Goede switch (sel->target) { 6753b378b35SHans de Goede case V4L2_SEL_TGT_CROP: 6763b378b35SHans de Goede mutex_lock(&sensor->lock); 6773b378b35SHans de Goede sel->r = *__ov2680_get_pad_crop(sensor, state, sel->pad, 6783b378b35SHans de Goede sel->which); 6793b378b35SHans de Goede mutex_unlock(&sensor->lock); 6803b378b35SHans de Goede break; 6813b378b35SHans de Goede case V4L2_SEL_TGT_NATIVE_SIZE: 6823b378b35SHans de Goede case V4L2_SEL_TGT_CROP_BOUNDS: 6833b378b35SHans de Goede sel->r.top = 0; 6843b378b35SHans de Goede sel->r.left = 0; 6853b378b35SHans de Goede sel->r.width = OV2680_NATIVE_WIDTH; 6863b378b35SHans de Goede sel->r.height = OV2680_NATIVE_HEIGHT; 6873b378b35SHans de Goede break; 6883b378b35SHans de Goede case V4L2_SEL_TGT_CROP_DEFAULT: 6893b378b35SHans de Goede sel->r = ov2680_default_crop; 6903b378b35SHans de Goede break; 6913b378b35SHans de Goede default: 6923b378b35SHans de Goede return -EINVAL; 6933b378b35SHans de Goede } 6943b378b35SHans de Goede 6953b378b35SHans de Goede return 0; 6963b378b35SHans de Goede } 6973b378b35SHans de Goede 6983b378b35SHans de Goede static int ov2680_set_selection(struct v4l2_subdev *sd, 6993b378b35SHans de Goede struct v4l2_subdev_state *state, 7003b378b35SHans de Goede struct v4l2_subdev_selection *sel) 7013b378b35SHans de Goede { 7023b378b35SHans de Goede struct ov2680_dev *sensor = to_ov2680_dev(sd); 7033b378b35SHans de Goede struct v4l2_mbus_framefmt *format; 7043b378b35SHans de Goede struct v4l2_rect *crop; 7053b378b35SHans de Goede struct v4l2_rect rect; 7063b378b35SHans de Goede 7073b378b35SHans de Goede if (sel->target != V4L2_SEL_TGT_CROP) 7083b378b35SHans de Goede return -EINVAL; 7093b378b35SHans de Goede 7103b378b35SHans de Goede /* 7113b378b35SHans de Goede * Clamp the boundaries of the crop rectangle to the size of the sensor 7123b378b35SHans de Goede * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't 7133b378b35SHans de Goede * disrupted. 7143b378b35SHans de Goede */ 7153b378b35SHans de Goede rect.left = clamp_val(ALIGN(sel->r.left, 2), 7163b378b35SHans de Goede OV2680_NATIVE_START_LEFT, OV2680_NATIVE_WIDTH); 7173b378b35SHans de Goede rect.top = clamp_val(ALIGN(sel->r.top, 2), 7183b378b35SHans de Goede OV2680_NATIVE_START_TOP, OV2680_NATIVE_HEIGHT); 7193b378b35SHans de Goede rect.width = clamp_val(ALIGN(sel->r.width, 2), 7203b378b35SHans de Goede OV2680_MIN_CROP_WIDTH, OV2680_NATIVE_WIDTH); 7213b378b35SHans de Goede rect.height = clamp_val(ALIGN(sel->r.height, 2), 7223b378b35SHans de Goede OV2680_MIN_CROP_HEIGHT, OV2680_NATIVE_HEIGHT); 7233b378b35SHans de Goede 7243b378b35SHans de Goede /* Make sure the crop rectangle isn't outside the bounds of the array */ 7253b378b35SHans de Goede rect.width = min_t(unsigned int, rect.width, 7263b378b35SHans de Goede OV2680_NATIVE_WIDTH - rect.left); 7273b378b35SHans de Goede rect.height = min_t(unsigned int, rect.height, 7283b378b35SHans de Goede OV2680_NATIVE_HEIGHT - rect.top); 7293b378b35SHans de Goede 7303b378b35SHans de Goede crop = __ov2680_get_pad_crop(sensor, state, sel->pad, sel->which); 7313b378b35SHans de Goede 7323b378b35SHans de Goede mutex_lock(&sensor->lock); 7333b378b35SHans de Goede if (rect.width != crop->width || rect.height != crop->height) { 7343b378b35SHans de Goede /* 7353b378b35SHans de Goede * Reset the output image size if the crop rectangle size has 7363b378b35SHans de Goede * been modified. 7373b378b35SHans de Goede */ 7383b378b35SHans de Goede format = __ov2680_get_pad_format(sensor, state, sel->pad, 7393b378b35SHans de Goede sel->which); 7403b378b35SHans de Goede format->width = rect.width; 7413b378b35SHans de Goede format->height = rect.height; 7423b378b35SHans de Goede } 7433b378b35SHans de Goede 7443b378b35SHans de Goede *crop = rect; 7453b378b35SHans de Goede mutex_unlock(&sensor->lock); 7463b378b35SHans de Goede 7473b378b35SHans de Goede sel->r = rect; 7483b378b35SHans de Goede 7493b378b35SHans de Goede return 0; 7503b378b35SHans de Goede } 7513b378b35SHans de Goede 7523ee47cadSRui Miguel Silva static int ov2680_init_cfg(struct v4l2_subdev *sd, 7530d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state) 7543ee47cadSRui Miguel Silva { 7556d6849b2SHans de Goede struct ov2680_dev *sensor = to_ov2680_dev(sd); 7563ee47cadSRui Miguel Silva 7573b378b35SHans de Goede sd_state->pads[0].try_crop = ov2680_default_crop; 7583b378b35SHans de Goede 7596d6849b2SHans de Goede ov2680_fill_format(sensor, &sd_state->pads[0].try_fmt, 7606d6849b2SHans de Goede OV2680_DEFAULT_WIDTH, OV2680_DEFAULT_HEIGHT); 7616d6849b2SHans de Goede return 0; 7623ee47cadSRui Miguel Silva } 7633ee47cadSRui Miguel Silva 7643ee47cadSRui Miguel Silva static int ov2680_enum_frame_size(struct v4l2_subdev *sd, 7650d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 7663ee47cadSRui Miguel Silva struct v4l2_subdev_frame_size_enum *fse) 7673ee47cadSRui Miguel Silva { 7683b378b35SHans de Goede struct ov2680_dev *sensor = to_ov2680_dev(sd); 7693b378b35SHans de Goede struct v4l2_rect *crop; 7703b378b35SHans de Goede 77163f47529SHans de Goede if (fse->index >= OV2680_FRAME_SIZES) 7723ee47cadSRui Miguel Silva return -EINVAL; 7733ee47cadSRui Miguel Silva 7743b378b35SHans de Goede crop = __ov2680_get_pad_crop(sensor, sd_state, fse->pad, fse->which); 7753b378b35SHans de Goede if (!crop) 7763b378b35SHans de Goede return -EINVAL; 7773b378b35SHans de Goede 7783b378b35SHans de Goede fse->min_width = crop->width / (fse->index + 1); 7793b378b35SHans de Goede fse->min_height = crop->height / (fse->index + 1); 78063f47529SHans de Goede fse->max_width = fse->min_width; 78163f47529SHans de Goede fse->max_height = fse->min_height; 7823ee47cadSRui Miguel Silva 7833ee47cadSRui Miguel Silva return 0; 7843ee47cadSRui Miguel Silva } 7853ee47cadSRui Miguel Silva 78663f47529SHans de Goede static bool ov2680_valid_frame_size(struct v4l2_subdev *sd, 78763f47529SHans de Goede struct v4l2_subdev_state *sd_state, 78863f47529SHans de Goede struct v4l2_subdev_frame_interval_enum *fie) 7894007015eSHans de Goede { 79063f47529SHans de Goede struct v4l2_subdev_frame_size_enum fse = { 79163f47529SHans de Goede .pad = fie->pad, 79263f47529SHans de Goede .which = fie->which, 79363f47529SHans de Goede }; 7944007015eSHans de Goede int i; 7954007015eSHans de Goede 79663f47529SHans de Goede for (i = 0; i < OV2680_FRAME_SIZES; i++) { 79763f47529SHans de Goede fse.index = i; 79863f47529SHans de Goede 79963f47529SHans de Goede if (ov2680_enum_frame_size(sd, sd_state, &fse)) 80063f47529SHans de Goede return false; 80163f47529SHans de Goede 80263f47529SHans de Goede if (fie->width == fse.min_width && 80363f47529SHans de Goede fie->height == fse.min_height) 8044007015eSHans de Goede return true; 8054007015eSHans de Goede } 8064007015eSHans de Goede 8074007015eSHans de Goede return false; 8084007015eSHans de Goede } 8094007015eSHans de Goede 8103ee47cadSRui Miguel Silva static int ov2680_enum_frame_interval(struct v4l2_subdev *sd, 8110d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 8123ee47cadSRui Miguel Silva struct v4l2_subdev_frame_interval_enum *fie) 8133ee47cadSRui Miguel Silva { 8144007015eSHans de Goede struct ov2680_dev *sensor = to_ov2680_dev(sd); 8153ee47cadSRui Miguel Silva 8164007015eSHans de Goede /* Only 1 framerate */ 81763f47529SHans de Goede if (fie->index || !ov2680_valid_frame_size(sd, sd_state, fie)) 8183ee47cadSRui Miguel Silva return -EINVAL; 8193ee47cadSRui Miguel Silva 820f614dfb8SHans de Goede fie->interval = sensor->mode.frame_interval; 8213ee47cadSRui Miguel Silva 8223ee47cadSRui Miguel Silva return 0; 8233ee47cadSRui Miguel Silva } 8243ee47cadSRui Miguel Silva 8253ee47cadSRui Miguel Silva static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl) 8263ee47cadSRui Miguel Silva { 8273ee47cadSRui Miguel Silva struct v4l2_subdev *sd = ctrl_to_sd(ctrl); 8283ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 82937f7e57eSHans de Goede int ret; 8303ee47cadSRui Miguel Silva 83137f7e57eSHans de Goede /* Only apply changes to the controls if the device is powered up */ 83237f7e57eSHans de Goede if (!pm_runtime_get_if_in_use(sensor->sd.dev)) { 833f614dfb8SHans de Goede ov2680_set_bayer_order(sensor, &sensor->mode.fmt); 8343ee47cadSRui Miguel Silva return 0; 83537f7e57eSHans de Goede } 8363ee47cadSRui Miguel Silva 8373ee47cadSRui Miguel Silva switch (ctrl->id) { 83805d6bd86SHans de Goede case V4L2_CID_ANALOGUE_GAIN: 83937f7e57eSHans de Goede ret = ov2680_gain_set(sensor, ctrl->val); 84037f7e57eSHans de Goede break; 8413ee47cadSRui Miguel Silva case V4L2_CID_EXPOSURE: 84237f7e57eSHans de Goede ret = ov2680_exposure_set(sensor, ctrl->val); 84337f7e57eSHans de Goede break; 8443ee47cadSRui Miguel Silva case V4L2_CID_VFLIP: 84537f7e57eSHans de Goede ret = ov2680_set_vflip(sensor, ctrl->val); 84637f7e57eSHans de Goede break; 8473ee47cadSRui Miguel Silva case V4L2_CID_HFLIP: 84837f7e57eSHans de Goede ret = ov2680_set_hflip(sensor, ctrl->val); 84937f7e57eSHans de Goede break; 8503ee47cadSRui Miguel Silva case V4L2_CID_TEST_PATTERN: 85137f7e57eSHans de Goede ret = ov2680_test_pattern_set(sensor, ctrl->val); 85237f7e57eSHans de Goede break; 8533ee47cadSRui Miguel Silva default: 85437f7e57eSHans de Goede ret = -EINVAL; 8553ee47cadSRui Miguel Silva break; 8563ee47cadSRui Miguel Silva } 8573ee47cadSRui Miguel Silva 85837f7e57eSHans de Goede pm_runtime_put(sensor->sd.dev); 85937f7e57eSHans de Goede return ret; 8603ee47cadSRui Miguel Silva } 8613ee47cadSRui Miguel Silva 8623ee47cadSRui Miguel Silva static const struct v4l2_ctrl_ops ov2680_ctrl_ops = { 8633ee47cadSRui Miguel Silva .s_ctrl = ov2680_s_ctrl, 8643ee47cadSRui Miguel Silva }; 8653ee47cadSRui Miguel Silva 8663ee47cadSRui Miguel Silva static const struct v4l2_subdev_video_ops ov2680_video_ops = { 8673ee47cadSRui Miguel Silva .g_frame_interval = ov2680_s_g_frame_interval, 8683ee47cadSRui Miguel Silva .s_frame_interval = ov2680_s_g_frame_interval, 8693ee47cadSRui Miguel Silva .s_stream = ov2680_s_stream, 8703ee47cadSRui Miguel Silva }; 8713ee47cadSRui Miguel Silva 8723ee47cadSRui Miguel Silva static const struct v4l2_subdev_pad_ops ov2680_pad_ops = { 8733ee47cadSRui Miguel Silva .init_cfg = ov2680_init_cfg, 8743ee47cadSRui Miguel Silva .enum_mbus_code = ov2680_enum_mbus_code, 8753ee47cadSRui Miguel Silva .enum_frame_size = ov2680_enum_frame_size, 8763ee47cadSRui Miguel Silva .enum_frame_interval = ov2680_enum_frame_interval, 8773b378b35SHans de Goede .get_fmt = ov2680_get_fmt, 8783b378b35SHans de Goede .set_fmt = ov2680_set_fmt, 8793b378b35SHans de Goede .get_selection = ov2680_get_selection, 8803b378b35SHans de Goede .set_selection = ov2680_set_selection, 8813ee47cadSRui Miguel Silva }; 8823ee47cadSRui Miguel Silva 8833ee47cadSRui Miguel Silva static const struct v4l2_subdev_ops ov2680_subdev_ops = { 8843ee47cadSRui Miguel Silva .video = &ov2680_video_ops, 8853ee47cadSRui Miguel Silva .pad = &ov2680_pad_ops, 8863ee47cadSRui Miguel Silva }; 8873ee47cadSRui Miguel Silva 8883ee47cadSRui Miguel Silva static int ov2680_mode_init(struct ov2680_dev *sensor) 8893ee47cadSRui Miguel Silva { 8903ee47cadSRui Miguel Silva /* set initial mode */ 8913b378b35SHans de Goede sensor->mode.crop = ov2680_default_crop; 892f614dfb8SHans de Goede ov2680_fill_format(sensor, &sensor->mode.fmt, 8936d6849b2SHans de Goede OV2680_DEFAULT_WIDTH, OV2680_DEFAULT_HEIGHT); 89463f47529SHans de Goede ov2680_calc_mode(sensor); 8953ee47cadSRui Miguel Silva 896f614dfb8SHans de Goede sensor->mode.frame_interval.denominator = OV2680_FRAME_RATE; 897f614dfb8SHans de Goede sensor->mode.frame_interval.numerator = 1; 8983ee47cadSRui Miguel Silva 8993ee47cadSRui Miguel Silva return 0; 9003ee47cadSRui Miguel Silva } 9013ee47cadSRui Miguel Silva 902e7f4861dSJavier Martinez Canillas static int ov2680_v4l2_register(struct ov2680_dev *sensor) 9033ee47cadSRui Miguel Silva { 9047adfdecbSHans de Goede struct i2c_client *client = to_i2c_client(sensor->dev); 9053ee47cadSRui Miguel Silva const struct v4l2_ctrl_ops *ops = &ov2680_ctrl_ops; 9063ee47cadSRui Miguel Silva struct ov2680_ctrls *ctrls = &sensor->ctrls; 9073ee47cadSRui Miguel Silva struct v4l2_ctrl_handler *hdl = &ctrls->handler; 90805d6bd86SHans de Goede int exp_max = OV2680_LINES_PER_FRAME - OV2680_INTEGRATION_TIME_MARGIN; 9093ee47cadSRui Miguel Silva int ret = 0; 9103ee47cadSRui Miguel Silva 9117adfdecbSHans de Goede v4l2_i2c_subdev_init(&sensor->sd, client, &ov2680_subdev_ops); 9123ee47cadSRui Miguel Silva 9133ee47cadSRui Miguel Silva sensor->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE; 9143ee47cadSRui Miguel Silva sensor->pad.flags = MEDIA_PAD_FL_SOURCE; 9153ee47cadSRui Miguel Silva sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 9163ee47cadSRui Miguel Silva 9173ee47cadSRui Miguel Silva ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); 9183ee47cadSRui Miguel Silva if (ret < 0) 9193ee47cadSRui Miguel Silva return ret; 9203ee47cadSRui Miguel Silva 9217b5a42e6SHans de Goede v4l2_ctrl_handler_init(hdl, 5); 9223ee47cadSRui Miguel Silva 9233ee47cadSRui Miguel Silva hdl->lock = &sensor->lock; 9243ee47cadSRui Miguel Silva 9253ee47cadSRui Miguel Silva ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 0, 1, 1, 0); 9263ee47cadSRui Miguel Silva ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 0, 1, 1, 0); 9273ee47cadSRui Miguel Silva 9283ee47cadSRui Miguel Silva ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(hdl, 9293ee47cadSRui Miguel Silva &ov2680_ctrl_ops, V4L2_CID_TEST_PATTERN, 9303ee47cadSRui Miguel Silva ARRAY_SIZE(test_pattern_menu) - 1, 9313ee47cadSRui Miguel Silva 0, 0, test_pattern_menu); 9323ee47cadSRui Miguel Silva 9333ee47cadSRui Miguel Silva ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, 93405d6bd86SHans de Goede 0, exp_max, 1, exp_max); 9353ee47cadSRui Miguel Silva 93605d6bd86SHans de Goede ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, 93705d6bd86SHans de Goede 0, 1023, 1, 250); 9383ee47cadSRui Miguel Silva 9393ee47cadSRui Miguel Silva if (hdl->error) { 9403ee47cadSRui Miguel Silva ret = hdl->error; 9413ee47cadSRui Miguel Silva goto cleanup_entity; 9423ee47cadSRui Miguel Silva } 9433ee47cadSRui Miguel Silva 94466274280SDave Stevenson ctrls->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 94566274280SDave Stevenson ctrls->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 9463ee47cadSRui Miguel Silva 9473ee47cadSRui Miguel Silva sensor->sd.ctrl_handler = hdl; 9483ee47cadSRui Miguel Silva 9493ee47cadSRui Miguel Silva ret = v4l2_async_register_subdev(&sensor->sd); 9503ee47cadSRui Miguel Silva if (ret < 0) 9513ee47cadSRui Miguel Silva goto cleanup_entity; 9523ee47cadSRui Miguel Silva 9533ee47cadSRui Miguel Silva return 0; 9543ee47cadSRui Miguel Silva 9553ee47cadSRui Miguel Silva cleanup_entity: 9563ee47cadSRui Miguel Silva media_entity_cleanup(&sensor->sd.entity); 9573ee47cadSRui Miguel Silva v4l2_ctrl_handler_free(hdl); 9583ee47cadSRui Miguel Silva 9593ee47cadSRui Miguel Silva return ret; 9603ee47cadSRui Miguel Silva } 9613ee47cadSRui Miguel Silva 9623ee47cadSRui Miguel Silva static int ov2680_get_regulators(struct ov2680_dev *sensor) 9633ee47cadSRui Miguel Silva { 9643ee47cadSRui Miguel Silva int i; 9653ee47cadSRui Miguel Silva 9663ee47cadSRui Miguel Silva for (i = 0; i < OV2680_NUM_SUPPLIES; i++) 9673ee47cadSRui Miguel Silva sensor->supplies[i].supply = ov2680_supply_name[i]; 9683ee47cadSRui Miguel Silva 9697adfdecbSHans de Goede return devm_regulator_bulk_get(sensor->dev, 9707adfdecbSHans de Goede OV2680_NUM_SUPPLIES, sensor->supplies); 9713ee47cadSRui Miguel Silva } 9723ee47cadSRui Miguel Silva 9733ee47cadSRui Miguel Silva static int ov2680_check_id(struct ov2680_dev *sensor) 9743ee47cadSRui Miguel Silva { 9759289998eSHans de Goede u64 chip_id; 9763ee47cadSRui Miguel Silva int ret; 9773ee47cadSRui Miguel Silva 9789289998eSHans de Goede ret = cci_read(sensor->regmap, OV2680_REG_CHIP_ID, &chip_id, NULL); 9793ee47cadSRui Miguel Silva if (ret < 0) { 9807adfdecbSHans de Goede dev_err(sensor->dev, "failed to read chip id\n"); 9813ee47cadSRui Miguel Silva return -ENODEV; 9823ee47cadSRui Miguel Silva } 9833ee47cadSRui Miguel Silva 9843ee47cadSRui Miguel Silva if (chip_id != OV2680_CHIP_ID) { 9857adfdecbSHans de Goede dev_err(sensor->dev, "chip id: 0x%04llx does not match expected 0x%04x\n", 9863ee47cadSRui Miguel Silva chip_id, OV2680_CHIP_ID); 9873ee47cadSRui Miguel Silva return -ENODEV; 9883ee47cadSRui Miguel Silva } 9893ee47cadSRui Miguel Silva 9903ee47cadSRui Miguel Silva return 0; 9913ee47cadSRui Miguel Silva } 9923ee47cadSRui Miguel Silva 993913c55a8SChristophe JAILLET static int ov2680_parse_dt(struct ov2680_dev *sensor) 9943ee47cadSRui Miguel Silva { 9957adfdecbSHans de Goede struct device *dev = sensor->dev; 99683634470SHans de Goede struct fwnode_handle *ep_fwnode; 997e9305a23SHans de Goede struct gpio_desc *gpio; 998ec7dfad5SHans de Goede unsigned int rate = 0; 9998e50a122SHans de Goede int i, ret; 10003ee47cadSRui Miguel Silva 1001e9305a23SHans de Goede /* 100283634470SHans de Goede * Sometimes the fwnode graph is initialized by the bridge driver. 100383634470SHans de Goede * Bridge drivers doing this may also add GPIO mappings, wait for this. 100483634470SHans de Goede */ 100583634470SHans de Goede ep_fwnode = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); 100683634470SHans de Goede if (!ep_fwnode) 100783634470SHans de Goede return dev_err_probe(dev, -EPROBE_DEFER, 100883634470SHans de Goede "waiting for fwnode graph endpoint\n"); 100983634470SHans de Goede 101083634470SHans de Goede fwnode_handle_put(ep_fwnode); 101183634470SHans de Goede 101283634470SHans de Goede /* 1013e9305a23SHans de Goede * The pin we want is named XSHUTDN in the datasheet. Linux sensor 1014e9305a23SHans de Goede * drivers have standardized on using "powerdown" as con-id name 1015e9305a23SHans de Goede * for powerdown or shutdown pins. Older DTB files use "reset", 1016e9305a23SHans de Goede * so fallback to that if there is no "powerdown" pin. 1017e9305a23SHans de Goede */ 1018e9305a23SHans de Goede gpio = devm_gpiod_get_optional(dev, "powerdown", GPIOD_OUT_HIGH); 1019e9305a23SHans de Goede if (!gpio) 1020e9305a23SHans de Goede gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); 1021e9305a23SHans de Goede 1022e9305a23SHans de Goede ret = PTR_ERR_OR_ZERO(gpio); 10233ee47cadSRui Miguel Silva if (ret < 0) { 10243ee47cadSRui Miguel Silva dev_dbg(dev, "error while getting reset gpio: %d\n", ret); 10253ee47cadSRui Miguel Silva return ret; 10263ee47cadSRui Miguel Silva } 10273ee47cadSRui Miguel Silva 1028e9305a23SHans de Goede sensor->pwdn_gpio = gpio; 1029e9305a23SHans de Goede 1030ec7dfad5SHans de Goede sensor->xvclk = devm_clk_get_optional(dev, "xvclk"); 10313ee47cadSRui Miguel Silva if (IS_ERR(sensor->xvclk)) { 10323ee47cadSRui Miguel Silva dev_err(dev, "xvclk clock missing or invalid\n"); 10333ee47cadSRui Miguel Silva return PTR_ERR(sensor->xvclk); 10343ee47cadSRui Miguel Silva } 10353ee47cadSRui Miguel Silva 1036ec7dfad5SHans de Goede /* 1037ec7dfad5SHans de Goede * We could have either a 24MHz or 19.2MHz clock rate from either DT or 1038ec7dfad5SHans de Goede * ACPI... but we also need to support the weird IPU3 case which will 1039ec7dfad5SHans de Goede * have an external clock AND a clock-frequency property. Check for the 1040ec7dfad5SHans de Goede * clock-frequency property and if found, set that rate if we managed 1041ec7dfad5SHans de Goede * to acquire a clock. This should cover the ACPI case. If the system 1042ec7dfad5SHans de Goede * uses devicetree then the configured rate should already be set, so 1043ec7dfad5SHans de Goede * we can just read it. 1044ec7dfad5SHans de Goede */ 1045ec7dfad5SHans de Goede ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", 1046ec7dfad5SHans de Goede &rate); 1047ec7dfad5SHans de Goede if (ret && !sensor->xvclk) 1048ec7dfad5SHans de Goede return dev_err_probe(dev, ret, "invalid clock config\n"); 1049ec7dfad5SHans de Goede 1050ec7dfad5SHans de Goede if (!ret && sensor->xvclk) { 1051ec7dfad5SHans de Goede ret = clk_set_rate(sensor->xvclk, rate); 1052ec7dfad5SHans de Goede if (ret) 1053ec7dfad5SHans de Goede return dev_err_probe(dev, ret, 1054ec7dfad5SHans de Goede "failed to set clock rate\n"); 1055ec7dfad5SHans de Goede } 1056ec7dfad5SHans de Goede 1057ec7dfad5SHans de Goede sensor->xvclk_freq = rate ?: clk_get_rate(sensor->xvclk); 10588e50a122SHans de Goede 10598e50a122SHans de Goede for (i = 0; i < ARRAY_SIZE(ov2680_xvclk_freqs); i++) { 10608e50a122SHans de Goede if (sensor->xvclk_freq == ov2680_xvclk_freqs[i]) 10618e50a122SHans de Goede break; 10623ee47cadSRui Miguel Silva } 10633ee47cadSRui Miguel Silva 10648e50a122SHans de Goede if (i == ARRAY_SIZE(ov2680_xvclk_freqs)) 10658e50a122SHans de Goede return dev_err_probe(dev, -EINVAL, 10668e50a122SHans de Goede "unsupported xvclk frequency %d Hz\n", 10678e50a122SHans de Goede sensor->xvclk_freq); 10688e50a122SHans de Goede 10698e50a122SHans de Goede sensor->pll_mult = ov2680_pll_multipliers[i]; 10708e50a122SHans de Goede 10713ee47cadSRui Miguel Silva return 0; 10723ee47cadSRui Miguel Silva } 10733ee47cadSRui Miguel Silva 10743ee47cadSRui Miguel Silva static int ov2680_probe(struct i2c_client *client) 10753ee47cadSRui Miguel Silva { 10763ee47cadSRui Miguel Silva struct device *dev = &client->dev; 10773ee47cadSRui Miguel Silva struct ov2680_dev *sensor; 10783ee47cadSRui Miguel Silva int ret; 10793ee47cadSRui Miguel Silva 10803ee47cadSRui Miguel Silva sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); 10813ee47cadSRui Miguel Silva if (!sensor) 10823ee47cadSRui Miguel Silva return -ENOMEM; 10833ee47cadSRui Miguel Silva 10847adfdecbSHans de Goede sensor->dev = &client->dev; 10853ee47cadSRui Miguel Silva 10869289998eSHans de Goede sensor->regmap = devm_cci_regmap_init_i2c(client, 16); 10879289998eSHans de Goede if (IS_ERR(sensor->regmap)) 10889289998eSHans de Goede return PTR_ERR(sensor->regmap); 10899289998eSHans de Goede 1090913c55a8SChristophe JAILLET ret = ov2680_parse_dt(sensor); 10913ee47cadSRui Miguel Silva if (ret < 0) 109283634470SHans de Goede return ret; 10933ee47cadSRui Miguel Silva 10943ee47cadSRui Miguel Silva ret = ov2680_mode_init(sensor); 10953ee47cadSRui Miguel Silva if (ret < 0) 10963ee47cadSRui Miguel Silva return ret; 10973ee47cadSRui Miguel Silva 10983ee47cadSRui Miguel Silva ret = ov2680_get_regulators(sensor); 10993ee47cadSRui Miguel Silva if (ret < 0) { 11003ee47cadSRui Miguel Silva dev_err(dev, "failed to get regulators\n"); 11013ee47cadSRui Miguel Silva return ret; 11023ee47cadSRui Miguel Silva } 11033ee47cadSRui Miguel Silva 11043ee47cadSRui Miguel Silva mutex_init(&sensor->lock); 11053ee47cadSRui Miguel Silva 1106990732a6SHans de Goede /* 1107990732a6SHans de Goede * Power up and verify the chip now, so that if runtime pm is 1108990732a6SHans de Goede * disabled the chip is left on and streaming will work. 1109990732a6SHans de Goede */ 1110990732a6SHans de Goede ret = ov2680_power_on(sensor); 11113ee47cadSRui Miguel Silva if (ret < 0) 11123ee47cadSRui Miguel Silva goto lock_destroy; 11133ee47cadSRui Miguel Silva 1114990732a6SHans de Goede ret = ov2680_check_id(sensor); 1115990732a6SHans de Goede if (ret < 0) 1116990732a6SHans de Goede goto err_powerdown; 1117990732a6SHans de Goede 1118990732a6SHans de Goede pm_runtime_set_active(&client->dev); 1119990732a6SHans de Goede pm_runtime_get_noresume(&client->dev); 1120990732a6SHans de Goede pm_runtime_enable(&client->dev); 1121990732a6SHans de Goede 1122e7f4861dSJavier Martinez Canillas ret = ov2680_v4l2_register(sensor); 11233ee47cadSRui Miguel Silva if (ret < 0) 1124990732a6SHans de Goede goto err_pm_runtime; 1125990732a6SHans de Goede 1126990732a6SHans de Goede pm_runtime_set_autosuspend_delay(&client->dev, 1000); 1127990732a6SHans de Goede pm_runtime_use_autosuspend(&client->dev); 1128990732a6SHans de Goede pm_runtime_put_autosuspend(&client->dev); 11293ee47cadSRui Miguel Silva 11303ee47cadSRui Miguel Silva dev_info(dev, "ov2680 init correctly\n"); 11313ee47cadSRui Miguel Silva 11323ee47cadSRui Miguel Silva return 0; 11333ee47cadSRui Miguel Silva 1134990732a6SHans de Goede err_pm_runtime: 1135990732a6SHans de Goede pm_runtime_disable(&client->dev); 1136990732a6SHans de Goede pm_runtime_put_noidle(&client->dev); 1137990732a6SHans de Goede err_powerdown: 1138990732a6SHans de Goede ov2680_power_off(sensor); 11393ee47cadSRui Miguel Silva lock_destroy: 1140b7a41762SJavier Martinez Canillas dev_err(dev, "ov2680 init fail: %d\n", ret); 11413ee47cadSRui Miguel Silva mutex_destroy(&sensor->lock); 11423ee47cadSRui Miguel Silva 11433ee47cadSRui Miguel Silva return ret; 11443ee47cadSRui Miguel Silva } 11453ee47cadSRui Miguel Silva 1146ed5c2f5fSUwe Kleine-König static void ov2680_remove(struct i2c_client *client) 11473ee47cadSRui Miguel Silva { 11483ee47cadSRui Miguel Silva struct v4l2_subdev *sd = i2c_get_clientdata(client); 11493ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 11503ee47cadSRui Miguel Silva 11513ee47cadSRui Miguel Silva v4l2_async_unregister_subdev(&sensor->sd); 11523ee47cadSRui Miguel Silva mutex_destroy(&sensor->lock); 11533ee47cadSRui Miguel Silva media_entity_cleanup(&sensor->sd.entity); 11543ee47cadSRui Miguel Silva v4l2_ctrl_handler_free(&sensor->ctrls.handler); 1155990732a6SHans de Goede 1156990732a6SHans de Goede /* 1157990732a6SHans de Goede * Disable runtime PM. In case runtime PM is disabled in the kernel, 1158990732a6SHans de Goede * make sure to turn power off manually. 1159990732a6SHans de Goede */ 1160990732a6SHans de Goede pm_runtime_disable(&client->dev); 1161990732a6SHans de Goede if (!pm_runtime_status_suspended(&client->dev)) 1162990732a6SHans de Goede ov2680_power_off(sensor); 1163990732a6SHans de Goede pm_runtime_set_suspended(&client->dev); 11643ee47cadSRui Miguel Silva } 11653ee47cadSRui Miguel Silva 1166990732a6SHans de Goede static int ov2680_suspend(struct device *dev) 11673ee47cadSRui Miguel Silva { 11687519296dSKrzysztof Kozlowski struct v4l2_subdev *sd = dev_get_drvdata(dev); 11693ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 11703ee47cadSRui Miguel Silva 11713ee47cadSRui Miguel Silva if (sensor->is_streaming) 11723ee47cadSRui Miguel Silva ov2680_stream_disable(sensor); 11733ee47cadSRui Miguel Silva 1174990732a6SHans de Goede return ov2680_power_off(sensor); 11753ee47cadSRui Miguel Silva } 11763ee47cadSRui Miguel Silva 1177990732a6SHans de Goede static int ov2680_resume(struct device *dev) 11783ee47cadSRui Miguel Silva { 11797519296dSKrzysztof Kozlowski struct v4l2_subdev *sd = dev_get_drvdata(dev); 11803ee47cadSRui Miguel Silva struct ov2680_dev *sensor = to_ov2680_dev(sd); 11813ee47cadSRui Miguel Silva int ret; 11823ee47cadSRui Miguel Silva 1183990732a6SHans de Goede ret = ov2680_power_on(sensor); 1184990732a6SHans de Goede if (ret < 0) 1185990732a6SHans de Goede goto stream_disable; 1186990732a6SHans de Goede 11873ee47cadSRui Miguel Silva if (sensor->is_streaming) { 11883ee47cadSRui Miguel Silva ret = ov2680_stream_enable(sensor); 11893ee47cadSRui Miguel Silva if (ret < 0) 11903ee47cadSRui Miguel Silva goto stream_disable; 11913ee47cadSRui Miguel Silva } 11923ee47cadSRui Miguel Silva 11933ee47cadSRui Miguel Silva return 0; 11943ee47cadSRui Miguel Silva 11953ee47cadSRui Miguel Silva stream_disable: 11963ee47cadSRui Miguel Silva ov2680_stream_disable(sensor); 11973ee47cadSRui Miguel Silva sensor->is_streaming = false; 11983ee47cadSRui Miguel Silva 11993ee47cadSRui Miguel Silva return ret; 12003ee47cadSRui Miguel Silva } 12013ee47cadSRui Miguel Silva 1202990732a6SHans de Goede static DEFINE_RUNTIME_DEV_PM_OPS(ov2680_pm_ops, ov2680_suspend, ov2680_resume, 1203990732a6SHans de Goede NULL); 12043ee47cadSRui Miguel Silva 12053ee47cadSRui Miguel Silva static const struct of_device_id ov2680_dt_ids[] = { 12063ee47cadSRui Miguel Silva { .compatible = "ovti,ov2680" }, 12073ee47cadSRui Miguel Silva { /* sentinel */ }, 12083ee47cadSRui Miguel Silva }; 12093ee47cadSRui Miguel Silva MODULE_DEVICE_TABLE(of, ov2680_dt_ids); 12103ee47cadSRui Miguel Silva 1211df3ecab8SHans de Goede static const struct acpi_device_id ov2680_acpi_ids[] = { 1212df3ecab8SHans de Goede { "OVTI2680" }, 1213df3ecab8SHans de Goede { /* sentinel */ } 1214df3ecab8SHans de Goede }; 1215df3ecab8SHans de Goede MODULE_DEVICE_TABLE(acpi, ov2680_acpi_ids); 1216df3ecab8SHans de Goede 12173ee47cadSRui Miguel Silva static struct i2c_driver ov2680_i2c_driver = { 12183ee47cadSRui Miguel Silva .driver = { 12193ee47cadSRui Miguel Silva .name = "ov2680", 1220990732a6SHans de Goede .pm = pm_sleep_ptr(&ov2680_pm_ops), 122114155c4fSKrzysztof Kozlowski .of_match_table = ov2680_dt_ids, 1222df3ecab8SHans de Goede .acpi_match_table = ov2680_acpi_ids, 12233ee47cadSRui Miguel Silva }, 1224aaeb31c0SUwe Kleine-König .probe = ov2680_probe, 12253ee47cadSRui Miguel Silva .remove = ov2680_remove, 12263ee47cadSRui Miguel Silva }; 12273ee47cadSRui Miguel Silva module_i2c_driver(ov2680_i2c_driver); 12283ee47cadSRui Miguel Silva 12293ee47cadSRui Miguel Silva MODULE_AUTHOR("Rui Miguel Silva <rui.silva@linaro.org>"); 12303ee47cadSRui Miguel Silva MODULE_DESCRIPTION("OV2680 CMOS Image Sensor driver"); 12313ee47cadSRui Miguel Silva MODULE_LICENSE("GPL v2"); 1232