1*74ba9207SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
29a0bf528SMauro Carvalho Chehab /*
39a0bf528SMauro Carvalho Chehab STB0899 Multistandard Frontend driver
49a0bf528SMauro Carvalho Chehab Copyright (C) Manu Abraham (abraham.manu@gmail.com)
59a0bf528SMauro Carvalho Chehab
69a0bf528SMauro Carvalho Chehab Copyright (C) ST Microelectronics
79a0bf528SMauro Carvalho Chehab
89a0bf528SMauro Carvalho Chehab */
99a0bf528SMauro Carvalho Chehab
109a0bf528SMauro Carvalho Chehab #ifndef __STB0899_DRV_H
119a0bf528SMauro Carvalho Chehab #define __STB0899_DRV_H
129a0bf528SMauro Carvalho Chehab
139a0bf528SMauro Carvalho Chehab #include <linux/kernel.h>
149a0bf528SMauro Carvalho Chehab #include <linux/module.h>
159a0bf528SMauro Carvalho Chehab
16fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
179a0bf528SMauro Carvalho Chehab
189a0bf528SMauro Carvalho Chehab #define STB0899_TSMODE_SERIAL 1
199a0bf528SMauro Carvalho Chehab #define STB0899_CLKPOL_FALLING 2
209a0bf528SMauro Carvalho Chehab #define STB0899_CLKNULL_PARITY 3
219a0bf528SMauro Carvalho Chehab #define STB0899_SYNC_FORCED 4
229a0bf528SMauro Carvalho Chehab #define STB0899_FECMODE_DSS 5
239a0bf528SMauro Carvalho Chehab
249a0bf528SMauro Carvalho Chehab struct stb0899_s1_reg {
259a0bf528SMauro Carvalho Chehab u16 address;
269a0bf528SMauro Carvalho Chehab u8 data;
279a0bf528SMauro Carvalho Chehab };
289a0bf528SMauro Carvalho Chehab
299a0bf528SMauro Carvalho Chehab struct stb0899_s2_reg {
309a0bf528SMauro Carvalho Chehab u16 offset;
319a0bf528SMauro Carvalho Chehab u32 base_address;
329a0bf528SMauro Carvalho Chehab u32 data;
339a0bf528SMauro Carvalho Chehab };
349a0bf528SMauro Carvalho Chehab
359a0bf528SMauro Carvalho Chehab enum stb0899_inversion {
36069ebbfcSReinhard Nißl IQ_SWAP_OFF = +1, /* inversion affects the sign of e. g. */
37069ebbfcSReinhard Nißl IQ_SWAP_ON = -1, /* the derotator frequency register */
389a0bf528SMauro Carvalho Chehab };
399a0bf528SMauro Carvalho Chehab
409a0bf528SMauro Carvalho Chehab #define STB0899_GPIO00 0xf140
419a0bf528SMauro Carvalho Chehab #define STB0899_GPIO01 0xf141
429a0bf528SMauro Carvalho Chehab #define STB0899_GPIO02 0xf142
439a0bf528SMauro Carvalho Chehab #define STB0899_GPIO03 0xf143
449a0bf528SMauro Carvalho Chehab #define STB0899_GPIO04 0xf144
459a0bf528SMauro Carvalho Chehab #define STB0899_GPIO05 0xf145
469a0bf528SMauro Carvalho Chehab #define STB0899_GPIO06 0xf146
479a0bf528SMauro Carvalho Chehab #define STB0899_GPIO07 0xf147
489a0bf528SMauro Carvalho Chehab #define STB0899_GPIO08 0xf148
499a0bf528SMauro Carvalho Chehab #define STB0899_GPIO09 0xf149
509a0bf528SMauro Carvalho Chehab #define STB0899_GPIO10 0xf14a
519a0bf528SMauro Carvalho Chehab #define STB0899_GPIO11 0xf14b
529a0bf528SMauro Carvalho Chehab #define STB0899_GPIO12 0xf14c
539a0bf528SMauro Carvalho Chehab #define STB0899_GPIO13 0xf14d
549a0bf528SMauro Carvalho Chehab #define STB0899_GPIO14 0xf14e
559a0bf528SMauro Carvalho Chehab #define STB0899_GPIO15 0xf14f
569a0bf528SMauro Carvalho Chehab #define STB0899_GPIO16 0xf150
579a0bf528SMauro Carvalho Chehab #define STB0899_GPIO17 0xf151
589a0bf528SMauro Carvalho Chehab #define STB0899_GPIO18 0xf152
599a0bf528SMauro Carvalho Chehab #define STB0899_GPIO19 0xf153
609a0bf528SMauro Carvalho Chehab #define STB0899_GPIO20 0xf154
619a0bf528SMauro Carvalho Chehab
629a0bf528SMauro Carvalho Chehab #define STB0899_GPIOPULLUP 0x01 /* Output device is connected to Vdd */
639a0bf528SMauro Carvalho Chehab #define STB0899_GPIOPULLDN 0x00 /* Output device is connected to Vss */
649a0bf528SMauro Carvalho Chehab
659a0bf528SMauro Carvalho Chehab #define STB0899_POSTPROC_GPIO_POWER 0x00
669a0bf528SMauro Carvalho Chehab #define STB0899_POSTPROC_GPIO_LOCK 0x01
679a0bf528SMauro Carvalho Chehab
689a0bf528SMauro Carvalho Chehab /*
699a0bf528SMauro Carvalho Chehab * Post process output configuration control
709a0bf528SMauro Carvalho Chehab * 1. POWER ON/OFF (index 0)
719a0bf528SMauro Carvalho Chehab * 2. FE_HAS_LOCK/LOCK_LOSS (index 1)
729a0bf528SMauro Carvalho Chehab *
739a0bf528SMauro Carvalho Chehab * @gpio = one of the above listed GPIO's
749a0bf528SMauro Carvalho Chehab * @level = output state: pulled up or low
759a0bf528SMauro Carvalho Chehab */
769a0bf528SMauro Carvalho Chehab struct stb0899_postproc {
779a0bf528SMauro Carvalho Chehab u16 gpio;
789a0bf528SMauro Carvalho Chehab u8 level;
799a0bf528SMauro Carvalho Chehab };
809a0bf528SMauro Carvalho Chehab
819a0bf528SMauro Carvalho Chehab struct stb0899_config {
829a0bf528SMauro Carvalho Chehab const struct stb0899_s1_reg *init_dev;
839a0bf528SMauro Carvalho Chehab const struct stb0899_s2_reg *init_s2_demod;
849a0bf528SMauro Carvalho Chehab const struct stb0899_s1_reg *init_s1_demod;
859a0bf528SMauro Carvalho Chehab const struct stb0899_s2_reg *init_s2_fec;
869a0bf528SMauro Carvalho Chehab const struct stb0899_s1_reg *init_tst;
879a0bf528SMauro Carvalho Chehab
889a0bf528SMauro Carvalho Chehab const struct stb0899_postproc *postproc;
899a0bf528SMauro Carvalho Chehab
909a0bf528SMauro Carvalho Chehab enum stb0899_inversion inversion;
919a0bf528SMauro Carvalho Chehab
929a0bf528SMauro Carvalho Chehab u32 xtal_freq;
939a0bf528SMauro Carvalho Chehab
949a0bf528SMauro Carvalho Chehab u8 demod_address;
959a0bf528SMauro Carvalho Chehab u8 ts_output_mode;
969a0bf528SMauro Carvalho Chehab u8 block_sync_mode;
979a0bf528SMauro Carvalho Chehab u8 ts_pfbit_toggle;
989a0bf528SMauro Carvalho Chehab
999a0bf528SMauro Carvalho Chehab u8 clock_polarity;
1009a0bf528SMauro Carvalho Chehab u8 data_clk_parity;
1019a0bf528SMauro Carvalho Chehab u8 fec_mode;
1029a0bf528SMauro Carvalho Chehab u8 data_output_ctl;
1039a0bf528SMauro Carvalho Chehab u8 data_fifo_mode;
1049a0bf528SMauro Carvalho Chehab u8 out_rate_comp;
1059a0bf528SMauro Carvalho Chehab u8 i2c_repeater;
1069a0bf528SMauro Carvalho Chehab // int inversion;
1079a0bf528SMauro Carvalho Chehab int lo_clk;
1089a0bf528SMauro Carvalho Chehab int hi_clk;
1099a0bf528SMauro Carvalho Chehab
1109a0bf528SMauro Carvalho Chehab u32 esno_ave;
1119a0bf528SMauro Carvalho Chehab u32 esno_quant;
1129a0bf528SMauro Carvalho Chehab u32 avframes_coarse;
1139a0bf528SMauro Carvalho Chehab u32 avframes_fine;
1149a0bf528SMauro Carvalho Chehab u32 miss_threshold;
1159a0bf528SMauro Carvalho Chehab u32 uwp_threshold_acq;
1169a0bf528SMauro Carvalho Chehab u32 uwp_threshold_track;
1179a0bf528SMauro Carvalho Chehab u32 uwp_threshold_sof;
1189a0bf528SMauro Carvalho Chehab u32 sof_search_timeout;
1199a0bf528SMauro Carvalho Chehab
1209a0bf528SMauro Carvalho Chehab u32 btr_nco_bits;
1219a0bf528SMauro Carvalho Chehab u32 btr_gain_shift_offset;
1229a0bf528SMauro Carvalho Chehab u32 crl_nco_bits;
1239a0bf528SMauro Carvalho Chehab u32 ldpc_max_iter;
1249a0bf528SMauro Carvalho Chehab
1259a0bf528SMauro Carvalho Chehab int (*tuner_set_frequency)(struct dvb_frontend *fe, u32 frequency);
1269a0bf528SMauro Carvalho Chehab int (*tuner_get_frequency)(struct dvb_frontend *fe, u32 *frequency);
1279a0bf528SMauro Carvalho Chehab int (*tuner_set_bandwidth)(struct dvb_frontend *fe, u32 bandwidth);
1289a0bf528SMauro Carvalho Chehab int (*tuner_get_bandwidth)(struct dvb_frontend *fe, u32 *bandwidth);
1299a0bf528SMauro Carvalho Chehab int (*tuner_set_rfsiggain)(struct dvb_frontend *fe, u32 rf_gain);
1309a0bf528SMauro Carvalho Chehab };
1319a0bf528SMauro Carvalho Chehab
1329b174527SArnd Bergmann #if IS_REACHABLE(CONFIG_DVB_STB0899)
1339a0bf528SMauro Carvalho Chehab
1349a0bf528SMauro Carvalho Chehab extern struct dvb_frontend *stb0899_attach(struct stb0899_config *config,
1359a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c);
1369a0bf528SMauro Carvalho Chehab
1379a0bf528SMauro Carvalho Chehab #else
1389a0bf528SMauro Carvalho Chehab
stb0899_attach(struct stb0899_config * config,struct i2c_adapter * i2c)1399a0bf528SMauro Carvalho Chehab static inline struct dvb_frontend *stb0899_attach(struct stb0899_config *config,
1409a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c)
1419a0bf528SMauro Carvalho Chehab {
1429a0bf528SMauro Carvalho Chehab printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
1439a0bf528SMauro Carvalho Chehab return NULL;
1449a0bf528SMauro Carvalho Chehab }
1459a0bf528SMauro Carvalho Chehab
1469a0bf528SMauro Carvalho Chehab #endif //CONFIG_DVB_STB0899
1479a0bf528SMauro Carvalho Chehab
1489a0bf528SMauro Carvalho Chehab
1499a0bf528SMauro Carvalho Chehab #endif
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